JP2002208571A - Method of manufacturing semiconductor device and semiconductor device - Google Patents

Method of manufacturing semiconductor device and semiconductor device

Info

Publication number
JP2002208571A
JP2002208571A JP2001004689A JP2001004689A JP2002208571A JP 2002208571 A JP2002208571 A JP 2002208571A JP 2001004689 A JP2001004689 A JP 2001004689A JP 2001004689 A JP2001004689 A JP 2001004689A JP 2002208571 A JP2002208571 A JP 2002208571A
Authority
JP
Japan
Prior art keywords
cutting
semiconductor
semiconductor element
semiconductor device
reinforcing member
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001004689A
Other languages
Japanese (ja)
Other versions
JP3649129B2 (en
Inventor
Tadahiko Sakai
忠彦 境
Seiji Sakami
省二 酒見
Mitsuru Osono
満 大園
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2001004689A priority Critical patent/JP3649129B2/en
Publication of JP2002208571A publication Critical patent/JP2002208571A/en
Application granted granted Critical
Publication of JP3649129B2 publication Critical patent/JP3649129B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • H01L2924/3511Warping

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Dicing (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device, which can efficiently manufacture the semiconductor device where a thinned semiconductor element is easily treated, and to provide the semiconductor device. SOLUTION: In the method of manufacturing a semiconductor device 7, the semiconductor device 7 where a bumper member 4' larger than the semiconductor element 1' is jointed to the back of the electrode forming face of the semiconductor element 1' through a resin adhesion material 5 whose elastic coefficient is low is manufactured. A thinned semiconductor saver 1 and a bumper board 4 are jointed by the adhesion material 5 and the semiconductor wafer 1 is cut in cut width b1 by a first cutting tool 13A. Then, the bumper board 4 is cut by a second cutting tool 13B with a cutting width b2 narrower than the cutting width b1. Consequently, the semiconductor device 7 can efficiently be manufactured.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子の電極
形成面の裏面に接着材により補強部材を接合して成る半
導体装置の製造方法および半導体装置に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device and a method of manufacturing a semiconductor device by bonding a reinforcing member to the back surface of an electrode forming surface of a semiconductor element with an adhesive.

【0002】[0002]

【従来の技術】電子機器の基板などに実装される半導体
装置は、ウェハ状態で回路パターン形成が行われた半導
体素子にリードフレームのピンや金属バンプなどを接続
するとともに樹脂などで封止するパッケージング工程を
経て製造されている。最近の電子機器の小型化に伴って
半導体装置の小型化も進み、中でも半導体素子を薄くす
る取り組みが活発に行われている。
2. Description of the Related Art A semiconductor device mounted on a substrate or the like of an electronic device is a package in which a semiconductor element having a circuit pattern formed in a wafer state is connected with a lead frame pin or a metal bump and sealed with a resin or the like. It is manufactured through a aging process. With the recent miniaturization of electronic devices, miniaturization of semiconductor devices has progressed, and in particular, efforts have been actively made to make semiconductor elements thinner.

【0003】薄化された半導体素子は外力に対する強度
が弱くハンドリング時のダメージを受けやすいことか
ら、従来より薄化された半導体素子を用いた半導体装置
は、半導体素子を補強のための樹脂層で封止する構造が
一般的である。
Since a thinned semiconductor element has low strength against external force and is easily damaged during handling, a semiconductor device using a thinned semiconductor element in the related art has a resin layer for reinforcing the semiconductor element. A structure for sealing is common.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、薄い半
導体素子の表面に樹脂層を形成する工程においては、樹
脂層形成時の硬化収縮による半導体素子の反りや割れな
どの不具合が発生しやすいものであった。この問題は半
導体素子が薄化するほど顕著となり、100μm以下の
極薄の半導体素子では樹脂封止することすら困難な状況
となる。
However, in the process of forming a resin layer on the surface of a thin semiconductor element, defects such as warping and cracking of the semiconductor element due to curing shrinkage during the formation of the resin layer are likely to occur. Was. This problem becomes more conspicuous as the semiconductor element becomes thinner, and it becomes difficult to seal the semiconductor element even with a very thin semiconductor element having a thickness of 100 μm or less.

【0005】そこで本発明は、薄化された半導体素子の
取り扱いが簡単な半導体装置を効率よく製造することが
できる半導体装置の製造方法および半導体装置を提供す
ることを目的とする。
Accordingly, an object of the present invention is to provide a semiconductor device manufacturing method and a semiconductor device capable of efficiently manufacturing a semiconductor device in which a thinned semiconductor element can be easily handled.

【0006】[0006]

【課題を解決するための手段】請求項1記載の半導体装
置の製造方法は、半導体素子の外部接続用の電極が形成
された電極形成面の裏面に低弾性係数の樹脂接着材を介
してこの半導体素子よりも大きい補強部材を接合して成
る半導体装置を製造する半導体装置の製造方法であっ
て、複数の半導体素子が形成された半導体ウェハの電極
形成面の裏面を削る薄化工程と、薄化工程後の前記半導
体素子の裏面に低弾性係数の樹脂接着材を介して補強部
材を接合する接合工程と、接合工程後の半導体ウェハを
第1の切断具によって切断する第1切断工程と、第1切
断工程後に第1の切断具の切断幅よりも狭い切断幅を有
する第2の切断具によって前記補強部材を切断する第2
切断工程とを含む。
According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein a low elastic coefficient resin adhesive is provided on a back surface of an electrode forming surface on which an external connection electrode of a semiconductor element is formed. A method of manufacturing a semiconductor device, comprising manufacturing a semiconductor device by joining a reinforcing member larger than a semiconductor element, comprising: a thinning step of shaving a back surface of an electrode forming surface of a semiconductor wafer on which a plurality of semiconductor elements are formed; A joining step of joining a reinforcing member to the back surface of the semiconductor element via a resin adhesive having a low elastic modulus after the forming step, and a first cutting step of cutting the semiconductor wafer after the joining step with a first cutting tool; A second cutting tool that cuts the reinforcing member with a second cutting tool having a smaller cutting width than the cutting width of the first cutting tool after the first cutting step;
Cutting step.

【0007】請求項2記載の半導体装置の製造方法は、
半導体素子の外部接続用の電極が形成された電極形成面
の裏面に低弾性係数の樹脂接着材を介してこの半導体素
子よりも大きい補強部材を接合して成る半導体装置を製
造する半導体装置の製造方法であって、複数の半導体素
子が形成された半導体ウェハの電極形成面の裏面を削る
薄化工程と、薄化工程後の前記半導体素子の裏面に低弾
性係数の樹脂接着材を介して補強部材を接合する接合工
程と、接合された半導体素子と補強部材とを半導体素子
側の方が補強部材側よりも切断幅が大きいテーパ状切断
面を有する切断具によって切断する切断工程とを含む。
According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device.
Manufacture of a semiconductor device for manufacturing a semiconductor device in which a reinforcing member larger than the semiconductor element is joined to a back surface of an electrode formation surface on which an electrode for external connection of the semiconductor element is formed via a resin adhesive having a low elastic modulus. A method for thinning a back surface of an electrode forming surface of a semiconductor wafer on which a plurality of semiconductor elements are formed, and reinforcing the back surface of the semiconductor element after the thinning step via a resin adhesive having a low elastic modulus. A joining step of joining the members and a cutting step of cutting the joined semiconductor element and the reinforcing member with a cutting tool having a tapered cutting surface having a larger cutting width on the semiconductor element side than on the reinforcing member side are included.

【0008】請求項3記載の半導体装置は、半導体素子
の外部接続用の電極が形成された電極形成面の裏面に低
弾性係数の樹脂接着材を介してこの半導体素子よりも大
きい補強部材を接合して成る半導体装置であって、複数
の半導体素子が形成された半導体ウェハの電極形成面の
裏面を削る薄化工程と、薄化工程後の前記半導体素子の
裏面に低弾性係数の樹脂接着材を介して補強部材を接合
する接合工程と、接合工程後の半導体ウェハを第1の切
断具によって切断する第1切断工程と、第1切断工程後
に第1の切断具の切断幅よりも狭い切断幅を有する第2
の切断具によって前記補強部材を切断する第2切断工程
とを含む半導体装置の製造方法によって製造された。
According to a third aspect of the present invention, a reinforcing member larger than the semiconductor element is joined to the back surface of the electrode forming surface on which the electrodes for external connection of the semiconductor element are formed via a resin adhesive having a low elastic coefficient. A thinning step of shaving a back surface of an electrode forming surface of a semiconductor wafer on which a plurality of semiconductor elements are formed, and a resin adhesive having a low elastic modulus on the back surface of the semiconductor element after the thinning step. Joining the reinforcing member through the first step, a first cutting step of cutting the semiconductor wafer after the joining step by the first cutting tool, and cutting after the first cutting step, the cutting width being smaller than the cutting width of the first cutting tool. Second with width
And a second cutting step of cutting the reinforcing member with the cutting tool.

【0009】請求項4記載の半導体装置は、半導体素子
の外部接続用の電極が形成された電極形成面の裏面に低
弾性係数の樹脂接着材を介してこの半導体素子よりも大
きい補強部材を接合して成る半導体装置であって、複数
の半導体素子が形成された半導体ウェハの電極形成面の
裏面を削る薄化工程と、薄化工程後の前記半導体素子の
裏面に低弾性係数の樹脂接着材を介して補強部材を接合
する接合工程と、接合された半導体素子と補強部材とを
半導体素子側の方が補強部材側よりも切断幅が大きいテ
ーパ状切断面を有する切断具によって切断する切断工程
とを含む半導体装置の製造方法によって製造された。
In a semiconductor device according to a fourth aspect of the present invention, a reinforcing member larger than the semiconductor element is joined to the back surface of the electrode forming surface on which an electrode for external connection of the semiconductor element is formed via a resin adhesive having a low elastic coefficient. A thinning step of shaving a back surface of an electrode forming surface of a semiconductor wafer on which a plurality of semiconductor elements are formed, and a resin adhesive having a low elastic modulus on the back surface of the semiconductor element after the thinning step. Joining the reinforcing member through the step, and cutting the joined semiconductor element and the reinforcing member by a cutting tool having a tapered cutting surface having a larger cutting width on the semiconductor element side than on the reinforcing member side And a method for manufacturing a semiconductor device including:

【0010】本発明によれば、薄化された半導体素子の
裏面に低弾性係数の樹脂接着材を介して補強部材を接合
した後の切断工程において、半導体ウェハ側の切断幅と
補強部材側の切断幅が異なる切断具によって切断するこ
とにより、電極形成面の裏面に低弾性係数の樹脂接着材
を介してこの半導体素子よりも大きい補強部材を接合し
て成る半導体装置を効率よく製造することができる。
According to the present invention, in the cutting step after bonding the reinforcing member to the back surface of the thinned semiconductor element via a resin adhesive having a low elastic modulus, the cutting width on the semiconductor wafer side and the cutting width on the reinforcing member side are reduced. By cutting with a cutting tool having a different cutting width, it is possible to efficiently manufacture a semiconductor device in which a reinforcing member larger than the semiconductor element is joined to the back surface of the electrode forming surface via a resin adhesive having a low elastic modulus. it can.

【0011】[0011]

【発明の実施の形態】次に本発明の実施の形態を図面を
参照して説明する。図1、図2は本発明の一実施の形態
の半導体装置の製造方法の工程説明図、図3は本発明の
一実施の形態の半導体装置の斜視図、図4は本発明の一
実施の形態の半導体装置の実装方法の説明図、図5は本
発明の一実施の形態の半導体装置の製造方法の工程説明
図である。なお、図1、図2は半導体装置の製造方法を
工程順に示している。
Embodiments of the present invention will now be described with reference to the drawings. 1 and 2 are process explanatory views of a method for manufacturing a semiconductor device according to one embodiment of the present invention, FIG. 3 is a perspective view of the semiconductor device according to one embodiment of the present invention, and FIG. FIG. 5 is an explanatory view of a method of mounting a semiconductor device according to an embodiment, and FIG. 1 and 2 show a method of manufacturing a semiconductor device in the order of steps.

【0012】図1(a)において、1は複数の半導体素
子が形成された半導体ウェハである。半導体ウェハ1の
上面には、外部接続用の電極であるバンプ2が形成され
ている。図1(b)に示すように、半導体ウェハ1の上
面のバンプ形成面(電極形成面)にはシート3が貼着さ
れ、シート3によって補強された状態で電極形成面の裏
面の薄化加工が行われる(薄化工程)。薄化加工手段と
しては、砥石を用いた研磨装置や、ドライエッチング装
置によるドライエッチング、さらには薬液の化学反応を
利用してエッチングを行うもの(ウェットエッチング)
がある。これにより、半導体ウェハ1は約50μmの厚
さまで薄化される。具体的な薄化加工方法としては、ま
ず砥石を用いた研磨装置で半導体ウェハ1の裏面の粗加
工を行い、ドライエッチングやウェットエッチングで仕
上げ加工を行う。この仕上げ加工では、粗加工によって
半導体ウェハの裏面に生じたマイクロクラックを除去す
るので、抗折強度に優れた極薄の半導体ウェハ1を得る
ことができる。
In FIG. 1A, reference numeral 1 denotes a semiconductor wafer on which a plurality of semiconductor elements are formed. On an upper surface of the semiconductor wafer 1, bumps 2 which are electrodes for external connection are formed. As shown in FIG. 1B, a sheet 3 is adhered to a bump forming surface (electrode forming surface) on the upper surface of the semiconductor wafer 1, and the back surface of the electrode forming surface is thinned while being reinforced by the sheet 3. Is performed (thinning step). Examples of thinning means include a polishing device using a grindstone, dry etching using a dry etching device, and etching using a chemical reaction of a chemical solution (wet etching).
There is. Thereby, the semiconductor wafer 1 is thinned to a thickness of about 50 μm. As a specific thinning method, first, the back surface of the semiconductor wafer 1 is roughly processed by a polishing device using a grindstone, and finish processing is performed by dry etching or wet etching. In this finishing process, microcracks generated on the back surface of the semiconductor wafer by the roughing process are removed, so that an extremely thin semiconductor wafer 1 excellent in bending strength can be obtained.

【0013】次に、薄化された半導体ウェハ1の下面へ
バンパ板4が接合される(接合工程)。図1(c)に示
すように、樹脂やセラミックあるいは金属などの材質を
板状に形成したバンパ板4の上面には接着材5が塗布さ
れる。ここで、接着材5は低弾性係数の樹脂接着材であ
り、エラストマーなど接合状態における弾性係数が小さ
く、小さな外力で容易に伸縮する材質が用いられる。
Next, the bumper plate 4 is joined to the lower surface of the thinned semiconductor wafer 1 (joining step). As shown in FIG. 1C, an adhesive 5 is applied to the upper surface of the bumper plate 4 formed of a material such as resin, ceramic, or metal in a plate shape. Here, the adhesive 5 is a resin adhesive having a low elastic modulus, and a material such as an elastomer having a small elastic coefficient in a joined state and easily expanding and contracting with a small external force is used.

【0014】次にこの接着材5の塗布面に対して、薄化
された半導体ウェハ1を貼着する。このバンパ板4は、
各半導体素子毎に切り分けられて半導体装置を形成した
状態で、半導体装置のハンドリング用の保持部として機
能すると共に、半導体素子を外力や衝撃から保護する補
強部材としての役割をも有するものである。このためバ
ンパ板4は、半導体素子の曲げ剛性よりも大きな曲げ剛
性を有する充分な厚さとなっている。この後、図1
(d)に示すように、半導体ウェハ1を貼着後のバンパ
板4の下面には、ダイシング工程における保持用のシー
ト6が貼着され、シート3が電極形成面から剥離され
る。
Next, the thinned semiconductor wafer 1 is adhered to the surface to which the adhesive 5 is applied. This bumper plate 4
In a state where the semiconductor device is formed by being divided for each semiconductor element, the semiconductor device functions as a holding portion for handling the semiconductor device and also has a role as a reinforcing member for protecting the semiconductor element from external force and impact. For this reason, the bumper plate 4 has a sufficient thickness having a bending rigidity larger than the bending rigidity of the semiconductor element. After this, FIG.
As shown in (d), the holding sheet 6 in the dicing step is attached to the lower surface of the bumper plate 4 after the semiconductor wafer 1 is attached, and the sheet 3 is separated from the electrode forming surface.

【0015】次いで、シート6によって保持されたバン
パ板4および半導体ウェハ1はダイシング工程に送られ
る。ここでは、複数の切断具を備えたダイシング装置に
よって、バンパ板4と半導体ウェハ1とを異なるダイシ
ング幅で切断する2段ダイシングが行われる。すなわち
図2(a)に示すように半導体ウェハ1は切断幅b1の
第1の切断具13Aによって切断され、個片の半導体素
子1’に分割される(第1切断工程)。次いでバンパ板
4は、図2(b)に示すようにb1よりも狭い切断幅b
2を有する第2の切断具13Bによって切断され、個片
のバンパ部材4’となる(第2切断工程)。これによ
り、シート6に保持されたバンパ板4および半導体ウェ
ハ1は、図2(c)に示すようにそれぞれ異なる切断幅
b1,b2で切断され、個片に分離される。
Next, the bumper plate 4 and the semiconductor wafer 1 held by the sheet 6 are sent to a dicing process. Here, two-stage dicing for cutting the bumper plate 4 and the semiconductor wafer 1 at different dicing widths is performed by a dicing device having a plurality of cutting tools. That is, as shown in FIG. 2A, the semiconductor wafer 1 is cut by the first cutting tool 13A having a cutting width b1 and divided into individual semiconductor elements 1 '(first cutting step). Next, as shown in FIG. 2B, the bumper plate 4 has a cutting width b smaller than b1.
2 is cut by the second cutting tool 13B having the number 2 to form individual bumper members 4 '(second cutting step). As a result, the bumper plate 4 and the semiconductor wafer 1 held on the sheet 6 are cut at different cutting widths b1 and b2 as shown in FIG. 2C, and separated into individual pieces.

【0016】そして、接着材5によって半導体素子1’
と接着されたバンパ部材4’をシート6から剥離するこ
とにより、図2(d)に示すように個片の半導体装置7
が完成する。この半導体装置7は、外部接続用の電極で
あるバンプ2が形成された半導体素子1’と、この半導
体素子1’の電極形成面の裏面に接着材5により接合さ
れた補強部材としてのバンパ部材4’とを備えた構成と
なっており、バンパ部材4’のサイズB2は半導体素子
1’のサイズB1よりも大きく、その外周端は、半導体
素子1’の外周端よりも外側に突出している。バンパ部
材4’は半導体素子1’と接着材5によって接合された
構造となっている。接着材5は低弾性係数の樹脂接着材
であるので、半導体素子1’の変形を許容する状態で、
この半導体素子1’をバンパ部材4’に接合している。
Then, the semiconductor element 1 ′ is bonded by the adhesive 5.
By peeling the bumper member 4 ′ adhered to the sheet 6 from the sheet 6, as shown in FIG.
Is completed. The semiconductor device 7 includes a semiconductor element 1 ′ on which a bump 2 serving as an electrode for external connection is formed, and a bumper member as a reinforcing member joined to the back surface of the electrode forming surface of the semiconductor element 1 ′ by an adhesive 5. 4 ', the size B2 of the bumper member 4' is larger than the size B1 of the semiconductor element 1 ', and the outer peripheral end of the bumper member 4' projects outward from the outer peripheral end of the semiconductor element 1 '. . The bumper member 4 ′ has a structure in which the semiconductor element 1 ′ and the adhesive 5 are joined. Since the adhesive 5 is a resin adhesive having a low modulus of elasticity, the semiconductor element 1 ′ is allowed to be deformed.
This semiconductor element 1 'is joined to a bumper member 4'.

【0017】図3に示すように、バンパ部材4’の上面
には、従来の樹脂封止型の電子部品の上面と同様に、識
別情報としての部品コード8が印字されており、コーナ
部には実装時の方向を特定する極性マーク9が形成され
ている。すなわち、バンパ部材4’の半導体素子1’と
の接合面の裏面は、識別情報の印加面となっている。
As shown in FIG. 3, a component code 8 as identification information is printed on the upper surface of the bumper member 4 'similarly to the upper surface of a conventional resin-encapsulated electronic component. Is formed with a polarity mark 9 for specifying a mounting direction. That is, the back surface of the bonding surface of the bumper member 4 'with the semiconductor element 1' is a surface to which the identification information is applied.

【0018】この半導体装置7の実装について図4を参
照して説明する。図4(a)に示すように、半導体装置
7はバンパ部材4’の上面を実装ヘッド10によって吸
着して保持され、実装ヘッド10を移動させることによ
り、基板11の上方に位置する。そして半導体装置7の
バンプ2を基板11の電極12に位置合わせした状態
で、実装ヘッド10を下降させて半導体素子1’のバン
プ2を基板11の電極12の上に着地させる。
The mounting of the semiconductor device 7 will be described with reference to FIG. As shown in FIG. 4A, the upper surface of the bumper member 4 'is sucked and held by the mounting head 10, and the semiconductor device 7 is located above the substrate 11 by moving the mounting head 10. Then, with the bumps 2 of the semiconductor device 7 aligned with the electrodes 12 of the substrate 11, the mounting head 10 is lowered to land the bumps 2 of the semiconductor element 1 ′ on the electrodes 12 of the substrate 11.

【0019】その後基板11を加熱することにより、バ
ンプ2を電極12に半田接合する。すなわち、半導体装
置7を基板11へ搭載する際のハンドリングにおいて、
実装ヘッド10によって、保持部であるバンパ部材4’
を保持する。なおバンプ2の電極12との接合に、導電
性樹脂接着材による接合方法を用いてもよい。
Thereafter, the bumps 2 are soldered to the electrodes 12 by heating the substrate 11. That is, in handling when the semiconductor device 7 is mounted on the substrate 11,
The mounting head 10 allows the bumper member 4 ′ as a holding unit to be held.
Hold. Note that the bumps 2 may be bonded to the electrodes 12 by a bonding method using a conductive resin adhesive.

【0020】この半導体装置7を基板11に実装して成
る実装構造は、半導体装置7の電極であるバンプ2をワ
ークである基板11の電極12に接合することにより半
導体装置7が基板11に固定される形態となっている。
図4(c)に示すように、実装後に基板11に何らかの
外力により、撓み変形が発生した場合には、半導体素子
1’は薄くて撓みやすくしかも接着材5は低弾性係数の
変形しやすい材質を用いていることから、基板11の撓
み変形に対して半導体素子1’と接着材5の接着層のみ
が追従して変形する。
The mounting structure in which the semiconductor device 7 is mounted on the substrate 11 is such that the semiconductor device 7 is fixed to the substrate 11 by bonding the bumps 2 as electrodes of the semiconductor device 7 to the electrodes 12 of the substrate 11 as works. It is a form to be done.
As shown in FIG. 4 (c), when the substrate 11 undergoes bending deformation due to some external force after mounting, the semiconductor element 1 'is thin and easily bent, and the adhesive 5 has a low elastic coefficient and is easily deformed. Is used, only the adhesive layer of the semiconductor element 1 ′ and the adhesive 5 follows the bending deformation of the substrate 11 and deforms.

【0021】これにより、実装後にアンダーフィル樹脂
を充填するなどの補強処理を必要とすることなく接合部
の応力が緩和され、単に半導体素子1’とバンパ部材
4’とを接着材5により接合するという簡易な形態のパ
ッケージ構造で、実装後の信頼性を確保が実現される。
As a result, the stress at the joint is reduced without requiring a reinforcing process such as filling an underfill resin after mounting, and the semiconductor element 1 'and the bumper member 4' are simply joined by the adhesive material 5. With this simple package structure, reliability after mounting is realized.

【0022】なお上記実施の形態では、図2に示す半導
体装置を個片に分離する工程(第1切断工程、第2切断
工程)において、切断幅の異なる2種類の第1の切断具
13A,第2の切断具13Bを用いて、半導体ウェハ
1、バンパ板4を個別に切断する例を示しているが、図
5(a)に示すように、切断後に半導体素子1’側の方
がバンパ部材4’側よりも切断幅が大きくなるようなテ
ーパ状切断面を有する切断具13Cによって、半導体ウ
ェハ1およびバンパ板4を同一切断工程で切断するよう
にしてもよい。この方法によっても、図5(b)に示す
ように、バンパ部材4’のサイズB2が半導体素子1’
のサイズB1よりも大きい半導体装置7’を得ることが
できる。
In the above-described embodiment, in the step of separating the semiconductor device shown in FIG. 2 into individual pieces (first cutting step and second cutting step), two types of first cutting tools 13A and 13A having different cutting widths are used. Although an example is shown in which the semiconductor wafer 1 and the bumper plate 4 are individually cut using the second cutting tool 13B, as shown in FIG. The semiconductor wafer 1 and the bumper plate 4 may be cut in the same cutting step by a cutting tool 13C having a tapered cutting surface whose cutting width is larger than that of the member 4 '. According to this method as well, as shown in FIG.
Semiconductor device 7 'larger than the size B1 can be obtained.

【0023】[0023]

【発明の効果】本発明によれば、薄化された半導体素子
の裏面に低弾性係数の樹脂接着材を介して補強部材を接
合した後の切断工程において、半導体ウェハ側の切断幅
と補強部材側の切断幅が異なる切断具によって切断する
ようにしたので、電極形成面の裏面に低弾性係数の樹脂
接着材を介してこの半導体素子よりも大きい補強部材を
接合して成る半導体装置を効率よく製造することができ
る。
According to the present invention, in the cutting step after joining the reinforcing member to the back surface of the thinned semiconductor element via a resin adhesive having a low elastic modulus, the cutting width on the semiconductor wafer side and the reinforcing member Since a cutting tool having a different cutting width on the side is used for cutting, a semiconductor device in which a reinforcing member larger than the semiconductor element is joined to the back surface of the electrode forming surface via a resin adhesive having a low elastic modulus can be efficiently used. Can be manufactured.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施の形態の半導体装置の製造方法
の工程説明図
FIG. 1 is a process explanatory view of a method for manufacturing a semiconductor device according to an embodiment of the present invention;

【図2】本発明の一実施の形態の半導体装置の製造方法
の工程説明図
FIG. 2 is a process explanatory view of a method for manufacturing a semiconductor device according to an embodiment of the present invention;

【図3】本発明の一実施の形態の半導体装置の斜視図FIG. 3 is a perspective view of a semiconductor device according to one embodiment of the present invention;

【図4】本発明の一実施の形態の半導体装置の実装方法
の説明図
FIG. 4 is an explanatory diagram of a method for mounting a semiconductor device according to an embodiment of the present invention;

【図5】本発明の一実施の形態の半導体装置の製造方法
の工程説明図
FIG. 5 is a process explanatory view of a method for manufacturing a semiconductor device according to an embodiment of the present invention;

【符号の説明】[Explanation of symbols]

1 半導体ウェハ 1’ 半導体素子 4 バンパ板 4’ バンパ部材 5 接着材 7、7’ 半導体装置 13A 第1の切断具 13B 第2の切断具 13C 切断具 DESCRIPTION OF SYMBOLS 1 Semiconductor wafer 1 'Semiconductor element 4 Bumper plate 4' Bumper member 5 Adhesive 7, 7 'Semiconductor device 13A 1st cutting tool 13B 2nd cutting tool 13C Cutting tool

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】半導体素子の外部接続用の電極が形成され
た電極形成面の裏面に低弾性係数の樹脂接着材を介して
この半導体素子よりも大きい補強部材を接合して成る半
導体装置を製造する半導体装置の製造方法であって、複
数の半導体素子が形成された半導体ウェハの電極形成面
の裏面を削る薄化工程と、薄化工程後の前記半導体素子
の裏面に低弾性係数の樹脂接着材を介して補強部材を接
合する接合工程と、接合工程後の半導体ウェハを第1の
切断具によって切断する第1切断工程と、第1切断工程
後に第1の切断具の切断幅よりも狭い切断幅を有する第
2の切断具によって前記補強部材を切断する第2切断工
程とを含むことを特徴とする半導体装置の製造方法。
1. A semiconductor device comprising a reinforcing member larger than a semiconductor element bonded to a back surface of an electrode forming surface on which an electrode for external connection of the semiconductor element is formed via a resin adhesive having a low elastic modulus. A thinning step of shaving the back surface of an electrode forming surface of a semiconductor wafer on which a plurality of semiconductor elements are formed, and bonding a resin having a low elastic modulus to the back surface of the semiconductor element after the thinning step. A joining step of joining the reinforcing member via the material, a first cutting step of cutting the semiconductor wafer after the joining step by the first cutting tool, and a width smaller than the cutting width of the first cutting tool after the first cutting step. A second cutting step of cutting the reinforcing member by a second cutting tool having a cutting width.
【請求項2】半導体素子の外部接続用の電極が形成され
た電極形成面の裏面に低弾性係数の樹脂接着材を介して
この半導体素子よりも大きい補強部材を接合して成る半
導体装置を製造する半導体装置の製造方法であって、複
数の半導体素子が形成された半導体ウェハの電極形成面
の裏面を削る薄化工程と、薄化工程後の前記半導体素子
の裏面に低弾性係数の樹脂接着材を介して補強部材を接
合する接合工程と、接合された半導体素子と補強部材と
を半導体素子側の方が補強部材側よりも切断幅が大きい
テーパ状切断面を有する切断具によって切断する切断工
程とを含むことを特徴とする半導体装置の製造方法。
2. A semiconductor device in which a reinforcing member larger than a semiconductor element is joined to a back surface of an electrode forming surface on which an electrode for external connection of the semiconductor element is formed via a resin adhesive having a low elastic coefficient. A thinning step of shaving the back surface of an electrode forming surface of a semiconductor wafer on which a plurality of semiconductor elements are formed, and bonding a resin having a low elastic modulus to the back surface of the semiconductor element after the thinning step. A joining step of joining a reinforcing member via a material, and cutting the joined semiconductor element and the reinforcing member by a cutting tool having a tapered cutting surface having a larger cutting width on the semiconductor element side than on the reinforcing member side And a method of manufacturing a semiconductor device.
【請求項3】半導体素子の外部接続用の電極が形成され
た電極形成面の裏面に低弾性係数の樹脂接着材を介して
この半導体素子よりも大きい補強部材を接合して成る半
導体装置であって、複数の半導体素子が形成された半導
体ウェハの電極形成面の裏面を削る薄化工程と、薄化工
程後の前記半導体素子の裏面に低弾性係数の樹脂接着材
を介して補強部材を接合する接合工程と、接合工程後の
半導体ウェハを第1の切断具によって切断する第1切断
工程と、第1切断工程後に第1の切断具の切断幅よりも
狭い切断幅を有する第2の切断具によって前記補強部材
を切断する第2切断工程とを含む半導体装置の製造方法
によって製造されたことを特徴とする半導体装置。
3. A semiconductor device in which a reinforcing member larger than a semiconductor element is joined to a back surface of an electrode forming surface on which an electrode for external connection of the semiconductor element is formed via a resin adhesive having a low elastic coefficient. A thinning step of shaving the back surface of the electrode forming surface of the semiconductor wafer on which a plurality of semiconductor elements are formed, and joining a reinforcing member to the back surface of the semiconductor element after the thinning step via a resin adhesive having a low elastic modulus. Bonding step, a first cutting step of cutting the semiconductor wafer after the bonding step with the first cutting tool, and a second cutting having a cutting width smaller than the cutting width of the first cutting tool after the first cutting step. And a second cutting step of cutting the reinforcing member with a tool.
【請求項4】半導体素子の外部接続用の電極が形成され
た電極形成面の裏面に低弾性係数の樹脂接着材を介して
この半導体素子よりも大きい補強部材を接合して成る半
導体装置であって、複数の半導体素子が形成された半導
体ウェハの電極形成面の裏面を削る薄化工程と、薄化工
程後の前記半導体素子の裏面に低弾性係数の樹脂接着材
を介して補強部材を接合する接合工程と、接合された半
導体素子と補強部材とを半導体素子側の方が補強部材側
よりも切断幅が大きいテーパ状切断面を有する切断具に
よって切断する切断工程とを含む半導体装置の製造方法
によって製造されたことを特徴とする半導体装置。
4. A semiconductor device in which a reinforcing member larger than a semiconductor element is joined to a back surface of an electrode forming surface on which an electrode for external connection of the semiconductor element is formed via a resin adhesive having a low elastic coefficient. A thinning step of shaving the back surface of the electrode forming surface of the semiconductor wafer on which the plurality of semiconductor elements are formed, and joining a reinforcing member to the back surface of the semiconductor element after the thinning step via a resin adhesive having a low elastic modulus. Manufacturing a semiconductor device including a joining step of cutting and a cutting step of cutting the joined semiconductor element and the reinforcing member with a cutting tool having a tapered cutting surface having a larger cutting width on the semiconductor element side than on the reinforcing member side. A semiconductor device manufactured by the method.
JP2001004689A 2001-01-12 2001-01-12 Semiconductor device manufacturing method and semiconductor device Expired - Fee Related JP3649129B2 (en)

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US7563343B2 (en) 2002-11-29 2009-07-21 Fujitsu Microelectronics Limited Film lamination apparatus and method and a manufacturing method of a semiconductor apparatus
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