JP2002198551A - Optical-to-electrical transducer element and device thereof using it as well as method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an optical-to-electrical transducer element whose efficiency can be enhanced, to provide a device which uses it, and to provide a method for manufacturing the element. SOLUTION: In the optical-to-electrical transducer element, an n-type microcrystal silicon layer 4, an amorphous silicon layer 11, an intrinsic microcrystal silicon layer 12 and a p-type microcrystal silicon layer 16 are laminated sequentially on a substrate 1. The silicon layer 11 is made thin in such a way that, after it is deposited, its surface is dry-etched and treated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photoelectric conversion element, a photoelectric conversion device using the same, and a method of manufacturing the photoelectric conversion element. More specifically, the present invention relates to a first conductive semiconductor layer and a photoelectric conversion layer containing crystalline material. By providing an extremely thin amorphous semiconductor layer in between, the crystallinity of the photoelectric conversion layer is improved, and as a result, a photoelectric conversion element with improved photoelectric conversion efficiency, a photoelectric conversion device using the same, and a photoelectric conversion element The present invention relates to a method for manufacturing an element.

[0002]

2. Description of the Related Art In recent years, research and development of photovoltaic power generation have been actively conducted from the viewpoint of global environmental problems and energy problems. In particular, a silicon (Si) solar cell using microcrystalline silicon (Si) for a photoelectric conversion layer is manufactured by plasma CVD (Chemical Chemistry).
ical vapor deposition) method, which is suitable for mass production because it can be manufactured by a low-temperature process at about 200 ° C. As most expected.

FIG. 7 is a cross-sectional view showing an example of a conventional film surface side light incident type Si solar cell (NIP type). In the figure, reference numeral 1 denotes a substrate, and 2 denotes a first lower electrode made of a metal material. Layer 3 is zinc oxide (ZnO), stannic oxide (SnO ₂ )
Alternatively, a second lower electrode layer made of a transparent conductive material such as ITO (Indium TinOxide), 4 is an n-type microcrystalline silicon layer (first conductive type semiconductor layer), and 5 is an intrinsic microcrystalline silicon layer (crystal) serving as a photoelectric conversion layer Photoelectric conversion layer containing a material: hereinafter, referred to as i layer), 6 is a p-type microcrystalline silicon layer (second conductivity type semiconductor layer), 7 is a transparent conductor layer, and 8 is a comb-shaped collection made of a metal material. It is an electric electrode and has a nip structure by the n-type microcrystalline silicon layer 4, the i-layer 5, and the p-type microcrystalline silicon layer 6.

In this Si solar cell, the solar light 9
Is incident, an electron (e) -hole (h) pair is generated.
On the other hand, in this nip structure, since an electric field is formed inside the i-layer 5 by the pn junction, the electron (e) of the generated electron (e) -hole (h) pair is an n-type microcrystalline silicon layer. 4
And the holes (h) move to the p-type microcrystalline silicon layer 6 side. Therefore, when an external load 10 is connected to the first lower electrode layer 2 and the current collecting electrode 8, a current I flows through the external load 10 by the pn junction, and the Si solar cell exhibits a power generation function. . When the n-type microcrystalline silicon layer 4 is p-type and the p-type microcrystalline silicon layer 6 is n-type, the moving directions of the electrons (e) and the holes (h) are opposite to those described above. The direction of the current flowing through the external load 10 is also reversed.

[0005]

By the way, the conventional Si
In the solar cell, in order to improve the photoelectric conversion efficiency, it is indispensable to increase the grain size and the orientation of the microcrystalline silicon constituting the i-layer 5. Since the microcrystalline silicon is strongly affected by the underlayer during crystal growth, the crystallinity of the underlayer can be improved by improving the crystallinity of the underlayer.

Generally, in the growth process of microcrystalline silicon, first, a crystal nucleus serving as a seed crystal is generated, and a silicon crystal grows around the crystal nucleus. Here, when the generation density of crystal nuclei (the number of generated crystal nuclei per unit area) is high, adjacent crystals hinder growth in the plane direction, so that the volume fraction of crystals increases, but The particle size and orientation will be small. Conventional Si
Considering a solar cell, the underlying layer of the i-layer 5 is n-type (or p-type).
Since the microcrystalline silicon layer 4 is a (type) microcrystalline silicon layer, the conditions for crystal growth of the microcrystalline silicon constituting the i-layer 5 are favorable, so that the density of crystal nuclei increases and the i-layer 5 is formed. The crystal grain size of microcrystalline silicon is also small. Therefore, in the conventional Si solar cell, there is a problem that the grain size of microcrystalline silicon is small and the orientation is not improved.

Therefore, an amorphous silicon layer is laminated on the n-type (or p-type) microcrystalline silicon layer 4, and the conditions for the crystal growth of the microcrystalline silicon constituting the i-layer 5 are intentionally disadvantageous. By reducing the generation density of crystal nuclei, the crystal grain size of the microcrystalline silicon constituting the i-layer 5 is increased, and as a result, S has improved orientation.
i solar cells have been proposed. However, this Si
In the solar cell, since the amorphous silicon layer which is a high-resistance layer is used as a base layer of the i-layer 5, the resistance as the solar cell increases, and as a result, the photoelectric conversion efficiency of the solar cell decreases. Occurs.

The present invention has been made in view of the above circumstances, and provides a photoelectric conversion element capable of improving photoelectric conversion efficiency, a photoelectric conversion device using the same, and a method of manufacturing the photoelectric conversion element. The purpose is to:

[0009]

In order to solve the above problems, the present invention employs the following photoelectric conversion element, a photoelectric conversion device using the same, and a method of manufacturing the photoelectric conversion element. That is, the photoelectric conversion element according to claim 1 is provided on the substrate with the first
A conductive semiconductor layer, an amorphous semiconductor layer, a photoelectric conversion layer containing crystalline material, and a second conductive semiconductor layer are sequentially stacked, and the amorphous semiconductor layer has a surface subjected to dry etching after deposition. Features.

In this photoelectric conversion element, the amorphous semiconductor layer is deposited, and then the amorphous semiconductor layer is dry-etched, so that the underlayer of the photoelectric conversion layer containing crystalline material can be formed into an extremely thin amorphous layer. It can be constituted by a high quality semiconductor layer. Thereby, the crystallinity and crystal orientation of the photoelectric conversion layer grown on the amorphous semiconductor layer are improved, and as a result, the photoelectric conversion efficiency is improved.

[0011] The photoelectric conversion element according to the second aspect is the first aspect.
The photoelectric conversion element according to any one of claims 1 to 3, wherein a surface of the amorphous semiconductor layer that has been subjected to the dry etching treatment has an island shape.

In this photoelectric conversion element, since the surface of the amorphous semiconductor layer which has been subjected to the dry etching treatment is formed into an island shape, the occupied area of the amorphous semiconductor layer as a base layer is reduced. There is no risk of lowering the crystallinity of the photoelectric conversion layer containing crystalline material grown on the layer. Thereby, the crystallinity and the crystal orientation of the photoelectric conversion layer grown on the amorphous semiconductor layer are further improved, and as a result, the photoelectric conversion efficiency is further improved.

According to a third aspect of the present invention, there is provided a photoelectric conversion element.
3. The photoelectric conversion element according to 2, wherein the dry-etched amorphous semiconductor layer has a maximum thickness of 5
nm or less.

In this photoelectric conversion device, by setting the maximum value of the thickness of the amorphous semiconductor layer to 5 nm or less, the thickness of the amorphous semiconductor layer as a base layer becomes extremely thin.
The crystallinity of the photoelectric conversion layer containing crystalline material grown on the amorphous semiconductor layer does not decrease. Thereby, the crystallinity and the crystal orientation of the photoelectric conversion layer are further improved, and as a result, the photoelectric conversion efficiency is further improved. A more preferable value of the maximum value of the thickness of the amorphous semiconductor layer is 1 nm or less.

According to a fourth aspect of the present invention, there is provided the photoelectric conversion element according to the first, second, or third aspect, wherein
The conductive semiconductor layer is a p-type semiconductor layer, and the second conductive semiconductor layer is an n-type semiconductor layer.

According to a fifth aspect of the present invention, there is provided the photoelectric conversion element according to the first, second, or third aspect, wherein the first
The conductive semiconductor layer is an n-type semiconductor layer, and the second conductive semiconductor layer is a p-type semiconductor layer.

[0017] The photoelectric conversion element according to claim 6 is the first aspect.
The photoelectric conversion device according to any one of claims 1 to 5,
A structure in which one or more photoelectric conversion multilayer films each including a first conductivity type semiconductor layer, a photoelectric conversion layer, and a second conductivity type semiconductor layer are stacked on the second conductivity type semiconductor layer, and the plurality of photoelectric conversion layers are provided; It is characterized by having done.

In this photoelectric conversion element, the photoelectric conversion layer is stacked in the stacking direction by laminating at least one set of the first conductivity type semiconductor layer, the photoelectric conversion layer, and the second conductivity type semiconductor layer on the second conductivity type semiconductor layer. In this configuration, a plurality of photoelectric conversion layers are arranged to take in the incident light, whereby the utilization efficiency of the incident light is improved, and as a result, the photoelectric conversion efficiency per unit area is improved.

According to a seventh aspect of the present invention, there is provided a photoelectric conversion device.
7. A photoelectric conversion device according to any one of claims 1 to 6. In this photoelectric conversion device, the crystallinity and
The provision of the photoelectric conversion element having the photoelectric conversion layer with improved crystal orientation improves the photoelectric conversion efficiency of the device.

In the method of manufacturing a photoelectric conversion device according to the present invention, a first conductivity type semiconductor layer and an amorphous semiconductor layer are sequentially laminated on a substrate, and then the amorphous semiconductor layer is subjected to dry etching. A crystalline photoelectric conversion layer and a second conductivity type semiconductor layer are sequentially stacked on the amorphous semiconductor layer after the dry etching treatment.

In this manufacturing method, the thickness of the amorphous semiconductor layer is reduced by dry-etching the amorphous semiconductor layer. Thereafter, a photoelectric conversion layer containing a crystalline material and a second conductivity type semiconductor layer are sequentially laminated on the thin amorphous semiconductor layer, so that when the photoelectric conversion layer is grown, an amorphous layer serving as a base layer is formed. The influence of the quality semiconductor layer is suppressed, and the crystallinity of the growing photoelectric conversion layer is improved. Accordingly, a photoelectric conversion element having a structure in which a photoelectric conversion layer with high photoelectric conversion efficiency is sandwiched between semiconductor layers can be easily obtained.

According to a ninth aspect of the present invention, there is provided a method for manufacturing a photoelectric conversion element according to the eighth aspect.
In the dry etching, dry etching is performed until the maximum value of the thickness of the amorphous semiconductor layer becomes 5 nm or less.

In this manufacturing method, the thickness of the amorphous semiconductor layer is extremely thinned by dry etching until the maximum value of the thickness of the amorphous semiconductor layer becomes 5 nm or less, and the thickness of the growing photoelectric conversion layer is reduced. The crystallinity is greatly improved.
Thereby, a photoelectric conversion element having extremely high photoelectric conversion efficiency can be easily obtained.

[0024]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the photoelectric conversion device of the present invention, a photoelectric conversion device using the same, and a method of manufacturing the photoelectric conversion device will be described with reference to the drawings. In the following embodiments, a silicon-based solar cell (Si solar cell) will be described as an example of a photoelectric conversion element, but the photoelectric conversion element of the present invention is limited to the Si solar cell of each of the following embodiments. Not something. Also, in these figures,
The same components as those in FIG. 7 which is a conventional example are denoted by the same reference numerals.

First Embodiment FIG. 1 shows a film-side light incident type silicon-based solar cell (Si) according to a first embodiment of the present invention.
It is sectional drawing which shows a solar cell (NIP type). In the figure, the code | symbol 11 is a thin amorphous silicon layer (amorphous semiconductor layer: abbreviated as a-Si layer hereafter), 12 is a-.
An intrinsic microcrystalline silicon layer (a photoelectric conversion layer containing crystalline material; hereinafter, referred to as an i-layer) which is deposited on the Si layer 11 and serves as a photoelectric conversion layer.

The surface of the a-Si layer 11 is dry-etched after the deposition, and the thickness of the a-Si layer 11 after this dry-etching has a maximum value of 5 nm or less, preferably a maximum value of 1 nm or less. It is. This Si solar cell has a nip structure with an n-type microcrystalline silicon layer 4, an i-layer 12, and a p-type microcrystalline silicon layer 6. Here, if the n-type microcrystalline silicon layer 4 is of p-type and the p-type microcrystalline silicon layer 6 is of n-type, it has a pin structure, so that the moving directions of the electrons (e) and the holes (h) are nip structure. And the direction of the current flowing to the external load is also reversed.

In this Si solar cell, glass, stainless steel, steel or the like is preferably used as the material of the substrate 1. The material of the first lower electrode layer 2 is Al, A
g, Ti, Ni, Cr, Cu, or alloys thereof are preferably used. As the material of the second lower electrode layer 3, an oxide-based transparent conductive material such as ZnO, SnO _2, or ITO is preferably used. Like the first lower electrode layer 2, the material of the comb-shaped current collecting electrode 8 is Al, Ag, T
i, Ni, Cr, Cu, or an alloy thereof is preferably used.

The thickness of the n-type microcrystalline silicon layer 4 is 5 nm.
The thickness is desirably not less than 50 nm. When the film thickness of this n-type microcrystalline silicon layer 4 is less than 5 nm, a state where second lower electrode layer 3 is partially exposed, that is, a so-called island-like growth is obtained. In this case, since a normal nip junction is not formed in a portion where the n-type microcrystalline silicon layer 4 is not formed, characteristics as a photoelectric conversion element are significantly reduced. On the other hand, when the film thickness of the n-type microcrystalline silicon layer 4 exceeds 50 nm, the influence of light absorption in the n-type microcrystalline silicon layer 4 increases, and the light reflected by the first lower electrode layer 2 is effectively photoelectrically converted. Therefore, there is a problem in device performance that sensitivity to long-wavelength light is reduced.

The thickness of the i-layer 12 depends on the state of light confinement depending on the surface shapes of the second lower electrode layer 3 and the i-layer 12, and is preferably 1 μm or more and 10 μm or less. This i
When the thickness of the layer 12 is less than 1 μm, incident light cannot be sufficiently absorbed, and there is a problem that a short-circuit current as a photovoltaic element is small. When the film thickness of the i-layer 12 exceeds 10 μm, the internal electric field generated in the i-layer 12 is weakened, and the open-circuit voltage as a photovoltaic element is reduced. Productivity decreases.

The thickness of the p-type microcrystalline silicon layer 6 is 5 nm.
The thickness is desirably not less than 50 nm. If the thickness of this p-type microcrystalline silicon layer 6 is less than 5 nm, i-layer 12
Is exposed, so-called island growth. in this case,
Since a normal nip junction is not formed in a portion where the p-type microcrystalline silicon layer 6 is not formed, the characteristics as a photovoltaic element are significantly reduced. On the other hand, when the film thickness of the p-type microcrystalline silicon layer 6 exceeds 50 nm, the influence of light absorption in the p-type microcrystalline silicon layer 6 increases, and the amount of light reaching the i-layer 12 decreases. There is a problem in element performance that the short-circuit current of the element is small.

In this Si solar cell, the maximum thickness of the a-Si layer 11 is set to 5 nm or less, so that the i-layer 12
The thickness of the a-Si layer 11 as the underlayer is extremely thin, and the crystallinity of the i-layer 12 grown on the a-Si layer 11 is improved. As a result, the crystallinity and orientation of the i-layer 12 are greatly improved, and as a result, the photoelectric conversion efficiency is greatly improved.

In this Si solar cell, when sunlight 9 enters the i-layer 12 from the p-type microcrystalline silicon layer 6 side, an electron (e) -hole (h) pair is generated. On the other hand, in the nip structure, an electric field is formed inside the i-layer 12 by the pn junction, so that the generated electron (e) -hole (h) pair
The electrons (e) move toward the n-type microcrystalline silicon layer 4 and the holes (h) move toward the p-type microcrystalline silicon layer 6.

Here, the first lower electrode layer 2 and the current collecting electrode 8
Is connected to the external load 10, a current I flows through the external load 10 by the pn junction, and the Si solar cell has a power generation function. When the n-type microcrystalline silicon layer 4 is p-type and the p-type microcrystalline silicon layer 6 is n-type, the moving directions of the electrons (e) and the holes (h) are opposite to those described above. The direction of the current flowing through the external load 10 is also reversed.

Next, a method of manufacturing this Si solar cell will be described. First, the substrate 1 is prepared. This substrate is made of glass, stainless steel, steel or the like. Next, a first lower electrode layer 2 and a second lower electrode layer 3 are sequentially formed on the substrate 1. Here, the first lower electrode layer 2 is obtained by forming a film of Al, Ag, Ti, Ni, Cr, Cu, or an alloy thereof by a physical vapor deposition method (PVD) such as a vacuum vapor deposition method or a sputtering method. Can be Further, the second lower electrode layer 3 is made of Z
It can be obtained by forming a film of an oxide-based transparent conductive material such as nO, SnO ₂ , and ITO.

Next, an n-type microcrystalline silicon layer 4 and an a-Si layer 11 are sequentially formed by a plasma CVD method or the like.
Here, the a- layer deposited on the n-type microcrystalline silicon layer 4
By performing dry etching on the Si layer, the film thickness becomes 5
The thickness of the a-Si layer 11 is as thin as not more than nm. Then, the i-layer is formed on the thin a-Si layer 11 by a plasma CVD method or the like.
The layer 12 and the p-type microcrystalline silicon layer 6 are sequentially formed. Next, an oxide-based transparent conductive material such as ZnO, SnO ₂ , or ITO is formed on the p-type microcrystalline silicon layer 6 by a CVD method, a sputtering method, or the like to form a transparent conductive layer 7.

Then, Al, Ag, Ti, Ni, Cr, Cu, or an alloy thereof is formed on the transparent conductor layer 7 by physical vapor deposition such as vacuum vapor deposition or sputtering, or printing. Then, a comb-shaped current collecting electrode 8 is formed. As described above, the Si solar cell of the present embodiment is obtained.

FIG. 2 is a diagram showing an X-ray diffraction pattern of the microcrystalline Si layer (i-layer 12). In the figure, A indicates the X-ray diffraction pattern of the microcrystalline Si layer obtained by the manufacturing method of the present embodiment. B shows the X-ray diffraction pattern of the conventional microcrystalline Si layer. The microcrystalline Si layer of the present embodiment is made of Si
(110) plane is preferentially oriented, and as shown in FIG. 2, the ratio of the integrated intensity of the (220) plane to that of the (111) plane is 3 or more. On the other hand, in the conventional microcrystalline Si layer, the integrated intensity of each of the (220) plane and the (111) plane is very small, and is only slightly out of the background halo.

As described above, in the microcrystalline Si layer of the present embodiment, by performing dry etching on the a-Si layer,
The preferred orientation of the (110) plane of Si is obtained, and the crystallinity (orientation) of the i-layer 12 can be improved. The reason for this is that the underlying layer of the i-layer 12 is made of the thin a-Si layer 11, thereby intentionally creating a condition where crystal growth is disadvantageous, and lowering the density of crystal nuclei, thereby reducing the crystal growth in the initial growth. This is because the crystallinity of the entire i-layer 12 can be improved.

Here, the resistance is higher than that of the microcrystalline layer by optimizing the film forming conditions and dry etching conditions so that the a-Si layer is not dry-etched or disappears only slightly. The thickness of the a-Si layer can be reduced.

FIG. 3 shows (22) of the microcrystalline Si layer of this embodiment.
It is a figure which shows the relationship between the ratio ((220) / (111) integrated intensity ratio) of the integrated intensity of the (0) plane and the (111) plane, and the photoelectric conversion efficiency. According to FIG. 3, (220) /
It can be seen that when the (111) integrated intensity ratio is 3 or more, the photoelectric conversion efficiency is about 0.8 or more.

As described above, according to the Si solar cell of the present embodiment, the i-layer 12 is formed on the a-Si layer 11 having the surface subjected to the dry etching after the deposition. The a-Si layer 11 serving as the ground layer can be made extremely thin, and the crystallinity and orientation of the i-layer 12 can be improved, and therefore, the photoelectric conversion efficiency can be improved.

Further, according to the method of manufacturing the Si solar cell of the present embodiment, the surface of the deposited a-Si layer is thinned by performing a dry etching process, and the i-layer is formed on the thinned a-Si layer 11. Since film 12 is formed, i-layer 12 with improved crystallinity and orientation can be formed. Therefore, a Si solar cell with improved photoelectric conversion efficiency can be easily manufactured.

If a photoelectric conversion device such as a power generation system is manufactured using the Si solar cell of the present embodiment, a photoelectric conversion device such as a power generation system with improved photoelectric conversion efficiency can be easily obtained.

[Second Embodiment] FIG. 4 is a sectional view showing a substrate-side light incident type thin-film silicon-based solar cell (Si solar cell) (PIN type) according to a second embodiment of the present invention. In the figure, reference numeral 21 denotes a light-transmitting substrate formed of a glass substrate, a transparent plastic substrate, or the like, and 22 denotes Al, Ag, Ti, Ni, Cr, Cu, or an alloy thereof formed on the transparent conductor layer 7. This is the back electrode 22.

The power generation mechanism of the Si solar cell is exactly the same as the Si solar cell of the first embodiment except that sunlight 9 enters the i-layer 12 from the transparent substrate 21 side. . Also in the Si solar cell of the present embodiment, exactly the same effects as those of the above-described Si solar cell of the first embodiment can be obtained.

[Third Embodiment] FIG. 5 is a sectional view showing a tandem-type silicon solar cell (tandem-type Si solar cell) (NIP type) of a film side light incident type according to a third embodiment of the present invention. The n-type semiconductor layer (first conductivity type semiconductor layer) 3 is formed on the p-type microcrystalline silicon layer 6 of the first embodiment described above.
1. A structure in which an intrinsic semiconductor layer (hereinafter, referred to as an i-layer) 32 serving as a photoelectric conversion layer and a p-type semiconductor layer (a second conductivity type semiconductor layer) 33 are sequentially stacked. These n-type semiconductor layers 31 to p
The type semiconductor layer 33 is constituted by a silicon microcrystalline layer, and the n-type semiconductor layer 31 to the p-type semiconductor layer 33 constitute a photoelectric conversion multilayer film. Note that one or more photoelectric conversion multilayer films having the same configuration may be stacked on the photoelectric conversion multilayer film. Also, the p-type microcrystalline silicon layer 6 is
When a microcrystalline silicon layer is used, the n-type semiconductor layer 31
May be p-type, and the p-type semiconductor layer 33 may be n-type.

The tandem-type Si solar cell of this embodiment can also provide the same effects as those of the above-described first embodiment. Moreover, since the structure is such that the n-type semiconductor layer 31 to the p-type semiconductor layer 33 are sequentially stacked on the p-type microcrystalline silicon layer 6, the utilization efficiency of incident light can be improved, and as a result, photoelectric conversion Efficiency can be improved.

Fourth Embodiment FIG. 6 is a sectional view showing a tandem silicon-based solar cell (tandem Si solar cell) (PIN type) of a substrate side light incidence type according to a fourth embodiment of the present invention. In addition, on the p-type microcrystalline silicon layer 6 of the above-described second embodiment, an n-type semiconductor layer 31, an intrinsic semiconductor layer (hereinafter, referred to as an i-layer) 32 serving as a photoelectric conversion layer, and a p-type semiconductor layer 33 are provided. This is a structure in which layers are sequentially stacked. These n-type semiconductor layers 3
The 1 to p-type semiconductor layer 33 constitutes a photoelectric conversion multilayer film. Note that one or more photoelectric conversion multilayer films having the same configuration may be stacked on the photoelectric conversion multilayer film.
When the p-type microcrystalline silicon layer 6 is an n-type microcrystalline silicon layer, the n-type semiconductor layer 31 may be p-type and the p-type semiconductor layer 33 may be n-type.

The tandem-type Si solar cell of the present embodiment can also provide the same effects as the above-described Si solar cell of the second embodiment. Moreover, since the structure is such that the n-type semiconductor layer 31 to the p-type semiconductor layer 33 are sequentially stacked on the p-type microcrystalline silicon layer 6, the utilization efficiency of incident light can be improved, and as a result, photoelectric conversion Efficiency can be improved.

The embodiments of the photoelectric conversion device, the photoelectric conversion device using the same, and the method of manufacturing the photoelectric conversion device according to the present invention have been described above with reference to the drawings. The design can be changed without departing from the gist of the present invention.

[0051]

As described above, according to the photoelectric conversion element of the present invention, the first conductivity type semiconductor layer, the amorphous semiconductor layer, the crystalline photoelectric conversion layer, the second conductivity type Since the semiconductor layers are sequentially stacked and the amorphous semiconductor layer has a surface subjected to dry etching after deposition, the underlayer of the photoelectric conversion layer can be formed of an extremely thin amorphous semiconductor layer, The crystallinity and the orientation of the photoelectric conversion layer grown on the amorphous semiconductor layer can be improved.
As a result, the photoelectric conversion efficiency of the photoelectric conversion element can be improved.

When the surface of the amorphous semiconductor layer subjected to the dry etching treatment is formed into an island shape, the area occupied by the amorphous semiconductor layer as a base layer is reduced, so that the surface of the amorphous semiconductor layer is formed on the amorphous semiconductor layer. There is no risk of lowering the crystallinity of the growing photoelectric conversion layer. Therefore, the crystallinity and orientation of the photoelectric conversion layer grown on the amorphous semiconductor layer can be further improved, and as a result, the photoelectric conversion efficiency can be further improved.

When the maximum value of the thickness of the amorphous semiconductor layer subjected to the dry etching treatment is set to 5 nm or less, the thickness of the amorphous semiconductor layer as an underlayer is extremely reduced, and There is no risk of lowering the crystallinity of the photoelectric conversion layer grown on the layer. Therefore, the crystallinity and orientation of the photoelectric conversion layer grown on the amorphous semiconductor layer can be further improved, and as a result, the photoelectric conversion efficiency can be further improved.

Further, the first conductive type semiconductor layer is provided on the second conductive type semiconductor layer.
If one or more photoelectric conversion multilayer films composed of a conductive type semiconductor layer, a photoelectric conversion layer, and a second conductive type semiconductor layer are laminated, the light incident on each of the plurality of photoelectric conversion layers is taken in, so that the utilization efficiency of the incident light is improved. Can be improved, so that
The photoelectric conversion efficiency per unit area can be improved.

Since the photoelectric conversion device of the present invention includes the photoelectric conversion element of the present invention, the photoelectric conversion efficiency of the photoelectric conversion device itself can be improved.

According to the method of manufacturing a photoelectric conversion element of the present invention, the amorphous semiconductor layer laminated on the first conductivity type semiconductor layer is dry-etched on the substrate, and the amorphous semiconductor layer after the dry etching is formed. Since the photoelectric conversion layer containing crystalline material and the second conductivity type semiconductor layer are sequentially stacked on the amorphous semiconductor layer, the thickness of the amorphous semiconductor layer can be reduced. In addition, since a photoelectric conversion layer containing a crystalline material and a second conductivity type semiconductor layer are sequentially laminated on this thin amorphous semiconductor layer, when growing the photoelectric conversion layer, the amorphous The influence of the semiconductor layer can be suppressed, and the crystallinity of the growing photoelectric conversion layer can be improved. Therefore, a photoelectric conversion element having high photoelectric conversion efficiency can be easily obtained.

Further, if the dry etching is performed until the maximum value of the thickness of the amorphous semiconductor layer becomes 5 nm or less, the thickness of the amorphous semiconductor layer can be extremely reduced. And the crystallinity of the growing photoelectric conversion layer can be significantly improved. Therefore, a photoelectric conversion element having extremely high photoelectric conversion efficiency can be easily obtained.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a film-side light incident type Si solar cell according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating X-ray diffraction patterns of a microcrystalline Si layer according to the first embodiment of the present invention and a conventional microcrystalline Si layer.

FIG. 3 is a diagram showing the relationship between the ratio of the integrated intensity on the (220) plane and the integrated intensity on the (111) plane of the microcrystalline Si layer and the photoelectric conversion efficiency according to the first embodiment of the present invention.

FIG. 4 is a cross-sectional view illustrating a substrate-side light incident type Si solar cell according to a second embodiment of the present invention.

FIG. 5 is a cross-sectional view illustrating a film-side light incident type tandem Si solar cell according to a third embodiment of the present invention.

FIG. 6 is a cross-sectional view illustrating a tandem-type Si solar cell of a substrate side light incidence type according to a fourth embodiment of the present invention.

FIG. 7 is a cross-sectional view showing an example of a conventional light incident type Si solar cell on the film surface side.

[Explanation of symbols]

Reference Signs List 1 substrate 2 first lower electrode layer 3 second lower electrode layer 4 n-type microcrystalline silicon layer (first conductive semiconductor layer) 5 intrinsic microcrystalline silicon layer (photoelectric conversion layer containing crystalline material) 6 p-type microcrystalline silicon Layer (second conductivity type semiconductor layer) 7 Transparent conductor layer 8 Collector electrode 9 Sunlight 10 External load 11 Amorphous silicon layer (amorphous semiconductor layer) 12 Intrinsic microcrystalline silicon layer (photoelectric conversion layer including crystalline) Reference Signs List 21 translucent substrate 22 back electrode 31 n-type semiconductor layer (first conductivity type semiconductor layer) 32 intrinsic semiconductor layer (photoelectric conversion layer) 33 p-type semiconductor layer (second conductivity type semiconductor layer)

Claims (9)

[Claims] A first conductive type semiconductor layer, an amorphous semiconductor layer, a crystalline photoelectric conversion layer, and a second conductive type semiconductor layer are sequentially stacked on a substrate; A photoelectric conversion element having a surface subjected to a dry etching treatment later. 2. The photoelectric conversion device according to claim 1, wherein the surface of the amorphous semiconductor layer subjected to the dry etching treatment is in an island shape. 3. The photoelectric conversion element according to claim 1, wherein a maximum value of the thickness of the amorphous semiconductor layer subjected to the dry etching treatment is 5 nm or less. 4. The photoelectric conversion device according to claim 1, wherein the first conductivity type semiconductor layer is a p-type semiconductor layer, and the second conductivity type semiconductor layer is an n-type semiconductor layer. element. 5. The photoelectric conversion device according to claim 1, wherein the first conductivity type semiconductor layer is an n-type semiconductor layer, and the second conductivity type semiconductor layer is a p-type semiconductor layer. element. 6. One or more photoelectric conversion multilayer films comprising a first conductivity type semiconductor layer, a photoelectric conversion layer, and a second conductivity type semiconductor layer are laminated on the second conductivity type semiconductor layer, and the photoelectric conversion layer is formed. The photoelectric conversion device according to any one of claims 1 to 5, wherein the photoelectric conversion device has a structure having a plurality of layers. 7. A photoelectric conversion device comprising the photoelectric conversion element according to claim 1. Description: 8. A first conductive type semiconductor layer and an amorphous semiconductor layer are sequentially laminated on a substrate, and then the amorphous semiconductor layer is subjected to dry etching, and the amorphous semiconductor layer after the dry etching is applied. A method for manufacturing a photoelectric conversion element, comprising sequentially laminating a photoelectric conversion layer containing a crystalline material and a second conductivity type semiconductor layer thereon. 9. The method according to claim 8, wherein the dry etching is performed until the maximum thickness of the amorphous semiconductor layer becomes 5 nm or less.