JP2002182864A - Disk array controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a disk array system where a plurality of disk array controllers can be operated as one disk array controller, deterioration of performance due to data shift among a plurality of the disk array controllers is suppressed and performance proportional to the number of controllers is attained. SOLUTION: The disk array controller has a channel IF part, a disk IF part, a cache memory part, a common memory part, a means connecting the channel IF part, the disk IF part and the cache memory part, a means connecting the channel IF part, the disk IF part and the common memory part and has a plurality of disk array control units reading and writing data. The disk array controller has a means connecting the common memories in a plurality of the disk array control units and a means connecting the cache memories in a plurality of the disk array control units. Thus, the performance of data shift among a plurality of the disk array control units can be improved and also the performance of the disk array controller can be improved in proportion to the number of the disk array control units.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a disk array controller, and more particularly to a disk array controller for storing data in a plurality of magnetic disk units.

[0002]

2. Description of the Related Art In a current computer system,
There is great expectation for improvement in processing performance, and particularly, there is a high demand for improvement in I / O performance of the disk subsystem. The I / O performance of a disk subsystem using a magnetic disk as a storage medium (hereinafter referred to as “subsystem”) is three to four orders of magnitude higher than the I / O performance of a main storage of a computer using a semiconductor storage device as a storage medium. In the past, efforts have been made to reduce this difference, i.e., to improve the I / O performance of the subsystem.

In a large company represented by a bank, a securities company, a telephone company, etc., computers and storages conventionally distributed in various places are centralized in a data center to form a computer system and a storage system. There is a trend to reduce the cost of operating, maintaining and managing computer systems and storage systems, especially for large / high-end storage systems.
There is a demand for channel interface support (connectivity) for connecting to hundreds or more host computers and storage capacity of several hundred terabytes or more.

On the other hand, with the expansion of the open market in recent years and the spread of the storage area network (SAN) expected in the future, a small-scale configuration having the same high functionality and high reliability as a large / high-end storage system ( (Small housing)
The demand for storage systems is increasing.

As one method for improving the I / O performance of a subsystem, there is a system called a disk array in which a subsystem is composed of a plurality of magnetic disk devices and data is stored in the plurality of magnetic disk devices. Are known. In the case of a disk array, it generally comprises a plurality of magnetic disk devices for storing I / O from a host computer and a disk array control device for receiving the I / O of the host computer and transferring the I / O to the plurality of magnetic disk devices. is there. Among them, a method of connecting a plurality of conventional large / high-end disk array controllers to configure a super-large disk array controller can be considered to meet the demand for large-scale connection and large capacity. In order to meet the demand for a small-scale configuration of the disk subsystem, a method of configuring a device having a small housing in a conventional model of the minimum configuration of a large-sized / high-end disk array controller can be considered. In addition, a method of connecting a plurality of the miniaturized devices to configure a device that supports a medium to large-scale configuration supported by a conventional disk array control device can be considered.

As described above, the disk array controller requires a scalable controller capable of coping with the same highly functional and highly reliable architecture from a small-scale configuration to a very large-scale configuration. Has been
For that purpose, a disk array controller that can be operated as one disk array controller by a plurality of disk array controllers is required. On the other hand, in the prior art, as shown in FIG. 2, a plurality of channel IF units 11 for executing data transfer between the host computer 50 and the disk array controller 2, a magnetic disk device 5, and the disk array controller 2 A plurality of disk IF units 12 for executing data transfer between the two, a cache memory unit 14 for temporarily storing data of the magnetic disk device 5, and control information (for example, a channel IF
Unit 11, disk IF unit 12, and cache memory unit 1
And a shared memory unit 13 for storing information related to data transfer control between the disk array control unit 4 and data management information stored in the magnetic disk device 5.
The shared memory unit 13 and the cache memory unit 14 include all the channel IF units 11 and the disk IF units 1.
There is a method of making the configuration accessible from two. In the disk array control device 2, an interconnection network 21 is provided between the channel IF unit 11 and the disk IF unit 12 and the shared memory unit 13 and between the channel IF unit 11 and the disk IF unit 12 and the cache memory unit 14. , And an interconnection network 22.

The channel IF unit 11 has an interface for connecting to the host computer 50 and a microprocessor (not shown) for controlling input and output to and from the host computer 50. Also, disk IF
The unit 12 has an interface for connecting to the magnetic disk device 5 and a microprocessor (not shown) for controlling input and output to and from the magnetic disk device 5.
The disk IF unit 12 also executes a RAID function.

In the conventional disk array controller 2, when it is necessary to record data larger than the recording data amount supported by one disk array controller 2, a plurality of disk array controllers 2 are installed and a host computer is installed. From 50, the channels were connected to a plurality of disk array control devices 2.

When it is necessary to connect more host computers 50 than the number of host channels that can be connected to one disk array controller 2, a plurality of disk array controllers 2 are installed, and
0 was connected.

When a plurality of disk array controllers 2 are connected, it is necessary to transfer data between them. In this case, there has been a method in which a channel is connected to both of the two disk array controllers 2 that perform data migration from one host computer 50, and the data is migrated via the host computer 50. Particularly, in the prior art disclosed in U.S. Pat. No. 5,680,640, when data is migrated between two disk array controllers 3 as shown in FIG. A part (two in the figure) of the interface with the host computer 50 is connected by a data transfer path 8, and the data of the magnetic disk device 5 connected to one disk array controller 3 is transferred via the data transfer path 8. Therefore, the process has been shifted to the magnetic disk device 5 connected to the other disk array control device 3.

In another conventional technique, when it is necessary to record more data than the recording data amount supported by one disk array controller, or when the number of host channels that can be connected to one disk array controller is larger than the number of host channels. If you need to connect a computer or migrate data between multiple disk array controllers,
As shown in FIG. 4, a plurality of disk array controllers 4 are installed, and their interfaces with the host computer 50 are connected to the host computer 50 via the interconnection network 23 composed of switches.

In the prior art disclosed in Japanese Patent Application Laid-Open No. H11-7359, when data is transferred between two sub-disk array controllers 4-1 as shown in FIG. By connecting the array control devices 4-1 via the interconnection network 22, the data of the magnetic disk device 5 connected to one of the sub disk array control devices 4-1 can be transferred via the interconnection network 22 to the other sub disk. There is a method of shifting to the magnetic disk device 5 connected to the disk array control device 4-1.

[0013]

In the prior art shown in FIG. 2, it is possible to increase the number of channels connected to the host computer 50 and the storage capacity by simply increasing the number of disk array controllers 2. One host computer 50 is connected to a plurality of disk array controllers 2
When it is necessary to store data in the disk array controller 2, the host computer 50 needs to connect channels to all the disk array controllers 2, and the host computer 50 determines which disk array controller 2 When accessing the data by ascertaining whether the data is stored in the magnetic disk device 5, it is necessary to specify the target disk array control device 2 and perform the access.
Therefore, it has been difficult to operate a plurality of disk array controllers as one disk array controller.

In the prior art shown in FIG. 3, since the disk array controllers 3 are connected by the data migration path 8, the host computer 50 only needs to be connected to one disk array controller 3 and to connect other disk arrays. It was possible to access data stored in the magnetic disk device 5 connected to the array controller 3, and it was possible to operate a plurality of disk array controllers 3 as one disk array controller.

However, if, for example, a data read request is issued from the host computer 50 to the disk array controller 3 and there is no data in the magnetic disk device 5 connected to the disk array controller 3, the data migration path 8 The read request is sent to the other disk array controller 3 via the disk array controller 3 and the disk array controller 3 to which the magnetic disk device 5 storing the corresponding data is connected.
, It is necessary to receive the request data via the data migration path 8 and return the request data to the host computer 50. Therefore, when a certain host computer 50 accesses data stored in the magnetic disk device 5 connected to the disk array control device 3 other than the disk array control device 3 to which the self-confidence is connected, there is a problem that the performance is significantly reduced.

Further, in order to prevent the above problem, among data frequently accessed from a certain host computer 50, a magnetic disk drive connected to a disk array control device different from the disk array control device to which the host computer is connected Is transferred to the magnetic disk device 5 connected to the disk array control device 3 to which the host computer 50 is connected, the data is transferred via the data transfer path 8, so that the performance is low. was there.

In the prior art shown in FIG. 4, the host computer 50 can access all the disk array controllers 4 via the interconnection network 23 using switches.

However, a plurality of disk array controllers 4
Is operated as one disk array controller, the data of all the disk array controllers 4 connected to the switches are stored in any one of the switches constituting the interconnection network 23. It is necessary to have a map that indicates whether the request has been made. If there is an access request from the host computer 50, a function of analyzing the command in the switch and allocating it to the disk array control device 4 storing the requested data is required.

In this case, the host computer 50 is directly connected to the disk array control device 4 because it is necessary to analyze the command in the switch connected thereto in addition to the command analysis in the conventional channel IF unit 11. There is a problem that performance is reduced as compared with the case.

The high-end disk array controller has the following functions.

That is, a copy of a certain business data set (corresponding to a logical volume) is held, and in a normal business, the original data set and the duplicate data set are updated at the same time. If there is a request to back up the set, stop updating the data in the duplicate data set, use it for backup, continue using the original data set, and when the backup is completed, There is a function that ensures consistency between the data set and the replicated data set.

In the prior art shown in FIGS. 2 to 4, when the above function is realized, if an attempt is made to maintain a copy of a data set between different disk array controllers, the data must be transferred between the disk array controllers. Since the set needs to be transferred, there is a problem that the performance is significantly reduced.

As a technique for solving the above problem, a storage control device having an internal network as disclosed in Japanese Patent Application Laid-Open No. H11-7359 is conceivable. In the prior art shown in FIG. 5, high-speed data migration is realized by connecting the two sub-disk array controllers 4-1 by the interconnection network 22. Generally, the disk array control device is provided with a shared memory that can be accessed by a microprocessor mounted in the channel IF unit, the disk IF unit, and the like, and that stores control information about the cache and the disk array control device. In the prior art shown in FIG. 5, cache control information and the like exist in the disk IF unit 12 in the sub-disk array control device 4-1.

In general, data transfer of a path for accessing a shared memory is about several bytes and several cycles in size because data is control information, whereas data transfer of a path for accessing a cache and a disk is several kilobytes. Is large because of the transfer of data. As in the prior art shown in FIG. 5, when the number of interconnection networks is one, the path for accessing the shared memory and the path for accessing the cache and the disk use the same interconnection network. The performance of memory access will be degraded.

Considering the processing in the case where the cache hits at the time of reading in the prior art shown in FIG. 5, the channel IF receiving the read request from the host computer 50
From the disk IF unit 1 via the interconnection network 22
2, a Read request is issued. As a result of the cache hit determination in the disk IF unit 12, when a hit occurs in the cache 14 in the same sub-disk array control device 4-1, the disk IF unit 12
Instructs the cache 14 to transfer data. Cache 1
4 is read via the interconnection network 22,
The data is transferred to the channel IF unit 11, the data is transferred from the channel IF unit 11 to the host computer 50 that made the request, and the process ends. As described above, one read process is performed three times through the interconnection network 22. For the interconnection network 22, the other disk IF unit 12 and the other channel IF unit 11 in the same sub-disk array controller 4-1 and the disk IF unit 12 and the channel in the other sub-disk array controller 4-1 When an access request is also received from the IF unit 11, a conflict occurs.
Reducing the frequency of use of 2 is a useful way to prevent performance degradation.

In particular, when a plurality of sub-disk array controllers 4-1 are connected by an interconnection network, it is necessary to search for which sub-disk array controller 4-1 contains the relevant data. In the sub disk array controller 4-1 corresponding to several kilobytes of data,
In order to find the cache 14 and the cache 14, the interconnecting network 22 is used a plurality of times, and the performance is significantly reduced.

An object of the present invention is to provide a scalable disk array control device that can be used with a high-performance and high-reliability architecture from a small-scale configuration to a very large-scale configuration.

More specifically, an object of the present invention is to reduce the performance due to data migration between a plurality of disk array controllers when operating a plurality of disk array controllers as one disk array controller. To provide a disk array system capable of achieving performance in proportion to the number of disk array controllers, and to realize the functions of the disk array controller with a plurality of disk array controllers while suppressing performance degradation. is there.

[0029]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a channel interface unit having an interface with a host computer, a disk interface unit having an interface with a magnetic disk drive, and a data read / write with respect to the magnetic disk drive. A cache memory unit that temporarily stores, the shared memory unit that stores control information related to data transfer between the channel interface unit and the disk interface unit and the cache memory unit and management information of the magnetic disk device, Means for connecting the cache interface with the channel interface and the disk interface, and means for connecting the shared memory with the channel interface and the disk interface And a power supply unit for driving each of the units. In response to a data read / write request from the host computer, the channel interface unit transfers data between the interface with the host computer and the cache memory unit. And the disk interface unit performs a data transfer between the magnetic disk device and the cache memory unit, thereby providing a disk array control unit having a plurality of disk array control units for reading / writing data. An apparatus for connecting the shared memory units in the plurality of disk array control units,
Means for connecting the cache memory units in the plurality of disk array control units, wherein the means for connecting the shared memory units and the means for connecting the cache memory units operate independently of each other, Means that does not affect the data of the shared memory unit in the other disk array control unit or the cache memory unit from the channel interface unit and the disk interface unit in the disk array control unit. This is achieved by a disk array control device characterized in that data can be read / written.

Preferably, the plurality of channel interface units in the plurality of disk array control units and the space between the plurality of disk interface units and the plurality of cache memory units span the plurality of disk array control units. The plurality of channel interface units and the plurality of disk interface units and the plurality of shared memory units are connected by an interconnection network using switches, and an interconnection network extending between the plurality of disk array control units. Connecting.

Preferably, between the plurality of channel interface units and the plurality of disk interface units in the plurality of disk array control units and the plurality of cache memory units, the plurality of disk interface control units are connected to each other. The plurality of channel interface units and the plurality of disk interface units and the plurality of shared memory units are directly connected in the disk array control unit, Between the disk array control units, the shared memory units are connected by an interconnection network extending between the plurality of disk array control units.

Preferably, between the plurality of channel interface units and the plurality of disk interface units in the plurality of disk array control units and the plurality of cache memory units, the plurality of disk array control units are connected to each other. The plurality of channel interface units and the plurality of disk interface units and the plurality of shared memory units in the disk array control unit and the disk array control unit. Connect directly between them.

Further, the above object is to provide a channel interface unit having an interface with a host computer, a disk interface unit having an interface with a magnetic disk device, and temporarily storing data read / written from / to the magnetic disk device. A cache memory unit for storing, a shared memory unit for storing control information relating to data transfer between the channel interface unit and the disk interface unit and the cache memory unit, and management information of the magnetic disk device, and the channel interface unit Means for connecting the disk interface unit and the cache memory unit; means for connecting the channel interface unit and the disk interface unit to the shared memory unit; The channel interface unit executes a data transfer between the interface with the host computer and the cache memory unit in response to a data read / write request from the host computer. The disk interface unit is a disk array control device having a plurality of disk array control units for reading / writing data by executing data transfer between the magnetic disk device and the cache memory unit. Means for connecting between the shared memory units in the plurality of disk array control units, and means for connecting between the cache memory units in the plurality of disk array control units, and One said disk array control unit The disk array control, wherein data of the magnetic disk drive connected only to the disk array control unit different from the disk array control unit can be read / written from the host computer connected only to the disk array control unit. Achieved by the device.

In addition, the problems disclosed by the present application and the solution thereof will be clarified by the description of the embodiments of the invention and the drawings.

[0035]

Embodiments of the present invention will be described below with reference to the drawings.

FIGS. 6, 7, 8, 9 and 10 show an embodiment of the present invention. As shown in FIG. 6, the disk array control device 1 includes a plurality of disk array control units 1.
-2. Disk array control unit 1-
2 has an interface unit (channel IF unit) 11 with the host computer 50, an interface unit (disk IF unit) 12 with the magnetic disk device 5, a shared memory unit 13, and a cache memory unit 14. Unit 11, disk IF unit 12, and shared memory unit 13
Are directly connected in the disk array control unit 1-2. In addition, among the plurality of disk array control units 1-2, the shared memory unit 13 is connected via an interconnection network 24, and the cache memory unit 14 is connected via an interconnection network 22. That is, the configuration is such that all the shared memory units 13 or all the cache memory units 14 can be accessed from all the channel IF units 11 and the disk IF units 12 via the interconnection network 22 or the interconnection network 24. ing.

As described above, in the disk array control unit 1-2, the channel IF unit 11 and the disk IF
By directly connecting the unit 12 and the shared memory unit 13,
The access time to the shared memory unit 13 can be reduced as compared with the case where the connection is made via the interconnection network 21 shown in FIG. Further, one interconnection network 2 shown in FIG.
2, the access time to the shared memory 13 is shortened, and by having a path independent of the interconnection network 22, there is no influence from other data transfer. It does not affect the data transfer.

In FIG. 6, considering the processing when a cache hit occurs at the time of reading, the host computer 50
A cache hit determination request is issued to the shared memory unit 13 from the channel IF unit 11 that has received the read request. As a result of the cache hit determination in the shared memory unit 13, when a hit occurs in the cache memory unit 14 in the same disk array control unit 1-2, the channel IF unit 11 transmits the cache memory unit 1 via the mutual connection network 22.
4 instructs data transfer. The data read from the cache memory unit 14 is transferred to the channel IF unit 11 via the interconnection network 22, and is transferred from the channel IF unit 11 to the host computer 50 that is the request source.
The processing ends.

As described above, for one Read process,
Only two passes through the interconnection network 22 are required. Even if the corresponding data exists in another disk array control unit 1-2, the corresponding data is stored in any disk array control unit
As means for retrieving whether or not the data exists in the cache memory unit 14 and the shared memory unit 14, there is an interconnection network 24 connecting the shared memory units 13, so it is only necessary to pass through the interconnection network 22 used for data transfer twice. become.

Also, in the write processing, since the interconnection network 24 for accessing the shared memory and the interconnection network 22 for transferring data are independent of each other, the corresponding data is stored in any disk array control unit 1-2 and cache memory unit. 1
4, it is not necessary to write data through the interconnection network 22 a plurality of times as in the prior art shown in FIG. Therefore, performance degradation can be suppressed even in a configuration in which a plurality of disk array control units 1-2 in which the use frequency of the interconnection network increases is coupled.

One disk array control unit 1-2
One specific example is shown in FIG. The disk array control unit 1-2 includes two channel IF units 11 with the host computer 50, two disk IF units 12 with the magnetic disk device 5, two cache memory path switches (CM-SW) 111, , Two shared memory units 1
3, two cache memory units 14, a shared memory (SM) access path 139, and a cache memory (C
M) Access path 137 and CM access path 138
And an inter-housing SM path 143 and an inter-housing CM path 142.

The channel IF unit 11 controls two IFs (host IFs) 102 with the host computer 50, two microprocessors 101 for controlling input / output to and from the host computer 50, and controls access to the shared memory unit 13. Access control unit (SM access control unit) 1
04, and an access control unit (CM access control unit) 105 for controlling access to the cache memory unit 14. The host computer 50 and the cache memory unit 14
Transfer of control information between the microprocessor 101 and the shared memory unit 13. The CM access control unit 105 is directly connected to the two host IFs 102. The SM access control unit 104 is directly connected to the two microprocessors 101. The SM access control unit 104 and the CM access control unit 1
05 is directly connected.

The disk IF unit 12 includes two IFs (drive IFs) 103 for the magnetic disk device 5, two microprocessors 101 for controlling input / output to and from the magnetic disk device 5, and one An access control unit (SM access control unit) 104 and one access control unit (CM access control unit) 105 for the cache memory unit 14 are provided, and data transfer between the magnetic disk device 5 and the cache memory unit 14 is performed. Processor 1
1 and the shared memory unit 13 are transferred. The CM access control unit 105 includes two host IFs 1
02 directly. The SM access control unit 104 is directly connected to the two microprocessors 101. Further, the SM access control unit 104 and the CM access control unit 105 are directly connected. Disk IF
The unit also performs the RAID function.

The shared memory unit 13 has a shared memory (SM) controller 107 and a memory module 109,
Control information of the disk array control unit 1-2 (for example, information on data transfer control between the channel IF unit 11 and the disk IF unit 12 and the cache memory unit 14, management information of data to be recorded on the magnetic disk device 5)
Etc. are stored.

The cache memory unit 14 includes a cache memory (CM) controller 108 and the memory module 1
09 for temporarily storing data to be recorded in the magnetic disk device 5.

The SM access control unit 104 has two SMs
Connect access paths 139 and connect them to two different S
Each of them is connected to the M controller 107. Therefore, the SM controller 107 has two channel IF units 1
A total of four SM access paths 139 are connected, one each from one and two disk IF units 12. Also, the SM controller 1 of the other disk array control unit 1-2
07 are connected to each other.

In the SM controller 107, since the above access path is connected, the SM controller 1
07, the channel IF unit 11 and the disk IF unit 1
The requests from the four SM access paths 139 from 2 are:
It has a function of distributing the access path to the memory module 109 and the three SM access paths 143 between the enclosures to the shared memory unit 13 in the other disk array control unit 1-2.

The CM access control unit 105 has two CMs
Connect access paths 137 and connect them to two different C
Connect to the M-SW 111 respectively. CM-SW111
Connects two access paths 138 and connects them to two different CM controllers 108, respectively.
Therefore, two CM-
Two access paths 138 one by one from SW 111
Is connected. By doing so, there are two access routes from one CM access control unit 105 to one CM controller 108. Thus, even if a failure occurs in one access path or the CM-SW 111, the cache memory unit 14 can be accessed by another access route, so that fault tolerance can be improved.

The CM-SW 111 has two channels I
F unit 11 and two disk IF units 12 each
A total of four CM access paths 137 are connected to each one. Further, two access paths 138 to the two cache memory units 14 are connected to the CM-SW 111, one for each. Another disk array control unit 1
Two inter-chassis CM paths 142 for connection to one CM-SW 111 are connected.

In the CM-SW 111, since the above-described access path is connected, in the CM-SW 111,
Requests from the four access paths from the channel IF unit 11 and the disk IF unit 12 are transmitted to the two access paths to the cache memory unit 14 in the own disk array control unit 1-2 and the other disk array control unit 1 -2, which has a function of distributing the access path between the two cases to the cache memory unit 14 in the storage unit 2.

Disk array control unit 1 shown in FIG.
FIG. 8 shows an example of the disk array control device 1 in which two units are connected. The shared memory units 13 in the respective disk array control units 1-2 are directly connected via the SM paths 143 between the chassis.

Each disk array control unit 1-
2 between the CM-SWs 111, a CM path 142 between each chassis.
Is connected via the CM-SW 122 between the casings, and the CM
The -SW 122 is connected via a CM-SW path 144.

As described above, by directly connecting the shared memory units 13 in each disk array control unit 1-2, it is possible to reduce the overhead of data transfer processing that occurs in the inter-unit SW, Performance is improved.

Disk array control unit 1 shown in FIG.
FIG. 9 shows an example of the disk array control device 1 in which three units are connected.

The shared memory units 13 in the respective disk array control units 1-2 are directly connected via the SM paths 143 between the chassis.

Each disk array control unit 1-
2 between the CM-SWs 111, a CM path 142 between each chassis.
Are connected via the CM-SW 122 between casings.

As described above, by directly connecting the shared memory units 13 in each disk array control unit 1-2, it is possible to reduce the overhead of data transfer processing occurring in the inter-chassis SW, Performance is improved.

When four or more disk array control units 1-2 are connected, the CM path 142 between the enclosures is connected between the CM-SWs 111 in each disk array control unit 1-2. By connecting to the CM-SW 122, each disk array control unit 1-
2 between the shared memory units 13, the SM path 143 between the chassis
And the number of connectable disk array control units 1-2 can be increased.

The disk array control unit 1 shown in FIG.
FIG. 10 shows an example of the disk array control device 1 in which eight units are connected.

The shared memory units 13 in the respective disk array control units 1-2 are directly connected via the SM paths 143 between the chassis.

Each disk array control unit 1-
2 between the CM-SWs 111, a CM path 142 between each chassis.
Are connected via the CM-SW 122 between casings.

As described above, by directly connecting the shared memory units 13 in each disk array control unit 1-2, it is possible to reduce the overhead of data transfer processing occurring in the inter-chassis SW, Performance is improved.

According to this embodiment, the host computer 5
0 indicates which disk array control unit 1-
2 can write and read data only by issuing an access request to the disk array control unit 1-2 connected to the disk array control unit 1-2 without being aware of whether the data is stored in the magnetic disk device 5 connected to the disk drive 2. It becomes possible for the host computer 50 to show the plurality of disk array control units 1-2 to one disk array controller 1.

When data is read from the magnetic disk device 5 connected to a disk array control unit 1-2 different from the disk control unit 1-2 that has received the request,
Since data can be read through the internal interconnection network and the cache memory unit 14, there is no need to transfer data via the channel IF units 11 of both disk array control units 1-2, and the data is read. In addition, it is possible to suppress a decrease in writing performance.

Further, since the interconnection network connecting between the shared memory units 13 and the interconnection network connecting between the cache memory units 14 are independent, it is possible to reduce competition of the interconnection networks and suppress a decrease in performance. Becomes

In the above embodiment, the shared memory unit 13
Although the description has been made using the inter-chassis SM path 143 as an interconnecting network for coupling between them, the connection method is the same function as the inter-housing CM-SW 122 used as an interconnecting network for coupling between the cache memory units 14. May be used. Needless to say, both of these interconnection networks can be realized using other network means and communication means.

[0067]

According to the present invention, a plurality of disk array controllers can be operated as a single disk array controller, and performance degradation due to data migration between a plurality of disk array controllers can be suppressed, and the number of disk array controllers is proportional to the number of disk arrays. It is possible to provide a disk array system capable of achieving high performance, and to realize the functions of the disk array control device with a plurality of disk array control devices while suppressing performance degradation.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a disk array control device according to the present invention.

FIG. 2 is a diagram showing a configuration of a conventional disk array control device.

FIG. 3 is a diagram showing another configuration of a conventional disk array control device.

FIG. 4 is a diagram showing another configuration of a conventional disk array control device.

FIG. 5 is a diagram showing another configuration of a conventional disk array control device.

FIG. 6 is a diagram showing another configuration of the disk array control device according to the present invention.

FIG. 7 is a diagram showing a detailed configuration inside a disk array control unit shown in FIG. 6;

8 is a diagram showing a configuration for connecting a plurality of disk array control units shown in FIG. 6;

FIG. 9 is a diagram showing a configuration for connecting a plurality of disk array control units shown in FIG. 6;

FIG. 10 is a diagram showing a configuration for connecting a plurality of disk array control units shown in FIG. 6;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Disk array control device, 1-2 ... Disk array control unit, 5 ... Magnetic disk device, 11 ... Channel IF unit 12 ... Disk IF unit, 13 ... Shared memory unit, 1
4 cache memory unit, 2122 interconnection network, 50
… Host computer

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G06F 12/08 511 G06F 12/08 511Z 557 557 (72) Inventor Kazuhisa Fujimoto 1-280 Higashi Koigakubo, Kokubunji-shi, Tokyo Address F-term in Central Research Laboratory, Hitachi, Ltd. (Reference) 5B005 JJ11 MM11 5B065 BA01 CA11 CA30 CE12 CE22 EA12

Claims (9)

[Claims] 1. A channel interface unit having an interface with a host computer, a disk interface unit having an interface with a magnetic disk device, and a cache memory for temporarily storing data read / written from / to the magnetic disk device. And a shared memory unit for storing control information on data transfer between the channel interface unit and the disk interface unit and the cache memory unit and management information of the magnetic disk device; and the channel interface unit and the disk interface. Means for connecting the memory section to the cache memory section, means for connecting the channel interface section and the disk interface section to the shared memory section, and a power supply for driving the respective sections. The channel interface unit executes data transfer between the interface with the host computer and the cache memory unit in response to a data read / write request from the host computer; Is a disk array control device having a plurality of disk array control units for reading / writing data by executing data transfer between the magnetic disk device and the cache memory unit. Means for connecting the shared memory units in the disk array control unit, and means for connecting the cache memory units in the plurality of disk array control units, wherein the channel interface unit in the disk array control unit And the de From disk interface unit, the other of the disk array controller, wherein the data of the shared memory portion of the disk array control the unit, or the data of the cache memory unit can be read / write. 2. A channel interface unit having an interface with a host computer, a disk interface unit having an interface with a magnetic disk device, and a cache memory for temporarily storing data read / written from / to the magnetic disk device. And a shared memory unit for storing control information on data transfer between the channel interface unit and the disk interface unit and the cache memory unit and management information of the magnetic disk device; and the channel interface unit and the disk interface. Means for connecting the memory section to the cache memory section, means for connecting the channel interface section and the disk interface section to the shared memory section, and power supply for driving the respective sections. A channel read / write request from the host computer, the channel interface unit performing data transfer between the interface with the host computer and the cache memory unit, and the disk interface unit Is a disk array control device having a plurality of disk array control units for reading / writing data by executing data transfer between the magnetic disk device and the cache memory unit. Means for connecting the shared memory units in the disk array control unit, and means for connecting the cache memory units in the plurality of disk array control units; Only connected to array control unit It comes from a host computer, a disk array controller which is a possible data read / write of the magnetic disk device connected only to a different said disk array control unit with the disk array control unit. 3. A part of data in the magnetic disk device connected to the disk array control unit is stored in the cache memory unit in the disk array control unit. Copying the part of the data to the cache memory units in the different disk array control units via the means for connecting the cache memory units in the respective disk array control units; The disk array control unit in which the data is duplicated in the unit has a function of storing the data in the magnetic disk device connected to its own unit, and uses the function to transmit the data to each of the different disk array control units. A copy of the partial data is held between the connected magnetic disk devices. The disk array controller according to claim 1 or claim 2. 4. A means for measuring the frequency of access from the host computer to data in the magnetic disk device connected to the disk array control unit,
The frequency at which access from the host computer to one of the disk array control units is access to data in the magnetic disk device connected to the disk array control unit different from the disk array control unit is predetermined. If the value exceeds
The data is stored in the cache memory unit in the disk array control unit connected to the magnetic disk device in which the data is stored, and then a host computer that frequently accesses the data is connected. The data is moved to the cache memory unit in the disk array control unit through the means for connecting the cache memory units in the plurality of disk array control units, and then the data is stored in the own cache memory unit. The disk array control unit, to which the data has been moved, has a function of storing the data in the magnetic disk device connected to the own unit, and utilizes the function to perform a data read / write request from the host computer. Sometimes, the frequency of occurrence of data movement between the disk array control units is reduced. The disk array controller according to claim 1 or claim 2, wherein the door. 5. A switch extending between said plurality of disk array control units and between said plurality of disk interface units and said plurality of cache memory units in said plurality of disk array control units. The plurality of channel interface units and the plurality of disk interface units are connected to the plurality of shared memory units by an interconnection network extending between the plurality of disk array control units. 3. The disk array control device according to claim 1, wherein 6. A switch extending between said plurality of disk array control units and between said plurality of disk interface units and said plurality of cache memory units in said plurality of disk array control units. The plurality of channel interface units and the plurality of disk interface units and the plurality of shared memory units are directly connected in the disk array control unit, and are connected by an interconnection network using 3. The disk array control device according to claim 1, wherein between the units, the shared memory units are directly connected by an interconnection network extending between the plurality of disk array control units. 7. A disk subsystem comprising a magnetic disk device for storing data from a host computer and a disk array control device for receiving data from the host computer and transferring the data to the magnetic disk device. The apparatus includes a channel interface unit having an interface with a host computer, a disk interface unit having an interface with the magnetic disk device, a cache memory unit for temporarily storing data from a host, the channel interface unit and the A shared memory unit for storing control information relating to data transfer between a disk interface unit and the cache memory unit and management information for the magnetic disk device; the channel interface unit; Wherein the serial disk interface portion and the first connecting means for connecting the cache memory unit,
A disk subsystem comprising: the channel interface unit and a second connection unit that connects the disk interface unit to the shared memory unit. 8. The disk array control device, comprising: a plurality of disk array control units; a first interconnecting means for interconnecting the first connecting means of each of the disk array control units; 8. The disk subsystem according to claim 7, further comprising: second interconnecting means for mutually interconnecting said second connecting means provided in each of said disk array control units. 9. The system according to claim 1, comprising a plurality of said disk array control devices, wherein each of said first disk array devices comprises
And a second interconnecting means for interconnecting the second connecting means included in each of the disk array control devices. 8. The disk subsystem according to claim 7, wherein: