JP2002171041A - Printed wiring board, electronic component and method for manufacturing them - Google Patents

Printed wiring board, electronic component and method for manufacturing them

Info

Publication number
JP2002171041A
JP2002171041A JP2000368304A JP2000368304A JP2002171041A JP 2002171041 A JP2002171041 A JP 2002171041A JP 2000368304 A JP2000368304 A JP 2000368304A JP 2000368304 A JP2000368304 A JP 2000368304A JP 2002171041 A JP2002171041 A JP 2002171041A
Authority
JP
Japan
Prior art keywords
printed wiring
wiring board
electronic component
chip
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000368304A
Other languages
Japanese (ja)
Inventor
Kazumitsu Ishikawa
和充 石川
Masayuki Sakurai
正幸 桜井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lincstech Circuit Co Ltd
Original Assignee
Hitachi AIC Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi AIC Inc filed Critical Hitachi AIC Inc
Priority to JP2000368304A priority Critical patent/JP2002171041A/en
Publication of JP2002171041A publication Critical patent/JP2002171041A/en
Pending legal-status Critical Current

Links

Landscapes

  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a printed wiring board and a chip-type electronic component, wherein high reliability and stable quality of end surface terminal portions formed on end surfaces of the printed wiring board and the chip-type electronic component are realized, peeling and imperfect sticking will not be generated in a conductor film, and miniaturization, high density and high quality of the end surface terminal portions are realized. SOLUTION: In a printed wiring board 30 and its end surface terminal portion, a smooth lower surface terminal portion is made the end surface terminal portion. The terminal portion consists of a penetrating connection hole, having plating conductor which electrically connects upper surface conductor with lower surface conductor of the printed wiring board, a filler with which the inside of the penetrating connection hole is filled, and a plating conductor for covering the end surface of a lower surface of the filler. A chip component to be subjected to surface mounting, consists of the printed wiring board 30, an electronic component element 50 which is connected with the upper surface conductor of the printed wiring board by using a bonding wire or a bump, and a sealing member 28 for covering the electronic component element and a connection component.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電子部品素子やチ
ップ形電子部品等を高密度に搭載するプリント配線板お
よびプリント配線板を使用した電子部品とその製造方法
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board on which electronic components and chip-type electronic parts are mounted at a high density, an electronic component using the printed wiring board, and a method of manufacturing the same.

【0002】[0002]

【従来の技術】一般に、プリント配線板に端面端子部を
形成し、このプリント配線板をベ−ス材として半導体素
子や電子部品素子をに搭載してチップ形電子部品とする
方法、あるいは一旦プリント配線板にチップ形電子部品
を高密度に搭載したモジュール基板をマザーボード上に
実装する方法がある。図6(a)は、従来のプリント配
線板のめっきス−ルホ−ル穴(貫通接続穴)を端面端子
部とすることを説明する平面図、同図(b)は切断した
後の端面端子部の状態を示す要部の斜視図である。図7
は従来のプリント配線板の製造方法によって製造した端
面端子部にチップ形電子部品を搭載した状態を説明する
ための要部の平面図である。図8(a)は従来のチップ
形電子部品の実装面積を説明するための側面図、図8
(b)は従来のチップ形電子部品におけるマンハッタン
現象を説明するための側面図である。
2. Description of the Related Art In general, a method of forming an end terminal portion on a printed wiring board and mounting a semiconductor element or an electronic component element on the printed wiring board as a base material to form a chip-type electronic component, or printing once. There is a method of mounting a module substrate having chip-type electronic components mounted on a wiring board at high density on a motherboard. FIG. 6 (a) is a plan view for explaining that a plated through-hole (through connection hole) of a conventional printed wiring board is used as an end face terminal, and FIG. 6 (b) is a cut end face terminal. It is a perspective view of the principal part which shows the state of a part. FIG.
FIG. 5 is a plan view of a main part for describing a state in which a chip-type electronic component is mounted on an end face terminal manufactured by a conventional method of manufacturing a printed wiring board. FIG. 8A is a side view for explaining a mounting area of a conventional chip-type electronic component.
FIG. 2B is a side view for explaining the Manhattan phenomenon in a conventional chip-type electronic component.

【0003】従来のプリント配線板のめっきス−ルホ−
ル穴(貫通接続穴)を端面端子部とする場合には、図6
(a)に示すように、めっき導体15を有する貫通接続
穴7には一般的に上部表面導体と下部表面導体にランド
4がある。この貫通接続穴7のほぼ中心部にある切断線
3においてプレス加工やルーター加工によって切断して
端面端子部を形成する。そして、同図(b)に示すよう
に、貫通接続穴7を切断した後の端面端子部34は上面
のパターン導体(上面ランド4)である上面端子部31
やプリント配線板2の上下面のパターン導体を接続する
めっき導体15からなるU字型の貫通溝7aをした側面
端子部32と下面のパターン導体(下面ランド4)であ
る下面端子部33から形成される。
A conventional printed wiring board plating method
When the hole (through connection hole) is used as the end face terminal, FIG.
As shown in (a), the through-hole 7 having the plated conductor 15 generally has lands 4 on the upper surface conductor and the lower surface conductor. An end terminal portion is formed by cutting at a cutting line 3 substantially at the center of the through connection hole 7 by pressing or router processing. Then, as shown in FIG. 6B, the end face terminal portion 34 after cutting the through connection hole 7 becomes the upper surface terminal portion 31 which is the pattern conductor (the upper surface land 4) on the upper surface.
And a side surface terminal portion 32 having a U-shaped through groove 7a made of a plated conductor 15 for connecting the pattern conductors on the upper and lower surfaces of the printed wiring board 2 and a lower surface terminal portion 33 which is a lower surface pattern conductor (lower land 4). Is done.

【0004】従来のプリント配線板の製造方法によって
製造した前記図6の端面端子部にチップ形電子部品を搭
載した状態を図7に基づいて説明する。図7に示すよう
に、貫通接続穴7を切断した後の凹設状の貫通溝7aに
接近してチップ形電子部品8を実装するため、貫通溝7
aの上面ランド部4(上面端子部)とは別にチップ形電
子部品8を実装するための面付ランド部14を設けてい
た。このためプリント配線板2の端面からチップ形電子
部品8の端面までの距離L1が、面付ランド部14の高
さΔLだけ大きくなり、この結果、プリント配線板2の
外形寸法が大きくなる。また、切断した後の貫通溝7a
を端面電極として機能させるためには、貫通溝7aの上
面ランド4(導体)の幅Cを不必要に小さくすることは
できず、貫通溝7aの上面ランド径D1が貫通接続穴径
(貫通溝径)より2Cだけ大きくなる。
A state in which a chip type electronic component is mounted on the end face terminal portion shown in FIG. 6 manufactured by a conventional method for manufacturing a printed wiring board will be described with reference to FIG. As shown in FIG. 7, since the chip-type electronic component 8 is mounted close to the recessed through groove 7a after the through connection hole 7 has been cut, the through groove 7
A surface land 14 for mounting the chip-type electronic component 8 is provided separately from the upper surface land 4 (the upper surface terminal). For this reason, the distance L1 from the end surface of the printed wiring board 2 to the end surface of the chip-type electronic component 8 is increased by the height ΔL of the land portion 14 with the surface, and as a result, the outer dimensions of the printed wiring board 2 are increased. Also, the cut-through groove 7a after cutting
In order for the through hole 7a to function as an end face electrode, the width C of the upper surface land 4 (conductor) of the through groove 7a cannot be unnecessarily reduced, and the upper surface land diameter D1 of the through groove 7a becomes equal to the through connection hole diameter (through hole groove). Diameter) by 2C.

【0005】また、図8(a)に示すように、従来のチ
ップ形電子部品8においては、左極端子6と右極端子5
は下面端子部6b,5bと側面端子部6a,5aが一体化
してチップ形電子部品8の両側端面に設けられた構造に
なっている。したがって、はんだ43a,43bがこれ
ら折曲部の側面端子部6a,6bにも多量に付着するた
め、マザーボード40のランド部41a,41bを従来
のチップ形電子部品8の両側端面の外側に延設する必要
がある。このため、プリント配線板2やマザーボード4
0にチップ形電子部品8を実装するための長さL4を、
従来のチップ形電子部品8の全長よりも大きく形成しな
ければならないので、実装に必要なマザーボード40の
面積が大きくなり、実装密度が低下するという問題もあ
った。
As shown in FIG. 8A, in a conventional chip-type electronic component 8, a left pole terminal 6 and a right pole terminal 5 are provided.
Has a structure in which lower surface terminal portions 6b and 5b and side surface terminal portions 6a and 5a are integrated and provided on both side end surfaces of the chip-type electronic component 8. Therefore, a large amount of the solder 43a, 43b adheres to the side surface terminal portions 6a, 6b of these bent portions, so that the land portions 41a, 41b of the mother board 40 extend outside both end surfaces of the conventional chip-type electronic component 8. There is a need to. Therefore, the printed wiring board 2 and the motherboard 4
0, the length L4 for mounting the chip-type electronic component 8
Since the chip-type electronic component 8 must be formed to be longer than the entire length, the area of the motherboard 40 required for mounting increases, and there is also a problem that the mounting density decreases.

【0006】また、図8(b)に示すように、ランド部
41a,41bに対して左極端子6と右極端子5が位置
ずれを起こして従来のチップ形電子部品8がプリント配
線板2やマザーボード40に実装された場合には、左右
のランド部41a,41b上に付着されるはんだ43a
の量が、はんだ43bの量よりも多くなる。したがっ
て、一方のはんだ43aの接着力(引力)が他方のはん
だ43bの接着力よりも大きくなり、この異なる接着力
によってチップ形電子部品8が図中反時計方向に回動し
易くなる。このため、図中二点鎖線で示すように、従来
のチップ形電子部品8の他方端側がプリント配線板2や
マザーボード40から浮き上がる、いわゆるマンハッタ
ン現象を引き起こし、実装不良が発生するという問題も
あった。
Further, as shown in FIG. 8B, the left terminal 6 and the right terminal 5 are displaced with respect to the lands 41a and 41b, so that the conventional chip-type electronic component 8 is And when mounted on the motherboard 40, the solder 43a adhered on the left and right land portions 41a and 41b.
Is larger than the amount of the solder 43b. Therefore, the adhesive force (attraction force) of one solder 43a becomes larger than the adhesive force of the other solder 43b, and the chip-type electronic component 8 is easily rotated counterclockwise in the drawing due to the different adhesive force. Therefore, as shown by a two-dot chain line in the figure, the other end side of the conventional chip-type electronic component 8 rises from the printed wiring board 2 or the motherboard 40, which causes a so-called Manhattan phenomenon, and there is also a problem that a mounting failure occurs. .

【0007】[0007]

【発明が解決しようとする課題】しかしながら、上述し
た従来のプリント配線板2においては、図6(a)に示
すように、この貫通接続穴7内が空洞状態になってい
る。したがって、切断線3においてプレス加工やルータ
ー加工によって切断する際に、切断すべき金属部位(め
っき導体15)の一部が弾性変形し剥離して金属バリと
なり貫通接続穴7内に入り込み金属バリとして残るおそ
れがある。このため、この金属バリによって貫通溝7a
を形成するめっき導体15がプリント配線板2の基材か
ら剥離し易くなり密着強度不足となり、かつ貫通溝7a
の導体抵抗が大きくなることによって信頼性が低下する
という問題があった。
However, in the above-mentioned conventional printed wiring board 2, as shown in FIG. 6A, the inside of the through connection hole 7 is in a hollow state. Therefore, when cutting by cutting or router processing at the cutting line 3, a part of the metal portion (plated conductor 15) to be cut is elastically deformed and peels off to become a metal burr, which enters the through connection hole 7 and becomes a metal burr. May remain. Therefore, the through groove 7a is formed by the metal burr.
Is easily peeled from the base material of the printed wiring board 2, the adhesion strength becomes insufficient, and the through groove 7a is formed.
However, there is a problem that the reliability decreases due to an increase in the conductor resistance of the semiconductor device.

【0008】また、穴内が空洞状態となっている貫通接
続穴7のほぼ中心部をプレス加工やルーター加工によっ
て切断することにより、端面から内部にへこんだ凹設状
の貫通溝7aの上面ランド4上に直接チップ形電子部品
8を実装することが困難となり、図7に示すように、貫
通溝7aのランド部4とは別に実装するための面付ラン
ド部14を別々に設けていた。このため、部品実装密度
が悪くなり、この結果、プリント配線板2の外形寸法が
大きくなるという問題がありプリント配線板の小形化や
プリント配線板をベ−ス材として半導体素子や電子部品
素子を搭載するチップ形電子部品の小形化に支障をきた
していた。さらに、貫通溝7a内が空洞状態となってい
ることにより、チップ形電子部品や電子部品素子をモ−
ルド樹脂等で封止する際、貫通接続穴7内や貫通溝7a
から樹脂漏れが生じ信頼性に支障をきたしていた。
Further, by cutting a substantially central portion of the through connection hole 7 in which the inside of the hole is hollow by press working or router working, the upper surface land 4 of the recessed through groove 7a dented inside from the end face is formed. It becomes difficult to mount the chip-type electronic component 8 directly on the top, and as shown in FIG. 7, a land portion 14 with a surface for mounting separately from the land portion 4 of the through groove 7a is provided separately. For this reason, the component mounting density is deteriorated, and as a result, there is a problem that the outer dimensions of the printed wiring board 2 are increased. Therefore, the printed wiring board is downsized, and the printed wiring board is used as a base material for semiconductor elements and electronic component elements. This hindered the miniaturization of chip-type electronic components to be mounted. Further, since the inside of the through groove 7a is in a hollow state, chip-type electronic components and electronic component elements can be molded.
When sealing with a mold resin or the like, the inside of the through connection hole 7 or the through groove 7a
From the resin, which has hindered reliability.

【0009】本発明はこのような問題に鑑みなされたも
ので、第1の目的は信頼性の向上と接続信頼性の安定化
を図ることにある。第2の目的はプリント配線板やチッ
プ形電子部品の小形化と電子部品の高密度実装を図るこ
とにある。第3の目的は効率良く生産し生産性の向上を
図ることにある。
The present invention has been made in view of such a problem, and a first object is to improve reliability and stabilize connection reliability. A second object is to reduce the size of printed wiring boards and chip-type electronic components and to mount electronic components with high density. A third object is to produce efficiently and improve productivity.

【0010】[0010]

【課題を解決するための手段】この目的を達成するため
に、請求項1に係る発明は、プリント配線板やプリント
配線板を多数枚に分割するスリット穴の端面に設置する
端面端子部において、プリント配線板の上部表面導体と
下部表面導体とを導通させるめっき導体を有する貫通接
続穴と、この貫通接続穴内に充填された充填材と、この
充填材の下部表面の端面を覆うめっき導体と、からなる
平滑な下面端子部を端面端子部とするプリント配線板で
ある。したがって、プリント配線板の端面に設置する上
部表面導体を上面端子部としてチップ形電子部品を面付
ランド部に実装するため、またプリント配線板をマザー
ボードのランド部に実装するときの下面端子部のみを端
面端子部とするものである。また、プリント配線板の上
下面のパターン導体を接続する機能として、従来のU字
型の貫通溝を側面端子部とせず、貫通接続穴内に充填さ
れた充填材と該充填材の下部表面の端面を覆うめっき導
体とからなる非貫通接続穴の下面ランド4をプリント配
線板の端面に接する端面端子部とするものである。
In order to achieve this object, the invention according to claim 1 is directed to a printed wiring board and an end face terminal provided at an end face of a slit hole for dividing the printed wiring board into a plurality of printed wiring boards. A through connection hole having a plated conductor for conducting the upper surface conductor and the lower surface conductor of the printed wiring board, a filler filled in the through connection hole, and a plated conductor covering an end surface of the lower surface of the filler, This is a printed wiring board having a smooth lower surface terminal portion composed of an end surface terminal portion. Therefore, in order to mount the chip-type electronic component on the land with the surface using the upper surface conductor installed on the end face of the printed wiring board as the upper surface terminal, and only the lower surface terminal when the printed wiring board is mounted on the land of the motherboard. Is an end face terminal portion. In addition, as a function of connecting the pattern conductors on the upper and lower surfaces of the printed wiring board, the conventional U-shaped through groove is not used as a side terminal portion, and the filler filled in the through connection hole and the end surface of the lower surface of the filler are provided. The lower surface land 4 of the non-penetrating connection hole formed of a plated conductor covering the printed wiring board is used as an end surface terminal portion in contact with the end surface of the printed wiring board.

【0011】また、請求項2に係る発明は、前記請求項
1で分割する個々のプリント配線板内に配置される下面
端子部において、点対象で一対となる下面端子部のそれ
ぞれの面積が等しいプリント配線板である。つまり、小
形のプリント配線板やチップ形電子部品をはんだ接続す
る際、側面端子部の設置をやめ、左右前後の面積が等し
い下面端子部としてマンハッタン現象をなくして品質の
向上と高い接続信頼性を図ることができる。
According to a second aspect of the present invention, in the lower surface terminal portions arranged in the individual printed wiring boards divided in the first aspect, the respective areas of the pair of lower surface terminal portions symmetrical with respect to each other are equal. It is a printed wiring board. In other words, when soldering small printed wiring boards or chip-type electronic components, the installation of the side terminals is no longer required, and the lower terminals that have the same area on the left, right, front and rear eliminate the Manhattan phenomenon, improving quality and improving connection reliability. Can be planned.

【0012】請求項3に係る発明は、面付実装をするチ
ップ部品において、前記請求項1または請求項2のプリ
ント配線板と、該プリント配線板の上部表面導体にボン
デング・ワイヤまたはバンプで接続した電子部品素子
と、前記電子部品素子と接続部品を被覆した封止材と、
からなるチップ形電子部品である。
According to a third aspect of the present invention, in a chip component to be mounted on a surface, the printed wiring board according to the first or second aspect is connected to the upper surface conductor of the printed wiring board by a bonding wire or a bump. Electronic component element, and a sealing material covering the electronic component element and the connection component,
Chip-type electronic components.

【0013】また、請求項4に係る発明は、面付実装を
するチップ部品において、電子部品素子を搭載するベ−
ス材に前記請求項1または請求項2のプリント配線板を
使用し、該プリント配線板の上部表面導体に電子部品素
子をボンデング・ワイヤまたはバンプで接続し、封止材
で被覆した後、前記プリント配線板を分割切断してチッ
プ形電子部品とする電子部品の製造方法である。したが
って、大盤板のプリント配線板に電子部品素子をボンデ
ング・ワイヤまたはバンプで接続し封止樹脂で被覆した
後に個々のプリント配線板を分割切断してチップ形電子
部品とするするため、小形化と電子部品の高密度実装化
および生産性の向上を図ることができる。
According to a fourth aspect of the present invention, there is provided a chip component to be mounted on a surface, the base for mounting an electronic component element.
The printed wiring board according to claim 1 or 2 is used as a material, and an electronic component element is connected to an upper surface conductor of the printed wiring board with a bonding wire or a bump, and after covering with a sealing material, This is a method for manufacturing an electronic component in which a printed wiring board is divided and cut into chip-type electronic components. Therefore, the electronic components are connected to the large printed wiring board with bonding wires or bumps, covered with a sealing resin, and then the individual printed wiring boards are divided and cut into chip-type electronic components. High-density mounting of electronic components and improvement in productivity can be achieved.

【0014】[0014]

【発明の実施の形態】以下、本発明の実施の形態を図を
用いて説明する。図1は本発明に係るプリント配線板の
製造方法の第1の実施例を説明するための工程図、図2
(a)は同じくプリント配線板の製造方法の第2の実施
例を説明するための工程図、図2(b)はその工程に合
わせた断面図である。図3はチップ形電子部品を搭載し
た本発明に係るプリント配線板平面図である。図4は本
発明に係るチップ形電子部品の実装状態を説明するため
の側面図、図5は本発明に係るチップ形電子部品を説明
するための断面図である。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a process chart for explaining a first embodiment of a method for manufacturing a printed wiring board according to the present invention, and FIG.
FIG. 2A is a process chart for explaining a second embodiment of the method for manufacturing a printed wiring board, and FIG. 2B is a cross-sectional view corresponding to the process. FIG. 3 is a plan view of a printed wiring board according to the present invention on which chip-type electronic components are mounted. FIG. 4 is a side view for explaining a mounted state of the chip-type electronic component according to the present invention, and FIG. 5 is a cross-sectional view for explaining the chip-type electronic component according to the present invention.

【0015】図1(a)において、全体を符号11で示
すものは両面銅張積層板であって、絶縁樹脂基板12の
両面に銅箔13,13が張り付けられている。なお、絶
縁樹脂基板12は熱硬化性樹脂でも熱可塑性樹脂でもよ
い。同図(b)に示すように、この両面銅張積層板11
にドリルによって貫通穴3,3を穿孔した後に、同図
(c)に示すように、第1の銅めっき処理によるパネル
めっきを行い銅めっき導体15を銅箔13上に形成する
とともに、貫通穴3,3内の穴壁にも銅めっき導体15
を形成し、貫通接続穴7,7を形成する。
In FIG. 1A, a double-sided copper-clad laminate generally denoted by reference numeral 11 is provided with copper foils 13 attached to both sides of an insulating resin substrate 12. Note that the insulating resin substrate 12 may be a thermosetting resin or a thermoplastic resin. As shown in FIG. 1B, this double-sided copper-clad laminate 11
After drilling through holes 3 and 3 with a drill, as shown in FIG. 3 (c), panel plating is performed by a first copper plating process to form a copper plated conductor 15 on the copper foil 13 and a through hole. Copper plated conductor 15 on the hole walls in 3 and 3
Is formed, and the through connection holes 7 are formed.

【0016】図1(d)に示すように、エッチングによ
って貫通接続穴7の周囲に貫通接続穴7を介して互いに
電気的に接続される上面端子部17a,17b,17c
と下面端子部18a,18bとを形成する。次いで、同
図(e)に示すように、貫通接続穴7内に充填材として
樹脂ペーストである絶縁樹脂9を充填して非貫通接続穴
16を形成する。しかる後、第2のめっき処理をして同
図(f)に示すように、非貫通接続穴16内の充填材の
絶縁樹脂9の上下部表面の端面を覆うめっき導体と上面
端子部17a,17b,17cと下面端子部18a,1
8b上に銅めっき及びニッケル・金などの皮膜を形成し
て、右極用導体層21、左極用導体層22および右極端
子23、左極端子24をそれぞれ形成して、プリント配
線板30を形成する。したがって、貫通接続穴7内の絶
縁樹脂9の上下部表面の端面はこれら右極用導体層21
と右極端子23および左極用導体層22と左極端子24
によって非貫通接続穴16の上下が被覆される。つま
り、右極端子23および左極端子24の面付ランド部の
エリア内にプリント配線板の上下部表面の導体層を電気
的に接続する非貫通接続穴16を埋設して設けるもので
ある。
As shown in FIG. 1D, upper surface terminal portions 17a, 17b and 17c which are electrically connected to each other through the through connection hole 7 around the through connection hole 7 by etching.
And the lower surface terminal portions 18a and 18b are formed. Next, as shown in FIG. 3E, the non-through connection holes 16 are formed by filling the through connection holes 7 with an insulating resin 9 which is a resin paste as a filler. Thereafter, a second plating process is performed to form a plated conductor covering the upper and lower end surfaces of the insulating resin 9 of the filler in the non-penetrating connection hole 16 and the upper surface terminal portions 17a, as shown in FIG. 17b, 17c and lower surface terminal portions 18a, 1
8b, a copper plating and a film of nickel, gold or the like are formed to form a right-electrode conductor layer 21, a left-electrode conductor layer 22, right-electrode terminals 23, and left-electrode terminals 24, respectively. To form Therefore, the end surfaces of the upper and lower surfaces of the insulating resin 9 in the through-hole 7 are connected to the conductor layers 21 for the right electrode.
, Right pole terminal 23 and left pole conductor layer 22 and left pole terminal 24
Thus, the upper and lower portions of the non-through connection hole 16 are covered. That is, the non-penetrating connection holes 16 for electrically connecting the conductor layers on the upper and lower surfaces of the printed wiring board are provided in the area of the land portion with the surface of the right pole terminal 23 and the left pole terminal 24.

【0017】図2は本発明に係るプリント配線板の製造
方法の第2の実施の形態を示し、同図(a)はこの第2
の実施の形態に係るプリント配線板の製造方法を説明す
るための工程図、同図(b)はその工程の特徴を説明す
るための平面図である。この第2の実施の形態において
は、同図(a)の工程(VI)における回路導体形成、工
程(VII)のスリット穴加工のルーター加工等によっ
て、同図(b)に示すように大盤板のプリント配線板3
01から個々のプリント配線板30を多数枚分割するた
めに、略矩形を形成する4本を一組とするスリット穴4
5を設ける。
FIG. 2 shows a second embodiment of the method for manufacturing a printed wiring board according to the present invention, and FIG.
FIGS. 4A and 4B are process diagrams for explaining the method for manufacturing a printed wiring board according to the embodiment, and FIG. 3B is a plan view for explaining the features of the process. In the second embodiment, as shown in FIG. 2B, a large board is formed by forming a circuit conductor in step (VI) of FIG. Printed wiring board 3
In order to divide a large number of individual printed wiring boards 30 from 01, four slits 4 forming a substantially rectangular
5 is provided.

【0018】次に工程(VIII)の電子部品の実装工程
で、前記大盤板のプリント配線板301の個々のプリン
ト配線板30の面付ランド部14にチップ形電子部品8
を実装搭載した(図示せず)後で、工程(X)で前記大
盤板のプリント配線板301を分割切断してチップ形電
子部品を実装搭載した個々のプリント配線板30とする
プリント配線板の製造方法である。そして、この第2の
実施の形態が、上述した第1の実施の形態と異なる点
は、これら4本のスリット穴45間に僅かな面積の4個
の切り残し部46が設けられている点にある。したがっ
て、プリント配線板30はこれら切り残し部46を介し
て大盤板のプリント配線板301から分割されていない
状態で、工程(VIII)の電子部品の実装工程で大盤板の
プリント配線板301全体にチップ形電子部品を実装搭
載する実装効率の良いチップ形電子部品の製造方法であ
る。
Next, in the electronic component mounting step of step (VIII), the chip type electronic components 8 are mounted on the land portions 14 of the individual printed wiring boards 30 of the printed wiring board 301 of the large board.
After mounting and mounting (not shown), the printed wiring board 301 of the large board is divided and cut into individual printed wiring boards 30 on which chip-type electronic components are mounted and mounted in step (X). It is a manufacturing method. The second embodiment is different from the first embodiment in that four uncut portions 46 having a small area are provided between the four slit holes 45. It is in. Therefore, in the state where the printed wiring board 30 is not divided from the large-sized printed wiring board 301 through the uncut portions 46, the printed wiring board 301 is mounted on the entire large-sized printed wiring board 301 in the mounting process of the electronic component in the step (VIII). This is a method of manufacturing a chip-type electronic component with high mounting efficiency in which the chip-type electronic component is mounted.

【0019】図3に基づきチップ形電子部品をプリント
配線板に搭載する場合、本発明におけるプリント配線板
30では、上面端子部31上を面付ランド部14とし
て、また面付ランド部14のエリア内にプリント配線板
の上下部表面の導体層を電気的に接続する非貫通接続穴
16を埋設し、この非貫通接続穴16を覆っている面付
ランド部14にチップ形電子部品8が実装されることに
より、プリント配線板30の端面とチップ形電子部品8
の外側端面との距離L2を小さくすることができる。さ
らに、非貫通接続穴16を側面端子部としないため小径
にできる。
When a chip-type electronic component is mounted on a printed wiring board based on FIG. 3, in the printed wiring board 30 of the present invention, the upper surface terminal portion 31 is used as the surface land portion 14 and the area of the surface land portion 14 is set. A non-through connection hole 16 for electrically connecting the conductor layers on the upper and lower surfaces of the printed wiring board is buried therein, and the chip-type electronic component 8 is mounted on the land portion 14 covering the non-through connection hole 16. As a result, the end surface of the printed wiring board 30 and the chip-type electronic component 8 are
Can be reduced in distance L2 from the outer end surface. Further, the diameter of the non-penetrating connection hole 16 can be reduced because it is not used as a side terminal.

【0020】従って、プリント配線板30の外形寸法を
小さく形成することができるというだけではなく、該プ
リント配線板30をベ−ス材として半導体素子や電子部
品素子を搭載するチップ形電子部品8の高密度、小形化
が可能になる。つまり、図7において従来技術で説明し
た貫通接続穴7のランドの幅Cが不要となり、上面端子
部31と面付ランド部14を重ねて設定でき、面付ラン
ド部14の幅D2を必要最小限に形成することができる
ことにより、チップ形電子部品8,8の搭載ピッチl2
を小さく設定することができるのでプリント配線板30
やチップ形電子部品の小形化が可能になる。
Therefore, not only can the external dimensions of the printed wiring board 30 be reduced, but also the chip-type electronic component 8 on which semiconductor elements and electronic component elements are mounted using the printed wiring board 30 as a base material. High density and miniaturization are possible. That is, the land width C of the through connection hole 7 described in the related art in FIG. 7 is not required, and the upper surface terminal portion 31 and the land portion 14 with the surface can be set so as to overlap with each other. The mounting pitch l2 of the chip-type electronic components 8, 8
Can be set small, so that the printed wiring board 30
And miniaturization of chip-type electronic components.

【0021】図4は本発明の実施の形態に係るチップ形
電子部品の実装面積を説明するための側面図である。同
図において、本発明のチップ形電子部品8は右極端子2
3と左極端子24はチップ形電子部品8の下面のみに設
けられた構造になっている。したがって、プリント配線
板30やマザーボード40のランド部41にチップ形電
子部品8を実装するのに、側面端子部を介して行わず
に、上面端子部と非貫通接続穴で電気的な接続を図って
いる下面端子部のみを端面端子部とする。プリント配線
板30またはマザーボード40のランド部41a,41
bに右極端子23と左極端子24とをはんだ付けすると
きに、はんだ43a,43bがチップ形電子部品8の両
側面から漏出するようなことがない。いわゆる左右のは
んだ量が等しくなりマンハッタン現象を引き起こして実
装不良が発生するということがない。
FIG. 4 is a side view for explaining a mounting area of the chip-type electronic component according to the embodiment of the present invention. In the figure, a chip-type electronic component 8 of the present invention is
3 and the left pole terminal 24 are provided only on the lower surface of the chip-type electronic component 8. Therefore, mounting the chip-type electronic component 8 on the printed wiring board 30 or the land portion 41 of the motherboard 40 is not performed via the side surface terminal portion, and electrical connection between the upper surface terminal portion and the non-penetrating connection hole is achieved. Only the lower surface terminal portion is a terminal terminal portion. Land portions 41a, 41 of printed wiring board 30 or motherboard 40
When the right pole terminal 23 and the left pole terminal 24 are soldered to b, the solder 43a, 43b does not leak from both side surfaces of the chip-type electronic component 8. There is no possibility that the so-called left and right solder amounts are equal and the Manhattan phenomenon is caused to cause mounting failure.

【0022】このため、ランド部41a,41bのそれ
ぞれの長さB1,B2が、右極端子23と左極端子24
の長さと同一に形成することができ、ランド部41a,
41bをチップ形電子部品8の両側端面から左右方向に
露呈させて延設する必要がない。したがって、プリント
配線板30またはマザーボード40にチップ形電子部品
8を実装するための長さl4を、チップ形電子部品8の
全長と同一に形成できるので、実装面積が最小限になり
実装密度が向上する。従来の製品との実装面積を比較し
た結果、実装面積が60%以上縮小されることが確認さ
れた。
Therefore, the lengths B1 and B2 of the lands 41a and 41b are determined by the right pole terminal 23 and the left pole terminal 24.
Of the land portions 41a,
It is not necessary to expose and extend 41b from both end surfaces of the chip-type electronic component 8 in the left-right direction. Therefore, the length 14 for mounting the chip-type electronic component 8 on the printed wiring board 30 or the motherboard 40 can be formed to be the same as the entire length of the chip-type electronic component 8, so that the mounting area is minimized and the mounting density is improved. I do. As a result of comparing the mounting area with a conventional product, it was confirmed that the mounting area was reduced by 60% or more.

【0023】図5は本発明の実施の形態を示すチップ形
電子部品の断面図である。このチップ形電子部品の実施
の形態においては、チップ形電子部品としてトランジス
タやダイオードの3端子を有する電子部品の例を示した
ものであって、部品素子50の両端面からそれぞれエミ
ッタ端子部51(右極端子部),コレクタ端子部52
(左極端子)が突設され、外周部の一部にベース端子部
53(下面端子部)が設けられている。プリント配線板
30の上面には上面端子部として、3個の導体層55,
56,57が形成され、プリント配線板30の下面には
下面端子部として、3個の端子58,59,60が形成
されている。これら3個の導体層55,56,57と、
3個の端子58,59,60とはプリント配線板30に
形成した貫通接続穴内に絶縁樹脂9が充填されている非
貫通接続穴16,16,16を介してそれぞれ電気的に
接続されている。
FIG. 5 is a sectional view of a chip-type electronic component showing an embodiment of the present invention. In the embodiment of the chip-type electronic component, an example of an electronic component having three terminals of a transistor and a diode is shown as the chip-type electronic component. Right pole terminal), collector terminal 52
(Left pole terminal) is protruded, and a base terminal portion 53 (lower surface terminal portion) is provided on a part of the outer peripheral portion. On the upper surface of the printed wiring board 30, three conductor layers 55,
56, 57 are formed, and three terminals 58, 59, 60 are formed on the lower surface of the printed wiring board 30 as lower surface terminal portions. These three conductor layers 55, 56, 57,
The three terminals 58, 59, 60 are electrically connected to the three terminals 58, 59, 60 via the non-through connection holes 16, 16, 16, in which the insulating resin 9 is filled in the through connection holes formed in the printed wiring board 30. .

【0024】部品素子50のベース端子部53がプリン
ト配線板30の導体層57上に載置され、導電性接着剤
47(例えば、はんだペ−スト)によって電気的に接続
されることにより、ベース端子部53と端子60とが非
貫通接続穴16を介して電気的に接続される。また上記
の導電性接着剤47の代わりにBGA(ボ−ルグリッド
アレィ)バンプで接続してもよい。さらにプリント配線
板30の導体層55,56(ランド部)上と部品素子5
0の上面の両端面からそれぞれエミッタ端子部51,コ
レクタ端子部52とはボンデング・ワイヤ27を介して
電気的に接続されている。電子部品素子50をボンデン
グ・ワイヤ27またはバンプ等の導電性接着剤47で接
続してから封止樹脂28で被覆して小形のチップ形電子
部品とする。
The base terminal portion 53 of the component element 50 is placed on the conductor layer 57 of the printed wiring board 30 and is electrically connected by a conductive adhesive 47 (for example, solder paste), thereby forming a base. The terminal portion 53 and the terminal 60 are electrically connected through the non-through connection hole 16. Also, the conductive adhesive 47 may be replaced by a BGA (ball grid array) bump. Further, on the conductor layers 55 and 56 (land portions) of the printed wiring board 30 and the component elements 5
The emitter terminal portion 51 and the collector terminal portion 52 are electrically connected to the emitter terminal portion 51 and the collector terminal portion 52 from both end surfaces of the upper surface of the reference numeral 0 via bonding wires 27, respectively. The electronic component element 50 is connected with a conductive adhesive 47 such as a bonding wire 27 or a bump and then covered with a sealing resin 28 to obtain a small chip-type electronic component.

【0025】つまり、チップ形電子部品において、電子
部品素子を搭載するベ−ス材に前記のプリント配線板3
0を使用し、該プリント配線板30の上部表面導体の面
付ランド部(導体層55,56)に電子部品素子50を
ボンデング・ワイヤ27またはバンプで接続する。次に
電子部品素子50やボンデング・ワイヤ27またはバン
プ等の導電性接着剤47を封止樹脂28で被覆した後、
前記電子部品素子50が搭載されているプリント配線板
30を分割切断してチップ形電子部品とする電子部品の
製造方法である。したがって、大盤板のプリント配線板
に電子部品素子50等を封止樹脂28で被覆した後に個
々のプリント配線板30を分割切断してチップ形電子部
品とするするため、小形化と電子部品の高密度実装化お
よび生産性の向上を図ることができる。またチップ形電
子部品8をモ−ルド樹脂等の封止樹脂28で封止する
際、絶縁樹脂が充填されている非貫通接続穴16である
から穴内から樹脂漏れが生じ信頼性に支障をきたすこと
がない。
That is, in the chip type electronic component, the printed wiring board 3 is mounted on the base material on which the electronic component element is mounted.
Then, the electronic component element 50 is connected to the land portions (the conductor layers 55 and 56) of the upper surface conductor of the printed wiring board 30 by using bonding wires 27 or bumps. Next, after a conductive adhesive 47 such as an electronic component element 50, a bonding wire 27 or a bump is covered with a sealing resin 28,
This is a method of manufacturing an electronic component in which the printed wiring board 30 on which the electronic component element 50 is mounted is divided and cut into chip-type electronic components. Therefore, after the electronic component elements 50 and the like are covered with the sealing resin 28 on the large printed wiring board, the individual printed wiring boards 30 are divided and cut into chip-shaped electronic components. Density mounting and productivity can be improved. Further, when the chip-type electronic component 8 is sealed with a sealing resin 28 such as a mold resin, the non-through connection hole 16 filled with the insulating resin causes resin leakage from the inside of the hole, which impairs reliability. Nothing.

【0026】[0026]

【発明の効果】以上説明したように、請求項1,請求項
2に係る発明によれば、端面端子部をめっき導体を有す
る貫通接続穴内に充填された充填材と、この充填材の上
下部表面の端面を覆うめっき導体と、からなる平滑な下
面端面端子部としたことにより、プリント配線板の小型
化が図られるというだけではなく電子部品の高密度実装
が高品質と高い接続信頼性を図ることができる。
As described above, according to the first and second aspects of the present invention, the filler filled in the through-hole having the plated conductor and the upper and lower portions of the filler are provided. The smooth bottom end surface consisting of a plated conductor that covers the end surface of the surface not only reduces the size of the printed wiring board, but also enables high-density mounting of electronic components to achieve high quality and high connection reliability. Can be planned.

【0027】また、請求項1,請求項2,請求項3,請
求項4に係る発明によれば、作業性が向上するというだ
けではなく、コストの低減が図られ、さらにプリント配
線板の上下部表面の導体層を電気的に接続する非貫通接
続穴の接続信頼性が高いので品質が安定する。
According to the first, second, third, and fourth aspects of the present invention, not only the operability is improved, but also the cost is reduced, and furthermore, the upper and lower portions of the printed wiring board are reduced. Since the connection reliability of the non-through connection hole for electrically connecting the conductor layer on the surface of the part is high, the quality is stable.

【0028】さらに、請求項3,請求項4に係る発明に
よれば、チップ形電子部品の小形化や高い実装密度化,
接続信頼性が高いチップ形電子部品とその製造方法であ
る。
Further, according to the third and fourth aspects of the present invention, it is possible to reduce the size and the mounting density of the chip-type electronic component,
A chip-type electronic component having high connection reliability and a method of manufacturing the same.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明に係るプリント配線板の製造方法を説
明するための工程図。
FIG. 1 is a process chart for explaining a method for manufacturing a printed wiring board according to the present invention.

【図2】 本発明に係るプリント配線板の第2の実施の
形態を示し、同図(a)はこの第2の実施の形態のプリ
ント配線板の製造方法を説明するための工程図、同図
(b)はその工程の特徴を説明するための平面図であ
る。
2A and 2B show a second embodiment of the printed wiring board according to the present invention, and FIG. 2A is a process diagram for explaining a method of manufacturing the printed wiring board according to the second embodiment; FIG. 2B is a plan view for explaining the features of the process.

【図3】 本発明に係るプリント配線板の製造方法によ
って製造したプリント配線板に電子部品を搭載した状態
を説明するための要部の平面図である。
FIG. 3 is a plan view of a main part for describing a state in which electronic components are mounted on a printed wiring board manufactured by the method for manufacturing a printed wiring board according to the present invention.

【図4】 本発明に係るチップ形電子部品の実装状態を
説明するための側面図である。
FIG. 4 is a side view for explaining a mounted state of a chip-type electronic component according to the present invention.

【図5】 本発明に係るチップ形電子部品を説明するた
めの断面図である。
FIG. 5 is a cross-sectional view illustrating a chip-type electronic component according to the present invention.

【図6】 同図(a)は従来のプリント配線板の製造方
法によって製造した端面端子部を説明する平面図、同図
(b)は切断した後の端面端子部の状態を示す要部の斜
視図である。
FIG. 6 (a) is a plan view illustrating an end face terminal portion manufactured by a conventional method for manufacturing a printed wiring board, and FIG. 6 (b) is an essential part showing a state of the end face terminal portion after cutting. It is a perspective view.

【図7】 従来のプリント配線板の製造方法によって製
造したプリント配線板に電子部品を搭載した状態を説明
するための要部の平面図である。
FIG. 7 is a plan view of a main part for describing a state in which electronic components are mounted on a printed wiring board manufactured by a conventional method for manufacturing a printed wiring board.

【図8】 同図(a)は従来のチップ形電子部品の実装
面積を説明するための側面図、同図(b)は従来のチッ
プ形電子部品におけるマンハッタン現象を説明するため
の側面図である。
8A is a side view for explaining a mounting area of a conventional chip type electronic component, and FIG. 8B is a side view for explaining a Manhattan phenomenon in the conventional chip type electronic component. is there.

【符号の説明】[Explanation of symbols]

4…ランド部、7…貫通接続穴、8…チップ形電子部
品、14…面付ランド部、15…めっき導体、16…非
貫通接続穴、30…プリント配線板、34…端面端子
部、40…マザーボード、45…スリット穴、46…切
り残し部、50…電子部品素子。
DESCRIPTION OF SYMBOLS 4 ... Land part, 7 ... Through connection hole, 8 ... Chip type electronic component, 14 ... Land part with surface, 15 ... Plating conductor, 16 ... Non-through connection hole, 30 ... Printed wiring board, 34 ... End terminal part, 40 ... mother board, 45 ... slit hole, 46 ... uncut part, 50 ... electronic component element.

─────────────────────────────────────────────────────
────────────────────────────────────────────────── ───

【手続補正書】[Procedure amendment]

【提出日】平成13年6月11日(2001.6.1
1)
[Submission date] June 11, 2001 (2001.6.1)
1)

【手続補正1】[Procedure amendment 1]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】特許請求の範囲[Correction target item name] Claims

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【特許請求の範囲】[Claims]

【手続補正2】[Procedure amendment 2]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0010[Correction target item name] 0010

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【0010】[0010]

【課題を解決するための手段】この目的を達成するため
に請求項1に係る発明は、プリント配線板の端面、又は
プリント配線板を多数枚に分割する穴の端面に設置する
端面端子部において、プリント配線板の上部表面導体と
下部表面導体とを導通させるめっき導体を有する貫通接
続穴と、この貫通接続穴内に充填された充填材と、この
充填材の下部表面の端面を覆うめっき導体と、からなる
平滑な下面端子部を端面端子部とするプリント配線板で
ある。したがって、プリント配線板の上下面のパターン
導体を接続する機能として、従来のU字型の貫通溝を側
面端子部とせず、プリント配線板の上面端面に設置する
面付ランド部と下面端面に設置する端面端子部とを導通
させる非貫通接続穴が、面付ランド部と下面端子部のエ
リア内に埋設され、かつ貫通接続穴内に充填した充填材
の表面をめっき導体で覆った非貫通接続穴とするプリン
ト配線板とするものである。
In order to achieve this object, the invention according to claim 1 is directed to an end face terminal portion provided on an end face of a printed wiring board or an end face of a hole for dividing the printed wiring board into a plurality of pieces. A through connection hole having a plated conductor for conducting the upper surface conductor and the lower surface conductor of the printed wiring board, a filler filled in the through connection hole, and a plated conductor covering an end surface of the lower surface of the filler. And a printed wiring board having a smooth lower surface terminal portion made of an end surface terminal portion. Therefore, as a function of connecting the pattern conductors on the upper and lower surfaces of the printed wiring board, the conventional U-shaped through groove is not used as the side terminal portion, but is provided on the land portion with the surface installed on the upper end surface of the printed wiring board and on the lower end surface. Non-penetrating connection hole that conducts to the end face terminal part to be buried is buried in the area of the surface land part and the lower surface terminal part, and the surface of the filler filled in the through connection hole is covered with the plated conductor. And a printed wiring board.

【手続補正3】[Procedure amendment 3]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0012[Correction target item name] 0012

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【0012】請求項3に係る発明は、面付実装をするチ
ップ部品において、請求項1または請求項2のプリント
配線板と、該プリント配線板の上部面付ランド部に搭載
した電子部品素子や電子部品と、前記プリント配線板と
電子部品素子や電子部品を接続するボンデング・ワイヤ
やバンプまたは導電性接着剤などの接続部品と、前記電
子部品素子や電子部品と接続部品を被覆した封止材と、
からなるチップ形電子部品である。
According to a third aspect of the present invention, in a chip component to be mounted on a surface, the printed wiring board according to the first or second aspect, and an electronic component element mounted on a land portion with an upper surface of the printed wiring board. An electronic component, a connection component such as a bonding wire or a bump or a conductive adhesive for connecting the printed wiring board to the electronic component or the electronic component, and a sealing material covering the electronic component and the electronic component and the connection component When,
Chip-type electronic components.

【手続補正4】[Procedure amendment 4]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0013[Correction target item name] 0013

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【0013】また、請求項4に係る発明は、前記請求項
1または請求項2のプリント配線板の上部面付ランド部
に電子部品素子や電子部品を搭載する工程、搭載した電
子部品素子や電子部品を接続する工程、封止材で被覆す
る工程、被覆後のプリント配線板を分割切断してチップ
形電子部品とする工程とからなるチップ形電子部品の製
造方法である。したがって、大盤板のプリント配線板に
電子部品素子をボンデング・ワイヤまたはバンプで接続
し封止樹脂で被覆した後に個々のプリント配線板を分割
切断してチップ形電子部品とするするため、小形化と電
子部品の高密度実装化および生産性の向上を図ることが
できる。
According to a fourth aspect of the present invention, there is provided a process of mounting an electronic component or an electronic component on the land portion with an upper surface of the printed wiring board according to the first or second aspect of the present invention. The present invention is a method for manufacturing a chip-type electronic component, comprising: a step of connecting components; a step of covering with a sealing material; and a step of dividing and cutting the printed wiring board into a chip-type electronic component. Therefore, the electronic components are connected to the large printed wiring board with bonding wires or bumps, covered with a sealing resin, and then the individual printed wiring boards are divided and cut into chip-type electronic components. High-density mounting of electronic components and improvement in productivity can be achieved.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H05K 1/02 H05K 1/02 J H01G 1/14 V Fターム(参考) 5E032 BB01 CA02 CC03 CC04 CC11 CC16 CC18 DA11 5E082 AA01 BC38 BC39 GG10 GG26 GG28 HH25 HH27 HH47 JJ12 JJ15 JJ21 JJ25 JJ26 JJ27 KK01 KK10 LL35 5E317 AA01 AA22 CC31 CC51 CD27 CD34 GG11 GG14 5E338 AA02 BB02 BB13 BB25 BB42 BB47 BB65 BB75 CC01 CD02 CD33 EE23 EE51 ──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H05K 1/02 H05K 1/02 J H01G 1/14 VF term (Reference) 5E032 BB01 CA02 CC03 CC04 CC11 CC16 CC18 DA11 5E082 AA01 BC38 BC39 GG10 GG26 GG28 HH25 HH27 HH47 JJ12 JJ15 JJ21 JJ25 JJ26 JJ27 KK01 KK10 LL35 5E317 AA01 AA22 CC31 CC51 CD27 CD34 GG11 GG14 5E338 AA02 BB02 BB13 BB25 BB13 BB25 BB13 BB25 BB25

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 プリント配線板やプリント配線板を多数
枚に分割するスリット穴の端面に設置する端面端子部に
おいて、プリント配線板の上部表面導体と下部表面導体
とを導通させるめっき導体を有する貫通接続穴と、この
貫通接続穴内に充填された充填材と、この充填材の下部
表面の端面を覆うめっき導体と、からなる平滑な下面端
子部を端面端子部とすることを特徴とするプリント配線
板。
1. A through-hole having a plated conductor for conducting between an upper surface conductor and a lower surface conductor of a printed wiring board at an end surface terminal portion provided at an end surface of a printed circuit board or a slit hole for dividing the printed wiring board into a plurality of printed wiring boards. Printed wiring characterized in that a smooth lower surface terminal portion composed of a connection hole, a filler filled in the through connection hole, and a plated conductor covering an end surface of a lower surface of the filler is an end terminal portion. Board.
【請求項2】 前記請求項1の分割する個々のプリント
配線板内に配置される下面端子部において、点対象で一
対となる下面端子部のそれぞれの面積が等しいことを特
徴とするプリント配線板。
2. The printed wiring board according to claim 1, wherein the pair of lower surface terminal portions arranged in each of the divided lower surface terminal portions have the same area. .
【請求項3】 面付実装をするチップ部品において、前
記請求項1または請求項2のプリント配線板と、該プリ
ント配線板の上部表面導体にボンデング・ワイヤまたは
バンプで接続した電子部品素子と、前記電子部品素子と
接続部品を被覆した封止材と、からなるチップ形電子部
品。
3. A chip component to be mounted on a surface, comprising: the printed wiring board according to claim 1; and an electronic component element connected to an upper surface conductor of the printed wiring board by a bonding wire or a bump. A chip-type electronic component comprising: the electronic component element; and a sealing material covering the connection component.
【請求項4】 面付実装をするチップ部品において、電
子部品素子を搭載するベ−ス材に前記請求項1または請
求項2のプリント配線板を使用し、該プリント配線板の
上部表面導体に電子部品素子をボンデング・ワイヤまた
はバンプやはんだペ−ストで接続し、封止材で被覆した
後、前記プリント配線板を分割切断してチップ形電子部
品とする電子部品の製造方法。
4. A chip component to be mounted on a surface, wherein the printed wiring board according to claim 1 or 2 is used as a base material for mounting an electronic component element, and an upper surface conductor of the printed wiring board is used. A method of manufacturing an electronic component in which electronic component elements are connected with bonding wires or bumps or solder paste, covered with a sealing material, and then the printed wiring board is divided and cut into chip-type electronic components.
JP2000368304A 2000-12-04 2000-12-04 Printed wiring board, electronic component and method for manufacturing them Pending JP2002171041A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000368304A JP2002171041A (en) 2000-12-04 2000-12-04 Printed wiring board, electronic component and method for manufacturing them

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000368304A JP2002171041A (en) 2000-12-04 2000-12-04 Printed wiring board, electronic component and method for manufacturing them

Publications (1)

Publication Number Publication Date
JP2002171041A true JP2002171041A (en) 2002-06-14

Family

ID=18838581

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000368304A Pending JP2002171041A (en) 2000-12-04 2000-12-04 Printed wiring board, electronic component and method for manufacturing them

Country Status (1)

Country Link
JP (1) JP2002171041A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008192735A (en) * 2007-02-02 2008-08-21 Hitachi Aic Inc Wiring board
JP2013197418A (en) * 2012-03-21 2013-09-30 Shinko Seisakusho:Kk Wiring board suitable to sealing component, chip component, and method of manufacturing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008192735A (en) * 2007-02-02 2008-08-21 Hitachi Aic Inc Wiring board
JP2013197418A (en) * 2012-03-21 2013-09-30 Shinko Seisakusho:Kk Wiring board suitable to sealing component, chip component, and method of manufacturing the same

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