JP2002170892A - Method for manufacturing laminated gate oxide film structure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a new method of manufacturing a laminated gate oxide film structure comprising polycrystal Si particles formed in dots. SOLUTION: An amorphous Si film 4 is formed on a first SiO2 film 3 formed by thermal oxidation on a p-type Si substrate 1. The amorphous Si film 4 is made to contact an Si-contained atmosphere while it is heated to a prescribed temperature, for growing a polycrystal Si particles 5 on the amorphous Si film 4. Then, the amorphous Si film 4 and the polycrystal particles 5 are thermally oxidized to form a second SiO2 film 6.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a stacked gate oxide film structure, and more particularly to a FAMOS (Floating-gate Ava
lanche-injection MOS), SAMOS (Stacking-gate Av
alanche-injection MOS), EPROM (Erasable Progra
mmable Read Only Memory) and EEPROM (Electr
TECHNICAL FIELD The present invention relates to a method for manufacturing a stacked gate oxide film structure which can be suitably used for a stacked MOS memory such as an erasable PROM.

[0002]

2. Description of the Related Art Stacked MOS memories have evolved into flash memories starting from FAMOS and SAMOS memories, and are used in EPROMs and EEPROMs. These stacked MOS memories have a gate oxide film structure having a stacked structure of a polycrystalline Si layer and a SiO ₂ layer. Specifically, this gate oxide film structure is
It has a laminated structure of an O ₂ gate insulating film / polycrystalline Si film / SiO ₂ film.

On the other hand, recent improvements in the performance of MOS memory circuits require a reduction in the write / erase voltage, a reduction in the write / erase time, and miniaturization of the element. As a result, the overall thickness of the gate oxide film structure must be reduced. Inevitably demands. However, when the gate oxide film structure is thinned, the polycrystalline S
This leads to a decrease in reliability in terms of maintaining charges accumulated in the i-film. In order to avoid this, it has been proposed to form the polycrystalline Si film in the form of dots that are electrically separated from each other, instead of forming the polycrystalline Si film uniformly as a buried layer.

[0004]

When forming polycrystalline Si in a dod shape, attempts have been made to grow the Si particles by growing them using a chemical vapor deposition method or the like. However, in the chemical vapor deposition method, the surface density and the particle size of the Si particles cannot be sufficiently controlled, and the dots having the surface density and the particle size sufficient to be used as the stacked MOS memory as described above are used. At present, it is impossible to obtain polycrystalline Si.

In view of the above problems, an object of the present invention is to provide a novel method for manufacturing a stacked gate oxide film structure having polycrystalline Si particles formed in a dot shape.

[0006]

In order to achieve the above object,
The present invention includes a step of forming a first SiO ₂ film on a Si substrate by a thermal oxidation method, and a step of forming an amorphous Si film on the SiO ₂ film.
Forming a film, and contacting the amorphous Si film with a Si-containing atmosphere while heating the amorphous Si film to a predetermined temperature, and growing a plurality of polycrystalline Si particles on the amorphous Si film; Forming a _second SiO ₂ film so as to cover the plurality of polycrystalline Si particles.

The present inventors have conducted intensive studies to obtain a stacked gate oxide film structure in which a plurality of polycrystalline Sis are formed in a dot shape, which can be suitably used for a stacked MOS memory. As a result, after a thermally oxidized SiO ₂ film is formed on a Si substrate as in the related art, an amorphous Si film is formed on the thermally oxidized SiO ₂ film. And this amorphous Si
The film is brought into contact with a Si-containing atmosphere in a state where the film is heated to a predetermined temperature, and by appropriately adjusting the heating temperature and the contact time, the amorphous silicon film has a uniform size and sufficient surface density on the amorphous Si film. Of polycrystalline Si distributed in dots
It has been found that particles can be obtained.

According to the present invention, polycrystalline Si which is uniform and has a sufficient size and is distributed in a dot shape with a sufficient surface density is provided.
A stacked gate oxide film structure comprising particles can be provided. Accordingly, there is provided a stacked gate oxide film structure which can be suitably used for a recent stacked MOS memory which requires a reduction in write / erase voltage, a shorter write / erase time, and a finer element. can do.

Further, the size and surface density of the polycrystalline Si particles are independently controlled by appropriately adjusting the heating temperature of the amorphous Si film and the contact time with the Si-containing atmosphere. Can be.

In addition, since a SiO ₂ film formed by thermal oxidation is used as a gate oxide film, the structure controllability is extremely good, and high reliability and electrical characteristics can be provided. .

In the case where the dot-shaped polycrystalline Si particles constituting the stacked gate oxide film structure cannot be grown to a desired size by the above-described manufacturing method,
According to a preferred embodiment of the present invention, annealing is performed on a plurality of polycrystalline Si particles grown on the amorphous Si film to increase crystal grains of the plurality of polycrystalline Si particles. In this case, by appropriately adjusting the annealing temperature and the annealing time, polycrystalline Si particles having a desired size can be obtained.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail according to embodiments of the present invention. 1 to 5 are process diagrams showing a method for manufacturing a stacked MOS memory including the method for manufacturing a stacked gate oxide film structure according to the present invention. First, as shown in FIG. 1, a field oxide film 2 made of SiO ₂ or the like is formed on a (100) main surface of a p-type Si substrate 1 to a thickness of 100 to 200 mm by using a known method such as a thermal oxidation method. Form. Then, between the field oxide films 2, p
A first SiO ₂ film 3 constituting a gate oxide film is formed to a thickness of 1 to 5 nm on the (100) main surface of the mold Si substrate 1 by a thermal oxidation method. The SiO ₂ film 3 is preferably formed by p-type Si substrate 1 in a dry oxygen atmosphere at 900 to 1 μm.
It is formed by heating at 100 ° C. for 1 to 10 minutes.

Next, as shown in FIG. 2, an amorphous Si film 4 having a thickness of 1 is formed on the field oxide film 2 and the SiO ₂ film 3.
It is formed to a thickness of 10 to 10 nm. Note that this amorphous Si film 4
Using a gaseous Si raw material such as hydrogenated Si such as molecular Si, SiH ₄ or Si ₂ H ₆ , the entire Si film of the p-type Si substrate 1 including the field oxide film 2 and the SiO ₂ film 3 is crystallized. Not relatively low temperature, for example, 450-550 ° C
In this state, the film is formed by contacting with the above-mentioned Si raw material.

Next, as shown in FIG. 3, polycrystalline Si particles 5 are formed on the amorphous Si film 4. The polycrystalline Si particles 5 form the entire p-type Si substrate 1 including the amorphous Si film 4 preferably at 500 to 700 ° C., more preferably at 600 to 700 ° C.
The amorphous Si film 4 is formed by bringing the amorphous Si film 4 into contact with the above-mentioned Si raw material while being heated to 650 ° C. In addition,
The contacting time is determined depending on the desired size of the polycrystalline Si particles 5 and the heating temperature of the amorphous Si film 4, but is generally 1 to 60 seconds.

When the amorphous Si film 4 is merely brought into contact with the Si raw material for a predetermined time as described above, if the desired polycrystalline Si particles have a large particle size, the flow rate of the Si raw material, the heating temperature, etc. Due to various conditions, it may not be possible to obtain polycrystalline Si particles of a desired size. Therefore, in such a case, it is preferable to perform an annealing process on these polycrystalline Si particles after forming the polycrystalline Si particles once as shown in FIG.

In order to more effectively increase the particle diameter of the polycrystalline Si particles in the case of performing the annealing process and to make the annealing process more effective, it is necessary to use polycrystalline Si particles.
The entirety of the p-type Si substrate 1 including the particles 5 is converted to the p-type substrate 1 including the amorphous Si film 4 when growing the polycrystalline Si particles 5.
It is preferable to carry out the heating at or above the entire heating temperature. Specifically, the heat treatment is preferably performed at 550 to 750 ° C, and more preferably at 600 to 700 ° C.

The annealing time is determined by the annealing temperature and the desired size of the polycrystalline Si particles, but is generally 1 to 60 seconds.

Further, by performing such annealing treatment, polycrystalline Si particles 5 having a particle diameter of at least 3 to 30 nm can be obtained. Further, the surface density on the amorphous Si film 4 is 1 × 10 ¹⁰ to 1 × 10
It can be formed to be ¹² / cm ² .

Next, as shown in FIG.
4 and the entire p-type Si substrate 1 including the polycrystalline Si particles 5,
1 to 10 minutes at 900 to 1100 ° C in dry oxygen atmosphere
Thermal oxidation by heating for a second SiO 2₂Membrane 6
Is formed to a thickness of 1 to 20 nm. The thermal oxidation process
In the process, the amorphous Si film 4 is oxidized, and the second SiO ₂
It becomes a part of the film 6. And polycrystalline Si
The particles 5 are made of the second SiO₂Dotted in the film 6
Become like

[0020] It is also possible to instead be formed by thermal oxidation, as described above the second SiO ₂ film 6 is formed by using a conventional vapor deposition method. However, as described above, forming the second SiO ₂ film directly from the amorphous Si film 4 and the polycrystalline Si particles 5 by thermal oxidation causes unstable characteristics and lacks long-term reliability. Amorphous silicon film to be eliminated. Therefore, it is preferable to form the second SiO ₂ film by thermal oxidation as shown in FIG.

Next, as shown in FIG.
_By forming a polycrystalline Si film 7 as a gate electrode on the _two films 6 in a self-aligned manner, a stacked gate oxide film structure 10 is formed. Then, the source region 8 and the drain region 9 are formed by doping the exposed portion of the main surface of the p-type Si substrate 1 with an n-type impurity.
The S memory 20 is formed.

[0022]

EXAMPLE In this example, a stacked MOS memory was manufactured by using the method of manufacturing a stacked gate oxide film of the present invention in accordance with the steps shown in FIGS. First, as shown in FIG. 1, a field oxide film 2 was formed to a thickness of 0.7 μm on the (100) plane of a boron-doped p-type Si substrate 1.
Next, while heating the p-type Si substrate 1 to about 1000 ° C. and holding it in a dry oxygen atmosphere for 1 minute, the first SiO ₂ film 3 constituting the gate oxide film was formed to a thickness of 2 nm.

Next, as shown in FIG.
_The amorphous Si film 4 was formed to a thickness of 5 nm by heating the p-type Si substrate 1 including the _two films 3 to 520 ° C. and contacting it with a Si ₂ H ₆ gas atmosphere for 10 seconds. Next, as shown in FIG. 3, the p-type S including the amorphous Si film 4 is formed.
The whole of the i-substrate 1 was heated to 590 ° C. and contacted with the Si 2 H 6 gas atmosphere for 30 seconds to grow the polycrystalline Si particles 5.

Thereafter, the entire p-type Si substrate 1 is heated to the same temperature.
For 30 seconds to anneal the polycrystalline Si particles 5
Was increased to 10 nm. In addition,
At this time, the polycrystalline Si particles 5 are placed on the amorphous Si film 4.
Surface density is 1.2 × 10 ¹⁰/ Cm²Met. Next
Then, as shown in FIG.
B By heating to about 1000 ° C in an oxygen atmosphere
And a second SiO having a thickness of 10 nm.₂Film 6 was formed.

Next, as shown in FIG. 5, a polycrystalline Si film 7 constituting a gate electrode in a self-aligned manner is formed to a thickness of 100 nm by a vapor phase growth method using Si ₂ H ₆ gas to form a stacked gate. An oxide film structure 10 was formed. Then, p-type S
The source region 8 and the drain region 9 were formed by doping As, which is an n-type impurity, into the exposed portion of the main surface (100) of the i-substrate, and the stacked MOS memory 20 was manufactured.

[0026] Thereafter, as shown in FIG. 6, the voltage of V _{G =} 15V is applied between the gate oxide film structure 10 and the p-type Si substrate 1, was examined threshold voltage before and after writing. As a result, a threshold voltage difference of about 3.2 V was confirmed before and after writing, and it was confirmed that the memory functioned sufficiently.

Further, it was confirmed that even when the applied voltage was lowered to 9 V, the threshold voltage difference was substantially maintained.

In the above embodiment, when the annealing time was changed from 30 seconds to 60 seconds, the size of the polycrystalline Si particles 5 changed from 10 nm to 20 nm. Further, when the contact time of the amorphous Si film 4 with respect to Si2H4 is set to 30 seconds to 50 seconds, the surface density of the polycrystalline Si particles 5 becomes 1.2 × 10 ¹⁰ / cm ² to 2 × 10 ¹⁰ / cm. Increased to ² . In these cases, it was also found that by applying a predetermined voltage in the same manner as described above, a threshold voltage sufficient for use as a memory was obtained.

As described above, the present invention has been described in detail based on the embodiments of the present invention with reference to specific examples. However, the present invention is not limited to the above-described contents, and the present invention is not limited thereto. All modifications and changes are possible.

[0030]

As described above, according to the manufacturing method of the present invention, the laminated type having the particle-like or dot-like polycrystalline Si having a uniform and sufficient size and distributed at a sufficient surface density is provided. A gate oxide structure can be provided.
Accordingly, there is provided a stacked gate oxide film structure which can be suitably used for a recent stacked MOS memory which requires a reduction in write / erase voltage, a shorter write / erase time, and a finer element. can do.
In addition, the size and surface density of the dot-shaped polycrystalline Si can be controlled independently, and since the SiO ₂ film formed by thermal oxidation is used, the structure controllability is extremely good, and the reliability is high. And electrical characteristics.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing an initial step of manufacturing a stacked MOS memory using the method of manufacturing a stacked gate oxide film structure of the present invention.

FIG. 2 is a sectional view showing a step subsequent to the step shown in FIG. 1;

FIG. 3 is a sectional view showing a step subsequent to the step shown in FIG. 2;

FIG. 4 is a sectional view showing a step subsequent to the step shown in FIG. 3;

FIG. 5 is a sectional view showing a step subsequent to the step shown in FIG. 4;

FIG. 6 is a diagram showing an aspect of a memory test of a stacked MOS memory manufactured by using the manufacturing method of the stacked gate oxide film structure of the present invention.

FIG. 7 is a diagram showing a relationship between writing and a threshold voltage of a stacked MOS memory manufactured by using the method of manufacturing a stacked gate oxide film structure of the present invention.

[Explanation of symbols]

Reference Signs List 1 p-type Si substrate 2 field oxide film 3 first SiO ₂ film 4 amorphous Si film 5 polycrystalline Si particle 6 second SiO ₂ film 7 polycrystalline Si film 8 source region 9 drain region 10 stacked gate oxidation Film structure 20 Stacked MOS memory

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5F001 AA19 AD12 AG02 AG30 5F083 EP07 EP09 JA32 JA33 PR12 PR21 PR33 5F101 BA54 BD02 BH03 BH16

Claims (10)

[Claims] A step of forming a first SiO ₂ film on a Si substrate by a thermal oxidation method; a step of forming an amorphous Si film on the SiO ₂ film; Contacting with a Si-containing atmosphere in a state where the plurality of polycrystalline Si particles are grown on the amorphous Si film in a state where the plurality of polycrystalline Si particles are heated, and Si
Forming a O ₂ film. A method for manufacturing a stacked gate oxide film structure, comprising: 2. The method according to claim 1, further comprising the step of annealing the plurality of polycrystalline Si particles to increase the size of the polycrystalline Si particles. 3. The annealing of the plurality of polycrystalline Si particles is performed at a temperature equal to or higher than the heating temperature of the amorphous Si film when growing the plurality of polycrystalline Si particles on the amorphous Si film. 3. The method for manufacturing a stacked gate oxide film structure according to claim 2, wherein: 4. The method according to claim 1, wherein the amorphous Si film is heated to 500 to 700 ° C. and brought into contact with the Si-containing atmosphere to grow the plurality of polycrystalline Si particles. 3. The method for manufacturing a stacked gate oxide film structure according to any one of 3. 5. The method according to claim 4, wherein the annealing of the plurality of polycrystalline Si particles is performed at 550 to 750 ° C. 6. The stacked gate according to claim 2, wherein the crystal grains are increased to 3 to 30 nm by annealing the plurality of polycrystalline Si particles. Manufacturing method of oxide film structure. 7. The lamination according to claim 1, wherein a surface density of the plurality of polycrystalline Si particles is 1 × 10 ¹⁰ to 1 × 10 ¹² / cm ^2. Of manufacturing a gate oxide film structure. 8. The stacked gate according to claim 1, wherein the second SiO ₂ film is formed by thermally oxidizing the plurality of polycrystalline Si particles. Manufacturing method of oxide film structure. 9. A stacked gate oxide film structure manufactured by the method according to claim 1. Description: 10. A stacked MOS memory comprising the stacked gate oxide film structure according to claim 9.