JP2002151673A - Solid-state image pickup element - Google Patents

Solid-state image pickup element

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Publication number
JP2002151673A
JP2002151673A JP2000339264A JP2000339264A JP2002151673A JP 2002151673 A JP2002151673 A JP 2002151673A JP 2000339264 A JP2000339264 A JP 2000339264A JP 2000339264 A JP2000339264 A JP 2000339264A JP 2002151673 A JP2002151673 A JP 2002151673A
Authority
JP
Japan
Prior art keywords
transfer
solid
transfer electrode
region
state imaging
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000339264A
Other languages
Japanese (ja)
Inventor
Hiroaki Fujita
博明 藤田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2000339264A priority Critical patent/JP2002151673A/en
Publication of JP2002151673A publication Critical patent/JP2002151673A/en
Pending legal-status Critical Current

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  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PROBLEM TO BE SOLVED: To eliminate the difference between the horizontal resolution and vertical resolution of a back surface irradiation type solid-state image pickup element by improving the vertical resolution. SOLUTION: This back surface irradiation type solid-state image pickup element is provided with transfer electrodes 8 on the surface of a semiconductor substrate opposite to the light irradiating-side surface of the substrate. This image pickup element is constituted to collect signal charges 31 below the transfer electrodes 8 at each unit picture element by forming potential distributions 30 in the semiconductor substrate below the electrodes 8 by impressing required voltages upon the electrodes 8.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、固体撮像素子、特
に半導体基体の光照射側と反対側の面に転送電極が設け
られた裏面照射型の固体撮像素子に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device, and more particularly to a back-illuminated solid-state imaging device in which a transfer electrode is provided on a surface of a semiconductor substrate opposite to a light irradiation side.

【0002】[0002]

【従来の技術】従来、例えばCCD固体撮像素子とし
て、インターライン転送(IT)方式、フレームインタ
ーライン転送(FIT)方式、或いはフレーム転送(F
T)方式のCCD固体撮像素子が知られている。これら
のCCD固体撮像素子は、半導体基体の表面側に受光セ
ンサ、転送電極等を形成し、表面側より光照射するよう
に構成されている。しかし、インターライン転送方式、
フレームインターライン転送方式のCCD固体撮像素子
では、受光センサがマトリックス状に配列されているの
で、画素間の境界が明確であるが受光のための開口率が
低い。また、フレーム転送方式のCCD固体撮像素子で
は、受光センサと垂直転送レジスタが兼用されているの
で、開口率が高いも、しかし短波長側の光が転送電極に
吸収され感度が低下する。
2. Description of the Related Art Conventionally, for example, as a CCD solid-state imaging device, an interline transfer (IT) system, a frame interline transfer (FIT) system, or a frame transfer (F
T) type CCD solid-state imaging devices are known. These CCD solid-state imaging devices are configured such that a light receiving sensor, a transfer electrode, and the like are formed on a front surface side of a semiconductor substrate, and light is irradiated from the front surface side. However, the interline transfer method,
In the CCD solid-state imaging device of the frame interline transfer system, since the light receiving sensors are arranged in a matrix, the boundaries between pixels are clear but the aperture ratio for light reception is low. Further, in the CCD solid-state image pickup device of the frame transfer type, since the light receiving sensor and the vertical transfer register are also used, the aperture ratio is high, but light on the short wavelength side is absorbed by the transfer electrode, and the sensitivity is reduced.

【0003】一方、受光のための開口率を高くし、且つ
転送電極などの表面電極で光が吸収されないように、半
導体基体の一方の面に転送電極を含む撮像素子を形成
し、基体裏面側から画像光を入射させて撮像できるよう
にした、いわゆる裏面照射型のCCD固体撮像素子が知
られている。この裏面照射型のCCD固体撮像素子は、
通常、フレーム転送(FT)方式が採られている。
On the other hand, an image pickup element including a transfer electrode is formed on one surface of a semiconductor substrate so as to increase the aperture ratio for receiving light and prevent light from being absorbed by a surface electrode such as a transfer electrode. There is known a so-called back-illuminated CCD solid-state imaging device which is capable of capturing an image by making image light incident thereon. This back-illuminated CCD solid-state imaging device
Usually, a frame transfer (FT) method is adopted.

【0004】[0004]

【発明が解決しようとする課題】しかし乍ら、従来の裏
面照射型の固体撮像素子においては、水平方向の画素を
区画するように垂直方向に延長するチャネルストップ領
域が設けられているため、水平方向(横方向)の画素の
境が明確であるのに対して、垂直方向(縦方向)の画素
の境が明確でなく(つまり、垂直転送レジスタとして構
成されるので、垂直方向に画素分離領域の形成ができな
い)、これが為に垂直解像度と水平解像度が異なるとい
う問題があった。
However, in the conventional back-illuminated solid-state imaging device, a channel stop region extending in the vertical direction is provided so as to partition the pixels in the horizontal direction. Although the boundaries between pixels in the direction (horizontal direction) are clear, the boundaries between pixels in the vertical direction (vertical direction) are not clear (in other words, since the boundaries are formed as vertical transfer registers, the pixel separation regions in the vertical direction). Cannot be formed), which causes a problem that the vertical resolution and the horizontal resolution are different.

【0005】本発明は、上述の点に鑑み、高開口率、高
感度の特徴を損なうことなく、垂直解像度の向上を図っ
た、裏面照射型の固体撮像素子を提供するものである。
The present invention has been made in view of the above, and has as its object to provide a back-illuminated solid-state imaging device with improved vertical resolution without deteriorating features of high aperture ratio and high sensitivity.

【0006】[0006]

【課題を解決するための手段】本発明に係る固体撮像素
子は、半導体基体の光照射側と反対側の面に転送電極が
設けられた裏面照射型の固体撮像素子であって、受光時
に、単位画素毎の転送電極に所要電圧を印加して転送電
極下の半導体基体内にポテンシャル分布を形成し、転送
電極下に信号電荷を集めるように構成する。
A solid-state imaging device according to the present invention is a back-illuminated solid-state imaging device in which a transfer electrode is provided on a surface of a semiconductor substrate opposite to a light irradiation side. A required voltage is applied to the transfer electrode for each unit pixel to form a potential distribution in the semiconductor substrate under the transfer electrode, and signal charges are collected under the transfer electrode.

【0007】本発明の固体撮像素子では、受光時に、単
位画素毎の転送電極に所要電圧を印加して転送電極下の
半導体基体内にポテンシャル分布を形成する。この転送
電極下に形成されたポテンシャル分布の深いポテンシャ
ルウエルに信号電荷を集めるようにするので、各画素の
信号電荷が垂直方向に関して明確に分離されて各画素の
転送電極下に蓄積される。これにより、垂直方向の画素
の境が明確になる。
In the solid-state imaging device according to the present invention, when receiving light, a required voltage is applied to the transfer electrode of each unit pixel to form a potential distribution in the semiconductor substrate below the transfer electrode. Since signal charges are collected in a potential well having a deep potential distribution formed under the transfer electrode, the signal charges of each pixel are clearly separated in the vertical direction and accumulated under the transfer electrode of each pixel. This makes the boundaries between pixels in the vertical direction clear.

【0008】[0008]

【発明の実施の形態】以下、図面を参照して本発明の固
体撮像素子の実施の形態を説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the solid-state imaging device of the present invention will be described below with reference to the drawings.

【0009】図1〜図6は、本発明の一実施の形態を示
す。本例はフレーム転送(FT)方式の裏面照射型のC
CD固体撮像素子に適用した場合である。本実施の形態
に係るCCD固体撮像素子1は、図1に示すように、半
導体基体の一方の面、即ち表面側に、光電変換及び信号
電荷の蓄積を行う受光センサ機能と電荷転送の機能を兼
ねたCCD構造の垂直転送レジスタ2を形成してなる撮
像領域3と、撮像領域3の信号電荷を一旦蓄積する蓄積
領域4と、蓄積領域4に接続された水平転送レジスタ5
と、水平転送レジスタ5の終端に接続された出力回路6
を有して成る。
1 to 6 show an embodiment of the present invention. In this example, the frame transfer (FT) type back-illuminated C
This is a case where the present invention is applied to a CD solid-state imaging device. As shown in FIG. 1, the CCD solid-state imaging device 1 according to the present embodiment has a light receiving sensor function of performing photoelectric conversion and accumulation of signal charges and a charge transfer function on one surface of a semiconductor substrate, that is, the surface side. An imaging region 3 formed with a vertical transfer register 2 also having a CCD structure, a storage region 4 for temporarily storing signal charges in the imaging region 3, and a horizontal transfer register 5 connected to the storage region 4
And an output circuit 6 connected to the end of the horizontal transfer register 5
Having.

【0010】半導体基体の他方の面、即ち裏面側には、
図2に示すように、撮像領域3及び蓄積領域4にわたっ
て撮像領域3および蓄積領域4を水平方向に画素数に応
じて複数に分割するチャネルストップ領域7が形成され
る。この半導体基体の裏面側から画像光が入射されるよ
うになされる。
On the other surface of the semiconductor substrate, that is, on the back surface side,
As shown in FIG. 2, a channel stop region 7 that divides the imaging region 3 and the accumulation region 4 into a plurality of regions in the horizontal direction according to the number of pixels is formed over the imaging region 3 and the accumulation region 4. Image light is incident from the back side of the semiconductor substrate.

【0011】撮像領域3は、半導体基体の受光センサ兼
転送チャネルとなる領域上に絶縁膜を介して水平方向に
延びる帯状の垂直転送電極8が垂直方向に複数配列して
チャネルストップ領域7で区画されるように、複数の垂
直転送レジスタ2を形成して構成される。受光センサを
兼ねる垂直転送レジスタ2の両側には、余剰電荷を掃き
捨てる電荷掃き捨て手段9が形成される。
The imaging region 3 is divided by a channel stop region 7 in which a plurality of band-shaped vertical transfer electrodes 8 extending in the horizontal direction via an insulating film are arranged in a vertical direction on a region serving as a light receiving sensor and a transfer channel of the semiconductor substrate. And a plurality of vertical transfer registers 2 are formed. On both sides of the vertical transfer register 2 also serving as a light receiving sensor, charge sweeping means 9 for sweeping out excess charges is formed.

【0012】蓄積領域4は、撮像領域3と同様に、半導
体基体の転送チャネルとなる領域上に絶縁膜を介して水
平方向に延びる帯状の垂直転送電極11が垂直方向に複
数配列してチャネルストップ領域7で区画されるよう
に、複数の垂直転送レジスタ12を形成して構成され
る。水平転送レジスタ5は、転送チャネルとなる領域上
に絶縁膜を介して水平転送電極(図示せず)を複数配列
して構成される。蓄積領域4及び水平転送レジスタ5
は、遮光される。
As in the case of the imaging region 3, the storage region 4 has a plurality of band-shaped vertical transfer electrodes 11 extending in the horizontal direction via an insulating film on a region serving as a transfer channel of the semiconductor substrate. A plurality of vertical transfer registers 12 are formed so as to be divided by the area 7. The horizontal transfer register 5 is configured by arranging a plurality of horizontal transfer electrodes (not shown) on a region serving as a transfer channel via an insulating film. Storage area 4 and horizontal transfer register 5
Is shielded from light.

【0013】撮像領域3の垂直転送電極8には、所要の
転送クロックパルス、例えば4相、3相、2相駆動の転
送クロックパルス等、本例では3相駆動の転送クロック
パルスΦV1 〜ΦV3 が印加される。ΦV1 〜ΦV3
印加される電極3枚分で且つチャネルストップ領域7で
区画された領域が1画素(いわゆる単位画素)10とな
る。蓄積領域4の垂直転送電極11には、同じ3相駆動
の転送クロックパルスΦM 1 〜ΦM3 が印加される。水
平転送レジスタ5には、例えば2相駆動の転送クロック
パルスΦH1 及びΦH2 が印加される。
The vertical transfer electrodes 8 in the imaging area 3
Transfer clock pulse, for example, four-phase, three-phase, two-phase drive
In this example, a three-phase drive transfer clock such as a transmission clock pulse
Pulse ΦV1~ ΦVThreeIs applied. ΦV1~ ΦVThreeBut
For three electrodes to be applied and in the channel stop region 7
The divided area is one pixel (so-called unit pixel) 10.
You. The same three-phase drive is applied to the vertical transfer electrodes 11 of the storage region 4.
Transfer clock pulse ΦM 1~ ΦMThreeIs applied. water
The flat transfer register 5 has, for example, a two-phase drive transfer clock.
Pulse ΦH1And ΦHTwoIs applied.

【0014】図3は図1の撮像領域3におけるYーY線
上の断面構造、図4は図1の撮像領域3におけるXーX
線上の断面構造を夫々示す。本実施の形態では、第1導
電型の半導体基板、例えばn- 半導体基板21の一方の
面(表面側の面)に受光センサ兼転送チャネルとなる第
1導電型の領域、本例ではn型半導体領域22が形成さ
れ、このn型半導体領域22上に絶縁膜23を介して、
例えば多結晶シリコンよりなる2層構造の垂直転送電極
8が形成され、垂直転送レジスタ2が形成される。ま
た、n- 半導体基板22の他方の面(裏面側の面)には
第2導電型の領域、本例ではp- 半導体領域24が形成
される(図3参照)。
FIG. 3 is a cross-sectional structure taken along the line YY in the imaging region 3 of FIG. 1, and FIG.
The sectional structures on the line are shown respectively. In this embodiment, the first conductivity type semiconductor substrate, for example, a first conductivity type region serving as a light receiving sensor and a transfer channel on one surface (front surface side) of the n semiconductor substrate 21. A semiconductor region 22 is formed, and on the n-type semiconductor region 22 via an insulating film 23,
For example, a vertical transfer electrode 8 having a two-layer structure made of polycrystalline silicon is formed, and the vertical transfer register 2 is formed. A second conductivity type region, in this example, ap semiconductor region 24 is formed on the other surface (back surface side) of the n semiconductor substrate 22 (see FIG. 3).

【0015】裏面側のp- 半導体領域24には、例えば
p型の半導体領域からなるチャネルストップ領域7が形
成される。このチャネルストップ領域7により、水平方
向の画素数に応じた複数の垂直転送レジスタ2が形成さ
れる。表面側のn型半導体領域22には、チャネルスト
ップ領域7に対応する部分に電荷掃き捨て手段9が形成
される。電荷掃き捨て手段9は、p型のオーバーフロー
コントロールゲート〔OFCG}領域(いわゆるバリア
領域)26とn型のオーバーフロードレイン〔OFD〕
領域27とによって形成される(図4参照)。
A channel stop region 7 made of, for example, a p-type semiconductor region is formed in the p semiconductor region 24 on the back surface side. The channel stop region 7 forms a plurality of vertical transfer registers 2 corresponding to the number of pixels in the horizontal direction. In the n-type semiconductor region 22 on the front surface side, the charge sweeping means 9 is formed at a portion corresponding to the channel stop region 7. The charge sweeping means 9 includes a p-type overflow control gate [OFCG} region (so-called barrier region) 26 and an n-type overflow drain [OFD].
It is formed by the region 27 (see FIG. 4).

【0016】そして、本実施の形態においては、特に固
体撮像素子1の裏面側から画像光Lを入射する受光時、
転送電極8に所要の電圧(本例では信号電荷が電子であ
るので、プラス電圧)を印加して、基体25内、ここで
はチャネル領域22内に図5に示すようなポテンシャル
分布30を形成し、電圧を印加した転送電極8下に光電
変換により発生した信号電荷31を集めて蓄積するよう
に成す。このとき、垂直方向に隣接する単位画素10中
の一部の転送電極、本例では単位画素10を構成する3
つの転送電極8のうち、真ん中の転送電極のみに電圧を
印加してその直下のポテンシャルを深くし、両側の転送
電極直下のポテンシャルを浅くするポテンシャル分布を
形成し、その真ん中の転送電極8下の深いポテンシャル
ウエルに信号電荷31を集める(図5、図6参照)。
In the present embodiment, especially when the image light L is received from the back side of the solid-state imaging device 1,
A required voltage (positive voltage since the signal charge is an electron in this example) is applied to the transfer electrode 8 to form a potential distribution 30 as shown in FIG. The signal charges 31 generated by photoelectric conversion are collected and accumulated under the transfer electrode 8 to which the voltage is applied. At this time, a part of the transfer electrodes in the unit pixels 10 adjacent in the vertical direction, in this example, 3
Of the two transfer electrodes 8, a voltage is applied to only the middle transfer electrode to deepen the potential immediately below the transfer electrode 8 and to form a potential distribution that makes the potential just below the transfer electrodes on both sides shallow. The signal charges 31 are collected in a deep potential well (see FIGS. 5 and 6).

【0017】受光時に所要の電圧を印加する転送電極
は、単位画素を構成する複数の転送電極のうちの何れで
も良く、但し少なくとも一方の隣接画素に接する転送電
極には電圧を印加しないようにする。この電圧が印加さ
れない転送電極が画素分離に寄与する。
The transfer electrode to which a required voltage is applied at the time of light reception may be any of a plurality of transfer electrodes constituting a unit pixel, provided that no voltage is applied to a transfer electrode in contact with at least one adjacent pixel. . The transfer electrode to which this voltage is not applied contributes to pixel separation.

【0018】次に、本実施の形態の裏面照射型の固体撮
像素子1の動作を説明する。画像光Lは、p- 半導体領
域24が形成された裏面側から入射される。この受光
時、各単位画素を構成する複数の転送電極のうちの所要
の転送電極、例えば図5では真ん中の転送電極8に所要
の電圧を印加し、その電圧印加された転送電極下にのみ
深いポテンシャルを形成する。光電変換により発生した
各画素10に対応する信号電荷31は、夫々対応する電
圧印加の転送電極8下に集められ、蓄積される(図5、
図6参照)。
Next, the operation of the back-illuminated solid-state imaging device 1 according to the present embodiment will be described. The image light L is incident from the back surface side on which the p semiconductor region 24 is formed. At the time of this light reception, a required voltage is applied to a required transfer electrode of a plurality of transfer electrodes constituting each unit pixel, for example, a middle transfer electrode 8 in FIG. 5, and a deep voltage is applied only under the applied transfer electrode. Form a potential. Signal charges 31 corresponding to each pixel 10 generated by the photoelectric conversion are collected and accumulated under the corresponding voltage-applied transfer electrode 8 (FIG. 5, FIG.
See FIG. 6).

【0019】強い画像光を受けたときには、余剰電荷
(この例では電子)は電荷掃き捨て手段9へ、即ち、オ
ーバーフローコントロールゲート領域26を通してオー
バーフロードレイン領域27へ掃き捨てられる。
When an intense image light is received, surplus charges (electrons in this example) are discharged to the charge sweeping means 9, that is, to the overflow drain region 27 through the overflow control gate region 26.

【0020】所定の受光期間の後、撮像領域3の垂直転
送電極8に印加される3相の転送クロックパルスΦV1
〜ΦV3 、蓄積領域4の垂直転送電極11に印加される
3相の転送クロックパルスΦM1 〜ΦM3 によって、各
画素の信号電荷は、撮像領域3から蓄積領域4へ高速転
送(いわゆるフレームシフト)されて一旦蓄積される。
その後、蓄積領域4の信号電荷は、1ライン毎に水平転
送レジスタ5へ転送される。そして、信号電荷は、水平
転送レジスタ5内を転送し、電荷電圧変換されて出力回
路6を通して出力される。
After a predetermined light receiving period, a three-phase transfer clock pulse ΦV 1 applied to the vertical transfer electrode 8 in the imaging region 3
~FaiV 3, the transfer clock pulses ΦM 1 ~ΦM 3 of three phases applied to the vertical transfer electrode 11 of the storage region 4, signal charges of each pixel, high-speed transfer (so-called frameshift from the imaging region 3 to the storage area 4 ) And is stored once.
Thereafter, the signal charges in the accumulation region 4 are transferred to the horizontal transfer register 5 line by line. Then, the signal charge is transferred in the horizontal transfer register 5, is converted into a charge voltage, and is output through the output circuit 6.

【0021】上述の本実施の形態に係る固体撮像素子1
によれば、裏面照射型に構成されるので、受光開口率を
100%あるいは100%近くにすることができ、高感
度化を図ることができる。そして、受光時には単位画素
10中の一部の転送電極8にのみ電圧を印加して、その
転送電極8直下に形成されるポテンシャルウエルに信号
電荷を集めるようにするので、垂直方向に隣接する画素
との分離が可能になり、即ち垂直方向の画素の境が明確
になり、垂直解像度を向上することができる。水平方向
に隣接する画素は、チャネルストップ領域7により分離
されているので、水平方向の画素間の境が明確になる。
従って、高開口率による高感度化の特徴を生かしたま
ま、垂直解像度を向上し、水平解像度と垂直解像度の差
をなくすことができる。
The solid-state imaging device 1 according to the embodiment described above.
According to this method, the light-receiving aperture ratio can be set to 100% or nearly 100% because of the back-illuminated type, and high sensitivity can be achieved. When light is received, a voltage is applied only to a part of the transfer electrodes 8 in the unit pixel 10 to collect signal charges in a potential well formed immediately below the transfer electrodes 8. , That is, the boundaries between pixels in the vertical direction are clear, and the vertical resolution can be improved. Since the pixels adjacent in the horizontal direction are separated by the channel stop region 7, the boundary between the pixels in the horizontal direction becomes clear.
Therefore, the vertical resolution can be improved and the difference between the horizontal resolution and the vertical resolution can be eliminated while taking advantage of the feature of increasing the sensitivity by the high aperture ratio.

【0022】上例では、信号電荷に電子を用いた場合に
ついて説明したが、その他、ホールを信号電荷とする場
合にも本発明を適用することができる。このときには、
受光時に単位画素中の一部の転送電極にマイナス電圧を
印加する。半導体基体25の導電型は、図3、図4に記
載とは逆の導電型とする。半導体基体25の構成は、裏
面照射型の固体撮像素子を構成できるものであれば、種
々の構成を採り得る。
In the above example, the case where electrons are used for signal charges has been described. However, the present invention can be applied to a case where holes are used as signal charges. At this time,
At the time of light reception, a negative voltage is applied to some transfer electrodes in the unit pixel. The conductivity type of the semiconductor substrate 25 is a conductivity type opposite to that shown in FIGS. As the configuration of the semiconductor substrate 25, various configurations can be employed as long as a back-illuminated solid-state imaging device can be configured.

【0023】[0023]

【発明の効果】本発明に係る固体撮像素子によれば、裏
面照射型の特徴である高開口率による高感度化を維持し
たまま、垂直解像度を向上し、水平解像度と垂直解像度
との差をなくすことができる。従って、高画質の撮像を
可能にする。
According to the solid-state imaging device of the present invention, the vertical resolution is improved and the difference between the horizontal resolution and the vertical resolution is improved while maintaining high sensitivity due to the high aperture ratio, which is a feature of the backside illumination type. Can be eliminated. Therefore, high-quality imaging can be performed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の固体撮像素子の一実施の形態を示す表
面側から見た構成図である。
FIG. 1 is a configuration diagram showing one embodiment of a solid-state imaging device according to the present invention as viewed from the front side.

【図2】本発明の固体撮像素子の一実施の形態を示す裏
面側から見た構成図である。
FIG. 2 is a configuration diagram showing one embodiment of a solid-state imaging device according to the present invention as viewed from the back surface side.

【図3】図1の撮像領域におけるYーY線上の断面図で
ある。
FIG. 3 is a cross-sectional view taken along the line YY in the imaging region of FIG. 1;

【図4】図1の撮像領域におけるXーX線上の断面図で
ある。
FIG. 4 is a cross-sectional view taken along line XX in the imaging region of FIG. 1;

【図5】本発明の固体撮像素子の一実施の形態の動作説
明図である。
FIG. 5 is an operation explanatory diagram of one embodiment of the solid-state imaging device of the present invention.

【図6】本発明の固体撮像素子の一実施の形態の動作説
明に供する要部の平面図である。
FIG. 6 is a plan view of a main part used for describing an operation of the embodiment of the solid-state imaging device according to the present invention;

【符号の説明】[Explanation of symbols]

1・・・CCD固体撮像素子、2、12・・・垂直転送
レジスタ、3・・・撮像領域、4・・・蓄積領域、5・
・・水平転送レジスタ、6・・・出力回路、7・・・チ
ャネルストップ領域、8、11・・・垂直転送電極、9
・・・電荷掃き捨て手段、10・・・単位画素、21・
・・n- 半導体基板、22・・・n型半導体領域、23
・・・絶縁膜、24・・・p型チャネルストップ領域、
25・・・半導体基体、26・・・オーバーフローコン
トロールゲート領域、オーバーフロードレイン領域、3
0・・・ポテンシャル分布、31・・・信号電荷
DESCRIPTION OF SYMBOLS 1 ... CCD solid-state imaging device, 2, 12 ... Vertical transfer register, 3 ... Imaging area, 4 ... Storage area, 5 ...
..Horizontal transfer register, 6 ... output circuit, 7 ... channel stop region, 8, 11 ... vertical transfer electrode, 9
... Charge sweeping means, 10 ... Unit pixel, 21.
.. n - semiconductor substrate, 22... N-type semiconductor region, 23
... insulating film, 24 ... p-type channel stop region,
25: semiconductor substrate, 26: overflow control gate region, overflow drain region, 3
0: potential distribution, 31: signal charge

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 半導体基体の光照射側と反対側の面に転
送電極が設けられた裏面照射型の固体撮像素子であっ
て、 受光時に、単位画素毎の前記転送電極に所要電圧を印加
して転送電極下の半導体基体内にポテンシャル分布を形
成し、前記転送電極下に信号電荷を集めるようにして成
ることを特徴とする固体撮像素子。
1. A back-illuminated solid-state imaging device having a transfer electrode provided on a surface of a semiconductor substrate opposite to a light irradiation side, wherein a required voltage is applied to the transfer electrode for each unit pixel when receiving light. A solid-state imaging device, wherein a potential distribution is formed in the semiconductor substrate below the transfer electrode to collect signal charges under the transfer electrode.
【請求項2】 受光時に、単位画素を構成する複数の転
送電極のうち、所要の転送電極に他の転送電極とは異な
る電圧を印加し、 前記所要の転送電極下に信号電荷を集めるようにして成
ることを特徴とする請求項1に記載の固体撮像素子。
2. During light reception, a voltage different from that of another transfer electrode is applied to a required transfer electrode among a plurality of transfer electrodes constituting a unit pixel, and signal charges are collected under the required transfer electrode. The solid-state imaging device according to claim 1, wherein:
JP2000339264A 2000-11-07 2000-11-07 Solid-state image pickup element Pending JP2002151673A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000339264A JP2002151673A (en) 2000-11-07 2000-11-07 Solid-state image pickup element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000339264A JP2002151673A (en) 2000-11-07 2000-11-07 Solid-state image pickup element

Publications (1)

Publication Number Publication Date
JP2002151673A true JP2002151673A (en) 2002-05-24

Family

ID=18814360

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000339264A Pending JP2002151673A (en) 2000-11-07 2000-11-07 Solid-state image pickup element

Country Status (1)

Country Link
JP (1) JP2002151673A (en)

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JP2009008537A (en) * 2007-06-28 2009-01-15 Fujifilm Corp Range image device and imaging device
JP2009170539A (en) * 2008-01-11 2009-07-30 Fujifilm Corp Back-illuminated image sensor and method of driving the same
US7737520B2 (en) 2004-08-10 2010-06-15 Sony Corporation Solid-state imaging device and camera implementing the same
EP2246888A2 (en) 2004-06-30 2010-11-03 Sony Corporation Method of producing a solid-state imaging device
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US8450728B2 (en) 2009-12-28 2013-05-28 Sony Corporation Solid-state imaging device, method of manufacturing the same, and electronic apparatus

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2246888A2 (en) 2004-06-30 2010-11-03 Sony Corporation Method of producing a solid-state imaging device
US7737520B2 (en) 2004-08-10 2010-06-15 Sony Corporation Solid-state imaging device and camera implementing the same
US7998778B2 (en) 2004-08-10 2011-08-16 Sony Corporation Method of producing a solid-state imaging device
US8008108B2 (en) 2004-08-10 2011-08-30 Sony Corporation Solid-state imaging device, method of producing the same, and camera
US8349638B2 (en) 2004-08-10 2013-01-08 Sony Corporation Method of manufacturing back illuminated solid-state imaging device with improved transmittance of visible light
US8669634B2 (en) 2004-08-10 2014-03-11 Sony Corporation Solid-state imaging device with a hole storage layer
JP2009008537A (en) * 2007-06-28 2009-01-15 Fujifilm Corp Range image device and imaging device
JP2009170539A (en) * 2008-01-11 2009-07-30 Fujifilm Corp Back-illuminated image sensor and method of driving the same
JP4604093B2 (en) * 2008-01-11 2010-12-22 富士フイルム株式会社 Back-illuminated image sensor and driving method of back-illuminated image sensor
US8440954B2 (en) 2009-12-16 2013-05-14 Sony Corporation Solid-state image pickup device with a wiring becoming a light receiving surface, method of manufacturing the same, and electronic apparatus
US8450728B2 (en) 2009-12-28 2013-05-28 Sony Corporation Solid-state imaging device, method of manufacturing the same, and electronic apparatus

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