JP2002110716A - Manufacturing method of semiconductor device - Google Patents
Manufacturing method of semiconductor deviceInfo
- Publication number
- JP2002110716A JP2002110716A JP2000299890A JP2000299890A JP2002110716A JP 2002110716 A JP2002110716 A JP 2002110716A JP 2000299890 A JP2000299890 A JP 2000299890A JP 2000299890 A JP2000299890 A JP 2000299890A JP 2002110716 A JP2002110716 A JP 2002110716A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- ceramic mother
- mother substrate
- regions
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、樹脂封止された複
数の半導体素子を表面に搭載したセラミック母基板を分
割線により分割することで、個々の半導体装置に分割す
る、所謂多数個取りにより半導体装置を作製する半導体
装置の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a so-called multi-cavity method in which a ceramic mother board having a plurality of resin-sealed semiconductor elements mounted on its surface is divided by a dividing line into individual semiconductor devices. The present invention relates to a method for manufacturing a semiconductor device for manufacturing a semiconductor device.
【０００２】[0002]
【従来の技術】従来、樹脂封止された複数の半導体素子
を表面に搭載したセラミック母基板を分割することによ
り、半導体装置を多数個取りで作製する半導体装置の製
造方法は、図３に示すような製造工程で行われていた。
同図において、１はアルミナ（Ａｌ2Ｏ3）質焼結体等の
セラミックス材料から成るセラミック母基板、１ａはセ
ラミック母基板の裏面に形成された断面がＶ字状の分割
溝、２はＩＣ，ＬＳＩ等の各種の半導体素子、３は半導
体素子２を覆ってセラミック母基板の表面の全面に被覆
（モールド）されたポッティング用の樹脂層である。2. Description of the Related Art Conventionally, a method of manufacturing a semiconductor device in which a plurality of semiconductor devices are manufactured by dividing a ceramic mother substrate having a plurality of resin-sealed semiconductor elements mounted on its surface is shown in FIG. It was performed in such a manufacturing process.
In FIG. 1, reference numeral 1 denotes a ceramic mother substrate made of a ceramic material such as an alumina (Al 2 O 3 ) sintered body or the like; 1a, a V-shaped dividing groove formed on the back surface of the ceramic mother substrate; , LSI, etc., are potting resin layers that cover (mold) the entire surface of the ceramic mother substrate so as to cover the semiconductor element 2.
【０００３】また、同図の（ａ）はセラミック母基板１
の表面に複数設けられた半導体素子２の基板領域にそれ
ぞれ半導体素子２を搭載する工程を示す断面図であり、
（ｂ）は半導体素子２を覆ってセラミック母基板１の表
面の略全面に液状の樹脂層３を形成する工程を示す断面
図であり、（ｃ）はセラミック母基板１をその裏面に形
成された分割溝１ａによって分割する工程を示す断面図
である。FIG. 1A shows a ceramic mother substrate 1.
FIG. 9 is a cross-sectional view showing a step of mounting the semiconductor elements 2 on the substrate regions of the plurality of semiconductor elements 2 provided on the surface of FIG.
FIG. 2B is a cross-sectional view showing a step of forming a liquid resin layer 3 over substantially the entire surface of the ceramic mother substrate 1 so as to cover the semiconductor element 2, and FIG. FIG. 4 is a cross-sectional view showing a step of dividing the wafer by a divided groove 1a.
【０００４】このように、従来、多数個取りにより半導
体装置を作製する場合、セラミック母基板１の表面に複
数の半導体素子２を実装搭載し、半導体素子２を樹脂封
止し、セラミック母基板１の裏面の分割線１ａによって
分割することにより、作製していた。As described above, conventionally, when a semiconductor device is manufactured by multi-cavity fabrication, a plurality of semiconductor elements 2 are mounted and mounted on the surface of a ceramic mother substrate 1, and the semiconductor elements 2 are sealed with a resin. By the dividing line 1a on the back surface of the substrate.
【０００５】上記の製造方法に類似した従来例として、
パッケージ基板シートの裏面に切り込み溝を形成し、表
面に回路網および裏面に多数の導体パッドを形成し、パ
ッケージ基板シートの表面に切り込み溝によって区分さ
れた各領域に対応して半導体チップを搭載し、パッケー
ジ基板シートの表面全体に平坦化された液状樹脂の層を
形成し、その後切り込み溝によってパッケージ基板シー
トを切断することにより、平坦化された樹脂層を下にし
てパッケージ基板シートを裏返して安定して設定でき、
この裏面にハンダボールを容易かつ確実に形成できると
いう作用効果を有するものが提案されている（特開平１
０−１５０１１９号公報参照）。As a conventional example similar to the above manufacturing method,
A notch groove is formed on the back surface of the package substrate sheet, a circuit network is formed on the front surface, and a large number of conductor pads are formed on the back surface, and a semiconductor chip is mounted on the surface of the package substrate sheet corresponding to each area divided by the notch groove. By forming a flattened liquid resin layer on the entire surface of the package substrate sheet, and then cutting the package substrate sheet with the cut grooves, the package substrate sheet is turned upside down with the flattened resin layer facing down. You can set
One having the effect of being able to easily and reliably form a solder ball on the back surface has been proposed (Japanese Patent Laid-Open No. Hei 1 (1998)).
0-150119).
【０００６】[0006]
【発明が解決しようとする課題】しかしながら、上記従
来においては、図３（ｃ）に示すように、セラミック母
基板１を分割溝１ａによって分割する際に、硬化した樹
脂層３が切断されにくく、切断後の樹脂層３の切断面に
バリ３ａ、欠け等が発生して半導体装置の寸法精度が劣
化するという問題点を有していた。However, in the prior art, as shown in FIG. 3 (c), when the ceramic mother substrate 1 is divided by the dividing grooves 1a, the cured resin layer 3 is hard to be cut. There is a problem that burrs 3a, chips, and the like occur on the cut surface of the resin layer 3 after cutting, and the dimensional accuracy of the semiconductor device is deteriorated.
【０００７】従って、本発明は上記事情に鑑みて完成さ
れたものであり、その目的は、多数個取りにより樹脂封
止型の半導体装置を作製するに際して、個々の半導体装
置に分割した後に樹脂層にバリや欠け等が発生せず、半
導体装置の寸法精度が向上したものとすることにある。SUMMARY OF THE INVENTION Accordingly, the present invention has been completed in view of the above circumstances. It is an object of the present invention to provide a method of manufacturing a resin-encapsulated semiconductor device by taking a large number of pieces and dividing the resin layer into individual semiconductor devices. It is another object of the present invention to improve the dimensional accuracy of a semiconductor device without generating burrs or chips.
【０００８】[0008]
【課題を解決するための手段】本発明の半導体装置の製
造方法は、セラミック母基板の裏面に該セラミック母基
板を複数の領域に分割する分割溝を形成し、前記セラミ
ック母基板の表面に前記領域に対応する半導体素子搭載
用の基板領域を複数設けるとともに該各基板領域に半導
体素子を搭載し、該半導体素子を覆って前記セラミック
母基板の表面の略全面に液状の樹脂層を形成し、主面に
前記各基板領域に対応する成型用凹部が形成された型材
を前記成型用凹部が前記各基板領域に対向する状態で前
記セラミック母基板の表面に密着させ、前記樹脂層を硬
化させた後に前記型材を前記セラミック母基板より引き
離し、しかる後、前記セラミック母基板を前記分割溝に
沿って分割することにより前記基板領域毎に前記半導体
素子が樹脂封止されて成る半導体装置を得ることを特徴
とする。According to a method of manufacturing a semiconductor device of the present invention, a dividing groove for dividing the ceramic mother substrate into a plurality of regions is formed on the back surface of the ceramic mother substrate, and the dividing groove is formed on the surface of the ceramic mother substrate. Providing a plurality of substrate regions for mounting semiconductor elements corresponding to the regions, mounting the semiconductor elements on the respective substrate regions, forming a liquid resin layer over substantially the entire surface of the ceramic mother substrate covering the semiconductor elements, A molding material in which a molding recess corresponding to each substrate region was formed on the main surface was brought into close contact with the surface of the ceramic mother substrate in a state where the molding recess was opposed to each substrate region, and the resin layer was cured. Later, the mold material is separated from the ceramic mother substrate, and thereafter, the ceramic mother substrate is divided along the division grooves, whereby the semiconductor element is sealed with resin for each substrate region. Characterized in that to obtain a semiconductor device comprising Te.
【０００９】本発明は、上記の構成により、個々の半導
体装置に分割する際に樹脂層を切断することがなくな
り、その結果樹脂層にバリや欠け等が発生せず、半導体
装置の寸法精度が向上したものとなる。また、樹脂層の
切断工程がなくなるため、製造の作業性も良好となる。According to the present invention, the above structure prevents the resin layer from being cut when divided into individual semiconductor devices. As a result, the resin layer does not have burrs or chips, and the dimensional accuracy of the semiconductor device is reduced. It will be improved. Further, since the step of cutting the resin layer is eliminated, the workability of the production is improved.
【００１０】また、本発明の半導体装置の製造方法は、
セラミック母基板の裏面に該セラミック母基板を複数の
領域に分割する分割溝を形成し、前記セラミック母基板
の表面に前記領域に対応する半導体素子搭載用の基板領
域を複数設けるとともに該各基板領域に半導体素子を搭
載し、主面に前記各基板領域に対応する成型用凹部が形
成されかつ該成型用凹部に液状の樹脂が収容された型材
を前記セラミック母基板に前記成型用凹部が前記各基板
領域に対向する状態で密着させ、前記樹脂を硬化させた
後に前記型材を前記セラミック母基板より引き離し、し
かる後、前記セラミック母基板を前記分割溝に沿って分
割することにより前記基板領域毎に前記半導体素子が樹
脂封止されて成る半導体装置を得ることを特徴とする。Further, the method of manufacturing a semiconductor device according to the present invention comprises:
A dividing groove for dividing the ceramic mother substrate into a plurality of regions is formed on the back surface of the ceramic mother substrate, and a plurality of substrate regions for mounting semiconductor elements corresponding to the regions are provided on the surface of the ceramic mother substrate, and the respective substrate regions The molding element corresponding to each substrate region is formed on the main surface, and a molding material containing a liquid resin in the molding depression is formed on the ceramic mother substrate. The mold material is separated from the ceramic mother substrate after the resin is cured, and the ceramic material is separated from the ceramic mother substrate after the resin is cured. A semiconductor device in which the semiconductor element is sealed with a resin is obtained.
【００１１】上記の構成により、個々の半導体装置に分
割する際に樹脂層を切断することがなくなり、その結果
樹脂層にバリや欠け等が発生せず、半導体装置の寸法精
度が向上したものとなる。また、樹脂層の切断工程がな
くなるため、製造の作業性も良好となる。According to the above configuration, the resin layer is not cut when the semiconductor device is divided into individual semiconductor devices. As a result, burrs or chips are not generated in the resin layer, and the dimensional accuracy of the semiconductor device is improved. Become. Further, since the step of cutting the resin layer is eliminated, the workability of the production is improved.
【００１２】[0012]
【発明の実施の形態】本発明の半導体装置の製造方法に
ついて以下に詳細に説明する。図１および図２は本発明
の製造方法の各工程を示すものであり、これらの図にお
いて、１はアルミナ（Ａｌ2Ｏ3）質焼結体等のセラミッ
クス材料から成るセラミック母基板、１ａはセラミック
母基板の裏面に形成された断面がＶ字状の分割溝、２は
ＩＣ，ＬＳＩ等の各種の半導体素子、３は半導体素子２
を覆ってセラミック母基板の表面の略全面に被覆（モー
ルド）されたポッティング用の樹脂層、４は主面に各基
板領域に対応する成型用凹部が複数形成された型材であ
る。DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing a semiconductor device according to the present invention will be described in detail below. 1 and 2 show each step of the manufacturing method of the present invention. In these figures, 1 is a ceramic mother substrate made of a ceramic material such as an alumina (Al 2 O 3 ) sintered body, and 1a is Divided grooves having a V-shaped cross section formed on the back surface of the ceramic mother substrate, 2 denotes various semiconductor elements such as ICs and LSIs, and 3 denotes semiconductor elements 2.
The resin layer 4 for potting, which covers (molds) substantially the entire surface of the ceramic mother substrate covering the surface of the ceramic mother substrate, is a mold member having a plurality of concave portions for molding corresponding to each substrate region formed on the main surface.
【００１３】また、図１の（ａ）はセラミック母基板１
の表面に複数設けられた半導体素子２搭載用の基板領域
にそれぞれ半導体素子２を搭載する工程を示す断面図で
あり、（ｂ）は半導体素子２を覆ってセラミック母基板
１の表面の略全面に液状の樹脂層３を形成する工程を示
す断面図であり、（ｃ）は主面に各基板領域に対応する
成型用凹部が複数形成された型材４を成型用凹部が基板
領域に対向する状態でセラミック母基板１の表面に密着
させる工程を示す断面図であり、（ｄ）は樹脂層３を硬
化させた後型材４をセラミック母基板１より引き離す工
程を示す断面図であり、（ｅ）はセラミック母基板１を
その裏面に形成された分割溝１ａに沿って分割する工程
を示す断面図である。FIG. 1A shows a ceramic mother substrate 1.
FIG. 4B is a cross-sectional view showing a step of mounting the semiconductor elements 2 on a plurality of substrate areas for mounting the semiconductor elements 2 provided on the surface of the semiconductor substrate 2, and FIG. FIG. 4C is a cross-sectional view showing a step of forming a liquid resin layer 3 in FIG. 3C. FIG. 4C is a sectional view showing a molding material 4 in which a plurality of molding recesses corresponding to the respective substrate regions are formed on the main surface. FIG. 4D is a cross-sectional view illustrating a step of bringing the mold material 4 into close contact with the surface of the ceramic mother substrate 1 in a state, and FIG. 4D is a cross-sectional view illustrating a step of separating the mold material 4 from the ceramic mother substrate 1 after the resin layer 3 is cured. 7) is a cross-sectional view showing a step of dividing the ceramic mother substrate 1 along the dividing grooves 1a formed on the back surface thereof.
【００１４】さらに、図２の（ａ）はセラミック母基板
１の表面に複数設けられた半導体素子２の基板領域にそ
れぞれ半導体素子２を搭載する工程を示す断面図であ
り、（ｂ）は主面に各基板領域に対応する成型用凹部が
複数形成されかつ成型用凹部に液状の樹脂１３が収容さ
れた型材４を設置し、型材４の上方よりセラミック母基
板１を成型用凹部と基板領域とが対向する状態で密着さ
せる工程を示す断面図であり、（ｃ）はセラミック母基
板１と型材４とを密着させた状態を示す断面図であり、
（ｄ）は樹脂１３を硬化させた後型材４をセラミック母
基板１より引き離す工程を示す断面図であり、（ｅ）は
セラミック母基板１をその裏面に形成された分割溝１ａ
によって分割する工程を示す断面図である。FIG. 2A is a cross-sectional view showing a step of mounting the semiconductor elements 2 on substrate regions of a plurality of semiconductor elements 2 provided on the surface of the ceramic mother substrate 1, and FIG. A plurality of molding recesses corresponding to the respective substrate regions are formed on the surface, and a mold material 4 containing a liquid resin 13 is placed in the molding recesses, and the ceramic mother substrate 1 is placed from above the mold material 4 with the molding recesses and the substrate region. FIG. 4C is a cross-sectional view illustrating a step of bringing the ceramic mother substrate 1 and the mold member 4 into close contact with each other, and FIG.
(D) is a sectional view showing a step of separating the mold material 4 from the ceramic mother substrate 1 after the resin 13 is cured, and (e) is a division groove 1a formed on the back surface of the ceramic mother substrate 1.
It is sectional drawing which shows the process of dividing | segmenting by.
【００１５】本発明において、セラミック母基板１は、
アルミナ（Ａｌ2Ｏ3）質焼結体，ムライト（３Ａｌ2Ｏ3
・２ＳｉＯ2）質焼結体等のセラミックス材料、ガラス
セラミックス材料等から成る。In the present invention, the ceramic mother substrate 1
Alumina (Al 2 O 3 ) sintered body, mullite (3Al 2 O 3)
(2SiO 2 ) A ceramic material such as a sintered body, a glass ceramic material, or the like.
【００１６】セラミック母基板１の裏面に形成される分
割溝１ａは、略四角形の複数の基板領域が縦横に配列形
成されるように形成することができるが、略四角形以外
に、菱形、台形、円形、楕円形、長円形等の種々の形状
の基板領域を形成し得る。また、分割溝１ａの断面形状
はＶ字状とするのがよく、分割作業を容易かつ正確に行
うことができる。Ｖ字状以外にＵ字状、凹型状等とする
こともできる。また、分割溝１ａをセラミック母基板１
の表面にも形成してよい。The dividing grooves 1a formed on the back surface of the ceramic mother substrate 1 can be formed so that a plurality of substantially square substrate regions are arranged vertically and horizontally. Substrate regions of various shapes, such as circular, oval, oval, etc., can be formed. The sectional shape of the dividing groove 1a is preferably V-shaped, so that the dividing operation can be performed easily and accurately. In addition to the V shape, the shape may be a U shape, a concave shape, or the like. Also, the dividing groove 1a is
May also be formed on the surface of the substrate.
【００１７】また、分割溝１ａの深さは、セラミック母
基板１の厚みの１／４からセラミック母基板１の厚みの
１／２の範囲がよく、セラミック母基板１の厚みの１／
４未満では分割作業を容易かつ正確に行うことができな
い。セラミック母基板１の厚みの１／２を超えると半導
体素子２をセラミック母基板１に搭載する際、セラミッ
ク母基板が割れてしまうことがあり、生産性が落ちると
いう点で不適である。The depth of the dividing groove 1a is preferably in the range of １ ／ of the thickness of the ceramic mother substrate 1 to １ ／ of the thickness of the ceramic mother substrate 1, and is preferably 1/1/2 of the thickness of the ceramic mother substrate 1.
If it is less than 4, the division work cannot be performed easily and accurately. If the thickness exceeds の of the thickness of the ceramic mother substrate 1, the ceramic mother substrate may be broken when the semiconductor element 2 is mounted on the ceramic mother substrate 1, which is not suitable in that the productivity is reduced.
【００１８】本発明の樹脂層３および樹脂１３として
は、フェノール系樹脂，シリコーン系樹脂，アクリル系
樹脂，ポリエーテルアミド系樹脂，尿素樹脂，メラミン
樹脂，ポリエステル樹脂，エポキシ系樹脂，ケイ素樹
脂，フタル酸ジアリル，ポリウレタン等の熱硬化性樹脂
が用いられる。特に、シリコーン系樹脂，アクリル系樹
脂，エポキシ系樹脂がよく、これらは取り扱いが容易
で、セラミック母基板１および半導体素子２との密着性
に優れている。As the resin layer 3 and the resin 13 of the present invention, phenolic resin, silicone resin, acrylic resin, polyetheramide resin, urea resin, melamine resin, polyester resin, epoxy resin, silicon resin, phthalic resin Thermosetting resins such as diallyl acid and polyurethane are used. In particular, silicone-based resin, acrylic-based resin, and epoxy-based resin are preferable, which are easy to handle and have excellent adhesion to the ceramic mother substrate 1 and the semiconductor element 2.
【００１９】また、型材４が透明なものであれば、アク
リル系樹脂，エポキシ系樹脂，シリコーン系樹脂，ポリ
エーテルアミド系樹脂等の紫外線硬化性樹脂を用いるこ
ともできる。If the mold member 4 is transparent, an ultraviolet curable resin such as an acrylic resin, an epoxy resin, a silicone resin, and a polyetheramide resin can be used.
【００２０】本発明の型材４は、シリコーン系樹脂、テ
フロン系樹脂等の樹脂材料、またはステンレススチール
等の金属材料から成る。また、この型材４は、セラミッ
ク母基板１と密着した際に各基板領域を完全に隔離する
ように成型用凹部を設けてもよいが、各基板領域が連通
するようにしてもよい。その場合、型材４とセラミック
母基板１とが密着した際に、成型用凹部間の側壁がセラ
ミック母基板１の表面に達しないように構成すればよ
い。または、成型用凹部間の側壁に貫通孔や切り欠きを
設けることができる。この場合、成型用凹部間を液状の
樹脂層３、樹脂１３が容易に移動して、各基板領域と成
型用凹部とで形成される空間の全てに速やかに充填され
るものとなる。The mold 4 of the present invention is made of a resin material such as a silicone resin or a Teflon resin, or a metal material such as stainless steel. The mold member 4 may be provided with a molding recess so as to completely isolate each substrate region when the mold member 4 is in close contact with the ceramic mother substrate 1, or each substrate region may be connected. In this case, when the mold member 4 and the ceramic mother substrate 1 are in close contact with each other, the side wall between the molding recesses may be configured not to reach the surface of the ceramic mother substrate 1. Alternatively, a through hole or a notch can be provided in the side wall between the molding concave portions. In this case, the liquid resin layer 3 and the resin 13 easily move between the concave portions for molding, and quickly fill the entire space formed by each substrate region and the concave portion for molding.
【００２１】また、基板領域には配線導体、電極パッド
等が形成されていてもよく、また基板領域の表裏面を貫
通する貫通導体が形成されていてもよい。Further, a wiring conductor, an electrode pad and the like may be formed in the substrate region, and a through conductor penetrating the front and back surfaces of the substrate region may be formed.
【００２２】かくして、本発明は、個々の半導体装置に
分割する際に樹脂層を切断することがなくなり、その結
果樹脂層にバリや欠け等が発生せず、半導体装置の寸法
精度が向上したものとなる。また、樹脂層の切断工程が
なくなるため、製造の作業性も向上するという作用効果
を有する。Thus, according to the present invention, the resin layer is not cut when divided into individual semiconductor devices, and as a result, burrs and chips are not generated in the resin layer, and the dimensional accuracy of the semiconductor device is improved. Becomes In addition, since the step of cutting the resin layer is eliminated, there is an operational effect that the workability of manufacturing is improved.
【００２３】なお、本発明は上記実施形態に限定される
ものではなく、本発明の要旨を逸脱しない範囲内におい
て種々の変更を行なうことは何等差し支えない。It should be noted that the present invention is not limited to the above-described embodiment, and various changes may be made without departing from the scope of the present invention.
【００２４】[0024]
【発明の効果】本発明は、セラミック母基板の裏面にセ
ラミック母基板を複数の領域に分割する分割溝を形成
し、セラミック母基板の表面に上記領域に対応する半導
体素子搭載用の基板領域を複数設けるとともに各基板領
域に半導体素子を搭載し、半導体素子を覆ってセラミッ
ク母基板の表面の略全面に液状の樹脂層を形成し、主面
に各基板領域に対応する成型用凹部が形成された型材を
成型用凹部が各基板領域に対向する状態でセラミック母
基板の表面に密着させ、樹脂層を硬化させた後に型材を
セラミック母基板より引き離し、しかる後、セラミック
母基板を分割溝に沿って分割することにより基板領域毎
に半導体素子が樹脂封止されて成る半導体装置を得るこ
とにより、個々の半導体装置に分割する際に樹脂層を切
断することがなくなり、その結果樹脂層にバリや欠け等
が発生せず、半導体装置の寸法精度が向上したものとな
る。また、樹脂層の切断工程がなくなるため、製造の作
業性も良好となる。According to the present invention, a dividing groove for dividing the ceramic mother substrate into a plurality of regions is formed on the back surface of the ceramic mother substrate, and a substrate region for mounting a semiconductor element corresponding to the above region is formed on the surface of the ceramic mother substrate. A plurality of semiconductor elements are mounted on each of the substrate areas, and a liquid resin layer is formed on substantially the entire surface of the ceramic mother substrate so as to cover the semiconductor elements, and a molding recess corresponding to each of the substrate areas is formed on the main surface. The mold material is brought into close contact with the surface of the ceramic mother substrate in a state in which the molding recess faces each substrate region, and after the resin layer is cured, the mold material is separated from the ceramic mother substrate. By dividing the semiconductor layer into individual semiconductor devices, the semiconductor element is sealed with resin for each substrate region, so that the resin layer is not cut when the semiconductor device is divided into individual semiconductor devices. As a result not generated burrs or chips and the like in the resin layer, the dimensional accuracy of the semiconductor device is that improved. Further, since the step of cutting the resin layer is eliminated, the workability of the production is improved.
【００２５】また、本発明は、セラミック母基板の裏面
にセラミック母基板を複数の領域に分割する分割溝を形
成し、セラミック母基板の表面に上記領域に対応する半
導体素子搭載用の基板領域を複数設けるとともに各基板
領域に半導体素子を搭載し、主面に各基板領域に対応す
る成型用凹部が形成されかつ成型用凹部に液状の樹脂が
収容された型材をセラミック母基板に成型用凹部が各基
板領域に対向する状態で密着させ、樹脂を硬化させた後
に型材をセラミック母基板より引き離し、しかる後、セ
ラミック母基板を分割溝に沿って分割することにより基
板領域毎に半導体素子が樹脂封止されて成る半導体装置
を得ることにより、個々の半導体装置に分割する際に樹
脂層を切断することがなくなり、その結果樹脂層にバリ
や欠け等が発生せず、半導体装置の寸法精度が向上した
ものとなる。また、樹脂層の切断工程がなくなるため、
製造の作業性も良好となる。Further, according to the present invention, a dividing groove for dividing the ceramic mother substrate into a plurality of regions is formed on the back surface of the ceramic mother substrate, and a substrate region for mounting a semiconductor element corresponding to the region is formed on the surface of the ceramic mother substrate. A plurality of semiconductor elements are mounted on each of the substrate regions, and a molding recess corresponding to each substrate region is formed on the main surface, and a molding material containing a liquid resin in the molding recess is provided with a molding recess on the ceramic mother substrate. After the resin is cured, the mold material is separated from the ceramic mother board, and then the ceramic mother board is divided along the dividing grooves. By obtaining a stopped semiconductor device, the resin layer is not cut when the semiconductor device is divided into individual semiconductor devices. As a result, burrs or chips are generated in the resin layer. , Becomes the dimensional accuracy of the semiconductor device is improved. Also, since there is no need to cut the resin layer,
Manufacturing workability is also improved.
【図１】本発明の製造方法の各工程を示し、（ａ）はセ
ラミック母基板の表面の基板領域に半導体素子を搭載す
る工程を示す断面図、（ｂ）は半導体素子を覆ってセラ
ミック母基板の表面の略全面に液状の樹脂層を形成する
工程を示す断面図、（ｃ）は主面に基板領域に対応する
成型用凹部が形成された型材をセラミック母基板に密着
させる工程を示す断面図、（ｄ）は樹脂層を硬化させた
後に型材をセラミック母基板より引き離す工程を示す断
面図、（ｅ）はセラミック母基板を分割溝に沿って分割
する工程を示す断面図である。FIGS. 1A and 1B show steps of a manufacturing method according to the present invention. FIG. 1A is a cross-sectional view showing a step of mounting a semiconductor element on a substrate region on the surface of a ceramic mother substrate, and FIG. FIG. 3C is a cross-sectional view illustrating a step of forming a liquid resin layer over substantially the entire surface of the substrate, and FIG. 3C illustrates a step of closely adhering a mold material having a molding recess corresponding to the substrate area to the ceramic mother substrate on the main surface. FIG. 4D is a cross-sectional view showing a step of separating the mold material from the ceramic mother substrate after the resin layer is cured, and FIG. 4E is a cross-sectional view showing a step of dividing the ceramic mother substrate along the dividing grooves.
【図２】本発明の製造方法の各工程を示し、（ａ）はセ
ラミック母基板の表面の基板領域に半導体素子を搭載す
る工程を示す断面図、（ｂ）は主面に基板領域に対応す
る成型用凹部が形成され成型用凹部に液状の樹脂が収容
された型材とセラミック母基板とを密着させる工程を示
す断面図、（ｃ）はセラミック母基板と型材とを密着さ
せた状態を示す断面図、（ｄ）は樹脂を硬化させ後に型
材をセラミック母基板より引き離す工程を示す断面図、
（ｅ）はセラミック母基板を分割溝に沿って分割する工
程を示す断面図である。FIGS. 2A and 2B show steps of a manufacturing method according to the present invention, wherein FIG. 2A is a cross-sectional view showing a step of mounting a semiconductor element on a substrate region on the surface of a ceramic mother substrate, and FIG. Sectional drawing which shows the process in which the molding concave part to be formed and the mold material which accommodated the liquid resin in the molding concave part and the ceramic mother substrate adhere | attached, (c) shows the state which made the ceramic mother board and the mold material adhere closely. Sectional view, (d) is a sectional view showing a step of separating the mold material from the ceramic mother substrate after curing the resin,
(E) is a sectional view showing a step of dividing the ceramic mother substrate along the dividing groove.
【図３】従来の製造方法の各工程を示し、（ａ）はセラ
ミック母基板の表面の基板領域に半導体素子を搭載する
工程を示す断面図、（ｂ）は半導体素子を覆ってセラミ
ック母基板の表面の略全面に液状の樹脂層を形成する工
程を示す断面図、（ｃ）はセラミック母基板を分割溝に
沿って分割する工程を示す断面図である。FIGS. 3A and 3B show steps of a conventional manufacturing method. FIG. 3A is a cross-sectional view showing a step of mounting a semiconductor element in a substrate region on the surface of a ceramic mother substrate. FIG. FIG. 4C is a cross-sectional view showing a step of forming a liquid resin layer on substantially the entire surface of the substrate, and FIG. 4C is a cross-sectional view showing a step of dividing the ceramic mother substrate along the dividing grooves.
１：セラミック母基板 １ａ：分割溝 ２：半導体素子 ３：樹脂層 ４：型材 １３：樹脂 1: Ceramic mother substrate 1a: Dividing groove 2: Semiconductor element 3: Resin layer 4: Mold material 13: Resin
Claims (2)
基板を複数の領域に分割する分割溝を形成し、前記セラ
ミック母基板の表面に前記領域に対応する半導体素子搭
載用の基板領域を複数設けるとともに該各基板領域に半
導体素子を搭載し、該半導体素子を覆って前記セラミッ
ク母基板の表面の略全面に液状の樹脂層を形成し、主面
に前記各基板領域に対応する成型用凹部が形成された型
材を前記成型用凹部が前記各基板領域に対向する状態で
前記セラミック母基板の表面に密着させ、前記樹脂層を
硬化させた後に前記型材を前記セラミック母基板より引
き離し、しかる後、前記セラミック母基板を前記分割溝
に沿って分割することにより前記基板領域毎に前記半導
体素子が樹脂封止されて成る半導体装置を得ることを特
徴とする半導体装置の製造方法。1. A dividing groove for dividing the ceramic mother substrate into a plurality of regions is formed on a back surface of the ceramic mother substrate, and a plurality of substrate regions for mounting semiconductor elements corresponding to the regions are provided on the surface of the ceramic mother substrate. A semiconductor element is mounted on each of the substrate regions, and a liquid resin layer is formed over substantially the entire surface of the ceramic mother substrate so as to cover the semiconductor element, and a molding recess corresponding to each of the substrate regions is formed on the main surface. The formed mold is brought into close contact with the surface of the ceramic mother substrate in a state where the molding recess faces each of the substrate regions, and after the resin layer is cured, the mold is separated from the ceramic mother substrate, and then, A semiconductor device in which the semiconductor element is resin-sealed for each of the substrate regions by dividing the ceramic mother substrate along the division grooves. The method of production.
基板を複数の領域に分割する分割溝を形成し、前記セラ
ミック母基板の表面に前記領域に対応する半導体素子搭
載用の基板領域を複数設けるとともに該各基板領域に半
導体素子を搭載し、主面に前記各基板領域に対応する成
型用凹部が形成されかつ該成型用凹部に液状の樹脂が収
容された型材を前記セラミック母基板に前記成型用凹部
が前記各基板領域に対向する状態で密着させ、前記樹脂
を硬化させた後に前記型材を前記セラミック母基板より
引き離し、しかる後、前記セラミック母基板を前記分割
溝に沿って分割することにより前記基板領域毎に前記半
導体素子が樹脂封止されて成る半導体装置を得ることを
特徴とする半導体装置の製造方法。2. A dividing groove for dividing the ceramic mother substrate into a plurality of regions is formed on a back surface of the ceramic mother substrate, and a plurality of substrate regions for mounting semiconductor elements corresponding to the regions are provided on the surface of the ceramic mother substrate. A semiconductor element is mounted on each of the substrate regions, and a molding material in which a molding recess corresponding to each of the substrate regions is formed on the main surface and a liquid resin is contained in the molding recess is formed on the ceramic mother substrate by molding. The concave portion is brought into close contact with the respective substrate regions, and after the resin is cured, the mold material is separated from the ceramic mother substrate, and thereafter, the ceramic mother substrate is divided along the division grooves. A method of manufacturing a semiconductor device, comprising: obtaining a semiconductor device in which the semiconductor element is resin-sealed for each of the substrate regions.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000299890A JP2002110716A (en) | 2000-09-29 | 2000-09-29 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000299890A JP2002110716A (en) | 2000-09-29 | 2000-09-29 | Manufacturing method of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2002110716A true JP2002110716A (en) | 2002-04-12 |
Family
ID=18781639
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000299890A Pending JP2002110716A (en) | 2000-09-29 | 2000-09-29 | Manufacturing method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2002110716A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SG117493A1 (en) * | 2004-05-12 | 2005-12-29 | Lingsen Precision Ind Ltd | Integrated circuit chip packaging process |
| JP2006013318A (en) * | 2004-06-29 | 2006-01-12 | Hitachi Metals Ltd | Laminated board and high-frequency electronic part, and method for manufacturing the same |
| JP2007266544A (en) * | 2006-03-30 | 2007-10-11 | Koa Corp | Composite electronic component manufacturing method, and composite electronic component |
| CN100420003C (en) * | 2005-03-29 | 2008-09-17 | 鸿富锦精密工业（深圳）有限公司 | Ceramic substrate and its disjunction method |
| US7446262B2 (en) | 2004-01-27 | 2008-11-04 | Murata Manufacturing Co., Ltd. | Laminated electronic component and method for producing the same |
| JP2012066479A (en) * | 2010-09-24 | 2012-04-05 | Mitsuboshi Diamond Industrial Co Ltd | Method of splitting brittle material substrate with resin |
| JP2012066480A (en) * | 2010-09-24 | 2012-04-05 | Mitsuboshi Diamond Industrial Co Ltd | Method of splitting brittle material substrate with resin |
| CN104051332A (en) * | 2013-03-12 | 2014-09-17 | 台湾积体电路制造股份有限公司 | Packaging devices and methods of manufacture thereof |
-
2000
- 2000-09-29 JP JP2000299890A patent/JP2002110716A/en active Pending
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7446262B2 (en) | 2004-01-27 | 2008-11-04 | Murata Manufacturing Co., Ltd. | Laminated electronic component and method for producing the same |
| SG117493A1 (en) * | 2004-05-12 | 2005-12-29 | Lingsen Precision Ind Ltd | Integrated circuit chip packaging process |
| JP2006013318A (en) * | 2004-06-29 | 2006-01-12 | Hitachi Metals Ltd | Laminated board and high-frequency electronic part, and method for manufacturing the same |
| JP4505803B2 (en) * | 2004-06-29 | 2010-07-21 | 日立金属株式会社 | Manufacturing method of high-frequency electronic components |
| CN100420003C (en) * | 2005-03-29 | 2008-09-17 | 鸿富锦精密工业（深圳）有限公司 | Ceramic substrate and its disjunction method |
| JP2007266544A (en) * | 2006-03-30 | 2007-10-11 | Koa Corp | Composite electronic component manufacturing method, and composite electronic component |
| JP2012066479A (en) * | 2010-09-24 | 2012-04-05 | Mitsuboshi Diamond Industrial Co Ltd | Method of splitting brittle material substrate with resin |
| JP2012066480A (en) * | 2010-09-24 | 2012-04-05 | Mitsuboshi Diamond Industrial Co Ltd | Method of splitting brittle material substrate with resin |
| CN102416674A (en) * | 2010-09-24 | 2012-04-18 | 三星钻石工业股份有限公司 | Cutting method of resin brittle material substrate |
| KR101291001B1 (en) | 2010-09-24 | 2013-07-30 | 미쓰보시 다이야몬도 고교 가부시키가이샤 | Dividing method of resin-attached brittle material substrate |
| KR101290966B1 (en) | 2010-09-24 | 2013-07-30 | 미쓰보시 다이야몬도 고교 가부시키가이샤 | Dividing method of resin-attached brittle material substrate |
| CN104051332A (en) * | 2013-03-12 | 2014-09-17 | 台湾积体电路制造股份有限公司 | Packaging devices and methods of manufacture thereof |
| CN104051332B (en) * | 2013-03-12 | 2017-04-12 | 台湾积体电路制造股份有限公司 | Packaging devices and methods of manufacture thereof |
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