JP2002075972A - Method for fabricating semiconductor device - Google Patents
Method for fabricating semiconductor deviceInfo
- Publication number
- JP2002075972A JP2002075972A JP2000267101A JP2000267101A JP2002075972A JP 2002075972 A JP2002075972 A JP 2002075972A JP 2000267101 A JP2000267101 A JP 2000267101A JP 2000267101 A JP2000267101 A JP 2000267101A JP 2002075972 A JP2002075972 A JP 2002075972A
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- Japan
- Prior art keywords
- etching
- metal oxide
- insulating film
- semiconductor device
- film
- Prior art date
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- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、高誘電率を備える
金属酸化物のエッチング方法、高誘電率ゲート絶縁膜を
用いた半導体装置およびその製造方法に関する。The present invention relates to a method for etching a metal oxide having a high dielectric constant, a semiconductor device using a high dielectric constant gate insulating film, and a method for manufacturing the same.
【0002】[0002]
【従来の技術】集積回路の低消費電力化を目的としてゲ
ート絶縁膜の薄膜化が進められている。SiO2ゲート
絶縁の薄膜化に伴い、ゲート電極とチャネル層との間の
直接トンネルによる漏れ電流の増加、およびゲート絶縁
膜の絶縁破壊信頼性の低下が問題となってきた。2. Description of the Related Art Thinning of gate insulating films has been promoted for the purpose of reducing power consumption of integrated circuits. As the thickness of the SiO 2 gate insulation has been reduced, the increase in leakage current due to the direct tunnel between the gate electrode and the channel layer and the decrease in the dielectric breakdown reliability of the gate insulation film have become problems.
【0003】この問題を解決するためにSiO2ゲート
絶縁膜に代わる材料として高誘電率材料の適用検討が進
んでいる。高誘電率材料をゲート絶縁膜に用いることに
より物理的に厚い膜を用いてもSiO2と同じ容量が得
られるため、漏れ電流を抑えることができる。[0003] In order to solve this problem, application studies of a high dielectric constant material as a substitute for the SiO 2 gate insulating film are being studied. By using a high dielectric constant material for the gate insulating film, the same capacitance as that of SiO 2 can be obtained even when a physically thick film is used, so that leakage current can be suppressed.
【0004】この高誘電率ゲート絶縁膜材料としては、
具体的にはチタン酸化物、ジルコニウム酸化物、ハフニ
ウム酸化物、タンタル酸化物、あるいはアルミナ酸化物
等の熱力学的に安定な酸化物の採用が提案されている。As the material of the high dielectric constant gate insulating film,
Specifically, adoption of a thermodynamically stable oxide such as titanium oxide, zirconium oxide, hafnium oxide, tantalum oxide, or alumina oxide has been proposed.
【0005】また、Siとこれらのゲート絶縁膜との界
面を電気的にスムーズにするために、この界面にSiO
2膜を形成することで2層構造とすることも提案されて
いる。In order to electrically smooth the interface between Si and these gate insulating films, SiO
It has also been proposed to form a two-layer structure by forming two films.
【0006】[0006]
【発明が解決しようとする課題】しかし、これらの高誘
電率材料は熱力学的に安定している。このため、高誘電
率材料となる金属酸化物に適したエッチング方法の選択
が課題となっている。However, these high dielectric constant materials are thermodynamically stable. For this reason, the selection of an etching method suitable for a metal oxide serving as a high dielectric constant material has been an issue.
【0007】このような安定な物質をエッチングする方
法の1つとして、加速したイオンの運動エネルギーとプ
ラズマ中に生成される活性種との相乗効果によりエッチ
ングを行う反応性イオンエッチング法がある。As one of the methods for etching such a stable substance, there is a reactive ion etching method in which etching is performed by a synergistic effect between the kinetic energy of accelerated ions and active species generated in plasma.
【0008】ところが、上記のイオンやプラズマ等を用
いたエッチング方法ではイオンの運動エネルギーを用い
るため、エッチングの進行により被エッチング膜が薄く
なった場合、下地あるいは基板にイオンが打ち込まれる
場合がある。このため、被エッチング膜の界面あるいは
それが形成されている下地や基板にダメージを与え、そ
の後の工程に影響を及ぼす問題があった。However, in the above-described etching method using ions or plasma, the kinetic energy of ions is used. Therefore, when the film to be etched becomes thin due to the progress of etching, ions may be implanted into a base or a substrate. For this reason, there is a problem in that the interface of the film to be etched or the base or substrate on which the film is formed is damaged, and the subsequent steps are affected.
【0009】この問題を回避するためにはダメージを与
えないエッチング方法を採用する必要がある。その代表
的な方法がウエットエッチング方法である。しかし、こ
の方法においては、上記高誘電率材料を効率的にエッチ
ングする薬液が未だに見つかっていない。また、ウエッ
トエッチングを行った後には乾燥工程が必須となり、ド
ライエッチング方法に比べ工程数が増えるという不利な
点がある。In order to avoid this problem, it is necessary to employ an etching method which does not cause damage. A typical method is a wet etching method. However, in this method, a chemical solution for efficiently etching the high dielectric constant material has not been found yet. Further, after the wet etching, a drying step is indispensable, and there is a disadvantage that the number of steps is increased as compared with the dry etching method.
【0010】本発明は上記の点を鑑みてなされたもの
で、その目的は、熱力学的に安定な高誘電率材料である
金属酸化物をドライプロセスによりエッチングする方
法、その方法を用いて基板にダメージを与えずに所定形
状に加工された高誘電率絶縁膜を備える半導体装置の製
造方法及びその半導体装置を提供することにある。The present invention has been made in view of the above points, and has as its object to provide a method for etching a metal oxide which is a thermodynamically stable high dielectric constant material by a dry process, and a method for etching a substrate using the method. It is an object of the present invention to provide a method of manufacturing a semiconductor device having a high dielectric constant insulating film processed into a predetermined shape without damaging the semiconductor device, and a semiconductor device thereof.
【0011】[0011]
【課題を解決するための手段】上記目的を達成するため
に本発明のエッチング方法では、例えばチタン酸化物、
ジルコニウム酸化物、ハフニウム酸化物、タンタル酸化
物、あるいはアルミナ酸化物などの高誘電率の金属酸化
物を塩素を含むガスに接触させることにより、エッチン
グ処理を行うことを特徴とする。According to the present invention, there is provided an etching method comprising the steps of:
The etching is performed by bringing a metal oxide having a high dielectric constant such as zirconium oxide, hafnium oxide, tantalum oxide, or alumina oxide into contact with a gas containing chlorine.
【0012】また、上記目的を達成するために本発明の
半導体装置の製造方法では、上記本発明のエッチング方
法を用いて高誘電率の金属酸化膜を加工し、所望の形状
の絶縁膜を形成することを特徴とする。In order to achieve the above object, in a method of manufacturing a semiconductor device according to the present invention, a metal oxide film having a high dielectric constant is processed using the etching method according to the present invention to form an insulating film having a desired shape. It is characterized by doing.
【0013】また、上記目的を達成するために本発明で
は、シリコン基板上に形成した高誘電率の金属酸化膜を
加工した絶縁膜を備える半導体装置において、前記絶縁
膜が、前記シリコン基板側に位置する第1の絶縁膜と、
該第1の絶縁膜に重ねて形成された前記高誘電率の金属
酸化膜からなる第2の絶縁膜とから構成され、前記シリ
コン基板表面のうち前記絶縁膜に隣接する領域では、該
絶縁膜のエッチング処理に用いた元素が該シリコン基板
表面を衝撃することで生じ得る欠陥が無いあるいは非常
に少ないことを特徴とする。According to another aspect of the present invention, there is provided a semiconductor device having an insulating film formed by processing a high-dielectric-constant metal oxide film formed on a silicon substrate, wherein the insulating film is provided on the silicon substrate side. A first insulating film located;
A second insulating film made of the high-dielectric-constant metal oxide film formed on the first insulating film, wherein the insulating film is formed in a region of the silicon substrate surface adjacent to the insulating film. Is characterized in that the elements used in the etching process have no or very few defects that can be generated by impacting the silicon substrate surface.
【0014】[0014]
【発明の実施の形態】本発明では、熱力学的に安定な高
誘電率材料の金属酸化物を塩素原子を利用して加工する
ことで、該金属酸化物の下地や基板表面に大きなダメー
ジを与えることなく、半導体装置の絶縁膜を形成するも
のである。DETAILED DESCRIPTION OF THE INVENTION In the present invention, a metal oxide of a high dielectric constant material which is thermodynamically stable is processed using chlorine atoms, so that the metal oxide base and the substrate surface are greatly damaged. Without providing, an insulating film of a semiconductor device is formed.
【0015】(塩素原子の選択理由)金属酸化物をドラ
イプロセスでエッチング除去するためには次の二つの項
目を満足する必要がある。(Reasons for Selecting Chlorine Atoms) In order to remove metal oxides by etching in a dry process, the following two items must be satisfied.
【0016】金属酸化物とエッチングガスとの反応が
進むこと。The reaction between the metal oxide and the etching gas proceeds.
【0017】エッチング反応生成物の蒸気圧が高いこ
と。The vapor pressure of the etching reaction product is high.
【0018】まず、Ti、Zr、およびHfの化合物の
蒸気圧を調査した。その結果、ハロゲン化物の蒸気圧が
高いことが判明した。Ti、Zr、およびHfのハロゲ
ン化物の蒸気圧の温度依存性を図1、図2および図3に
示す。これらの図から蒸気圧の高いハロゲン化物は塩化
物および臭化物であることが分かる。なお、Tiのハロ
ゲン化物は室温においても0.1Torr以上の蒸気圧
を示している。ZrおよびHfのハロゲン化物は100
°Cにおいて約1mTorrの蒸気圧を示し、300°
Cで760Torr近い圧力を示している。しかし、T
i、ZrおよびHfのハロゲン化物の内、フッ化物の蒸
気圧は他のハロゲン化物に比べ著しく低いことから、F
系ガスを用いたドライエッチング方法ではエッチングで
きないことがわかる。First, the vapor pressures of the compounds of Ti, Zr and Hf were investigated. As a result, it was found that the vapor pressure of the halide was high. The temperature dependence of the vapor pressure of the halide of Ti, Zr, and Hf is shown in FIGS. From these figures, it can be seen that the halides having a high vapor pressure are chlorides and bromides. The Ti halide has a vapor pressure of 0.1 Torr or more even at room temperature. The halide of Zr and Hf is 100
Shows a vapor pressure of about 1 mTorr at
C shows a pressure close to 760 Torr. But T
Among the halides of i, Zr and Hf, the fluoride has a significantly lower vapor pressure than the other halides.
It can be seen that etching cannot be performed by the dry etching method using a system gas.
【0019】次に、TiO2あるいはZrO2と各ハロゲ
ン原子との反応の進み易さを比較した。反応の進み易さ
は各金属酸化物と塩素原子、および反応生成物のそれぞ
れについてギブスの自由エネルギーを計算し、反応後の
系のギブス自由エネルギーから反応前の系のギブス自由
エネルギーを差し引いた値(ΔG)を指標にすることが
できる。このΔGと反応平衡定数(K)は次式の関係に
ある。Next, the easiness of the reaction between TiO 2 or ZrO 2 and each halogen atom was compared. The ease of progress of the reaction is the value obtained by calculating the Gibbs free energy of each metal oxide, chlorine atom, and reaction product, and subtracting the Gibbs free energy of the system before the reaction from the Gibbs free energy of the system after the reaction. (ΔG) can be used as an index. This ΔG and the reaction equilibrium constant (K) have the following relationship.
【0020】K∝exp(−ΔG/RT) ただし、Rは気体定数、Tは反応時の系の温度である。
この式からΔGが0あるいは+の値であれば反応はほと
んど進まず、逆にΔGが−であれば値が大きいほど反応
が進む傾向にあることが分かる。各反応におけるΔGの
温度依存性を計算した結果を図4に示す。臭化物を生成
する反応のΔGは何れも0または正の値となり、反応が
進まないことが分かる。これに対し塩化物を生成する反
応は何れもΔGが負の値となり、反応が進むことが分か
る。したがって、塩素原子を用いることにより各金属酸
化物のエッチングが可能となる。K∝exp (-ΔG / RT) where R is a gas constant and T is the temperature of the system during the reaction.
From this equation, it can be seen that the reaction hardly proceeds when ΔG is a value of 0 or +, and conversely, when ΔG is −, the reaction tends to progress as the value increases. FIG. 4 shows the result of calculating the temperature dependence of ΔG in each reaction. ΔG of the reaction for producing bromide is 0 or a positive value, indicating that the reaction does not proceed. On the other hand, any reaction that produces chloride has a negative value of ΔG, indicating that the reaction proceeds. Therefore, the use of chlorine atoms makes it possible to etch each metal oxide.
【0021】(SiO2との選択性)一方、塩素原子と
SiO2からSiの塩化物が生成されるΔGも−の値で
あり、金属酸化物と同様にエッチング反応が進む可能性
がある。しかし、その反応速度は反応の律速段階で決ま
る。反応の律速段階が金属あるいはSiとOとの結合を
切る過程にある場合、反応速度は金属あるいはSiとO
との結合強度に依存することになる。結合強度を調べた
結果、Si−Oが806kJ/molであるのに対し、
Ti−Oが659kJ/mol、Zr−Oが634kJ
/molである。よって、SiO2に比べてTiO2ある
いはZrO2の方が、塩素原子による反応速度が大き
い。(Selectivity with SiO 2 ) On the other hand, ΔG at which a chloride of Si is formed from chlorine atoms and SiO 2 is also a negative value, and the etching reaction may proceed similarly to the metal oxide. However, the rate of the reaction is determined by the rate-limiting step of the reaction. When the rate-limiting step of the reaction is in the process of breaking the bond between the metal or Si and O, the reaction rate is
And the strength of the bond. As a result of examining the bonding strength, Si—O was 806 kJ / mol, whereas
Ti-O: 659 kJ / mol, Zr-O: 634 kJ
/ Mol. Therefore, TiO 2 or ZrO 2 has a higher reaction rate by chlorine atoms than SiO 2 .
【0022】(ダメージを与えない方法)塩素原子を得
るためには次の二つの方法がある。(Method of not giving damage) There are the following two methods for obtaining chlorine atoms.
【0023】(1)塩素を含むガスを熱により分解する
方法。(1) A method in which a gas containing chlorine is decomposed by heat.
【0024】(2)塩素を含むガスをプラズマにより分
解する方法。(2) A method in which a gas containing chlorine is decomposed by plasma.
【0025】上記(1)の熱エネルギーを用いて塩素原
子を得る方法では、イオンが発生しないため、被エッチ
ング処理物の下地へのダメージは発生しない。しかし、
上記(2)のプラズマを用いて塩素原子を得る方法で
は、プラズマと被エッチング処理物との間にイオンシー
スが形成される。このため、プラズマと被エッチング処
理物との間に電位差が生じ、その電位差によりイオンが
加速され、被エッチング処理物の下地にダメージを与え
る。In the method of (1) for obtaining chlorine atoms by using thermal energy, no ions are generated, so that damage to the base of the object to be etched does not occur. But,
In the method (2) for obtaining chlorine atoms using plasma, an ion sheath is formed between the plasma and the object to be etched. For this reason, a potential difference is generated between the plasma and the object to be etched, and the ion is accelerated by the potential difference, thereby damaging a base of the object to be etched.
【0026】したがって、下地にダメージを与えないた
めには、例えば、エッチング処理が行われるエッチング
処理室から離れた別の場所でプラズマを形成し、プラズ
マ化されていないニュートラルの塩素原子だけを当該エ
ッチング処理室に供給し、被エッチング処理物と反応さ
せるよう構成することが必要である。Therefore, in order not to damage the base, for example, a plasma is formed in another place away from the etching chamber where the etching process is performed, and only the neutral chlorine atoms which are not turned into plasma are etched. It is necessary to supply to a processing chamber and to make it react with an object to be etched.
【0027】すなわち本発明では、塩素原子供与性ガス
を含むガスに接触させることにより、エッチング処理さ
れた高誘電率材料からなる絶縁膜をシリコン基板上に備
える半導体装置を製造するものである。ここで高誘電率
材料としては、例えばチタン酸化物、ジルコニウム酸化
物、ハフニウム酸化物、タンタル酸化物、アルミナ酸化
物、あるいは、これらの混合物がある。また、塩素原子
供与性ガスとしては、塩素原子及びフッ化塩素から選ば
れる少なくとも一種類のガスを含むものが好ましい。That is, in the present invention, a semiconductor device having an insulating film made of an etched high dielectric constant material on a silicon substrate is manufactured by contacting with a gas containing a chlorine atom donating gas. Here, examples of the high dielectric constant material include titanium oxide, zirconium oxide, hafnium oxide, tantalum oxide, alumina oxide, and a mixture thereof. Further, as the chlorine atom donating gas, a gas containing at least one kind of gas selected from chlorine atoms and chlorine fluoride is preferable.
【0028】また、本発明では、エッチング処理におい
て基板に与えるダメージを低減あるいは無くすために、
上記塩素原子供与性ガスに含まれるプラズマまたはイオ
ンの量をできるだけ少なくする手段、被エッチング膜の
表面にイオンシースが形成されないようにする手段、及
び上記塩素原子供与性ガスに含まれるラジカル塩素原子
の量をできるだけ多くする手段のうち少なくとも1つの
手段を含むことが好ましい。Further, in the present invention, in order to reduce or eliminate damage to the substrate in the etching process,
Means for minimizing the amount of plasma or ions contained in the chlorine atom donating gas, means for preventing an ion sheath from being formed on the surface of the film to be etched, and radical chlorine contained in the chlorine atom donating gas It is preferable to include at least one of the means for increasing the amount of atoms as much as possible.
【0029】[0029]
【実施例】本実施例では、本発明のエッチング処理を用
いてゲート絶縁膜を形成した、MOS型FETの製造プ
ロセスを、図5〜図10を参照して説明する。EXAMPLE In this example, a manufacturing process of a MOS FET in which a gate insulating film is formed by using the etching process of the present invention will be described with reference to FIGS.
【0030】Si基板1の表面に素子分離のための溝2
を形成し、O3とTEOS(Si(OC2H5)4)を原料
ガスとした熱CVD法によりSiO2膜3を埋め込み、
CMPを用いて平坦化する(図5)。Groove 2 for element isolation on the surface of Si substrate 1
Is formed, and the SiO 2 film 3 is buried by a thermal CVD method using O 3 and TEOS (Si (OC 2 H 5 ) 4 ) as source gases,
Flatten using CMP (FIG. 5).
【0031】次に、Si基板1の表面に第1のゲート絶
縁膜である約2nmの厚さのSiO 2膜4を熱処理によ
り形成し、その上に第2のゲート絶縁膜である約20n
mの厚さのTiO2膜5をCVD法により成膜し、その
上にゲート電極形成のためのポリSi6をCVD法によ
り成膜する(図6)。Next, a first gate isolation is provided on the surface of the Si substrate 1.
About 2 nm thick SiO as an edge film TwoFilm 4 by heat treatment
And a second gate insulating film of about 20 n
m thick TiOTwoThe film 5 is formed by a CVD method.
Poly Si6 for forming a gate electrode is formed thereon by CVD.
(FIG. 6).
【0032】その上にレジストを塗布し、ゲート電極形
成部分6aのみレジストを残し、それ以外の領域のレジ
ストを露光および現像により除去し、このレジストをマ
スクとしてポリSiをF系のガスで異方性エッチングを
行う(図7)。ここで、F系ガスを用いたのは、上述し
た通り、TiO2膜5をエッチングせずにポリSi膜を
エッチング除去するためである。A resist is applied thereon, leaving the resist only in the gate electrode forming portion 6a, removing the resist in the other areas by exposure and development, and using this resist as a mask, poly-Si is anisotropically treated with an F-based gas. Etching is performed (FIG. 7). Here, the reason for using the F-based gas is to remove the poly-Si film by etching without etching the TiO 2 film 5 as described above.
【0033】レジスト除去後、全面にTEOSを原料ガ
スとする熱CVD法によりSiO2膜を成膜し、ゲート
電極部のみに残したレジストをマスクとして、それ以外
の領域のSiO2を異方性ドライエッチングによりエッ
チバック除去し、ゲート電極の上面および側面にSiO
2のスペーサ層7を形成する(図8)。[0033] After the resist is removed, a SiO 2 film is deposited by a thermal CVD method using TEOS as a source gas to the entire surface, the resist leaving only the gate electrode portion as a mask, anisotropic SiO 2 of the other region Etchback is removed by dry etching, and SiO
A second spacer layer 7 is formed (FIG. 8).
【0034】この後、このSiO2のスペーサ層7を保
護膜としてゲート電極をエッチングせずに、ソース・ド
レイン領域のTiO2層5を本発明の塩素原子を用いた
エッチング処理により除去する(図9)。Thereafter, the TiO 2 layer 5 in the source / drain region is removed by etching using chlorine atoms of the present invention without etching the gate electrode using the SiO 2 spacer layer 7 as a protective film (FIG. 9).
【0035】その後、ソース・ドレイン領域の薄いSi
O2膜4をウエットエッチングで除去し、ソース・ドレ
イン領域にのみ選択的にシリコンをエピタキシャル成長
させ、シリコンのエピタキシャル膜8が形成されたソー
ス・ドレイン領域へのインプラを行い、アニールにより
インプラしたドーパントを活性化してソース・ドレイン
9を形成し、ゲート電極6a上のSiO2のスペーサ層
7を除去することにより、FETを形成した(図1
0)。After that, the source / drain regions of thin Si
The O 2 film 4 is removed by wet etching, silicon is selectively epitaxially grown only in the source / drain regions, implantation is performed on the source / drain regions where the silicon epitaxial film 8 is formed, and dopant implanted by annealing is removed. Activation was performed to form the source / drain 9, and the SiO 2 spacer layer 7 on the gate electrode 6a was removed to form an FET (FIG. 1).
0).
【0036】次に、上記したTiO2膜5のエッチング
プロセスを詳細に述べる。Next, the etching process of the TiO 2 film 5 will be described in detail.
【0037】図11にエッチング装置の構成の一例を示
した。本例のエッチング装置において、エッチング処理
室21は当該エッチング処理室内の圧力を一定に保つた
めの排気ポンプ22、圧力調整弁23、被エッチング処
理基板を加熱するサセプタ24、塩素原子を供給する塩
素原子供給器25、塩素原子をエッチング処理室21に
導く配管26、およびその塩素原子をサセプタ24上の
基板表面に均一に供給するためのシャワープレート27
から構成されている。FIG. 11 shows an example of the structure of an etching apparatus. In the etching apparatus of the present embodiment, the etching chamber 21 includes an exhaust pump 22 for keeping the pressure in the etching chamber constant, a pressure regulating valve 23, a susceptor 24 for heating the substrate to be etched, and a chlorine atom for supplying a chlorine atom. A supply unit 25, a pipe 26 for guiding chlorine atoms to the etching chamber 21, and a shower plate 27 for uniformly supplying the chlorine atoms to the substrate surface on the susceptor 24.
It is composed of
【0038】図12に塩素原子供給器25の構成の一例
を示した。本例の塩素原子供給器25は、塩素原子を発
生させるアルミナチューブ31、これに塩素ガスおよび
キャリアガスとして例えばアルゴンガスを供給する塩素
ガス供給器32およびアルゴンガス供給器33、2.4
5GHzのマイクロ波発生源34、およびマイクロ波を
発生源からアルミナチューブ31に導く導波管35から
構成されている。FIG. 12 shows an example of the structure of the chlorine atom supplier 25. The chlorine atom supply device 25 of this example includes an alumina tube 31 for generating chlorine atoms, a chlorine gas supply device 32 for supplying chlorine gas and, for example, argon gas as a carrier gas, and an argon gas supply device 33, 2.4.
It comprises a 5 GHz microwave generation source 34 and a waveguide 35 for guiding the microwave from the generation source to the alumina tube 31.
【0039】本例の塩素原子供給器25では、塩素ガス
およびアルゴンガスをアルミナチューブ31内に流した
状態で、マイクロ波発生源34から導波管35を通して
マイクロ波を照射し、アルミナチューブ31内でプラズ
マを発生させることにより塩素原子を発生させる。発生
した塩素原子はガスの流れと共に配管26を通してエッ
チング処理室21に供給される。In the chlorine atom supply device 25 of this embodiment, a microwave is irradiated from a microwave generation source 34 through a waveguide 35 in a state where chlorine gas and argon gas are flown into the alumina tube 31, and the inside of the alumina tube 31 is To generate chlorine atoms by generating plasma. The generated chlorine atoms are supplied to the etching chamber 21 through the pipe 26 together with the flow of the gas.
【0040】本例の塩素原子供給器25は、周知のリモ
ートラジカル生成方法を採用したものであり、アルミナ
チューブ31から所定距離だけ離れたエッチング処理室
21へ配管26を通してガスを導入することで、エッチ
ング処理室21に導入される多くの塩素原子が荷電状態
に無く、一部はラジカルの状態にあるようにしたもので
ある。The chlorine atom supplier 25 of this embodiment employs a well-known remote radical generation method. By introducing a gas through the pipe 26 into the etching chamber 21 at a predetermined distance from the alumina tube 31, Many chlorine atoms introduced into the etching chamber 21 are not in a charged state, and some are in a radical state.
【0041】なお、本実施例では塩素原子の生成方法と
してリモートラジカル生成方法を用いたが、本発明にお
いて塩素原子を生成する方法はこれに限定されるもので
はない。エッチング処理室21にイオン化されていない
状態の塩素原子を導く一方、プラズマ状態あるいはイオ
ン化された状態のガスがエッチング処理室21に侵入す
ることを防ぎ、あるいは、被エッチング処理基板表面に
イオンシースが形成されないようにすることができるも
のであれば、その他の方法により塩素原子を生成し、エ
ッチング処理室21へ導入する構成としても良い。In this embodiment, the method of generating a chlorine atom is a remote radical generation method, but the method of generating a chlorine atom in the present invention is not limited to this. While introducing non-ionized chlorine atoms into the etching chamber 21, it prevents plasma or ionized gas from entering the etching chamber 21, or forms an ion sheath on the surface of the substrate to be etched. As long as it can be prevented, chlorine atoms may be generated by another method and introduced into the etching chamber 21.
【0042】例えば、配管26の途中に電磁場をかけて
イオン化された原子分子を偏向あるいはトラップした
り、イオンを中性化するための電子を供給したりする構
成としても良い。For example, a configuration may be adopted in which an electromagnetic field is applied to the middle of the pipe 26 to deflect or trap ionized atomic molecules, or to supply electrons for neutralizing ions.
【0043】本実施例において塩素原子を用いたエッチ
ングは、例えば次の手順で行う。In this embodiment, etching using chlorine atoms is performed, for example, in the following procedure.
【0044】最初、エッチング処理室21を排気ポンプ
22により0.001Torr以下の圧力にする。被処
理基板を搬送室(図示せず)からエッチング処理室21
内のサセプタ24に搬送する。被処理基板温度を100
°Cに加熱する。First, the pressure in the etching processing chamber 21 is set to 0.001 Torr or less by the exhaust pump 22. The substrate to be processed is transferred from the transfer chamber (not shown) to the etching chamber 21.
To the susceptor 24 in the inside. Set the substrate temperature to 100
Heat to ° C.
【0045】次に、マイクロ波発生源34を動作させな
い状態で塩素原子供給器25から塩素ガスおよびキャリ
アガスを流し、圧力調整弁23によりエッチング処理室
21内の圧力を0.05Torrに調整する。その後、
マイクロ波発生源34を動作させ、一部ラジカルの状態
にある中性塩素原子を含むガスをエッチング処理室21
に供給し、サセプタ24上に配置されている被処理基板
表面に形成されているTiO2膜5をエッチング除去し
た。Next, a chlorine gas and a carrier gas are flowed from the chlorine atom supplier 25 while the microwave generation source 34 is not operated, and the pressure in the etching chamber 21 is adjusted to 0.05 Torr by the pressure adjusting valve 23. afterwards,
The microwave generation source 34 is operated, and a gas containing neutral chlorine atoms in a partially radical state is etched.
And the TiO 2 film 5 formed on the surface of the substrate to be processed disposed on the susceptor 24 was removed by etching.
【0046】なお、本実施例では被処理基板としてSi
基板を想定しているが、ガラス基板や石英基板を用いる
TFTの製造においても本発明を同様に適用することが
できる。In this embodiment, the substrate to be processed is Si
Although a substrate is assumed, the present invention can be similarly applied to the manufacture of a TFT using a glass substrate or a quartz substrate.
【0047】このようにして作成したFETのソースあ
るいはドレインの接合リーク電流を測定した結果を図1
3に示す。本実施例のエッチング処理方法によれば、T
iO2膜を従来のイオンアシストエッチング法でエッチン
グした場合に比べ、マイナスの電圧を加えた場合の接合
リーク電流を図13に示すような値まで抑えることがで
きた。これはシリコン基板とシリコンエピタキシャル層
との界面にエッチングダメージが発生しないため、欠陥
準位が形成されなかったものと考えられる。FIG. 1 shows the result of measuring the junction leakage current of the source or drain of the FET thus prepared.
3 is shown. According to the etching method of this embodiment, T
As compared with the case where the iO 2 film was etched by the conventional ion-assisted etching method, the junction leakage current when a negative voltage was applied could be suppressed to a value as shown in FIG. This is considered that no defect level was formed because no etching damage occurred at the interface between the silicon substrate and the silicon epitaxial layer.
【0048】以上説明したように、本実施例によれば、
塩素原子をエッチングガスに用いることによりTiO2
膜のエッチング除去が可能となった。As described above, according to the present embodiment,
By using chlorine atoms as etching gas, TiO 2
The film can be removed by etching.
【0049】また、本実施例によれば、エッチング反応
がイオン衝撃等のダメージを発生させないことからソー
ス・ドレインの接合リーク電流を抑えることができた。Further, according to the present embodiment, since the etching reaction does not cause damage such as ion bombardment, the junction leakage current at the source / drain can be suppressed.
【0050】また、本実施例ではチタン酸化物をゲート
絶縁膜に用いたMOS型FETの製造において、塩素原
子を用いてエッチングした場合を例に挙げて説明した
が、本発明が適用できる金属酸化物、半導体装置、絶縁
膜の種類は本実施例に限定されるものではなく、他の金
属酸化物、半導体装置、絶縁膜についても、本実施例と
同様にエッチング処理することができる。Further, in this embodiment, an example has been described in which a case of etching using chlorine atoms in the manufacture of a MOS type FET using titanium oxide for the gate insulating film has been described. The types of the object, the semiconductor device, and the insulating film are not limited to those in this embodiment, and other metal oxides, semiconductor devices, and insulating films can be etched in the same manner as in this embodiment.
【0051】[0051]
【発明の効果】以上詳述したように、本発明によれば、
塩素原子をエッチングガスとして用いることにより、高
誘電率材料である金属酸化物のエッチング除去が可能と
なり、該金属酸化物を絶縁膜として用いる半導体装置の
製造が可能となる。As described in detail above, according to the present invention,
By using chlorine atoms as an etching gas, a metal oxide which is a high dielectric constant material can be removed by etching, and a semiconductor device using the metal oxide as an insulating film can be manufactured.
【0052】また、本発明によれば、エッチング処理中
にイオン衝撃等のダメージが発生しないことからソース
・ドレインの接合リーク電流を抑えることができ、半導
体装置の信頼性、製造歩留りを向上させることができ
た。Further, according to the present invention, since damage such as ion bombardment does not occur during the etching process, the junction leakage current at the source / drain can be suppressed, and the reliability and the production yield of the semiconductor device can be improved. Was completed.
【図1】Tiのハロゲン化物の蒸気圧曲線を示すグラ
フ。FIG. 1 is a graph showing a vapor pressure curve of a halide of Ti.
【図2】Zrのハロゲン化物の蒸気圧曲線を示すグラ
フ。FIG. 2 is a graph showing a vapor pressure curve of a halide of Zr.
【図3】Hfのハロゲン化物の蒸気圧曲線を示すグラ
フ。FIG. 3 is a graph showing a vapor pressure curve of a halide of Hf.
【図4】各金属酸化物とハロゲン原子との反応のΔGの
温度依存性を示すグラフ。FIG. 4 is a graph showing the temperature dependence of ΔG in the reaction between each metal oxide and a halogen atom.
【図5】本発明の一実施形態であるFETの製造方法の
一工程を示す要部断面図。FIG. 5 is an essential part cross sectional view showing one step of a method of manufacturing an FET according to an embodiment of the present invention;
【図6】本発明の一実施形態であるFETの製造方法の
一工程を示す要部断面図。FIG. 6 is an essential part cross sectional view showing one step of a method of manufacturing an FET according to an embodiment of the present invention;
【図7】本発明の一実施形態であるFETの製造方法の
一工程を示す要部断面図。FIG. 7 is an essential part cross sectional view showing one step of a method of manufacturing an FET according to an embodiment of the present invention;
【図8】本発明の一実施形態であるFETの製造方法の
一工程を示す要部断面図。FIG. 8 is an essential part cross sectional view showing one step of a method of manufacturing an FET according to an embodiment of the present invention;
【図9】本発明の一実施形態であるFETの製造方法の
一工程を示す要部断面図。FIG. 9 is an essential part cross sectional view showing one step of a method of manufacturing an FET according to an embodiment of the present invention;
【図10】本発明の一実施形態であるFETの製造方法
の一工程を示す要部断面図。FIG. 10 is an essential part cross sectional view showing one step of a method of manufacturing an FET according to an embodiment of the present invention;
【図11】本発明の他の実施形態であるエッチング装置
の構成例を示すブロック図。FIG. 11 is a block diagram showing a configuration example of an etching apparatus according to another embodiment of the present invention.
【図12】本発明の他の実施形態である塩素原子供給器
の構成例を示すブロック図。FIG. 12 is a block diagram showing a configuration example of a chlorine atom supply device according to another embodiment of the present invention.
【図13】従来のイオンアシストエッチング方法と本発
明のエッチング方法とを用いて製造された半導体装置の
接合電流を比較したグラフ。FIG. 13 is a graph comparing the junction currents of semiconductor devices manufactured using the conventional ion assisted etching method and the etching method of the present invention.
1…Si基板 2…溝 3…SiO2膜 4…SiO2ゲート絶縁膜 5…TiO2ゲート絶縁膜 6…ゲート電極 7…SiO2スペーサ層 8…シリコンエピタキシャル膜 9…活性化領域 21…エッチング処理室 22…排気ポンプ 23…圧力調整弁 24…サセプタ 25…塩素原子供給器 26…配管 27…シャワープレート 31…アルミナチューブ 32…塩素ガス供給器 33…アルゴンガス供給器 34…マイクロ波発生源 35…導波管。1 ... Si substrate 2 ... grooves 3 ... SiO 2 film 4 ... SiO 2 gate insulating film 5 ... TiO 2 gate insulating film 6 ... gate electrode 7 ... SiO 2 spacer layer 8 ... silicon epitaxial film 9 ... activation region 21 ... etching Chamber 22 ... Exhaust pump 23 ... Pressure regulating valve 24 ... Susceptor 25 ... Chlorine atom supply 26 ... Piping 27 ... Shower plate 31 ... Alumina tube 32 ... Chlorine gas supply 33 ... Argon gas supply 34 ... Microwave generation source 35 ... Waveguide.
フロントページの続き Fターム(参考) 5F004 AA06 BA03 BB14 BB28 DA00 DA04 DA23 DB00 DB13 DB14 EB02 5F040 DA20 DC01 EC07 ED01 ED03 EF01 EK05 FA05 FC06 FC21 5F110 AA06 AA14 BB03 CC02 DD02 DD03 EE09 EE32 EE45 FF01 FF02 FF09 FF23 FF29 GG02 HJ13 HJ23 HK09 HK13 HK32 HK39 HM02 NN62 NN65 QQ04 QQ11 QQ19 Continued on the front page F-term (reference) HK09 HK13 HK32 HK39 HM02 NN62 NN65 QQ04 QQ11 QQ19
Claims (8)
加工した絶縁膜を備える半導体装置の製造方法であっ
て、 前記金属酸化膜に塩素を含むガスを接触させることで、
該金属酸化膜をエッチング処理することを特徴とする半
導体装置の製造方法。1. A method for manufacturing a semiconductor device comprising an insulating film formed by processing a metal oxide film having a high dielectric constant formed on a substrate, comprising: contacting a gas containing chlorine with the metal oxide film;
A method for manufacturing a semiconductor device, comprising etching the metal oxide film.
物、ジルコニウム酸化物、ハフニウム酸化物、アルミナ
酸化物およびタンタル酸化物うちのいずれか、あるい
は、これら複数の酸化物のうちに複数の混合物から構成
されたものであることを特徴とする半導体装置の製造方
法。2. The metal oxide film according to claim 1, wherein the metal oxide film is any one of titanium oxide, zirconium oxide, hafnium oxide, alumina oxide, and tantalum oxide, or a plurality of these oxides. A method for manufacturing a semiconductor device, characterized by comprising a mixture of:
に形成されるもので、該基板側に位置する第1の絶縁膜
と、該第1の絶縁膜に重ねて形成された前記金属酸化膜
からなる第2の絶縁膜とから構成されることを特徴とす
る半導体装置の製造方法。3. The insulating film according to claim 1, wherein the insulating film is formed on the substrate, and is formed so as to overlap the first insulating film located on the substrate side and the first insulating film. And a second insulating film made of the metal oxide film.
素原子の供与が可能なガスを含むことを特徴とする半導
体装置の製造方法。4. A method for manufacturing a semiconductor device according to claim 1, wherein said gas containing chlorine includes a gas capable of donating chlorine atoms.
オン化された原子及び分子を含まないことを特徴とする
半導体装置の製造方法。5. A method for manufacturing a semiconductor device according to claim 1, wherein said gas containing chlorine does not contain ionized atoms and molecules.
し、前記金属酸化膜の表面にイオンシースが形成されな
いことを特徴とする半導体装置の製造方法。6. A method of manufacturing a semiconductor device according to claim 1, wherein an ion sheath is not formed on a surface of said metal oxide film during said etching process.
法であって、 前記金属酸化物に塩素を含むガスを接触させることで、
該金属酸化物をエッチング処理することを特徴とするエ
ッチング方法。7. A method for etching a metal oxide having a high dielectric constant, comprising: bringing a gas containing chlorine into contact with the metal oxide;
An etching method comprising etching the metal oxide.
酸化膜を加工した絶縁膜を備える半導体装置であって、 前記絶縁膜は、前記シリコン基板側に位置する第1の絶
縁膜と、該第1の絶縁膜に重ねて形成された前記高誘電
率の金属酸化膜からなる第2の絶縁膜とから構成され、 前記シリコン基板表面のうち前記絶縁膜に隣接する領域
での膜中欠陥密度が、イオンアシストエッチング処理を
用いた場合よりも少ないことを特徴とする半導体装置。8. A semiconductor device comprising an insulating film formed by processing a metal oxide film having a high dielectric constant formed on a silicon substrate, wherein the insulating film includes a first insulating film located on the silicon substrate side; A second insulating film made of the high-dielectric-constant metal oxide film formed on the first insulating film; and a defect in the film in a region of the silicon substrate surface adjacent to the insulating film. A semiconductor device having a density lower than that obtained by using an ion-assisted etching process.
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