JP2002075909A - Ohmic electrode structure, its manufacturing method, and semiconductor device using ohmic electrode - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable a p-type SiC region in a fine contact window to have a low contact resistance ρc. SOLUTION: An ohmic electrode structure has an SiC substrate 1, p-type SiC area 2 formed on the surface of the substrate 1, thermally reacted layer 8 formed on the surface of the area 2, thermally oxidized film 3 covering the interface between the substrate 1 and area 2, upper insulating film 4 arranged on the surface of the oxidized film 3, and electrode film 7 arranged on the reacted layer 8. The electrode film 7 is connected with a blank wiring conductor chip 9. The reacted layer 8 is upwardly protruded from the surface of the SiC area 2. The oxidized film 3 has an opening through which the reacted layer 8 is passed and is arranged in contact with the surface of the substrate 1 so as to cover the interface between the substrate 1 and area 2. The upper insulating film 4 has a composition or density which is different from that of the thermally oxidized layer 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a silicon carbide (Si)
C) The present invention relates to a semiconductor device using a substrate.
The present invention relates to an ohmic electrode structure for a p-type SiC region used in an iC semiconductor device and a method for manufacturing the same.

[0002]

2. Description of the Related Art SiC is capable of forming a pn junction and has a wider band gap Eg than that of other currently widely used semiconductor materials such as silicon (Si) and gallium arsenide (GaAs). 2.23 eV in SiC, 2.2 in 6H-SiC.
A value of about 3.26 eV has been reported for 93 eV and 4H-SiC. In addition, SiC is thermally, chemically and mechanically stable and has excellent radiation resistance, so it can be used not only in light-emitting elements and high-frequency devices but also in severe conditions such as high temperature, large power, and radiation. It is expected to be applied in various industrial fields as a power semiconductor device (power device) exhibiting high reliability and stability.

In particular, a high breakdown voltage MOSFE using SiC
It is reported that T has lower on-resistance than a power device using Si. Further, it is reported that the forward drop voltage of the Schottky diode is reduced.
As is well known, there is a trade-off between the on-resistance and the switching speed of a power device. However, according to the power device using SiC, there is a possibility that low on-resistance and high switching speed can be simultaneously achieved.

In order to reduce the on-resistance of a power device using SiC, it is important to reduce the contact resistance ρc with respect to the ohmic contact. In particular, in order to reduce the on-resistance, a method is also adopted in which the main electrode region of the power device is subdivided and arranged on the SiC substrate at high density. In order to reduce the on-resistance of such a finely sized power device, it is extremely important to obtain a low contact resistance ρc inside a fine opening (contact window). In addition, the contact resistance ρc of the ohmic contact with respect to the p-type SiC region is a serious problem for increasing the switching speed of the power device.

[0005] In contrast to the fact that SiC blue light-emitting elements have already been put into practical use and mass-produced, the application of SiC as a power device or a high-frequency device has been greatly delayed. One of the reasons is that a technique for forming a practical low-resistance ohmic contact suitable for the structure and manufacturing process of these devices has not yet been established.
For a SiC blue light-emitting element in which current flows uniformly to an ohmic contact surface formed on almost the entire surface of a SiC chip, a main current flows through an ohmic contact in a fine contact window close to a conduction channel. In a flowing semiconductor electronic device (semiconductor device), it is extremely important to reduce the contact resistance ρc. That is, in a power device or a high-frequency device in which a main current flows intensively in a local region where an ohmic contact is formed, an extremely low contact resistance ρc is required for higher performance of device characteristics. Because.

[0008] A specific example will be described. A method described in Japanese Patent No. 2911122 as a conventional technique used as a method for forming a low-resistance ohmic contact on a p-type SiC epitaxial layer of a SiC blue light emitting device is described. (Hereinafter referred to as "first conventional technology") ". In the first prior art, a metal that reacts with oxygen more strongly than SiC, for example, a Ti thin film electrode is formed to a thickness of about 50 nm on a p-type SiC surface that has been surface-treated by wet etching, using a vacuum deposition method. Subsequently, after forming an Al—Ti-based electrode film thereon, the laminated substrate is subjected to a heat treatment at 800 to 1000 ° C., for example, 950 ° C. for about 5 minutes, and is hindered by a natural oxide film on the SiC surface. A uniform ohmic contact can be formed at any point on the substrate without any problem.

However, in the first prior art, the ohmic properties of the electrode layers are not perfect. For example, when the current-voltage characteristics between the electrode layers are strictly measured, it is pointed out in Japanese Patent Application Laid-Open No. 7-161658 that the line indicating the current-voltage characteristics is a curve and the ohmic properties are incomplete. Have been. Ohmic
Since the contact causes a large parasitic resistance when the current density is high, the contact is not suitable for use in a semiconductor electronic device such as a power device or a high-frequency device.

The prior art which has been extensively studied for use in semiconductor electronic devices is a method in which a metal film containing Al is heat-treated at a high temperature on the surface of a p-type SiC region to form an ohmic contact (hereinafter referred to as "second conventional technology"). Technology ”). Among them, Crofton et al. (Applied Physics Letters, Vol. 62, p. 384 (1998)) reported that a p-type SiC layer doped with a high impurity density was epitaxially grown on the surface of a 6H-SiC substrate. A method of depositing an Al—Ti alloy film thereon, and then performing a heat treatment, ρc = 1.5 × 1
It reports that an ohmic contact of 0 ^-5 Ωcm ² can be obtained. Use a lift-off method for patterning an Al—Ti alloy film. The method of Crofton et al. Is roughly as follows. That is,
(A) First, using a first photoresist formed by photolithography as a mask, an oxide film as a field insulating film is etched with a buffered hydrofluoric acid (BHF) solution.
An opening (contact window) is formed. After the etching of the field insulating film, the first photoresist is removed.

(B) After that, a second photoresist is applied to the front surface including the contact window. Then, the second photoresist is patterned by photolithography, and an opening is formed so as to expose the surface of the p-type SiC layer.

(C) Then, after cleaning the surface of the p-type SiC layer, the entire surface is made of Al-T having a thickness of 300 nm to 500 nm.
An i-alloy film is formed by a sputtering method. Then, the second
By dissolving the photoresist in acetone
Unnecessary Al-Ti alloy film is removed together with the second photoresist, and the Al-Ti alloy film is patterned.

(D) Then, heat treatment is performed for 5 minutes in an argon atmosphere at a heat treatment temperature of 1000 ° C.

[0012]

However, the structure and fabrication process of the above-mentioned first prior art ohmic contact require a p-type Si surface on a flat SiC substrate surface.
It has a very simplified configuration of forming a C ohmic contact. For this reason, there is a problem that it is lacking in specificity when applied to manufacture of an actual device in which other structures such as a field insulating film and a gate electrode are placed around. In the first place, the first prior art does not disclose any specific method of electrode patterning, so that application is difficult.

When the ohmic contact disclosed in the second prior art is applied to an actual semiconductor electronic device such as a transistor or a diode, ρc obtained by Crofton cannot be said to be sufficient. Low resistance is desired. In the first place, the lift-off method proposed by Crofton tends to leave a photoresist in an opening of a field insulating film when developed, which hinders a reduction in resistance. In addition, the residue of the photoresist causes a variation in the contact resistance ρc.

The present invention relates to the first and second prior art p-type S
An object of the present invention is to provide an ohmic electrode structure having a contact resistance ρc of 10 ⁻⁶ Ωcm ² or less required for a semiconductor electronic device, which is intended to simultaneously solve the problem of ohmic contact to iC. It is.

Another object of the present invention is to provide a fine opening (contact window) that can be used in a real device structure.
Is to provide an ohmic electrode structure having a simple structure capable of obtaining a low contact resistance ρc inside the ohmic electrode structure.

Still another object of the present invention is to provide an ohmic electrode structure capable of obtaining a low contact resistance ρc while maintaining the structure of a field insulating film applicable to various power devices requiring a high withstand voltage. It is to be.

Still another object of the present invention is to provide a method of manufacturing an ohmic electrode structure having a contact resistance ρc of 10 ⁻⁶ Ωcm ² or less required for a semiconductor electronic device.

Still another object of the present invention is to provide a method of manufacturing an ohmic electrode structure capable of easily obtaining a low contact resistance ρc inside a fine opening that can be used in an actual device structure. It is.

Still another object of the present invention is to provide a method of manufacturing an ohmic electrode structure capable of forming a field insulating film applicable to various power devices requiring a high withstand voltage and obtaining a low contact resistance ρc. That is.

Still another object of the present invention is to have a low contact resistance ρc inside a fine opening,
An object of the present invention is to provide a semiconductor device capable of high-frequency operation.

Still another object of the present invention is to provide a semiconductor device which has a low on-voltage, can operate at high speed, and can increase the operating voltage.

[0022]

Means for Solving the Problems The present inventors have eagerly studied,
According to the results considered, the Al-Ti based electrode film and the p-type Si
The causes of the increase in the contact resistance ρc in the ohmic contact with the C region are 1) existence of a Schottky barrier inevitably generated by the contact between the heating reaction layer and p-type SiC; 2) non-uniformity and non-uniformity in the plane. Formation of uniform heating reaction layer; 3) A metal oxide formed on the surface of the Al—Ti-based electrode film when forming the heating reaction layer.

The first prior art described above was not practically useful because it is far from the actual device structure and has a flat S
This is because the contact was formed on the surface of the iC substrate. However, in actual semiconductor electronic devices,
It is necessary to reduce the Schottky barrier inside the fine opening and to generate a uniform and uniform heat reaction layer.
The present invention described below is directed to a p-type S provided in an opening of a field insulating film applied to many actual device structures.
In the iC ohmic electrode structure, the present invention provides a means for eliminating the three causes of increasing the contact resistance ρc.

In order to solve the above-mentioned problems, the invention according to claim 1 comprises (a) a SiC substrate;
A p-type SiC region selectively formed on the surface of the substrate;
(C) a heating reaction layer which enters from a part of the surface of the p-type SiC region and projects upward from the surface of the p-type SiC region; and (d) the heating reaction layer penetrates. A thermal oxide film having a first opening and disposed in contact with the surfaces of the SiC substrate and the p-type SiC region; and (e) an insulating film having a different composition or density from the thermal oxide film. An upper insulating film having a second opening continuous with the first opening and disposed on the surface of the thermal oxide film; and (f) forming a heating reaction layer in the second opening of the upper insulating film. The gist is to provide an ohmic electrode structure including an electrode film made of a metal containing at least one of Al and Ti disposed on the top. Although this is related to a method of manufacturing an ohmic electrode structure described later, a clean metal / semiconductor junction interface can be obtained by employing such a structure of the ohmic electrode structure. Therefore, the Schottky barrier at the metal / semiconductor junction is low, and the morphology of the interface is good.

The “p-type SiC region selectively formed on the surface of the SiC substrate” defined in claim 1 is a SiC substrate.
It is needless to say that the present invention is not limited to the case where the p-type SiC region is directly formed on the surface of the substrate. For example, another semiconductor region having a larger area on a plane than the p-type SiC region is arranged in a well shape on a part of the surface of the SiC substrate 1, and p-type S
An iC region may be formed. Alternatively, a case where another semiconductor region is epitaxially grown on the entire surface of the SiC substrate and a p-type SiC region is formed on a part of the surface of the other semiconductor region that has been epitaxially grown is also acceptable. As described above, in the invention according to the first aspect, the p-type SiC region is formed via the other semiconductor region.
It should be noted that the case where it is formed indirectly is allowed.

According to a second aspect of the present invention, in the ohmic electrode structure according to the first aspect, the electrode film comprises:
(I) a laminated film composed of a lower Ti-Si alloy film and an upper Ti film; (ii) a lower Al-Si alloy film and an upper Al film
(Iii) a lower layer of Al-Ti-
The gist of the present invention is that the metal film includes at least one stacked film in a group consisting of a stacked film including a Si alloy film and an upper Al-Ti alloy film. As described later, the present invention relates to (i) Al / Ti in which a Ti layer is deposited on an Al layer.
Laminated film, (ii) Ti / A in which Al layer is deposited on Ti layer
By reacting the 1-layer film and (iii) the Al-Ti alloy film with the p-type SiC region to form a heat reaction layer, the Schottky barrier can be extremely reduced and the thickness of the barrier can be reduced. Further, the heat reaction layer is uniformly generated. The structure of the electrode film as defined in claim 2 is a laminated structure composed of an unreacted metal layer and a compound portion with metal Si diffused in the heat reaction layer after the heat reaction layer is formed. That is, (i) in an Al / Ti laminated film in which a Ti layer is deposited on an Al layer, the lower Al layer before the heat treatment mainly becomes a heat reaction layer by the heat treatment. At this time, the upper Ti
At the lower part of the layer, a Ti—Si alloy film is generated by a reaction with metallic Si diffused in the heat reaction layer. An electrode film having a structure according to claim 2 is constituted by a laminated film including the generated Ti—Si alloy film and an unreacted Ti film on the upper portion.

(Ii) Ti having an Al layer deposited on the Ti layer
In the / Al laminated film, mainly the Ti layer before the heat treatment becomes a heat reaction layer by the heat treatment, and the upper Al layer before the heat treatment becomes the electrode film having the structure according to claim 2. In this case, the electrode film is formed below the metal S that has diffused the heat reaction layer.
An Al-Si alloy film is generated by the reaction with i, and an unreacted Al film remains on the upper portion.

(Iii) In the Al—Ti alloy film, the lower Al—Ti alloy film mainly before the heat treatment becomes a heat reaction layer by the heat treatment, and the unreacted Al—Ti alloy
The Ti alloy film remains, but at the boundary with the heating reaction layer, Al-T is reacted by the metal Si diffused in the heating reaction layer.
An i-Si alloy film is generated. The laminated structure of the Al-Ti-Si alloy film / the unreacted Al-Ti alloy film constitutes the electrode film having the structure according to the second aspect.

According to a third aspect of the invention, in the ohmic electrode structure according to the first or second aspect, the heat reaction layer is a solid solution containing metal carbide and metal silicon. The above-described Al / Ti laminated film, Ti /
An Al-Ti-based metal such as an Al laminated film or an Al-Ti alloy film and SiC can generate alloys containing various silicides (silicides) and carbides (carbides). However, according to many experimental results of the present inventors, among these, the heat reaction layer made of a solid solution containing metal carbide and metal silicon has a very low Schottky barrier at the metal / semiconductor junction, and It was found that the morphology of the interface was good and the heat reaction layer was uniformly formed.

The invention according to claim 4 is the first to third inventions.
In the ohmic electrode structure according to any one of the above, the gist is that the breakdown electric field strength of the upper insulating film is lower than that of the thermal oxide film.

The invention according to claim 5 is the invention according to claims 1-4.
In the ohmic electrode structure according to any one of the above, an etching rate of the upper insulating film by the BHF solution may be:
The point is that the thermal oxide film is faster than the etching rate by the BHF solution. As is well known, “BHF solution” refers to ammonium fluoride (NH ₄ F): hydrofluoric acid (HF)
= Etching solution (etchant) for a silicon oxide film (SiO ₂ film) consisting of a solution of 7: 1.

The invention according to claim 6 is the invention according to claims 1 to 5
In the ohmic electrode structure according to any one of the above, the surface carrier density of the p-type SiC region is 1 × 10 ¹⁸
/ Cm ^{3 to} 5 × 10 ²¹ / cm ³ .

The invention according to claim 7 is the invention according to claims 1 to 6
In the ohmic electrode structure according to any one of the above, the thickness of the thermal oxide film is 2 to 50 nm.

The invention according to claim 8 is the first to seventh aspects.
The sum of the thickness of the thermal oxide film and the thickness of the upper insulating film is 100 nm to 3 μm in the ohmic electrode structure according to any one of the above.

The invention according to claim 9 is the invention according to claims 1 to 8
The gist is that in the ohmic electrode structure according to any one of the above, the uppermost position of the electrode film is present inside the second opening.

The invention according to claim 10 is characterized in that (a) Si
Forming a p-type SiC region having a high impurity density on at least a part of the surface of the C substrate; (b) cleaning the surface of the SiC substrate; and (c) covering the surface of the SiC substrate with a field insulating film. (D) forming an opening in the field insulating film so as to expose at least a part of the p-type SiC region; and (e) forming Al in the opening.
A step of disposing a Ti-based electrode film, and (f) heat-treating the SiC substrate in a non-oxidizing atmosphere in which the partial pressures of oxygen and water are both 1 × 10 ⁻³ Pa to 1 × 10 ⁻¹⁰ Pa. -T
The gist of the present invention is to provide a method for manufacturing an ohmic electrode structure including a step of forming a heating reaction layer between an i-based electrode film and a SiC substrate.

As in the case of the first aspect, the "step of forming a p-type SiC region having a high impurity density on at least a part of the surface of the SiC substrate" defined in the tenth aspect includes the step of
It is a matter of course that the present invention is not limited to the case where the p-type SiC region is directly formed on the surface of the C substrate. For example, another semiconductor region having a larger area on a plane than the p-type SiC region is arranged in a well shape on a part of the surface of the SiC substrate 1, and p-type S
An iC region may be formed. Alternatively, a case where another semiconductor region is epitaxially grown on the entire surface of the SiC substrate and a p-type SiC region is formed on a part of the surface of the other semiconductor region that has been epitaxially grown is also acceptable. Thus, it should be noted that, in the invention according to claim 10, a case where the p-type SiC region is formed indirectly via another semiconductor region is allowed.

The invention according to claim 11 is the invention according to claim 10
In the method for manufacturing an ohmic electrode structure according to the above description, the step of covering with a field insulating film is performed by thermal oxidation.
The gist of the present invention is to include a step of growing a thermal oxide film on the surface of the C substrate and a step of depositing an insulating film on the thermal oxide film by a method other than thermal oxidation.

The twelfth aspect of the present invention is the tenth aspect of the present invention.
In the method for manufacturing an ohmic electrode structure according to the description,
The step of coating with a field insulating film includes a step of depositing an oxygen-permeable insulating film on the surface of the SiC substrate by a method other than thermal oxidation, and a step of thermally oxidizing the surface of the SiC substrate after the deposition of the oxygen-permeable insulating film. At the interface between
And a step of growing a thermal oxide film.
That is, the oxygen in the atmosphere is changed to S through the oxygen-permeable insulating film.
By reaching the surface of the iC substrate and forming an SiO ₂ film at the interface between the surface of the SiC substrate and the oxygen-permeable insulating film, a field insulating film can be realized.

According to a thirteenth aspect of the present invention, there is provided (a) Si
A step of forming a p-type SiC region having a high impurity density on at least a part of the surface of the C substrate; (b) a step of cleaning the surface of the SiC substrate; and (c) a method other than thermal oxidation.
depositing an oxygen-permeable insulating film on the surface of the iC substrate;
(D) forming an opening in the oxygen-permeable insulating film so as to selectively expose a part of the p-type SiC region;
(E) After the step of forming this opening, by thermal oxidation,
A step of growing a thermal oxide film on the surface of the SiC substrate exposed at the opening and at the interface between the surface of the SiC substrate and the oxygen-permeable insulating film; and (f) removing the thermal oxide film grown on the opening. (G) arranging an Al—Ti-based electrode film inside the opening from which the thermal oxide film has been removed; and (h) heat-treating the Al—T by heating the SiC substrate in a non-oxidizing atmosphere.
The gist of the present invention is to provide a method for manufacturing an ohmic electrode structure including a step of forming a heating reaction layer between an i-based electrode film and a SiC substrate.

The invention according to claim 14 is the invention according to claim 13
In the method for manufacturing an ohmic electrode structure according to the description,
The gist is that the step of forming the heating reaction layer is performed in an atmosphere in which the partial pressures of oxygen and water are both 1 × 10 ⁻³ Pa to 1 × 10 ⁻¹⁰ Pa.

The invention according to claim 15 is the invention according to claim 10.
15. In the method for manufacturing an ohmic electrode structure according to any one of Items 14 to 14, the step of disposing the Al—Ti-based electrode film includes: (i) a step of depositing a Ti layer on the Al layer;
i) a step of depositing an Al layer on the Ti layer;
The gist of the present invention is to include at least one step in a group consisting of steps of depositing a Ti alloy film.

The invention according to claim 16 is the invention according to claim 10.
13. In the method for manufacturing an ohmic electrode structure according to any one of Items 1 to 12, the step of forming an opening includes: (a) a step of forming an etching mask on the field insulating film by photolithography; Using the etching mask, removing a part of the field insulating film by dry etching so that the field insulating film remains on at least a part of the p-type SiC region; Removing the insulating film by wet etching to expose at least a part of the p-type SiC region; and (d) cleaning the exposed p-type SiC region by rinsing with ultrapure water. Make a summary.

The invention according to claim 17 is based on claim 16.
In the method for manufacturing an ohmic electrode structure according to the description,
The step of arranging the Al—Ti-based electrode film is performed in such a manner that the etching mask is
After the step of depositing the Ti-based electrode film on the entire surface including the upper portion and the opening of the etching mask, and the step of depositing the entirety of the etching mask, the etching mask is removed.
the step of selectively leaving the i-based electrode film only inside the opening.

The invention according to claim 18 is the invention according to claim 13
Or the step of forming an opening in the method of manufacturing an ohmic electrode structure according to the item 14, wherein (a) a step of forming an etching mask on the oxygen-permeable insulating film by photolithography, and (b) this etching Removing a portion of the oxygen-permeable insulating film using a mask so that the oxygen-permeable insulating film remains on at least a portion of the p-type SiC region; and (c) removing the remaining oxygen-permeable insulating film. The method comprises the steps of: removing a film by wet etching to expose at least a part of the p-type SiC region; and (d) cleaning the exposed p-type SiC region by rinsing with ultrapure water. And

The invention according to claim 19 is characterized in that (a) Si
A C substrate, and (b) a p-type SiC region selectively functioning as a main electrode region on the surface of the SiC substrate.
(C) a heating reaction layer which enters from a part of the surface of the p-type SiC region and projects upward from the surface of the p-type SiC region; and (d) the heating reaction layer penetrates. A thermal oxide film having a first opening and disposed in contact with the surfaces of the SiC substrate and the p-type SiC region; and (e) an insulating film having a different composition or density from the thermal oxide film. An upper insulating film having a second opening continuous with the first opening and disposed on the surface of the thermal oxide film; and (f) forming a heating reaction layer in the second opening of the upper insulating film. The gist is to provide a semiconductor device including an electrode film made of a metal containing at least one of Al and Ti and a main electrode wiring connected to the electrode film.

Here, "a p-type SiC region selectively functioning as a main electrode region on the surface of the SiC substrate"
Is of course not limited to the case where the p-type SiC region is directly formed on the surface of the SiC substrate. For example, the main electrode region (p-type S
Another semiconductor region having an area larger than the iC region may be arranged in a well shape, and a main electrode region (p-type SiC region) may be formed at a position inside the well-shaped semiconductor region. For example, a main electrode region (p-type SiC region) formed in a base region of a bipolar transistor or a body region of a power MOSFET or the like may be used. Alternatively, another semiconductor region is epitaxially grown over the entire surface of the SiC substrate, and the main electrode region (p-type Si
(C region) is also acceptable. Thus, the invention according to claim 19 allows the case where the main electrode region (p-type SiC region) is indirectly formed on the surface of the SiC substrate via another semiconductor region. It should be noted.

The invention according to claim 20 is the invention according to claim 19.
In the semiconductor device according to the above, the electrode film is made of titanium
Silicon (Ti-Si) alloy film and upper titanium (Ti)
Film, a lower aluminum-silicon (Al-Si) alloy film and an upper aluminum (Al) film, and a lower aluminum-titanium-
The gist of the present invention is a metal film including at least one stacked film in a group consisting of a stacked film including a silicon (Al-Ti-Si) alloy film and an upper aluminum-titanium (Al-Ti) alloy film. .

The invention according to claim 21 is the invention according to claim 19.
Alternatively, in the semiconductor device according to Item 20, the heat reaction layer is a solid solution containing metal carbide and metal silicon (Si).

[0050]

According to the first aspect of the present invention, Si
The thermal oxide film formed by thermally oxidizing the surface of the C substrate and the thermal oxide film have a laminated structure of insulating films having different compositions or densities, so that a relatively thick field insulating film can be formed. Therefore, in various power devices that require high withstand voltage,
A contact resistance ρc of one order of magnitude lower than that of the conventionally known contact resistance ρc, or less than 10 ⁻⁶ Ωcm ² is realized, and the high frequency of various semiconductor electronic devices in which the surface wiring is connected to the p-type SiC region. And high performance can be achieved. In particular, inside a fine opening (contact window) that can be used in an actual device structure,
A low contact resistance ρc can be obtained.

By using the material defined in claim 2 as a metal film, a metal / semiconductor junction having a low Schottky barrier and a thin barrier can be achieved. Further, the heat reaction layer is uniformly generated. Therefore, according to the second aspect of the present invention, an ohmic electrode structure having an extremely low contact resistance ρc with respect to the p-type SiC region can be obtained.

According to the third aspect of the present invention, since the heat reaction layer made of a solid solution containing metal carbide and metal silicon is selected, the Schottky barrier at the metal / semiconductor junction is extremely low, and The morphology of the interface is good, and the heat reaction layer can be formed uniformly. Therefore, p
An ohmic electrode structure having extremely low contact resistance ρc with respect to the type SiC region can be obtained.

The SiC thermal oxide film is inferior to the Si thermal oxide film, but is close to the Si thermal oxide film (SiO ₂ film).
Film). Therefore, the breakdown electric field strength of the thermal oxide film of SiC is about 14 MV / cm at a thickness of 10 nm. The dielectric breakdown electric field strength of the SiO ₂ film formed by a method other than thermal oxidation is smaller than this value. In other words, according to the invention of claim 4, various insulating films other than the thermal oxide film of SiC are formed on the thermal oxide film of SiC to ensure the withstand voltage required as the specification of the semiconductor device. In addition, the surface morphology of SiC can be favorably maintained.

As described above, the thermal oxide film of SiC is made of SiC.
Since it is a SiO ₂ film close to a thermal oxide film, the etching rate for a BHF solution is about 100 nm / min. On the other hand, the etching rate for the SiO ₂ film deposited by CVD is about 11.5 to 3 times higher. That is, according to the invention of claim 5, various SiO ₂ films other than the thermal oxide film of SiC are formed on the thermal oxide film of SiC, and the breakdown voltage and the surface required as the specifications of the semiconductor device are obtained. Surface morphology of SiC can be favorably maintained while maintaining the stability of the SiC. Further, various semiconductor processes can be adopted by utilizing the difference in the etching rate with respect to the BHF solution.

According to the invention of claim 6, p-type S
When the surface carrier density of the iC region is 1 × 10 ¹⁸ / cm ³ to
Because of the high impurity density of 5 × 10 ²¹ / cm ³ , p-type S
The thickness of the Schottky barrier generated between the iC region and the heat reaction layer is reduced, so that conduction holes can easily flow by the tunnel effect. Therefore, a low contact resistance ρc is obtained.

According to the seventh aspect of the present invention, since the thickness of the thermal oxide film is optimized to a value of 2 to 50 nm, the p-type SiC
The surface roughening of the substrate due to excessive thermal oxidation can be prevented while maintaining the effect of removing as much as possible the hydrocarbon compound and the natural oxide film which are easily generated on the surface of the region. For this reason,
The interface between the p-type SiC region and the heat reaction layer is flat. Further, since the heat reaction layer is uniform and uniform, the height of the Schottky barrier is reduced, and the contact resistance ρc is reduced.

According to the eighth aspect of the present invention, the sum of the thickness of the thermal oxide film and the thickness of the upper insulating film is set to 100
Since the thickness is in the range of nm to 3 μm, a leakage current due to a parasitic MOS transistor formed by the SiC substrate below the thermal oxide film and the wiring above the upper insulating film is suppressed, and a power semiconductor device having a high withstand voltage can be provided.

According to the ninth aspect of the present invention, the uppermost position of the electrode film exists inside the second opening, and
The upper insulating film around the opening is not overlapped. For this reason, when forming a heating reaction layer, even if Al melts, A
1 is confined in the depression of the second opening, so that the melting A
There is no fear that 1 flows out to the surface of the peripheral upper insulating film and causes a short circuit. As a result, the production yield is improved.

According to the tenth aspect, immediately before forming the field insulating film, the Al inside the opening is formed.
-The process until the Ti-based electrode film is provided is based on the Si
The process can proceed without applying a photoresist on the exposed C surface. Therefore, Al-
Hydrocarbon caused by the photoresist on the interface between the Ti-based electrode film and SiC can be completely avoided, and a clean interface can be easily obtained. Therefore, the heating reaction layer and S
The Schottky barrier at the interface with iC is extremely low, and
Become thin. In addition, the morphology of the interface is good, and the heat reaction layer is uniformly formed. Furthermore, heat treatment is performed in a non-oxidizing atmosphere in which both oxygen and water have a partial pressure of 1 × 10 ⁻³ Pa to 1 × 10 ⁻¹⁰ Pa to form a heating reaction layer. Metal oxide films such as aluminum oxide (Al ₂ O ₃ ) and titanium oxide (TiO ₂ ) generated on the surface of the electrode film are remarkably suppressed, and the increase in contact resistance ρc due to the metal oxide film on the surface can be greatly reduced. . As a result, 10 times lower than the conventional contact resistance ρc by about one digit.
^-6 [Omega] cm ² units, or below this contact resistance ρc
Is obtained. In addition, since the ohmic electrode structure is provided in the opening in the field insulating film, the structure is suitable for an actual semiconductor electronic device.

According to the eleventh aspect of the present invention, Si
Since the step of forming a field insulating film on the surface of the C substrate includes a step of growing a thermal oxide film and a step of depositing an insulating film on the thermal oxide film by a method other than thermal oxidation, Deterioration of the surface morphology of the SiC substrate due to excessive thermal oxidation can be suppressed. As a method other than thermal oxidation, well-known physical or chemical means such as a CVD method or a sputtering method can be employed. However, a natural oxide film or a hydrocarbon film unique to these methods other than thermal oxidation can be used. Generation can be effectively removed or suppressed by the thermal oxide film. For this reason, the morphology of the interface between the heat reaction layer and the p-type SiC region is improved, and a uniform and uniform heat reaction layer can be generated. Therefore, the above-described contact resistance ρc of the order of 10 ⁻⁶ Ωcm ² or less can be easily obtained.

According to the twelfth aspect of the present invention, the step of depositing an oxygen-permeable insulating film on the surface of the SiC substrate by a method other than thermal oxidation is performed first. A field oxide film is formed by growing a thermal oxide film on the interface between the surface of the SiC substrate and the oxygen-permeable insulating film by oxidation. Also in this case, similarly to the invention according to claim 11, deterioration of the surface morphology of the SiC substrate due to excessive thermal oxidation can be suppressed. Further, the formation of a natural oxide film or hydrocarbon inherent to a known physical or chemical means such as a CVD method or a sputtering method can be effectively removed or suppressed by forming a thermal oxide film.
For this reason, the morphology of the interface between the heat reaction layer and the p-type SiC region is improved, and a uniform and uniform heat reaction layer can be generated. Therefore, a low contact resistance ρc of the order of 10 ⁻⁶ Ωcm ² or less can be easily obtained.

In the invention according to the thirteenth aspect, first, a “temporary field insulating film” made of an oxygen-permeable insulating film is formed on the surface of the SiC substrate by a method other than thermal oxidation. An opening (so-called contact window) is formed, and SiC exposed in this opening is formed.
Since a thermal oxide film is grown on the surface of the substrate, and then the thermal oxide film is removed, the surface of the p-type SiC region can be cleaned. Further, similarly to the invention according to claims 11 and 12, the steps from immediately before forming the provisional field insulating film to disposing the Al-Ti-based electrode film inside the opening portion include:
The process can proceed without applying a photoresist to the exposed SiC surface of the opening. Therefore, the adhesion of hydrocarbon due to the photoresist to the interface between the Al—Ti-based electrode film and the SiC before forming the heat reaction layer can be completely avoided, and a clean interface can be easily obtained. For this reason, the Schottky barrier at the interface between the heat reaction layer and SiC is extremely low and thin. Furthermore, by the later thermal oxidation,
Since a thin thermal oxide film is formed at the interface between the surface of the SiC substrate and the oxygen-permeable insulating film, a high withstand voltage can be achieved and excessive thermal oxidation can be performed as in the invention according to claims 11 and 12. Can suppress the deterioration of the surface morphology of the SiC substrate. In addition, the formation of a natural oxide film or hydrocarbon unique to physical or chemical means other than thermal oxidation can be effectively removed by the formation of a thermal oxide film. For this reason, the morphology of the interface between the heat reaction layer and the p-type SiC region is improved, and a uniform and uniform heat reaction layer can be generated. Therefore, a low contact resistance ρc of the order of 10 ⁻⁶ Ωcm ² or less can be easily obtained.

According to the fourteenth aspect of the present invention, oxygen
And the partial pressure of water is 1 × 10^-3Pa-1 × 10^-10P
heat-treated in a non-oxidizing atmosphere of a to form a heating reaction layer
Is formed on the surface of the Al-Ti-based electrode film during heat treatment.
Al formed_TwoO_ThreeAnd TiO _TwoMetal oxide film
Suppressed, contact resistance ρc due to metal oxide film on the surface
Can be greatly reduced.

(I) an Al / Ti laminated film in which a Ti layer is deposited on an Al layer, (ii) a Ti / Al laminated film in which an Al layer is deposited on a Ti layer, (iii) ) A
The l-Ti alloy film can form a heat reaction layer having good morphology at the interface with the p-type SiC region and extremely low Schottky barrier by reaction with the p-type SiC region. Therefore, according to the fifteenth aspect, 10 ⁻⁶ Ωcm, which is lower by about one digit than the conventional contact resistance ρc.
^Two or less contact resistance ρc is obtained.

According to the sixteenth aspect of the present invention, the final step in which the opening reaches the p-type SiC region is completed by wet etching and rinsing with ultrapure water. Hydro
Reattachment of carbon to the surface of the p-type SiC substrate and etching damage due to excessive plasma energy can be prevented.
Therefore, contamination of the surface of the p-type SiC substrate and roughening of the substrate surface can be effectively prevented. In addition, since dry etching can be used, a fine ohmic contact can be formed, so that high integration density of a semiconductor integrated circuit and high performance such as reduction of on-resistance of a power semiconductor device can be achieved.

According to the seventeenth aspect of the present invention, an etching mask using an opening (contact window) as an opening can also be used as a mask for a lift-off step for patterning an Al—Ti-based electrode film. That is, the photolithography process for the contact window opening process and the patterning process of the Al—Ti-based electrode film can be performed at one time, and the manufacturing process of the semiconductor device is simplified. For this reason, it becomes easy to improve the manufacturing yield and the productivity of the semiconductor device, and further to reduce the manufacturing cost.

According to the eighteenth aspect of the present invention, the final step of providing an opening reaching the p-type SiC region in the oxygen-permeable insulating film is completed by wet etching and rinsing with ultrapure water. Hydrocarbon, which is a reaction product of dry etching, can be prevented from re-adhering to the surface of the p-type SiC substrate, and etching damage due to excessive plasma energy can be prevented. Therefore, similarly to the invention according to claim 16, contamination of the surface of the p-type SiC substrate and roughening of the substrate surface can be effectively prevented. In addition, since dry etching can be used, fine ohmic contacts can be formed, and high performance such as high integration density of a semiconductor integrated circuit and reduction in on-resistance of a power semiconductor device can be achieved.

According to the nineteenth aspect of the present invention, Si
A thermal oxide film formed by thermally oxidizing the surface of the C substrate and a thermal oxide film have a laminated structure of insulating films having different compositions or densities, so that a relatively thick field insulating film having excellent stability can be formed. Therefore, in various power devices having a high rated operating voltage, a contact resistance ρc lower by about one digit than the conventionally known contact resistance ρc is realized. For this reason, it is possible to increase the frequency and the performance of the semiconductor electronic device. In particular, inside a fine opening (contact window) that can be used in an actual device structure,
A low contact resistance ρc with respect to the main electrode region can be obtained. Therefore, by arranging a large number of fine contact windows at a high density, a semiconductor power device that can operate at a low on-voltage and at a high speed can be realized.

By using the material defined in claim 20 as a metal film, a metal / semiconductor junction having a low Schottky barrier and a thin barrier can be achieved. Also,
The heating reaction layer is generated uniformly. Therefore, claim 20
According to the invention according to the description, the contact resistance ρc with respect to the main electrode region including the p-type SiC region is extremely low,
Higher frequencies and higher performance of various semiconductor electronic devices can be achieved.

According to the twenty-first aspect of the present invention, since the heat reaction layer made of a solid solution containing metal carbide and metal silicon is selected, the Schottky barrier at the metal / semiconductor junction is extremely low. Moreover, the morphology of the interface is good, and the heat reaction layer can be formed uniformly. For this reason, the contact resistance ρc with respect to the main electrode region becomes extremely low, and it is possible to increase the frequency and improve the performance of various semiconductor electronic devices.

[0071]

Next, first to third embodiments of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the plane dimension, the ratio of the thickness of each layer, and the like are different from the actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. In addition, it is needless to say that the drawings include portions having different dimensional relationships and ratios.

(First Embodiment) As shown in FIG.
The ohmic electrode structure according to the first embodiment of the present invention includes a SiC substrate 1, a p-type SiC region 2 selectively formed on the surface of the SiC substrate 1, and a part of the surface of the p-type SiC region 2. The thermal reaction layer 8 formed on the substrate, the thermal oxide film 3 covering the interface between the SiC substrate 1 and the p-type SiC region 2, the upper insulating film 4 disposed on the surface of the thermal oxide film 3, And at least an electrode film 7 arranged. p-type SiC
The region 2 functions as a main electrode region of a semiconductor device, particularly a semiconductor electronic device.

Generally, a semiconductor electronic device has a first main electrode region, a second main electrode region, and a control electrode. The “first main electrode region” is either an emitter region or a collector region in an IGBT, or a source region or a drain region in a power insulated gate transistor (power IGT) such as a power MOSFET or a power MOSSIT. Mean one. The “second main electrode region” is one of the emitter region and the collector region that does not become the first main electrode region in the IGBT, and the source region or the drain region that does not become the first main electrode region in the power IGT. Means either one of
That is, if the first main electrode region is an emitter region,
The main electrode region is a collector region, and if the first main electrode region is a source region, the second main electrode region is a drain region. In addition, “control electrode” means IGBT and power IGT
Of course, this means the gate electrode. In the present invention, one of the first main electrode region and the second main electrode region is simply referred to as “main electrode region”. In a SiC semiconductor device having no control electrode such as a diode, a first main electrode region and a second main electrode region are similarly defined.
In the present invention, also in this case, one of the first main electrode region and the second main electrode region is simply referred to as “main electrode region”. Further, in a semiconductor integrated circuit such as a power IC, three or more main electrode regions can be defined, and at least one of these is the “main electrode region” of the present invention.

The field insulating film 5 has a laminated structure of the thermal oxide film 3 and the upper insulating film 4. Further, the field insulating film 5 is electrically connected to the electrode film 7.
A wiring conductor piece 9 is formed on the top. The wiring conductor piece 9 is a wiring member for connecting the ohmic contact shown in FIG. 1 to another portion, and functions as a main electrode wiring of the semiconductor device. In the power device, a large number of unit cells are arranged on the SiC substrate 1 in a honeycomb shape, a matrix shape, or the like to secure a current capacity. Further, depending on design specifications for lowering the ON voltage, each main electrode region may be subdivided and arranged on the SiC substrate 1 at a high density. Therefore, in such a case, the wiring conductor piece 9 functions as a wiring for integrating the main electrode regions of the plurality of divided unit cells. This wiring conductor piece 9 includes well-known aluminum (Al), aluminum-silicon (Al-Si) eutectic, aluminum-copper-silicon (Al-Cu-Si) eutectic, copper (Cu), titanium / tungsten. (Ti-W) alloy or the like is used.

The conductivity type and impurity density of the SiC substrate 1 differ depending on the semiconductor device using the ohmic electrode structure of the present invention. Further, another semiconductor region having a larger area on the plane than the p-type SiC region 2 is arranged in a well shape on a part of the surface of the SiC substrate 1, and the inside of the other semiconductor region on the plane of the well shape is formed. At the position, the p-type SiC region 2 having a high impurity density epitaxially grown may be formed as a projection, and the p-type SiC region 2 may be used as a main electrode region. Alternatively, another semiconductor region is epitaxially grown on the entire surface of the SiC substrate 1, and the p-type SiC region 2 with a high impurity density further continuously epitaxially grown on a part of the surface of the other semiconductor region that has been epitaxially grown is formed by mesa etching or the like. Formed as a convex part, this p
Type SiC region 2 may be used as the main electrode region.

For example, in the case of a pnp type bipolar transistor, a base region composed of an n-type SiC region is formed in a well shape on the surface of a low impurity density p-type (or π-type) SiC substrate 1 serving as a collector region. A p-type SiC region 2 having a high impurity density as a main electrode region (emitter region) may be formed as a protrusion at an inner position on the plane of the base region. In this case, an intrinsic semiconductor (i-type) SiC substrate 1 is used in place of the low-impurity-density p-type SiC substrate 1 serving as a collector region, and a high impurity Density p-type S
A collector region composed of an iC region may be formed.

In the case of a thyristor such as a GTO thyristor, an n-base region made of an n-type SiC region is formed on a part or the whole surface of the p-type SiC substrate 1 serving as a p-base region. Then, a p-type SiC region 2 having a high impurity density as an anode region (main electrode region) can be formed in a convex shape by epitaxial growth. In this case, an n-type SiC region as a cathode region is formed on the back surface of p-type SiC substrate 1 serving as a p-base region.

On the other hand, in an n-channel junction FET or junction SIT, an n-type SiC substrate (or a ν-type SiC substrate or an i-type SiC substrate) 1 serving as a channel region is used.
A p-type SiC region 2 having a high impurity density as a source region (main electrode region) can be formed in a convex shape on the surface of the substrate.
In an n-channel SI thyristor, a p-type SiC region 2 having a high impurity density as an anode region is formed on the surface of an n-type SiC substrate (or ν-type SiC substrate or i-type SiC substrate) 1 functioning as a channel region. It can be formed in a partial shape.

In a p-channel power IGT, an n-type SiC substrate (or a π-type S
On the surface of the iC substrate 1, a p-type SiC region 2 having a high impurity density as a drain region (main electrode region) can be formed in a convex shape. In this case, a p-type SiC region having a high impurity density as a source region (another main electrode region) is provided at another location on the surface of the n-type SiC substrate (or π-type SiC substrate), facing the drain region 2. Are formed in a convex shape. Then, a gate oxide film is formed on the surface of the n-type SiC substrate (or π-type SiC substrate) 1 between the source region and the drain region 2, and a gate electrode is formed on the gate oxide film. The gate electrode is made of a high melting point metal such as tungsten (W), titanium (Ti), molybdenum (Mo), or a silicide thereof (WSi ₂ , TiSi ₂ , MoS).
i _2), or the like can be used. Alternatively, p of the double diffusion structure
In the power IGT of the channel, a p-type SiC substrate (or a π-type SiC substrate or i-type
A p-type SiC region 2 having a high impurity density as a drain region (main electrode region) can be formed in a convex shape on the surface of a type SiC substrate 1. In this case, another p-type SiC region as a source region is formed in an n-body region formed on the surface of p-type SiC substrate 1. Similarly, on the surface of an n-type SiC substrate (or π-type SiC substrate) 1, a p-type SiC region 2 as a drain region and a p-type Si
If the C region is formed in a convex shape and a Schottky electrode is formed on the surface of the n-type SiC substrate (or π-type SiC substrate) 1 between the source region and the drain region 2, the MESFET
Can be realized.

In an n-channel IGBT, a p-type SiC region 2 having a high impurity density as a collector region can be formed in a convex shape on the surface of an n-type SiC substrate (or ν-type SiC substrate) 1 functioning as a drift region. It is. In this case, another n-type SiC region as an emitter region is formed in the p-body region formed on the surface of the n-type (or ν-type) SiC substrate 1. The ohmic electrode structure according to the first embodiment of the present invention is applicable to the p-type SiC region 2 having a high impurity density as a main electrode region of these various semiconductor electronic devices. The heating reaction layer 8 enters the inside from a part of the surface of the p-type SiC region 2 and
It is formed to protrude upward from the surface of iC region 2.
Thermal oxide film 3 has a first opening through which heat reaction layer 8 penetrates, and covers the interface between SiC substrate 1 and p-type SiC region 2 so as to cover the interface between SiC substrate 1 and p-type SiC region 2. It is arranged in contact with the surface. The upper insulating film 4 is an insulating film having a different composition or density from the thermal oxide film 3 and has a second opening continuous with the first opening. As shown in FIG. 1, the uppermost position of the electrode film 7 exists inside the second opening. The first and second openings are common openings 6
Is composed.

In the ohmic electrode structure according to the first embodiment of the present invention, “an insulating film having a composition different from that of the thermal oxide film 3” means a PSG (phosphosilicate glass) film, a BSG
(Borosilicate glass), BPSG (borophosphosilicate glass), or an insulating film such as a Si ₃ N ₄ film. Further, “an insulating film having a density different from that of the thermal oxide film 3” means an insulating film such as a SiO ₂ film deposited by a method other than the thermal oxide film. For example,
An SiO ₂ film formed by a chemical or physical deposition method such as a CVD method, a sputtering method, and a vacuum deposition method corresponds to the method.
The SiC thermal oxide film 3 shown in FIG. 1 is an SiO ₂ film which is inferior to the Si thermal oxide film but close to the Si thermal oxide film. Since the density is different between the thermal oxide film and the SiO ₂ film deposited by other methods, a boundary is visible when the cross section is observed with a high-resolution SEM.

The dielectric breakdown electric field strength of the SiC thermal oxide film 3 close to the Si thermal oxide film is 14 MV at a thickness of 10 nm.
/ Cm. On the other hand, the dielectric breakdown electric field strength of the SiO ₂ film formed by a method other than thermal oxidation is smaller than this value. For example, the dielectric breakdown electric field strength of a SiO ₂ film deposited by CVD is about 6 MV / cm at the same thickness of 10 nm. 4 is identifiable.

Since the thermal oxide film 3 of SiC is an SiO ₂ film close to the thermal oxide film of Si, the etching rate for the BHF solution is about 100 nm / min. On the other hand, the etching rate for the SiO ₂ film deposited by CVD is about 1.5 to 3 times higher. Therefore, by measuring the etching rate for the BHF solution, the thermal oxide film 3 of SiC and the upper insulating film 4 can be clearly distinguished.

Microscopically, the SiO ₂ film deposited by CVD has more hydrogen and carbon bonds than the thermal oxide film 3 of SiC, and the Si—O—Si bond distance is longer than that of the thermal oxide film 3 of SiC. The thermal oxide film 3 of SiC and the upper insulating film 4 can be clearly distinguished also by an infrared absorption spectrum or Raman spectroscopy.

If a laminated structure in which an upper insulating film 4 such as various SiO ₂ films other than the thermal oxide film of SiC as shown in FIG. The surface morphology of SiC can be favorably maintained while ensuring the pressure resistance and surface stability required as specifications.

It is desirable that the thickness of thermal oxide film 3 is 2 to 50 nm. In particular, the thermal oxide film 3 in the range of 5 to 20 nm
Is desirable. When the thickness of the thermal oxide film 3 is smaller than 5 nm, the SiC substrate 1 produced by surface polishing or ion implantation is used.
The effect of removing the damaged area on the surface and the effect of removing foreign substances on the surface are poor. On the other hand, when the thickness of the thermal oxide film 3 is
If the thickness is more than 50 nm, there is a problem that the surface of the SiC substrate 1 is gradually roughened due to excessive thermal oxidation, and the surface morphology is reduced. For this reason, the thickness of the thermal oxide film 3 in the above range has a beneficial effect in reducing the contact resistance ρc.

The total thickness of the field insulating film 5 obtained by adding the thickness of the thermal oxide film 3 and the thickness of the upper insulating film 4 is 100 nm to 100 nm.
It is desirable that the thickness be 3 μm. In particular, it is desirable that the thickness be 300 nm or more. In the case of a power semiconductor device having a high withstand voltage, the thickness may be 800 nm or more. However, if the thickness of the field insulating film 5 is too large, cracks and the like occur, so that the thickness of 3 μm or more is not preferable.

The electrode film 7 shown in FIG. 1 is made of a metal containing at least one of Al and Ti disposed on the heat reaction layer 8 in the second opening of the upper insulating film 4. The “electrode film 7 made of a metal containing at least one of Al and Ti” includes (i) a laminated film including a lower Ti—Si alloy film and an upper Ti film, and (ii) a lower Al film.
A stacked film composed of a Si alloy film and an upper Al film, and (iii) a lower Al-Ti-Si alloy film and an upper Al film.
It is preferably one of the laminated films composed of a Ti alloy film.

As will be described later, the present invention provides (i) an Al / Ti laminated film in which a Ti layer is deposited on an Al layer;
A Ti / Al laminated film in which an Al layer is deposited on the layer, (iii)
By causing the Al-Ti alloy film to react with the p-type SiC region 2 and forming the heating reaction layer 8, the Schottky barrier is extremely low and the thickness of the barrier is reduced. For this reason, the electrode film 7 shown in FIG.
Is a laminated structure composed of a compound part of the unreacted metal layer and the metal Si diffused in the heat-reacted layer 8 after the formation of the metal layer. That is, (i) in the Al / Ti laminated film in which the Ti layer is deposited on the Al layer, the lower Al layer before the heat treatment becomes the heat reaction layer 8 by the heat treatment. At this time, the T
In the i-layer, a Ti—Si alloy film is formed at a lower portion by a reaction with the metal Si diffused in the heat reaction layer. The electrode film 7 is constituted by a laminated film including the lower Ti-Si alloy film and the upper unreacted Ti film.

(Ii) Ti having an Al layer deposited on the Ti layer
In the / Al laminated film, the Ti layer before the heat treatment becomes the heat reaction layer 8 by the heat treatment. On the other hand, in the Al layer before the heat treatment, an Al—Si alloy film is generated in a lower portion by a reaction with the metal Si diffused in the heat reaction layer, and an unreacted Al film remains in an upper portion.

(Iii) In the Al—Ti alloy film, the lower Al—Ti alloy film before the heat treatment becomes the heat reaction layer 8 by the heat treatment, and the unreacted Al—T
The i-alloy film remains. An Al—Ti—Si alloy film is generated at the boundary with the heating reaction layer 8 by the reaction with the metal Si diffused in the heating reaction layer.

FIG. 2 shows a T layer in which an Al layer is deposited on a Ti layer.
FIG. 9 is a diagram showing the results of analyzing the composition in the depth direction of the ohmic electrode structure using Auger electron spectroscopy (AES) after heat-treating the i / Al laminated film at 1000 ° C. for 2 minutes. The etching rate by sputtering at the time of AES measurement is 13 nm / min in terms of SiO ₂ . As shown in FIG. 2, Al as the wiring conductor piece 9 exists at the outermost surface side. Below the wiring conductor piece 9, there is an electrode film 7 made of Al containing oxygen (O) and underlying Al containing Si. The thickness of the electrode film 7 is 312 nm in consideration of the etching rate by sputtering. Under the electrode film 7, a heating reaction layer 8 having a thickness of 367 nm is formed.
Exists. The heat reaction layer 8 is a Ti layer containing carbon (C) and Si. Below the heating reaction layer 8 is the SiC substrate 1.

When the chemical state of each element is determined by target factor analysis (TFA) using C _KLL , Al _KLL , and Si _LVV , the chemical state of C is divided into two components. Overlaps with the distribution of Ti. From the peak shape not shown,
It is presumed to be Ti carbide (TiC) in the heating reaction layer 8. On the other hand, the deeper component is Si in the SiC substrate 1.
It is estimated that the component is caused by C.

The chemical state of Al is also divided into two components, and the presence of a metal component and an oxide component is presumed from a peak shape not shown. In the profile of each component, the profile of the oxide is in good agreement with the profile of O.

Si is divided into two or three components. At the time of dividing the profile, the fitting of two components is better, so here a two-component system will be considered. The presence of the metal component and the carbide component is presumed from the peak shapes not shown. Regarding the profile of the metal component, the surface side matches well with the profile of the Al metal component of Al _KLL . In the internal region corresponding to the TiC layer,
A difference is observed between the profile of the Al metal component and the profile of the Al metal component. Therefore, when the chemical state is determined from the shape of the spectrum not shown, no difference between the Al metal component and the corresponding spectrum is recognized. Therefore, it is determined that it is a metal component. From this, in the TiC layer of the heating reaction layer 8,
It is presumed that Si exists in a metallic state.

The components observed after the Ti layer are C
It matches well with the profile of (SiC), and is presumed to be SiC of the SiC substrate 1 from the peak shape.

As described above, according to the AES measurement, Ti /
When the Al laminated film is heat-treated at 1000 ° C. for 2 minutes, it can be estimated that the heat reaction layer 8 is a solid solution containing metal carbide (TiC) and metal silicon. Al /
When the Ti laminated film is heat-treated, the heat reaction layer 8 becomes
It is estimated that the solid solution contains AlC and metallic silicon. The heat reaction layer 8 made of a solid solution containing a metal carbide and metal silicon makes the Schottky barrier in the metal / semiconductor junction extremely low, improves the morphology of the interface, and consequently makes the heat reaction layer 8 uniform. Is determined to be generated.

The Al / Ti laminated film or the Al film as an element of the Al / Ti laminated film can be replaced with an Al-Si eutectic film which is frequently used in wiring of Si semiconductor electronic devices.

As shown in FIG. 1, a p-type Si having a high surface carrier (hole) density is formed on the surface of the SiC substrate 1.
C region 2 is formed. The p-type SiC region 2 is a region 2 in which the p-type epitaxial film is left in a mesa shape. The surface carrier density of the p-type SiC region 2 is 1 × 10 ¹⁸ / cm ³
Desirably, it is about 5 × 10 ²¹ / cm ³ . More preferably, a surface carrier density of 1 × 10 ¹⁸ / cm ³ or more is desirable.

By the design of the semiconductor device, a plurality of bonding pads connected to each main electrode region and control electrode via a wiring conductor piece (main electrode wiring) 9 are formed on the field insulating film 5. May be. A passivation film made of an oxide film (SiO ₂ ), a PSG film, a BPSG film, a nitride film (Si ₃ N ₄ ), a polyimide film, or the like is provided on the wiring conductor pieces (main electrode wiring) 9 and the bonding pads. May be formed. Then, a plurality of openings (windows) are provided in a part of the passivation film so as to expose the plurality of electrode layers, thereby enabling bonding.

Next, the process sectional views shown in FIGS.
The manufacturing process of the ohmic electrode structure according to the first embodiment of the present invention will be described with reference to (3).

(A) First, as shown in FIG.
1 × 10 ¹⁹ on the Si surface of the off 4H—SiC substrate 1
A p-type epitaxial growth layer (p-type SiC region) 20 having a thickness of several hundred nm to which a p-type impurity (Al) having a high impurity density of / cm ³ or more is added is epitaxially grown. Subsequently, on this p-type epitaxial growth layer (p-type SiC region) 20, a silicon oxide film (S
An iO ₂ film is deposited by the CVD method, and an etching mask 21 corresponding to the p-type SiC region 2 is formed by an etching technique such as a well-known photolithography method and a reactive ion etching (RIE) method.

[0103] Next (b), using an etching mask 21 made of SiO ₂ film, the SF ₆ and O ₂ at the RIE method with the etchant gas, as shown in FIG. 3 (b), the unnecessary epitaxial layer except. Further, thereafter, the etching mask 21 made of the SiO ₂ film is entirely removed with hydrofluoric acid (HF) to form a p-type SiC region 22 having a mesa structure in which the element is isolated. Note that the p-type SiC region 22 has a power IGT
In the case where the p-type SiC region serves as a source region, it is opposed to the drain region 2 in the same manner (at the same time as the formation of the drain region 2) at another location on the surface of the SiC substrate 1. Are formed in a convex shape. In this case, an n-type SiC substrate or a π-type SiC substrate may be selected as the SiC substrate 1.

(C) And a silicon (Si) process
Using a predetermined cleaning method such as the RCA cleaning method known in
The C substrate 1 is sufficiently cleaned. RCA cleaning method is H_TwoO_Two+
NH _FourOH mixture (SC-1) and H_TwoO_Two+ HCl mixed solution
Traditional combination of immersion treatment by (SC-2)
This is a method for cleaning the semiconductor SiC substrate 1. And FIG.
As shown in (c), the sufficiently cleaned SiC substrate 1
The surface was dried at 1000 ° C to 1150 ° C in a dry oxygen atmosphere.
Thermally oxidized in an atmosphere to form a 5 to 40 nm thick thermal oxide film 3 on the surface
grow up. Instead of a dry oxygen atmosphere, steam
It may be used. In dry oxygen, atmosphere at 1150 ° C
By performing thermal oxidation for 3 hours, a thermal oxide film 3 having a thickness of 35 to 40 nm is obtained.
Can be 1150 ° C in a wet atmosphere using steam
Thermal oxidation for 2 hours, a thermal oxide film 3 of 30 to 35 nm is formed.
can get. A place for thermal oxidation of wet atmosphere using water vapor
In the case, after that, at 1150 ° C. for 30 minutes in argon (Ar)
Preferably, annealing is performed to a certain degree. 20n thermal oxide film 3
m or less, the oxidation temperature must be lowered or acid
It is only necessary to shorten the conversion time. Power IGT manufacturing process
If it thinks, S between the source region and the drain region 2
Gate oxidation of the thermal oxide film 3 formed on the surface of the iC substrate 1
It can also be used as a membrane.

(D) Next, as shown in FIG. 4D, an upper insulating film 4 made of a SiO ₂ film is deposited on the thermal oxide film 3 by a normal pressure CVD method to form a two-layer structure. A field insulating film 5 is formed. The total thickness of the field insulating film 5 obtained by adding the thickness of the thermal oxide film 3 and the thickness of the upper insulating film 4 is 600 n
It is desirable to set it to about m to 1.5 μm. If it is considered as a power IGT manufacturing process, the upper insulating film 4
The gate electrode may be formed before the deposition of. That is, after the thermal oxide film 3 is formed, a refractory metal such as W, Ti, or Mo, or a silicide thereof (WSi ₂ , TiSi
₂ , MoSi ₂ ) or the like is deposited on the thermal oxide film 3 by a sputtering method, a vacuum evaporation method, a CVD method, or the like. Then, the gate electrode material may be patterned using the photolithography method and the RIE method, and the gate electrode may be formed on the gate oxide film 3 between the source region and the drain region 2. Then, after forming the gate electrode, RC
The SiC substrate 1 is cleaned by A cleaning method or the like. An upper insulating film 4 made of a SiO ₂ film is deposited on the sufficiently cleaned gate electrode and thermal oxide film 3 by a normal pressure CVD method to form a field insulating film 5 having a two-layer structure.

(E) Next, a photoresist 22 having a thickness of 1 to 2 μm is applied to the surface of the field acid insulating film 5 using a spinner. Then, using a predetermined photomask (reticle), the photoresist 22 is selectively exposed to light and developed to remove a portion of the photoresist 22 corresponding to the opening 6. Then, this photoresist 2
Using the pattern No. 2 as an etching mask, the SiC substrate 1 is immersed in a BHF solution and wet-etched to form a field insulating film 5 as shown in FIG.
An opening 6 is formed in the opening. When forming the fine opening 6, dry etching using gas plasma is preferable. For example, various dry etchings such as RIE using CHF ₃ or C ₂ F ₆ as an etchant or electron cyclotron resonance ion etching (ECR ion etching) can be used. In this case, dry etching is performed first, and the field insulating film 5 is reduced to several tens of n.
When m is left, the mode is switched to wet etching. When the opening 6 is completely penetrated by dry etching, 1) the surface of the SiC substrate 1 is roughened by plasma damage due to excessive plasma energy. 2) Hydrocarbon which is a reaction product generated by the etching reaction is SiC. The adverse effect of re-adhering to the surface of the substrate 1 and contaminating the surface occurs, which is a major obstacle to the uniform formation of a heating reaction layer described later. Furthermore, this results in a dramatic increase in the contact resistance ρc, which is not preferable.

(F) Then, with the photoresist 22 serving as an etching mask remaining, the BHF solution is completely rinsed off with ultrapure water (rinsed) and then dried. Then, Si in a state where the resist mask 22 is applied
The C substrate 1 is quickly installed in the chamber of the vacuum evaporation apparatus, and is immediately evacuated. The exposure time in the air from contact window opening etching to evacuation is as follows:
This is a very important factor that determines the magnitude of the contact resistance ρc. If the exposure time in the air is long, a natural oxide film is generated on the surface of the SiC substrate 1 in the opening, or undesired foreign matter adheres. For this reason, it becomes a great obstacle to uniform formation of a heat reaction layer described later, and furthermore, the contact resistance ρc is drastically increased. Then, the chamber of the vacuum deposition apparatus is evacuated to a pressure of less than 1.3 × 10 ⁻⁵ Pa using a turbo molecular pump, a cryopump, or the like, and A is deposited on the surface of the SiC substrate 1 as shown in FIG.
An l-Ti-based electrode film 17 is deposited. As shown in FIG. 4F, in order to prevent the Al—Ti-based electrode film 17 from adhering to the side wall of the opening, the directivity of the deposition beam may be improved using an orifice or the like. .

(G) After vacuum deposition of the Al—Ti-based electrode film 17, the SiC substrate 1 is taken out of the chamber of the vacuum deposition apparatus. Subsequently, a substrate structure in which the Al—Ti-based electrode film 7 is selectively buried only in the opening is obtained as shown in FIG. That is, when the SiC substrate 1 is immersed in an organic solvent such as acetone or a dedicated photoresist stripper, and the photoresist 22 remaining on the surface of the SiC substrate 1 is completely removed, the photoresist 22 is removed.
Since the Al-Ti-based electrode film 17 deposited on the substrate is also removed together with the photoresist 22, the Al-Ti-based electrode film 27 is selectively left only in the opening as shown in FIG.

(H) Thereafter, the SiC substrate 1 is heated to 700 ° C.
Short time (about several minutes) in a non-oxidizing atmosphere at 〜１０1050 ° C.
When heat treatment is performed as shown in FIG.
The i-type electrode film 27 and the SiC substrate 1 react with each other to generate a heating reaction layer 8 in the interface region between the two, and the heating reaction layer 8
Excellent ohmic characteristics are realized with the type SiC.
In order to perform a heat treatment for a short time of about several minutes, an infrared ray (I
R) Lamp heating may be used. Here, the “non-oxidizing atmosphere” refers to an atmosphere that does not contain a gas of a compound containing oxygen such as oxygen (O ₂ ) or water (H ₂ O). In particular,
An ultra-high-purity inert gas atmosphere such as ultra-high-purity argon (Ar) or ultra-high-purity nitrogen (N ₂ ) or a high vacuum
It is suitable as a “non-oxidizing atmosphere”. If even a small amount of oxygen is contained in these heat treatment atmospheres,
Oxide and Ti oxides (= insulators) are formed, and the formation of the heat reaction layer is hindered. Therefore, strict control is required for controlling the partial pressures of oxygen and water. In particular,
The partial pressures of oxygen and water contained in the heat treatment atmosphere are at least about 1 × 10 ⁻³ Pa to 1 × 10 ⁻¹⁰ Pa, preferably 1. × is desirably 10 ^-5 Pa to 1 × about 10 ^-10 Pa. When heat treatment is performed in an ultra-high-purity inert gas atmosphere, strict control such as the use of a deoxidizer or a gas purifier is required in addition to baking of gas pipes and inspection of leaks. When heat treatment is performed in a high vacuum,
Al and Ti have a gettering action, strictly speaking, 1 × 1
Since the surface oxidizes even in a vacuum of about 0 ⁻⁸ Pa, the partial pressure of oxygen and water is reduced to 1 × 10
It is preferable to perform heat treatment under an ultra-high vacuum while controlling the pressure to about ^-8 Pa to 1 × 10 ⁻¹⁰ Pa. Al / Ti in which a Ti layer is deposited on an Al layer as the Al-Ti-based electrode film 27
In the laminated film, the lower Al layer before the heat treatment becomes the heat reaction layer 8 by the heat treatment. At this time, a Ti-Si alloy film is formed below the Ti layer before the heat treatment.
An electrode film 7 composed of a laminated film of an i-alloy film and an unreacted Ti film on the upper side is formed on the heat reaction layer 8. As the Al-Ti-based electrode film 27, Ti in which an Al layer is deposited on a Ti layer
In the / Al laminated film, the Ti layer before the heat treatment becomes the heat-reactive layer 8 by the heat treatment, and the Al layer before the heat treatment forms an Al-Si alloy film at a lower portion and an unreacted Al film remains at an upper portion. An electrode film 7 made of an Al—Si / Al layer is generated on the heat reaction layer 8. Al-Ti based electrode film 27
When an Al—Ti alloy film is used as the heat treatment, the lower Al—Ti alloy film before the heat treatment becomes the heat reaction layer 8 by the heat treatment, and an unreacted Al—Ti alloy film remains at the uppermost portion before the heat treatment. Further, at the boundary with the heating reaction layer 8, Al-T
Since an i-Si alloy film is generated, Al-Ti-Si /
An electrode film 7 made of an Al—Ti layer is generated on the heat reaction layer 8. As thermal reaction layer 8, a solid solution containing metal carbide and metal silicon is formed.

(I) After the formation of the heating reaction layer 8, FIG.
As shown in (i), a conductor film 19 such as Al is deposited on the entire surface of the SiC substrate 11. Then, patterning is performed by a photolithography method and an etching technique such as RIE to form the wiring conductor element 9 as shown in FIG.
The ohmic electrode structure according to the embodiment is completed.
If the wiring conductor piece 9 is a drain electrode wiring (main electrode wiring), similarly, the source electrode wiring (main electrode wiring is connected to the source region arranged opposite to the drain region 2). (The ohmic electrode on the source electrode side can be formed simultaneously with the drain electrode side in exactly the same process.) The etchant (= etching solution or etching gas) used for patterning is Al-. When the Ti-based electrode film 7 is affected, the conductor film 19 of Al or the like may be provided so as to cover the Al-Ti-based electrode film 7 without fail.

In order to strictly evaluate the effect of the ohmic electrode structure according to the first embodiment of the present invention, the contact resistance ρc was measured using a linear transmission line model (linear TLM) evaluation method. In the linear TLM evaluation method, first, a rectangular element isolation region (here, an n-type region)
A linear TLM contact group having a structure in which rectangular contacts are arranged in a horizontal row while changing the contact interval in the long side direction is prepared. Then, a resistance is obtained from a current-voltage characteristic between two adjacent contacts. Linear TLM
In the evaluation method, this resistance is arranged as a function of the contact interval, which is linearly approximated and subjected to mathematical processing to finally obtain a strict contact resistance ρc.

The composition of the sample evaluated was as follows. p
The thickness of the epitaxial layer and the impurity density are 80
0 nm, 1.2 × 10¹⁹/ Cm^Three(Al-doped)
You. The Al—Ti-based electrode film 7 is made of Ti (50 nm thick) / Al
(Thickness: 300 nm). field
The thermal oxide film 3 constituting the insulating film 5 is made of dry acid at 1100 ° C.
Film (10 nm thick), and the upper insulating film 4 thereon is
SiO deposited by CVD _TwoIt is a film (400 nm thick).
Heat treatment temperature and heat treatment for forming heat reaction layer 8
And heat treatment atmosphere were 1000 ° C. for 5 minutes, pure Ar
Atmosphere. Contacts that make up the TLM pattern
Are 200 μm and 100 μm, respectively.
μm, contact interval L = 6, 10, 15, 20, 2
5, 30 μm.

FIG. 6 shows current-voltage characteristics between adjacent contact electrodes using the contact interval as a parameter. Since a straight line passing through the origin is obtained, TL
It can be seen that ohmic contacts are obtained with all the electrodes constituting the M pattern. FIG. 7 is a plot of the relationship between the resistance and the distance between the contact electrodes obtained from the inclination of the straight line in FIG. Data has little variation 1
Linear approximation and contact resistance ρc =
9.5 × 10 ⁻⁷ Ωcm ² is obtained. Under the same other conditions, instead of the Ti / Al laminated electrode film, Al (150
When a laminated electrode film of (nm thickness) / Ti (15 nm thickness) is used, ρc = 7.0 × 10 ⁻⁶ Ωcm ² is obtained. Also,
When an Al-Ti alloy is used, ρc = 9.0 × 10 ⁻⁶
Ωcm ² is obtained.

In the method of manufacturing the ohmic electrode structure according to the first embodiment of the present invention, the heat treatment temperature is 90
0 ° C. or higher is preferred. According to the measurement of the contact resistance ρc using the TLM pattern composed of the Ti / Al laminated electrode film, ρc = 1.2 × 1 at the heat treatment temperature of 700 ° C.
At 0 ⁻² Ωcm ² and a heat treatment temperature of 800 ° C., ρc = 1.3
× 10 ⁻³ Ωcm ² , at a heat treatment temperature of 900 ° C., ρc =
4.3 × 10 ⁻⁶ Ωcm ² , heat treatment temperature 1000 ° C.
Then, as described above, ρc = 9.5 × 10 ⁻⁷ Ωcm ²
Is obtained.

In the measurement of the contact resistance ρc using the Ti / Al laminated electrode film, the thickness of the Al
00 nm, Ti was set to 10 nm, 20 nm, 5
When the contact resistance ρc is changed to 0 nm or 100 nm, the contact resistance ρc is the lowest at 100 nm, increases (deteriorates) by one digit at 50 nm, and gradually increases to 20 nm and 10 nm. Therefore, the thickness of Ti is preferably 50 nm or more. More preferably, a value of 100 nm to 300 nm is preferably selected.

As described above, the ohmic electrode structure according to the first embodiment of the present invention achieves a practical contact resistance ρc of 10 ⁻⁶ Ωcm ² or less.
As a result, the problem in the prior art of the SiC electronic device that the contact resistance ρc in the ohmic contact to the p-type SiC is high or cannot be applied to the production of an actual SiC electronic device with a simplified configuration is solved. I have.

(Second Embodiment) The characteristic of the ohmic electrode structure according to the second embodiment of the present invention shown in FIG. 8 is that p-type SiC
This is the point that the region 32 is configured. That is, the ohmic electrode structure according to the second embodiment of the present invention includes a SiC substrate 1 and a p-type Si selectively formed on the surface of the SiC substrate 1.
C region 32, heat reaction layer 8 formed on part of the surface of p-type SiC region 32, thermal oxide film 3 covering the interface between SiC substrate 1 and p-type SiC region 32, At least the upper insulating film 4 disposed and the electrode film 7 disposed on the heating reaction layer 8 are provided. p-type SiC region 32
Functions as a main electrode region of a semiconductor device, particularly a semiconductor electronic device.

The field insulating film 5 has a laminated structure of the thermal oxide film 3 and the upper insulating film 4. Further, the field insulating film 5 is electrically connected to the electrode film 7.
A wiring conductor piece 9 is formed on the top. The wiring conductor piece 9 is a wiring member for connecting the ohmic contact shown in FIG. 8 to another portion, and functions as a main electrode wiring of the semiconductor device. Therefore, depending on the design, the wiring conductor piece 9 may be a main electrode wiring connected to a predetermined bonding pad. This wiring conductor element 9 includes well-known Al,
Al-Si eutectic, Al-Cu-Si eutectic, Cu, Ti-
W alloy or the like is used.

The heat reaction layer 8 is formed so as to enter from a part of the surface of the p-type SiC region 32 and at the same time to protrude upward from the surface of the p-type SiC region 32. The thermal oxide film 3 has a first opening through which the heat reaction layer 8 penetrates,
Further, it is arranged in contact with the surfaces of SiC substrate 1 and p-type SiC region 32 so as to cover the interface between SiC substrate 1 and p-type SiC region 32. The upper insulating film 4 is an insulating film having a different composition or density from the thermal oxide film 3 and has a second opening continuous with the first opening. As shown in FIG. 8, the uppermost position of the electrode film 7 exists inside the second opening. The first and second openings constitute a common opening 6.

As defined in the first embodiment of the present invention, in the ohmic electrode structure according to the second embodiment, "an insulating film having a composition different from that of the thermal oxide film 3"
An insulating film such as an SG film, BSG, BPSG, or Si ₃ N ₄ film. The “insulating film having a density different from that of the thermal oxide film 3” corresponds to an insulating film such as a SiO ₂ film deposited by a method other than the thermal oxide film, for example, a CVD method, a sputtering method, or a vacuum evaporation method. . Thermal oxide film 3 of SiC shown in FIG.
Is inferior to the Si thermal oxide film, but close to the Si thermal oxide film.
It is an iO ₂ film. Thermal oxide film and other deposited S
Since the density is different from that of the iO ₂ film, a boundary is visible when the cross section is observed with a high-resolution SEM. The thermal oxide film 3 of SiC and the upper insulating film 4 can be clearly distinguished by measuring the breakdown electric field strength, the etching rate with respect to a BHF solution, the infrared absorption spectrum, and the Raman spectrum.

It is desirable that the thickness of thermal oxide film 3 is 2 to 50 nm. In particular, the thermal oxide film 3 in the range of 5 to 20 nm
Is desirable. As described in the first embodiment, when the thickness of the thermal oxide film 3 is less than 5 nm, the effect of removing the damaged region on the surface of the SiC substrate 1 caused by the surface polishing or the ion implantation method and the removal of foreign matter on the surface are reduced. The removal effect is poor. On the other hand, if the thickness of the thermal oxide film 3 is larger than 50 nm, the surface of the SiC substrate 1 is gradually roughened due to excessive thermal oxidation, and the surface morphology is reduced.

The total thickness of the field insulating film 5 obtained by adding the thickness of the thermal oxide film 3 and the thickness of the upper insulating film 4 is 100 nm to 100 nm.
It is desirable that the thickness be 3 μm. In particular, it is desirable that the thickness be 300 nm or more. In the case of a power semiconductor device having a high withstand voltage, the thickness may be 800 nm or more. However, if the thickness of the field insulating film 5 is too large, cracks and the like occur, so that the thickness of 3 μm or more is not preferable.

If a laminated structure in which an upper insulating film 4 such as various SiO ₂ films other than the SiC thermal oxide film shown in FIG. 8 is formed on the SiC thermal oxide film 3 is adopted, The surface morphology of SiC can be favorably maintained while ensuring the pressure resistance and surface stability required as specifications.

The electrode film 7 shown in FIG. 8 is made of a metal containing at least one of Al and Ti disposed above the heat reaction layer 8 in the second opening of the upper insulating film 4. As described in the first embodiment, this “A
The electrode film 7 made of a metal containing at least one of l and Ti includes a laminated film including a lower Ti-Si alloy film and an upper Ti film, and a lower Al-Si alloy film and an upper Al film. It is preferable to use one of a stacked film and a stacked film including a lower Al-Ti-Si alloy film and an upper Al-Ti alloy film. Further, thermal reaction layer 8 is preferably a solid solution containing metal carbide and metal silicon. The heat reaction layer 8 made of a solid solution containing a metal carbide and metal silicon makes the Schottky barrier in the metal / semiconductor junction extremely low, improves the morphology of the interface, and consequently makes the heat reaction layer 8 uniform. Is determined to be generated. Ti / Al laminated film or Al / Ti
The Al film, which is one element of the laminated film, can be replaced with an Al-Si eutectic film which is frequently used in wiring of Si semiconductor electronic devices.

As shown in FIG. 8, a p-type Si having a high surface carrier (hole) density is formed on the surface of the SiC substrate 1.
C region 32 is formed. The ion implantation method has an advantage that the p-type SiC region 32 having a higher impurity density can be formed than the epitaxial p-type SiC region 2 according to the first embodiment. The surface carrier density (surface hole density) of the p-type SiC region 32 is at least 1 × 10 ¹⁷ / cm ^3.
As described above, it is desirable that the density be 1 × 10 ¹⁸ / cm ³ or more.

The conductivity type and impurity density of the SiC substrate 1 differ depending on the design specifications of the semiconductor device using the ohmic electrode structure according to the second embodiment of the present invention. Furthermore,
Another semiconductor region having a larger plane area and a larger diffusion depth than the p-type SiC region 32 on the surface of the SiC substrate 1 is arranged in a well shape, and the p-type SiC region 32 is formed on the inner surface thereof. good. For example, in the case of a pnp-type bipolar transistor, a base region made of an n-type SiC region is formed on the surface of a p-type SiC substrate 1 serving as a collector region,
A p-type S as an emitter region is provided inside the base region.
The iC region 32 may be formed. In this case, an intrinsic semiconductor (i-type) SiC substrate 1 is used instead of the low impurity density p-type SiC substrate 1 serving as a collector region, and a high impurity density P
A collector region composed of a type SiC region may be formed.

In the case of a thyristor such as a GTO thyristor, the surface of a p-type SiC substrate 1 serving as a p base region is provided with n
It is possible to form an n base region composed of a type SiC region, and form a p type SiC region 32 as an anode region inside the n base region. In this case, an n-type SiC region as a cathode region is formed on the back surface of p-type SiC substrate 1 serving as a p-base region. On the other hand, in an n-channel junction FET or junction SIT, a p-type source region is formed on the surface of an n-type SiC substrate 1 functioning as a channel region.
The type SiC region 32 can be formed. In the case of an n-channel SI thyristor, n
P-type S as an anode region
The iC region 32 can be formed.

In a p-channel power IGT, a p-type SiC region 32 as a drain region can be formed on the surface of a p-type SiC substrate 1 functioning as a drift region.
In this case, the p-type SiC region 32 as a source region is
It is formed in an n-body region formed on the surface of p-type SiC substrate 1. In an n-channel IGBT, an n-type SiC substrate (or a ν-type SiC substrate) functioning as a drift region
A p-type SiC region 32 having a high impurity density as a collector region can be formed on the surface of the substrate 1. In this case, the other n-type SiC region as an emitter region is n-type (or ν
(Type) It is formed in a p-body region formed on the surface of the SiC substrate 1. The ohmic electrode structure according to the second embodiment of the present invention is applicable to the p-type SiC region 32 functioning as a main electrode region of these various semiconductor electronic devices.

Next, the manufacturing process of the ohmic electrode structure according to the second embodiment of the present invention will be described with reference to the process sectional views (Nos. 1 to 3) shown in FIGS.

(A) First, SiO _{2 having} a thickness of about 1.5 μm
A film 33 is deposited on the entire surface of the 4H-SiC substrate 1 by a CVD method, and a photoresist 34 is spin-coated thereon. Then, as shown in FIG. 9A, the SiO ₂ film 33 deposited on the region where the p-type SiC region is to be formed is selectively removed by a well-known photolithography method and a wet etching technique. 33 are formed.

(B) Then, as shown in FIG.
On the ion implantation mask film 33, a thin S
iO_TwoIon implantation through film 35 consisting of a film is deposited on the entire surface
I do. The ion implantation through film 35 is used for ion implantation described later.
Projected range (depth) R_pIt is a membrane for adjusting. I
After depositing the on-implantation through film 35, the entire surface of the SiC substrate 1 is
To²⁷Al⁺And¹¹B⁺P-type impurities such as (boron)
Is turned on, at least the impurity density on the surface of the SiC substrate 1 is reduced.
1 × 10²⁰/ Cm^ThreeThe above, and of the SiC substrate 1
Ions are implanted so as not to lose crystallinity. p-type impurity
As an ion ²⁷Al⁺Into the SiC substrate 1
As an example of the conditions for the introduction, the heating was performed at 750 ° C.
A dose amount Φ / acceleration energy is applied to the SiC substrate 1 as follows.
ー E_ACImplantation at different stages: First ion implantation Φ = 0.9 × 10^Fifteencm^-2/ E_AC= 3
0 KeV; second ion implantation Φ = 51.2 × 10^Fifteencm^-2/ E_AC=
60 KeV; third ion implantation Φ = 1.5 × 10^Fifteencm^-2/ E_AC= 1
00 KeV; fourth ion implantation Φ = 2.4 × 10^Fifteencm^-2/ E_AC= 1
50 KeV; fifth ion implantation Φ = 3.0 × 10^Fifteencm^-2/ E_AC= 1
90 KeV.

(C) When the five-stage multi-stage ion implantation is completed, the ion implantation mask film 33 and the ion implantation through film 35 are entirely removed with hydrofluoric acid (HF). And normal pressure A
When a rapid heat treatment at 1700 ° C. for 1 minute is performed in an r atmosphere, ion-implanted ²⁷ Al ⁺ is activated, and FIG.
As shown in FIG. 3, a p-type SiC region 3 having a high impurity density
2 are selectively formed.

(D) The subsequent steps are almost the same as the steps shown in FIG. 3C and thereafter described in the manufacturing steps of the first embodiment. That is, the SiC substrate 1 is sufficiently cleaned by using the SiC substrate 1 cleaning method such as the RCA cleaning method. And
As shown in FIG. 10D, the surface of the sufficiently cleaned SiC substrate 1 is thermally oxidized in a dry oxygen atmosphere, and a thermal oxide film 3 having a thickness of 5 to 20 nm is grown on the surface.

(E) Next, as shown in FIG.
An upper insulating film 4 made of a SiO ₂ film is deposited on the thermal oxide film 3 by a normal pressure CVD method to form a field insulating film 5 having a two-layer structure.

(F) Next, a photoresist 22 having a thickness of 1 to 2 μm is applied to the surface of the field acid insulating film 5 using a spinner. Then, using a predetermined photomask (reticle), the photoresist 22 is selectively exposed to light and developed to remove a portion of the photoresist 22 corresponding to the opening 6. Then, this photoresist 2
Using the pattern No. 2 as an etching mask, the SiC substrate 1 is immersed in a BHF solution and wet-etched to form a field insulating film 5 as shown in FIG.
An opening 6 is formed in the opening.

(G) Thereafter, with the photoresist 22 serving as an etching mask remaining, the substrate is completely rinsed with ultrapure water and then dried. Then, the resist mask 22
Is mounted in a chamber of a vacuum evaporation apparatus and immediately evacuated. Then, the chamber of the vacuum deposition apparatus was evacuated to a pressure of less than 1.3 × 10 ⁻⁵ Pa by a turbo molecular pump, a cryopump, or the like, and the AlC was deposited on the surface of the SiC substrate 1 as shown in FIG. -Deposit the Ti-based electrode film 17.

(H) After vacuum deposition of the Al—Ti-based electrode film 17, the SiC substrate 1 is taken out of the chamber of the vacuum deposition apparatus. Subsequently, using a lift-off method, as shown in FIG. 11H, a substrate structure in which the Al—Ti-based electrode film 7 is selectively embedded only in the opening is obtained. That is, when the photoresist 22 is completely removed, as shown in FIG.
The Al-Ti-based electrode film 7 selectively remains only in the opening.

(I) After that, the SiC substrate 1 is heated to 700 ° C.
When a heat treatment is performed for a short time (about several minutes) in a non-oxidizing atmosphere at a temperature of 〜１０1050 ° C., as shown in FIG.
The i-based electrode film and the SiC substrate 1 react with each other to generate a heating reaction layer 8 in an interface region between the two. At this time, the partial pressure of oxygen and water contained in the heat treatment atmosphere is at least 1 × 1
It is controlled to about 0 ⁻³ Pa to 1 × 10 ⁻¹⁰ Pa. As a result, excellent ohmic characteristics are realized between the heat reaction layer 8 and the p-type SiC region 32. Al-Ti based electrode film 27
In an Al / Ti laminated film in which a Ti layer is deposited on an Al layer, the lower Al layer before the heat treatment becomes the heat reaction layer 8 by the heat treatment. At this time, the Ti layer before the heat treatment
A Ti—Si alloy film is generated below, and an electrode film 7 composed of a laminated film of the Ti—Si alloy film and an unreacted Ti film above is generated on the heating reaction layer 8. Ti / A in which an Al layer is deposited on a Ti layer as the Al-Ti based electrode film 27
In the 1-layer film, the Ti layer before the heat treatment becomes the heat reaction layer 8 by the heat treatment, and the Al layer before the heat treatment
Since an -Si alloy film is generated and an unreacted Al film remains on the upper portion, an electrode film 7 made of an Al-Si / Al layer is generated on the heat reaction layer 8. When an Al-Ti alloy film is used as the Al-Ti-based electrode film 27, the lower Al-Ti alloy film before the heat treatment becomes the heat reaction layer 8 by the heat treatment, and the unreacted Al is formed on the uppermost portion before the heat treatment. -A Ti alloy film remains. Further, at the boundary with the heating reaction layer 8, Al-Ti
-Si alloy film is formed, so that Al-Ti-Si / A
An electrode film 7 made of an l-Ti layer is generated on the heat reaction layer 8. As thermal reaction layer 8, a solid solution containing metal carbide and metal silicon is formed. After the formation of the heat reaction layer 8, a conductor film 19 of Al or the like is deposited on the entire surface of the SiC substrate 11, as in FIG. 5 (i) described in the first embodiment. Then, by patterning by a photolithography method and an etching technique such as RIE to form the wiring conductor element 9 as shown in FIG. 8, the ohmic electrode structure according to the second embodiment of the present invention is completed. .

In order to precisely evaluate the effect of the ohmic electrode structure according to the second embodiment of the present invention, a linear TLM contact group similar to the first embodiment was manufactured. The structure of the evaluated sample is as follows. p-type SiC
The doping density of the impurity Al in the region 32 (= ion implantation layer) is 3 × 10 ²⁰ / cm ^{3 in the} vicinity of contact with the heat reaction layer 8.
It is. Other conditions are the same as those of the ohmic electrode structure according to the first embodiment. That is, the Al—Ti-based electrode film 7 is a Ti (50 nm thick) / Al (300 nm thick) laminated film, the thermal oxide film 3 of the field insulating film 5 is a 1100 ° C. dry oxide film (10 nm thick), and the upper insulating film 4 is Atmospheric pressure CVD
Is a SiO ₂ film (400 nm thick). The heat treatment temperature, heat treatment time, and heat treatment atmosphere for forming the heat reaction layer 8 were 1000 ° C. for 5 minutes, respectively, and a pure Ar atmosphere.

Contact resistance ρ obtained by TLM method
c was ρc = 4.3 × 10 ⁻⁷ Ωcm ² . It is considered that the reason why the value lower than that of the first embodiment was obtained is that a high impurity density was obtained by high dose ion implantation and effective activation annealing. That is, high impurity density p-type S
Due to the presence of the iC region 32, the heat reaction layer 8 and the p-type SiC
It is considered that the Schottky barrier at the interface of the region 32 became thinner. With the other conditions being the same, this Ti / Al
Instead of the laminated electrode film, an Al-Ti alloy film (400 nm
When a p-type ohmic contact is formed with a thickness of 10% (Ti: 10%), it is several times higher than the Ti / Al laminated electrode film, but lower than that of the prior art: ρc = 1.2 × 10 ⁻⁶ Ωc
m ² is obtained.

As described above, according to the ohmic electrode structure according to the second embodiment of the present invention, a practical contact resistance ρc of 10 ⁻⁶ Ωcm ² or less can be achieved. As a result, a low contact resistance ρc can be obtained inside a fine opening (contact window) that can be adopted in an actual device structure, and a high-performance SiC electronic device can be easily manufactured with a simplified configuration. Can be manufactured.

(Third Embodiment) In the ohmic electrode structure according to the third embodiment of the present invention shown in FIG. 12, the planar size of the electrode film 47 is larger than the opening, and overlaps the field insulating film 5. The arrangement is different from the ohmic electrode structures according to the first and second embodiments.

The p-type SiC region 32 may be constituted by a SiC region composed of a p-type epitaxial growth layer having a high impurity density as in the first embodiment, or may be selectively ion-implanted as in the second embodiment. It may be composed of regions. Here, an example of formation by an ion implantation method will be described. As in the first and second embodiments, the p-type SiC region 32 functions as a main electrode region of a semiconductor device, particularly a semiconductor electronic device.

As shown in FIG. 12, the ohmic electrode structure according to the third embodiment of the present invention comprises an SiC substrate 1,
P-type SiC region 32 selectively formed on the surface of SiC substrate 1, heat reaction layer 8 formed on a part of the surface of p-type SiC region 32, SiC substrate 1 and p-type SiC region 32
And at least an upper insulating film 4 disposed on the surface of the thermal oxide film 3 and an electrode film 47 disposed on the heating reaction layer 8. The field insulating film 5 is constituted by a laminated structure of the thermal oxide film 3 and the upper insulating film 4. The thermal oxide film 3 is formed by the first
SiC substrate 1 and p-type SiC region 3
SiC substrate 1 and p-type SiC region 32 are arranged so as to cover the interface with SiC substrate 2. Upper insulating film 4
Is an insulating film having a different composition or density from the thermal oxide film 3, and has a second opening continuous with the first opening.

The heat reaction layer 8 is formed so as to enter the inside from a part of the surface of the p-type SiC region 32 and project upward from the surface of the p-type SiC region 32. Then, an electrode film 47 disposed on the heating reaction layer 8 extends from the second opening and overlaps with the upper part of the field insulating film 5 located around the second opening. That is, A
The electrode film 47 is formed in a planar pattern larger than the second opening so as to completely seal the second opening. Further, the wiring conductor element 9 is formed so as to be electrically connected to the electrode film 47 completely sealing the second opening. The wiring conductor piece 9 functions as a main electrode wiring of the semiconductor device. Therefore, depending on the design, the wiring conductor piece 9 may be a main electrode wiring connected to a predetermined bonding pad. This wiring conductor piece 9 is formed of the field insulating film 5.
Al, Al-Si eutectic, Al-Cu-Si eutectic,
It is formed of a conductive material such as Cu and Ti-W alloy.

The electrode film 47 shown in FIG.
This is a laminated film including a Si alloy film and an unreacted Al film on the upper part. According to the AES measurement, the Ti / Al laminated film
When heat-treated at 00 ° C. for 2 minutes, the heating reaction layer 8
It can be estimated that the solid solution contains TiC and metallic silicon. The heat reaction layer 8 made of a solid solution containing TiC and metal silicon makes the Schottky barrier in the metal / semiconductor junction extremely low and improves the morphology of the interface. As a result, the heat reaction layer 8 is uniformly formed. It is determined that it can be done. The Al film as the upper layer of the Ti / Al laminated film deposited before the heat treatment can be replaced with an Al-Si eutectic film frequently used in wiring of a Si semiconductor electronic device. In this case, the electrode film 47 is composed of a lower Al-Si alloy film and an upper unreacted Al-Si alloy film.
Alloy film having a distribution in the composition of

It should be noted that Al melts at a high temperature of 660 ° C. or higher, and the adhesion and wettability with the field insulating film 5 are significantly reduced. Therefore, in the third embodiment, Al , Al /
The Ti laminated electrode is not suitable as an electrode material serving as a raw material for forming the heat reaction layer 8.

As defined in the first embodiment of the present invention, in the ohmic electrode structure according to the third embodiment, "an insulating film having a composition different from that of the thermal oxide film 3"
An insulating film such as an SG film, BSG, BPSG, or Si ₃ N ₄ film. The “insulating film having a density different from that of the thermal oxide film 3” corresponds to an insulating film such as a SiO ₂ film deposited by a method other than the thermal oxide film, for example, a CVD method, a sputtering method, or a vacuum evaporation method. . The thickness of the thermal oxide film 3 is 2 to 50 nm
It is desirable that In particular, the thickness of the thermal oxide film 3 in the range of 5 to 20 nm is desirable. As described in the first embodiment, when the thickness of the thermal oxide film 3 is less than 5 nm, the effect of removing a damaged region on the surface of the SiC substrate 1 caused by surface polishing or ion implantation and the removal of foreign matter on the surface are removed. Effect is poor. On the other hand, if the thickness of the thermal oxide film 3 is more than 50 nm, the surface of the SiC substrate 1 is gradually roughened due to excessive thermal oxidation, and the surface morphology is reduced. It is desirable that the total thickness of the field insulating film 5 obtained by adding the thickness of the thermal oxide film 3 and the thickness of the upper insulating film 4 is 100 nm to 3 μm. In particular, it is desirable that the thickness be 300 nm or more. If the power semiconductor device has a high withstand voltage, 800
nm or more. However, if the thickness of the field insulating film 5 is too large, cracks and the like occur, so that the thickness of 3 μm or more is not preferable.

If a laminated structure in which an upper insulating film 4 such as various SiO ₂ films other than the SiC thermal oxide film as shown in FIG. The surface morphology of SiC can be favorably maintained while ensuring the pressure resistance and surface stability required as specifications.

The surface hole density of the p-type SiC region 32 is at least 1 × 10 ¹⁷ / cm ³ , preferably 1 × 10 ¹⁷ / cm ³ or more.
It is desirable to be ¹⁸ / cm ³ or more. The conductivity type and impurity density of the SiC substrate 1 differ depending on the semiconductor device using the ohmic electrode structure according to the third embodiment. For example, similarly to the application example of the ohmic electrode structure according to the second embodiment, a p-type SiC region 32 functioning as a main electrode region of various semiconductor electronic devices is formed by using a conductive material selected according to the design. It can be formed (directly or through another semiconductor region) on the SiC substrate 1 having a mold and an impurity density. Therefore, the conductivity type and impurity density of the SiC substrate 1 are not specified here.

Next, the manufacturing process of the ohmic electrode structure according to the third embodiment of the present invention will be described with reference to the process sectional views (Nos. 1 and 2) shown in FIGS.

(A) Just like the method described in the second embodiment, the p-type SiC region 32 is formed on the 4H-SiC substrate 1 by photolithography, ion implantation, or the like.
Selectively formed on the surface of That is, p-type impurity ions such as Al ions or B ions are implanted into the surface of the SiC substrate 1 and activated by a heat treatment, so that the p-type SiC region 32
To form The surface of the sufficiently cleaned SiC substrate 1 is thermally oxidized in a dry oxygen atmosphere in substantially the same manner as in the steps after FIG. 10D described in the manufacturing process of the second embodiment. An oxide film 3 is grown. Next, FIG.
As shown in FIG. 1A, an upper insulating film 4 made of a SiO ₂ film is deposited on a thermal oxide film 3 by a normal pressure CVD method to form a field insulating film 5 having a two-layer structure.

(B) Next, a photoresist 22 having a thickness of 1 to 2 μm is applied to the surface of the field acid insulating film 5 using a spinner. Then, using a predetermined photomask (reticle), the photoresist 22 is selectively exposed to light and developed to remove a portion of the photoresist 22 corresponding to the opening 6. Then, this photoresist 2
Using the pattern No. 2 as an etching mask, the SiC substrate 1 is immersed in a BHF solution and wet-etched to form a field insulating film 5 as shown in FIG.
An opening 6 is formed in the opening.

(C) Thereafter, the photoresist 22 used for the etching is removed by using acetone or a dedicated photoresist removing solution. Subsequently, the SiC substrate 1 is
By dipping in the solution for about 10 seconds and slightly etching the field insulating film 5, the residue of the photoresist 22 attached to the field insulating film 5 is completely removed. The residue of the photoresist 22 remaining on the field insulating film 5 is as follows.
Electrode film 4 disposed so as to overlap field insulating film 5
This step is indispensable because the adhesive strength of the field insulating film 7 (or 17, 57) to the field insulating film 5 is significantly reduced.
Rinse the BHF solution completely with ultrapure water and dry the Si
The C substrate 1 is promptly installed in the chamber of the vapor deposition apparatus, and immediately evacuated. When a predetermined ultimate pressure is obtained, the Al—Ti-based electrode film 1 is formed inside the opening 6 and over the entire surface of the field insulating film 5 as shown in FIG.
7 as a 50 nm thick Ti layer and 300 n above it
A Ti / Al laminated film composed of an Al layer having a thickness of m is deposited. In order to improve the step coverage in the opening 6,
Unlike the first and second embodiments, it is preferable to employ an oblique deposition method.

(D) T as Al—Ti-based electrode film 17
After vacuum deposition of the i / Al laminated film, the SiC substrate 1 is taken out of the chamber of the vacuum deposition apparatus. Subsequently, on the surface of the Al—Ti-based electrode film (Ti / Al laminated film) 17,
A μm photoresist 23 is applied using a spinner. Then, by selectively exposing and developing the photoresist 23 using a predetermined photomask (reticle), as shown in FIG. 14D, the opening 23 and the peripheral portion of the field insulating film 5 are removed. The photoresist 23 is selectively left only on the upper part of the portion.

(E) Subsequently, as shown in FIG. 14 (e), using the pattern of the photoresist 23 as an etching mask, only the opening and a part of the upper part of the field insulating film 5 in the peripheral portion thereof are Al- Except for the Ti-based electrode film 57, the remaining portion of the Al-Ti-based electrode film 17 is removed. The etching may be wet etching or dry etching. Phosphoric acid (H ₃ PO ₄ ): nitric acid (HNO ₃ ): acetic acid (CH ₃ CO) as an etchant for wet etching
OH) mixed solution can be used. As an etchant gas for dry etching, a mixed gas of chlorine (Cl ₂ ): boron tribromide (BBr ₃ ) can be used.
After the etching is completed, the substrate is immersed in a dedicated photoresist stripper, rinsed and dried. After drying, it is subjected to an oxygen plasma incinerator, followed by an Ar sputter etcher,
Al-Ti based electrode film 57 generated by ashing of photoresist
The oxide film on the surface of is completely removed.

(F) Thereafter, the SiC substrate 1 is heated to 700 ° C.
When heat treatment is performed for a short time (about several minutes) in a non-oxidizing atmosphere at 1050 ° C., as shown in FIG.
The i-type electrode film 57 and the p-type SiC region 32 react with each other to generate a heating reaction layer 8 in an interface region between the two. At this time, the partial pressure of oxygen and water contained in the heat treatment atmosphere is controlled to at least about 1 × 10 ⁻³ Pa to 1 × 10 ⁻¹⁰ Pa. As a result, excellent ohmic characteristics are realized between the heat reaction layer 8 and the p-type SiC region 32. Al-Ti
As the system electrode film 57, T in which an Al layer is deposited on a Ti layer
In the i / Al laminated film, mainly, the Ti layer before the heat treatment becomes the heat reaction layer 8 by the heat treatment. On the other hand, A before heat treatment
In the 1-layer, an Al-Si alloy film is generated in a lower portion, and an unreacted Al film remains in an upper portion. Therefore, an electrode film 7 made of an Al-Si / Al layer is generated on the heat-reactive layer 8. As thermal reaction layer 8, a solid solution containing metal carbide and metal silicon is formed.

(G) Finally, as in the first and second embodiments, a conductor film such as Al is deposited on the entire surface of the SiC substrate 1 and patterned by photolithography and etching to form a wiring conductor. The element piece 9 is formed, and the p-type Si shown in FIG.
An ohmic electrode structure for the C region 32 is completed.
Note that, when an etchant (= etching solution or etching gas) for wiring pattern attacks the electrode film 47, the wiring conductor piece 9 is always disposed so as to cover the electrode film 47.

In order to accurately evaluate the effect of the ohmic electrode structure according to the third embodiment of the present invention, a linear T
An LM contact group was produced. p-type SiC region 32 (=
The doping density of the impurity Al in the ion-implanted layer) is 3 × 10 ²⁰ / cm ³ in the vicinity of being in contact with the heating reaction layer 8. The temperature of the thermal oxide film 3 constituting the field insulating film 5 is 1100 ° C.
Dry oxide film (10 nm thick), upper insulating film 4 is normal pressure CV
D is a SiO ₂ film (400 nm thick). A heat treatment temperature and a heat treatment time for forming the heat reaction layer 8;
The heat treatment atmosphere was a pure Ar atmosphere at 1000 ° C. for 5 minutes.

Contact resistance ρ obtained by TLM method
As for c, ρc = 6.4 × 10 ⁻⁷ Ωcm ^2, which is almost the same value as in the case of the Ti / Al laminated electrode of the second embodiment.

(Other Embodiments) As described above, the present invention has been described with reference to the first to third embodiments.
The discussion and drawings that form part of this disclosure should not be understood as limiting the invention. From this disclosure, various alternative embodiments, examples, and operation techniques will be apparent to those skilled in the art.

In the manufacturing processes of the first to third embodiments, the thermal oxide film 3 which is a component of the field insulating film 5 is formed immediately before the upper insulating film 4 is formed. As shown in the process cross-sectional view of FIG. 15, substantially the same effect can be obtained even when the thermal oxide film is formed immediately after the upper insulating film 4 is formed.

(A) For example, the p-type SiC region 32 is formed on the surface of the SiC substrate 1 by the same method as that described in the second embodiment. Then, the SiC substrate 1 is sufficiently cleaned by using a SiC substrate 1 cleaning method such as an RCA cleaning method. Thereafter, as shown in FIG. 15A, an oxygen-permeable insulating film 44 such as a SiO ₂ film is deposited on the SiC substrate 1 by a normal pressure CVD method.

(B) After depositing the oxygen-permeable insulating film 44, as shown in FIG.
The surface of the SiC substrate 1 is thermally oxidized to form an oxygen-permeable insulating film 44.
A thermal oxide film 3 is grown on the interface between the substrate and the SiC substrate 1. First
As in the first embodiment, the thickness of the thermal oxide film 3 is less than 50 nm, preferably 5 to 20 nm. As a result, an oxygen-permeable insulating film (SiO ₂ film) 44 is formed on the thermal oxide film 3.
The upper insulating film 4 is formed, and a field insulating film 5 having a two-layer structure is formed.

(C) Thereafter, it is possible to proceed with the same steps as those in the method shown in FIG. 10 (f) and thereafter described in the second embodiment. That is, as shown in FIG. 15C, a photoresist 22 having a thickness of 1 to 2 μm is applied to the surface of the field acid insulating film 5 using a spinner. Then, using a predetermined photomask (reticle), the photoresist 22 is selectively exposed to light and developed to remove a portion of the photoresist 22 corresponding to the opening 6. Subsequently, the pattern of the photoresist 22 is used as an etching mask and wet-etched to form the field insulating film 5 as shown in FIG.
An opening 6 is formed in the opening. The subsequent description is omitted because it is redundant.

Even when the method shown in FIG. 15 is used, 10 ^-6 Ωc
It is possible to achieve a practical contact resistance ρc of m ² or less.

Further, as shown in the process sectional views (Nos. 1 and 2) of FIGS. 16 and 17, the thermal oxide film may be formed immediately after the formation of the opening.

(A) For example, the p-type SiC region 32 is formed on the surface of the SiC substrate 1 in exactly the same manner as described in the second embodiment. Then, after sufficiently cleaning the SiC substrate 1, an oxygen-permeable insulating film 44 such as a SiO ₂ film is deposited on the SiC substrate 1 by a normal pressure CVD method as shown in FIG.

(B) Next, a photoresist 22 having a thickness of 1 to 2 μm is applied to the surface of the oxygen-permeable insulating film 44 using a spinner. Then, using a predetermined photomask (reticle), the photoresist 22 is selectively exposed to light and developed to remove a portion of the photoresist 22 corresponding to the opening 6. Then, this photoresist 2
By using the pattern 2 as an etching mask and wet-etching the oxygen-permeable insulating film 44, FIG.
An opening 6 is formed in the oxygen-permeable insulating film 44 as shown in FIG.

(C) After the formation of the opening 6, the photoresist 22 used for etching the oxygen-permeable insulating film 44 is removed using acetone or a dedicated photoresist removing solution. Subsequently, the SiC substrate 1 is immersed in a BHF solution for about 10 seconds, and the oxygen-permeable insulating film 44 is slightly etched to completely remove the residue of the photoresist 22 attached to the oxygen-permeable insulating film 44. Further, the surface of the SiC substrate 1 exposed inside the opening 6 is sufficiently cleaned using a SiC substrate 1 cleaning method such as an RCA cleaning method. Then, as shown in FIG. 16C, the surface of the SiC substrate 1 exposed to the inside of the opening 6 by thermal oxidation in a dry oxygen atmosphere,
Then, a thermal oxide film 3 is grown on the interface between the oxygen-permeable insulating film 44 and the SiC substrate 1. SiC exposed inside opening 6
The oxidation rate of the surface of the substrate 1 depends on the oxygen-permeable insulating film 44 and S
Since it is faster than the oxidation rate at the interface with the iC substrate 1,
A thicker thermal oxide film is formed on the surface of the SiC substrate 1 exposed inside the opening 6. Oxygen permeable insulating film 44 and Si
The thickness of the thermal oxide film 3 at the interface with the C substrate 1 is 50 nm
Less, preferably 5 to 20 nm. When the thickness is less than 5 nm, the effect of removing a damaged region on the surface of the SiC substrate 1 caused by surface polishing or ion implantation and the effect of removing foreign matter on the surface are poor. When the thickness is more than 50 nm, excessive thermal oxidation causes excessive heat oxidation. Because it gradually gets rough.

(D) Thereafter, the entire surface is etched with a BHF solution, and the thermal oxide film 3 on the surface of the SiC substrate 1 exposed inside the opening 6 is self-aligned as shown in FIG. except.

(E) The dried SiC substrate 1 is promptly installed in a chamber of a vapor deposition apparatus and immediately evacuated. When a predetermined ultimate pressure is obtained, the inside of the opening 6 and the entire surface of the field insulating film 5 are formed as shown in FIG.
As shown in (1), the Al-Ti-based electrode film 17 is deposited by oblique deposition.

(F) After vacuum deposition of the Al—Ti-based electrode film 17, the SiC substrate 1 is taken out of the chamber of the vacuum deposition apparatus. Subsequently, the thickness of the Al-Ti-based electrode film 17 is
A photoresist 23 of about 2 μm is applied using a spinner. Then, by selectively exposing and developing the photoresist 23 using a predetermined photomask (reticle), only the portion overlapping the opening and the field insulating film 5 at the peripheral portion thereof is selectively exposed to light. Resist 23
To remain. Subsequently, using the pattern of the photoresist 23 as an etching mask, an Al—Ti-based electrode film 57 is formed only on the opening and a part of the upper part of the field insulating film 5 on the periphery thereof as shown in FIG. The other portions of the Al-Ti-based electrode film 17 are removed.

(G) Thereafter, the SiC substrate 1 is heated in a non-oxidizing atmosphere at a temperature of 700 ° C. to 1050 ° C. for a short period of time in the same manner as in the method shown in FIG. (About several minutes), and the Al—Ti-based electrode film 57.
And the p-type SiC region 32 react with each other to generate the heat reaction layer 8 in the interface region between them. The description of the subsequent steps
The description is the same as that of the third embodiment, and will not be repeated.

Using the methods shown in FIGS. 16 and 17,
It is possible to achieve a practical contact resistance ρc of 10 ⁻⁶ Ωcm ² or less.

In the above description, a semiconductor electronic device such as a power device has been mainly described. However, the present invention is applicable to a semiconductor light emitting device such as a light emitting diode and a semiconductor laser and an optical integrated circuit using the same. Of course.

As described above, the present invention naturally includes various embodiments and the like not described herein. Therefore, the technical scope of the present invention is determined only by the invention specifying matters according to the claims that are appropriate from the above description.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a principal part showing a configuration of an ohmic electrode structure according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a result of analyzing a composition in a depth direction of the ohmic electrode structure according to the first embodiment of the present invention by using Auger electron spectroscopy (AES).

FIG. 3 is a process cross-sectional view (part 1) illustrating a process for manufacturing the ohmic electrode structure according to the first embodiment of the present invention.

FIG. 4 is a process cross-sectional view (No. 2) showing the manufacturing process of the ohmic electrode structure according to the first embodiment of the present invention.

FIG. 5 is a process cross-sectional view (No. 3) showing the manufacturing process of the ohmic electrode structure according to the first embodiment of the present invention.

FIG. 6 is a diagram showing current-voltage characteristics of a TLM contact group based on the ohmic electrode structure according to the first embodiment of the present invention.

FIG. 7 is a diagram showing TLM characteristics of a TLM contact group based on the ohmic electrode structure according to the first embodiment of the present invention.

FIG. 8 is a fragmentary cross-sectional view showing a configuration of an ohmic electrode structure according to a second embodiment of the present invention.

FIG. 9 is a process cross-sectional view (No. 1) illustrating the process of manufacturing the ohmic electrode structure according to the second embodiment of the present invention.

FIG. 10 is a process cross-sectional view (part 2) illustrating the process of manufacturing the ohmic electrode structure according to the second embodiment of the present invention.

FIG. 11 is a process cross-sectional view (No. 3) showing the manufacturing process of the ohmic electrode structure according to the second embodiment of the present invention.

FIG. 12 is a cross-sectional view of a principal part showing a configuration of an ohmic electrode structure according to a third embodiment of the present invention.

FIG. 13 is a process cross-sectional view (part 1) illustrating a process for manufacturing the ohmic electrode structure according to the third embodiment of the present invention.

FIG. 14 is a process cross-sectional view (part 2) illustrating the process of manufacturing the ohmic electrode structure according to the third embodiment of the present invention.

FIG. 15 is a process cross-sectional view showing a process for manufacturing an ohmic electrode structure according to another embodiment of the present invention.

FIG. 16 is a process cross-sectional view (part 1) illustrating a manufacturing process of an ohmic electrode structure according to still another embodiment of the present invention.

FIG. 17 is a process cross-sectional view (No. 2) illustrating the manufacturing process of the ohmic electrode structure according to still another embodiment of the present invention.

[Explanation of symbols]

 Reference Signs List 1 SiC substrate 1 2, 32 p-type SiC region 3 thermal oxide film 4 upper insulating film 5 field insulating film 6 opening of field insulating film 7, 47 electrode film 8 heating reaction layer 8 9 wiring conductor element 17, 27, 57 Al-Ti-based electrode film 19 Al film 20 Epitaxial growth layer 21 Etching mask 22, 23, 34 Photoresist 33 Ion implantation mask 35 Ion implantation through film 44 Oxygen permeable insulating film

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI theme coat ゛ (Reference) H01L 29/744 H01L 21/265 F 29/78 652 29/72 29/74 C 21/336 29/78 658F 21/337 29/80 C 29/808 29/91 F 29/861 33/00 (72) Inventor Satoshi Tanimoto 2 Takara-cho, Kanagawa-ku, Yokohama-shi, Kanagawa Prefecture Nissan Motor Co., Ltd. F-term (reference) 4M104 AA03 BB36 CC01 DD08 DD09 DD16 DD17 DD19 DD64 DD65 DD68 DD78 DD83 FF13 GG06 GG09 GG12 GG18 HH15 5F003 BA97 BB08 BC08 BE08 BH00 BH07 BH08 BH18 BH99 BJ93 BM01 BP31 BZ01 BZ02 BZ03 CA01 CA01 CA01 AF01 CA023 GD04 GJ02 GL02 GS01 GS02

Claims (21)

[Claims] 1. A silicon carbide (SiC) substrate, a p-type SiC region selectively formed on a surface of the SiC substrate, and a part of a surface of the p-type SiC region, wherein A heating reaction layer formed to project upward from the surface of the mold SiC region; and a first opening through which the heating reaction layer penetrates.
A thermal oxide film disposed in contact with the C substrate and the surface of the p-type SiC region; and a thermal oxide film, which is an insulating film having a different composition or density, and is a second oxide film continuous with the first opening. Has an opening,
An upper insulating film disposed on a surface of the thermal oxide film; and a metal including at least one of Al and Ti disposed on the heat reaction layer in the second opening of the upper insulating film. An ohmic electrode structure comprising an electrode film. 2. The method according to claim 1, wherein the electrode film includes a laminated film including a lower titanium-silicon (Ti-Si) alloy film and an upper titanium (Ti) film, and a lower aluminum-silicon (Al-S
i) A laminated film composed of an alloy film and an upper aluminum (Al) film, and a lower aluminum-titanium-silicon (Al-Ti-Si) alloy film and an upper aluminum-titanium (Al-Ti) alloy film 2. The ohmic electrode structure according to claim 1, wherein the metal film includes at least one laminated film selected from a group consisting of laminated films. 3. 3. The ohmic electrode structure according to claim 1, wherein the heat reaction layer is a solid solution containing metal carbide and metal silicon (Si). 4. The breakdown electric field strength of the upper insulating film is:
4. The ohmic electrode structure according to claim 1, wherein the ohmic electrode structure has a lower breakdown electric field strength than the thermal oxide film. 5. 5. The etching method according to claim 1, wherein an etching rate of the upper insulating film by the buffered hydrofluoric acid solution is higher than an etching rate of the thermal oxide film by the buffered hydrofluoric acid solution. The described ohmic electrode structure. 6. The p-type SiC region according to claim 1, wherein a surface carrier density of the p-type SiC region is 1 × 10 ¹⁸ / cm ^{3 to} 5 × 10 ²¹ / cm ³ . Ohmic electrode structure. 7. The ohmic electrode structure according to claim 1, wherein said thermal oxide film has a thickness of 2 to 50 nm. 8. The ohmic electrode structure according to claim 1, wherein a total value of a thickness of said thermal oxide film and a thickness of said upper insulating film is 100 nm to 3 μm. body. 9. The method according to claim 1, wherein an uppermost position of the electrode film is the second position.
Characterized by being present inside the opening of (1).
9. The ohmic electrode structure according to any one of items 8 to 8. 10. A step of forming a p-type SiC region having a high impurity density on at least a part of a surface of a silicon carbide (SiC) substrate; a step of cleaning the surface of the SiC substrate; Covering with a field insulating film; forming an opening in the field insulating film so as to expose at least a part of the p-type SiC region; and forming an Al-Ti based electrode film inside the opening. And the partial pressures of oxygen (O ₂ ) and water (H ₂ O) are both 1 × 10 ⁻³
Heat-treating the SiC substrate in a non-oxidizing atmosphere of Pa to 1 × 10 ⁻¹⁰ Pa to generate a heat reaction layer between the Al—Ti-based electrode film and the SiC substrate. For producing an ohmic electrode structure. 11. The step of coating with a field insulating film includes: a step of growing a thermal oxide film on the surface of the SiC substrate by thermal oxidation; 11. The method for manufacturing an ohmic electrode structure according to claim 10, comprising a step of depositing a film. 12. The step of coating with a field insulating film includes: a step of depositing an oxygen-permeable insulating film on the surface of the SiC substrate by a method other than thermal oxidation; By oxidation, the S
11. The method for manufacturing an ohmic electrode structure according to claim 10, comprising a step of growing a thermal oxide film on an interface between the surface of the iC substrate and the oxygen-permeable insulating film. 13. A method of forming a p-type SiC region having a high impurity density on at least a part of a surface of a silicon carbide (SiC) substrate, a step of cleaning the surface of the SiC substrate, and a method other than thermal oxidation. Depositing an oxygen-permeable insulating film on the surface of the SiC substrate; and selectively exposing a part of the p-type SiC region.
Forming an opening in the oxygen-permeable insulating film; and after the step of forming the opening, the surface of the SiC substrate exposed to the opening by thermal oxidation, and the surface of the SiC substrate and the oxygen transmission surface. Growing a thermal oxide film at the interface with the conductive insulating film; removing the thermal oxide film grown in the opening; and removing aluminum from the opening from which the thermal oxide film has been removed. Disposing a titanium (Al-Ti) -based electrode film; and heat-treating the SiC substrate in a non-oxidizing atmosphere to form a heating reaction layer between the Al-Ti-based electrode film and the SiC substrate. A method for producing an ohmic electrode structure, comprising: 14. The step of forming the heat reaction layer is performed in the case where the partial pressures of oxygen (O ₂ ) and water (H ₂ O) are both 1 × 10 ⁻³ P
The method for manufacturing an ohmic electrode structure according to claim 13, wherein the method is performed in an atmosphere of a to 1 x 10 ^-10 Pa. 15. The step of arranging the Al—Ti-based electrode film includes the steps of: depositing a titanium (Ti) layer on an aluminum (Al) layer; depositing an Al layer on a Ti layer; The method for manufacturing an ohmic electrode structure according to any one of claims 10 to 14, further comprising at least one step in a group consisting of a step of depositing a titanium (Al-Ti) alloy film. 16. The step of forming the opening includes a step of forming an etching mask on the field insulating film by a photolithography method, and at least a part of the p-type SiC region using the etching mask. Removing a part of the field insulating film by dry etching so that the field insulating film remains on the upper part of the semiconductor device; and removing the remaining field insulating film by wet etching to form the p-type SiC region. 11. The method according to claim 10, comprising: exposing at least a part of the p-type SiC region by rinsing with ultrapure water.
13. The method for producing an ohmic electrode structure according to any one of claims 12 to 12. 17. The method according to claim 17, wherein the step of disposing the Al-Ti-based electrode film comprises: forming the Al-Ti-based electrode film on the upper surface of the etching mask while the etching mask remains on the field insulating film. After the step of depositing over the entire surface including the opening, and the step of depositing over the entire surface, the etching mask is removed so that the Al—Ti-based electrode film is selectively left only inside the opening. 17. The method for manufacturing an ohmic electrode structure according to claim 16, comprising the steps of: 18. The step of forming the opening, the step of forming an etching mask on the oxygen-permeable insulating film by photolithography, and the step of forming at least the p-type SiC region using the etching mask. Removing a part of the oxygen-permeable insulating film so that the oxygen-permeable insulating film remains on a part of the upper part; removing the remaining oxygen-permeable insulating film by wet etching; 14. A method comprising: exposing at least a part of the p-type SiC region; and cleaning the exposed p-type SiC region by rinsing with ultrapure water.
15. A method for producing an ohmic electrode structure according to item 14. 19. A silicon carbide (SiC) substrate, a p-type SiC region selectively functioning as a main electrode region formed on the surface of the SiC substrate, and a part of the surface of the p-type SiC region into the inside. A heat reaction layer formed to penetrate and protrude upward from the surface of the p-type SiC region; and a first opening through which the heat reaction layer penetrates.
A thermal oxide film disposed in contact with the C substrate and the surface of the p-type SiC region; and a thermal oxide film, which is an insulating film having a different composition or density, and is a second oxide film continuous with the first opening. Has an opening,
An upper insulating film disposed on a surface of the thermal oxide film; and a metal including at least one of Al and Ti disposed on the heat reaction layer in the second opening of the upper insulating film. A semiconductor device comprising: an electrode film; and a main electrode wiring connected to the electrode film. 20. A laminated film comprising a lower titanium-silicon (Ti-Si) alloy film and an upper titanium (Ti) film, and a lower aluminum-silicon (Al-
A laminated film composed of an Si) alloy film and an upper aluminum (Al) film, and a lower aluminum-titanium-silicon (Al-Ti-Si) alloy film and an upper aluminum-titanium (Al-Ti) alloy film 20. The semiconductor device according to claim 19, wherein the semiconductor device is a metal film including at least one stacked film in a group of stacked films. 21. The semiconductor device according to claim 19, wherein the heat reaction layer is a solid solution containing a metal carbide and metallic silicon (Si).