JP2002043491A - Manufacturing method of electronic component - Google Patents
Manufacturing method of electronic componentInfo
- Publication number
- JP2002043491A JP2002043491A JP2000223408A JP2000223408A JP2002043491A JP 2002043491 A JP2002043491 A JP 2002043491A JP 2000223408 A JP2000223408 A JP 2000223408A JP 2000223408 A JP2000223408 A JP 2000223408A JP 2002043491 A JP2002043491 A JP 2002043491A
- Authority
- JP
- Japan
- Prior art keywords
- dumet
- welding material
- bump
- manufacturing
- metal bump
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、金属バンプとリー
ド線とが接続された信頼性の高い半導体装置の製造方法
に関し、特に、ガラスパッケージダイオードの製造方法
に適用して有効な技術に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a highly reliable semiconductor device in which metal bumps and lead wires are connected, and more particularly to a technique effective when applied to a method for manufacturing a glass package diode. is there.
【０００２】[0002]
【従来の技術】従来のガラスパッケージ（ＰＫＧ）ダイ
オードは、半導体チップの主面（表面）とリード線（先
端のジュメット）との接続にＡｇバンプが用いられ、こ
のＡｇバンプとジュメットとを圧着接続し、半導体チッ
プの主面（表面）と対向面（裏面）に設けられた金属膜
（電極）と他のリード線の先端に溶接されたジュメット
とを圧着接続し、前記圧着接続部をガラススリブで封止
している。前記Ａｇバンプは、浴槽めっき法とダリック
めっき法で形成されている。2. Description of the Related Art In a conventional glass package (PKG) diode, an Ag bump is used to connect a main surface (front surface) of a semiconductor chip to a lead wire (a dumet at the tip), and this Ag bump and a dumet are crimp-connected. Then, a metal film (electrode) provided on the main surface (front surface) and the opposing surface (back surface) of the semiconductor chip and a dumet welded to the tip of another lead wire are connected by crimping, and the crimping connection is made of glass sribs. It is sealed. The Ag bump is formed by a bathtub plating method and a darrick plating method.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、前記従
来の浴槽めっき法で形成したＡｇバンプは表面が粗いた
め、Ａｇバンプ表面を滑らかにすること（平坦化）が必
要だった。また、平坦化を行った浴槽めっき法で形成し
たＡｇバンプは、ダリックめっき法で形成した表面粗さ
と同レベルのバンプであっても、ダリックめっき法で形
成したバンプより、前記リード線（先端に溶接されたジ
ュメット）との接触状態が劣るため、電気特性が劣化す
るという問題があった。However, since the surface of the Ag bump formed by the conventional bath plating method is rough, it is necessary to make the surface of the Ag bump smooth (flatten). In addition, even if the Ag bump formed by the bathtub plating method with the flattened surface has the same level of surface roughness as the bump formed by the darrick plating method, the bumps formed by the darrick plating method are more likely to have the above-mentioned lead wire (at the tip). Since the contact state with the welded dumet is inferior, there is a problem that the electric characteristics are deteriorated.
【０００４】また、はんだやその他の溶着材料では、前
記Ａｇバンプの表面にめっきを施すため、その工程が面
倒であった。[0004] In the case of solder and other welding materials, the surface of the Ag bump is plated, so that the process is troublesome.
【０００５】本発明の目的は、ある部品と他の部子とを
電気特性が劣化しないように接続して信頼性の高い電子
部品の製造方法を提供することにある。An object of the present invention is to provide a method for manufacturing a highly reliable electronic component by connecting a certain component to another component so that the electrical characteristics are not deteriorated.
【０００６】本発明の他の目的は、金属バンプとジュメ
ットの接続及びジュメットとチップ裏面とを電気特性が
劣化しないように接続して信頼性の高い半導体装置の製
造方法を提供することにある。本発明の前記ならびにそ
の他の目的及び新規な特徴は、本明細書の記述及び添付
図面によって明らかになるであろう。Another object of the present invention is to provide a method of manufacturing a highly reliable semiconductor device by connecting a metal bump to a dumet and connecting a dumet to a back surface of a chip without deteriorating electrical characteristics. The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.
【０００７】[0007]
【課題を解決するための手段】本願において開示される
発明のうち代表的なものの概要を簡単に説明すれば、下
記の通りである。本発明は、ある部品と他の部品を接続
する電子部品の製造方法であって、前記少なくとも一方
の部品の表面に、直経０.０１μｍ以下の溶着材料の超
微粒子を溶剤に溶した溶液を塗って仮焼結し、前記仮焼
結された溶着材料の超微粒子膜を付着させた部品と他の
部品を接触接続させ、それをガス封止した後、融点降下
現象（約２００℃）焼結法を用いて前記接触接続部を溶
着融合させる。The following is a brief description of an outline of a typical invention among the inventions disclosed in the present application. The present invention is a method for manufacturing an electronic component for connecting a certain component to another component, wherein a solution obtained by dissolving ultrafine particles of a welding material having a diameter of 0.01 μm or less in a solvent is coated on the surface of the at least one component. The part to which the ultrafine particle film of the pre-sintered welding material is applied is contact-connected to another part by painting and temporarily sintering, and after gas-sealing it, the melting point drop phenomenon (about 200 ° C.) The contact connection is welded and fused using a knotting method.
【０００８】本発明は、半導体チップの回路形成面（表
面）に電気めっきにより金属バンプを形成し、前記形成
された金属バンプとリード線の先端に溶接されたジュメ
ットとを接続し、前記接続部を封止部材で封止する半導
体装置の製造方法であって、前記金属バンプを形成した
後に、前記金属バンプ表面もしくは前記ジュメット表面
に、直経０.０１μｍ以下の溶着材料の超微粒子を溶剤
に溶した溶液を塗って仮焼結し、前記半導体チップの金
属バンプとジュメット、及びジュメットとチップ裏面を
それぞれ接触接続させて封止し、融点降下現象（約２０
０℃）焼結法を用いて溶着融合させる。According to the present invention, a metal bump is formed on a circuit forming surface (surface) of a semiconductor chip by electroplating, and the formed metal bump is connected to a dumet welded to a tip of a lead wire. Is a method of manufacturing a semiconductor device in which a sealing member is used to seal ultrafine particles of a welding material having a diameter of 0.01 μm or less on a surface of the metal bump or the surface of the dumet after forming the metal bump. The melted solution is applied and pre-sintered, and the metal bumps and the dumet, and the dumet and the backside of the semiconductor chip are brought into contact with each other and sealed.
0 ° C.) Welding and fusion are performed using a sintering method.
【０００９】前記部品もしくは金属バンプの表面に、溶
着材料の超微粒子を溶剤に溶した溶液を塗る手段は、直
経０.０１μｍ以下の溶着材料の超微粒子を溶剤に溶し
たインク状溶液をローラに塗布し、そのローラを部品の
表面上で回転させて塗布する。Means for applying a solution in which ultra-fine particles of the welding material are dissolved in a solvent is applied to the surface of the component or the metal bump by using an ink-like solution in which ultra-fine particles of the welding material having a diameter of 0.01 μm or less are dissolved in the solvent. And the roller is rolled over the surface of the part to apply.
【００１０】また、前記部品の表面に、溶着材料の超微
粒子を溶剤に溶した溶液を塗る手段は、直経０.０１μ
ｍ以下の溶着材の超微粒子を溶剤に溶した溶液に前記部
品を漬け、前記部品の表面に直経０.０１μｍ以下の溶
着材料の超微粒子を付着させる。The means for applying a solution in which ultrafine particles of a welding material are dissolved in a solvent is applied to the surface of the component by using a straight line of 0.01 μm.
The component is immersed in a solution in which ultrafine particles of a welding material having a diameter of not more than m are dissolved in a solvent, and ultrafine particles of a welding material having a diameter of 0.01 μm or less are adhered to the surface of the component.
【００１１】前記手段によれば、ある部品と他の部品を
接続する電子部品の製造方法であって、前記少なくとも
一方の部品の表面に、直経０.０１μｍ以下の溶着材料
の超微粒子を溶剤に溶した溶液を塗って仮焼結し、前記
溶着材料の超微粒子膜を付着させた部品と他の部品を接
触接続し、それをガス封止した後、融点降下現象（約２
００℃）焼結法を用いて前記接触接続部を溶着融合させ
ることにより、ある部品と他の部子とを電気特性が劣化
しないように接続することができる。これにより、信頼
性の高い電子部品が得られる。According to the above-mentioned means, there is provided a method of manufacturing an electronic component for connecting a certain component to another component, wherein ultrafine particles of a welding material having a diameter of 0.01 μm or less are coated on a surface of at least one of the components. The part having the ultra-fine particle film of the welding material adhered thereto is connected to another part by contacting the part with the ultra-fine particle film of the welding material and temporarily sealing it.
(00 ° C.) By fusing and fusing the contact connection parts by using a sintering method, it is possible to connect a part and another part without deteriorating electrical characteristics. Thereby, a highly reliable electronic component can be obtained.
【００１２】また、前述のように、金属バンプとジュメ
ットの接着及びジュメットとチップ裏面との接続部の溶
着に溶着材料の超微粒子を用いるので、金属バンプとジ
ュメットの接着及びジュメットとチップ裏面とを電気特
性が劣化しないように接続することができる。これによ
り、信頼性の高い半導体装置の製造方法を得ることがで
きる。Further, as described above, since the ultrafine particles of the welding material are used for bonding the metal bump to the dumet and for welding the connection between the dumet and the back surface of the chip, the bonding between the metal bump and the dumet and the back surface of the dumet and the chip are performed. Connection can be made so that the electrical characteristics do not deteriorate. Thereby, a highly reliable method for manufacturing a semiconductor device can be obtained.
【００１３】また、溶着材料の付着方法が容易であるの
で、溶着部の形成工程のコストが低減することができ
る。Further, since the method of attaching the welding material is easy, the cost of the step of forming the welding portion can be reduced.
【００１４】[0014]
【発明の実施の形態】以下、本発明について、その実施
形態（実施例）とともに図面を参照して詳細に説明す
る。なお、実施形態を説明するための全図において、同
一機能を有するものは同一符号を付け、その繰り返しの
説明は省略する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the drawings together with its embodiments (examples). In all the drawings for describing the embodiments, components having the same function are denoted by the same reference numerals, and a repeated description thereof will be omitted.
【００１５】（実施形態１）図１は、本発明による実施
形態（実施例）１のガラスパッケージダイオードの外観
構成を示す斜視図であり、図２は、図１のＡ−Ａ’線に
おける断面図である。(Embodiment 1) FIG. 1 is a perspective view showing an external configuration of a glass package diode of Embodiment 1 (Example) according to the present invention, and FIG. 2 is a cross section taken along line AA 'of FIG. FIG.
【００１６】図１及び図２において、１はガラススリー
ブ、２はリード線（例えば、Ｆｅ-Ｎｉ／Ｃｕを用い
る）、３はジュメット（例えば、Ｆｅ-Ｎｉ／Ｃｕを用
いる）、４はリード線２とジュメット３とを溶接した溶
接部（溶接材）、５は半導体チップ、６は半導体チップ
の外部電極（パッド）、７は金属バンプ（例えばＡｇバ
ンプ）、８は金属膜（電極）、９は溶着材料の超微粒子
膜である。1 and 2, 1 is a glass sleeve, 2 is a lead wire (for example, using Fe-Ni / Cu), 3 is a dumet (for example, using Fe-Ni / Cu), and 4 is a lead wire. A welded portion (weld material) obtained by welding 2 and Dumet 3, 5 is a semiconductor chip, 6 is an external electrode (pad) of the semiconductor chip, 7 is a metal bump (for example, Ag bump), 8 is a metal film (electrode), 9 Is an ultrafine particle film of a welding material.
【００１７】本実施形態１のガラスパッケージダイオー
ドの製造方法は、図２に示すように、ウェハ（Ｗａｆｅ
ｒ）状態の半導体チップ５の主面（表面）に設けられた
外部電極６上に金属バンプ（Ａｇバンプ）７を、例え
ば、ＡｇＣＮ、ＫＣＮ、Ｋ2ＣＯ3からなるめっき液で電
気めっきにより形成する。この金属バンプ（Ａｇバン
プ）７を形成した後に、金属バンプ（Ａｇバンプ）７の
表面及びリード線２の先端にに溶接材４で溶接されたジ
ュメット３の表面に、図３に示すように、直経０.０１
μｍ以下の溶着材料の超微粒子膜９を溶剤に溶したイン
ク状溶液９Ａを塗布したローラ１０により溶着材料の超
微粒子膜９を塗布する。この塗布された状態の金属バン
プ（Ａｇバンプ）７及びジュメット３とを仮焼結して溶
着材料の超微粒子（Ａｇ超微粒子）膜９を形成する。前
記溶着材料の超微粒子（Ａｇ超微粒子）膜９が形成され
たウェハをダイシングして半導体チップ５に切り出す。As shown in FIG. 2, the method for manufacturing a glass package diode according to the first embodiment uses a wafer (Wafe).
r) A metal bump (Ag bump) 7 is formed on an external electrode 6 provided on a main surface (front surface) of the semiconductor chip 5 in a state by, for example, electroplating with a plating solution composed of AgCN, KCN, and K 2 CO 3. I do. After this metal bump (Ag bump) 7 is formed, as shown in FIG. 3, on the surface of the metal bump (Ag bump) 7 and the surface of the dumet 3 welded to the tip of the lead wire 2 with the welding material 4, Direct 0.01
The ultra-fine particle film 9 of the welding material is applied by a roller 10 coated with an ink-like solution 9A in which the ultra-fine particle film 9 of the welding material having a size of μm or less is dissolved in a solvent. The applied metal bumps (Ag bumps) 7 and dumets 3 are preliminarily sintered to form an ultrafine particle (Ag ultrafine particle) film 9 of a welding material. The wafer on which the ultrafine particles (Ag ultrafine particles) film 9 of the welding material is formed is diced and cut into semiconductor chips 5.
【００１８】この切り出された半導体チップ５の前記金
属バンプ（Ａｇバンプ）７及び金属膜（電極）８と前記
ジュメット３の先端に設けられている溶着材料の超微粒
子（Ａｇ超微粒子）膜９とを接触接続し、ガラススリー
ブ１でガス封止し、前記溶着材料の超微粒子（Ａｇ超微
粒子）膜９をジュメット３と前記金属バンプ（Ａｇバン
プ）７とを、前記ジュメット３と前記金属膜（電極）８
とを、同時に、融点降下現象（約２００℃）焼結法を用
いて前記接触接続部を溶着融合させる。The metal bumps (Ag bumps) 7 and metal films (electrodes) 8 of the cut semiconductor chip 5 and the ultrafine particles (Ag ultrafine particles) film 9 of the welding material provided at the tip of the dumet 3 Are contact-connected and gas-sealed with the glass sleeve 1, and the ultrafine particle (Ag ultrafine particle) film 9 of the welding material is made of the dumet 3 and the metal bump (Ag bump) 7, and the dumet 3 and the metal film ( Electrode) 8
At the same time, the contact connection portion is welded and fused using a melting point lowering phenomenon (about 200 ° C.) sintering method.
【００１９】実際には、例えば、前工程としては、方法
Ａと方法Ｂの２つの方法がある。 方法Ａ：（１）ウェハ状態でその表面に金属バンプ（Ａ
ｇバンプ）を形成する。 （２）前記ウェハの裏面に金属（Ａｇ）を蒸着する。 （３）前記金属バンプ（Ａｇバンプ）の表面に前記溶着
材料の超微粒子（Ａｇ超微粒子）９の膜を形成する。 （４）前記ウェハをダイシングして半導体チップに切り
出す。In practice, for example, there are two methods, method A and method B, as the pre-process. Method A: (1) In a wafer state, metal bumps (A
g bump). (2) Metal (Ag) is deposited on the back surface of the wafer. (3) A film of ultrafine particles (Ag ultrafine particles) 9 of the welding material is formed on the surface of the metal bump (Ag bump). (4) dicing the wafer into semiconductor chips;
【００２０】方法Ｂ：（１）ウェハ状態でその表面に金
属バンプ（Ａｇバンプ）を形成する。 （２）前記金属バンプ（Ａｇバンプ）の表面に前記溶着
材料の超微粒子（Ａｇ超微粒子）９の膜が形成する。 （３）前記ウェハの裏面に金属（Ａｇ）膜を蒸着する。 （４）前記ウェハをダイシングして半導体チップ５に切
り出す。Method B: (1) A metal bump (Ag bump) is formed on the surface of a wafer. (2) A film of the ultrafine particles (Ag ultrafine particles) 9 of the welding material is formed on the surface of the metal bump (Ag bump). (3) A metal (Ag) film is deposited on the back surface of the wafer. (4) The wafer is diced and cut into semiconductor chips 5.
【００２１】後工程は、以下のとおりである。 （１）金属バンプ（Ａｇバンプ）７の表面及びリード線
２に溶接されたジュメット３の表面に、直経０.０１μ
ｍ以下の溶着材料の超微粒子を付着させる。 （２）下部ジュメット３付きリード線２を治具に挿入す
る。 （３）下部ジュメット３の部分にガラススリーブ１をか
ぶせる。 （４）前記ガラススリーブ１内に半導体チップ５を入れ
る。 （５）上部ジュメット３付きリード線２をかぶせる。 （６）上部ジュメット３付きリード線２の上におもりを
のせる。 （７）これをリフロー炉に入れて、３５０℃〜６５０℃
でガラス端とリード線２に付けられているジュメット３
とを溶着する。The post-process is as follows. (1) The surface of the metal bump (Ag bump) 7 and the surface of the dumet 3 welded to the lead wire 2 have a diameter of 0.01 μm.
Ultra-fine particles of a welding material of not more than m are adhered. (2) Insert the lead wire 2 with the lower dumet 3 into the jig. (3) Put the glass sleeve 1 on the lower jumet 3 part. (4) Put the semiconductor chip 5 in the glass sleeve 1. (5) Cover the lead wire 2 with the upper dumet 3. (6) Put a weight on the lead wire 2 with the upper dumet 3. (7) Put this in a reflow furnace and put it at 350 ° C to 650 ° C.
Dumet 3 attached to glass end and lead wire 2
And weld.
【００２２】前記溶着材料の超微粒子９の溶剤を塗る手
段は、前記実施例の他の手段であってもよい。例えば、
図４に示すように、直経０.０１μｍ以下の溶着材料の
超微粒子を溶剤に溶した溶液９Ｂに前記金属バンプ（Ａ
ｇバンプ）７もしくはリード線２に溶接されたジュメッ
ト３を漬け、前記金属バンプ（Ａｇバンプ）７の表面も
しくはジュメット３の表面に直経０.０１μｍ以下の溶
着材料の超微粒子を付着させる。The means for applying the solvent for the ultrafine particles 9 of the welding material may be another means in the above embodiment. For example,
As shown in FIG. 4, the metal bumps (A) were added to a solution 9B in which ultrafine particles of a welding material having a diameter of 0.01 μm or less were dissolved in a solvent.
g bump 7) or the dumet 3 welded to the lead wire 2 is immersed, and ultrafine particles of a welding material having a diameter of 0.01 μm or less are adhered to the surface of the metal bump (Ag bump) 7 or the surface of the dumet 3.
【００２３】（実施形態２）図５は、本発明による実施
形態（実施例）２の半導体装置の概略構成を示す断面図
であり、１１はプリント基板、１２は配線端子、１３は
ＩＣやＬＳＩ等の半導体チップ、１４は金属バンプ（Ａ
ｕバンプ）、１５は溶着材料の超微粒子（Ａｇ超微粒
子）膜である。(Embodiment 2) FIG. 5 is a cross-sectional view showing a schematic configuration of a semiconductor device according to Embodiment 2 (Example) of the present invention, wherein 11 is a printed circuit board, 12 is a wiring terminal, and 13 is an IC or LSI. And the like, and 14 is a metal bump (A
u bumps) and 15 are ultrafine particles (Ultrafine Ag particles) of a welding material.
【００２４】本実施形態（実施例）２の半導体装置の製
造方法においても、図５に示すように、ＩＣやＬＳＩ等
の半導体チップ１３の外部端子（パッド）上に金属バン
プ（Ａｕバンプ）１４を形成し、前記金属バンプ（Ａｇ
バンプ）の表面に溶着材料の超微粒子（Ａｇ超微粒子）
膜１５を形成する。溶着材料の超微粒子（Ａｇ超微粒
子）膜１５が付着された金属バンプ（Ａｕバンプ）１４
とプリント基板１１上の配線端子１２とを接触させ溶着
接続する。In the method of manufacturing a semiconductor device according to the second embodiment, a metal bump (Au bump) 14 is formed on an external terminal (pad) of a semiconductor chip 13 such as an IC or LSI, as shown in FIG. And forming the metal bumps (Ag
Ultrafine particles (Ag ultrafine particles) of the welding material on the surface of the bump)
A film 15 is formed. A metal bump (Au bump) 14 to which an ultrafine particle (Ag ultrafine particle) film 15 of a welding material is adhered
And the wiring terminals 12 on the printed circuit board 11 are brought into contact with each other and welded.
【００２５】前記金属バンプ（Ａｕバンプ）１４は、前
記実施形態１の金属バンプ（Ａｇバンプ）の形成方法と
同様の方法を用いて形成し、前記実施形態１と同じ塗布
手段で前記金属バンプ（Ａｇバンプ）の表面に溶着材料
の超微粒子（Ａｇ超微粒子）１５の膜を形成する。The metal bumps (Au bumps) 14 are formed by the same method as the method for forming the metal bumps (Ag bumps) of the first embodiment, and are formed by the same coating means as in the first embodiment. A film of ultra-fine particles (Ag ultra-fine particles) 15 of a welding material is formed on the surface of the Ag bump.
【００２６】これにより、金属バンプ（Ａｕバンプ）１
４の接続面の直経０.０１μｍ以下の溶着材料の超微粒
子１５の膜と配線端子１２もしくは金属バンプ（Ａｕバ
ンプ）１４の接続面と配線端子１２の接続面の直経０.
０１μｍ以下の溶着材料の超微粒子膜１５とを接触させ
溶着接続するので、信頼性の高い半導体装置を得ること
ができる。Thus, the metal bump (Au bump) 1
4 and a straight line between the connecting surface of the wiring terminal 12 or the metal bump (Au bump) 14 and the connecting surface of the ultrafine particles 15 of the welding material having a diameter of 0.01 μm or less.
Since the contact is made with the ultrafine particle film 15 of a welding material having a diameter of 01 μm or less and the connection is made by welding, a highly reliable semiconductor device can be obtained.
【００２７】なお、前記実施形態１，２では、本発明を
半導体装置に適用した例で説明したが、本発明は、ある
部品（金属バンプ以外の部品）と他の部品（配線以外の
部品）との溶着接続部を有するすべての電子部品に適用
し得ることができる。In the first and second embodiments, the present invention has been described as an example in which the present invention is applied to a semiconductor device. However, in the present invention, a certain component (a component other than a metal bump) and another component (a component other than a wiring) are used. The present invention can be applied to all electronic components having a welded connection portion.
【００２８】以上、本発明者によってなされた発明を、
前記実施例に基づき具体的に説明したが、本発明は、前
記実施例に限定されるものではなく、その要旨を逸脱し
ない範囲において種々変更可能であることは勿論であ
る。As described above, the invention made by the present inventor is:
Although the present invention has been described in detail with reference to the embodiment, the present invention is not limited to the embodiment, and it is needless to say that various changes can be made without departing from the scope of the invention.
【００２９】[0029]
【発明の効果】本願において開示される発明のうち、代
表的なものによって得られる効果を簡単に説明すれば、
以下のとおりである。本発明によれば、接続部の溶着に
溶着材料の超微粒子膜を用いるので、ある部品と他の部
子とを電気特性が劣化しないように接続することができ
る。これにより、信頼性の高い電子部品が得られる。Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows. According to the present invention, since an ultra-fine particle film of a welding material is used for welding a connection portion, it is possible to connect a part and another part without deteriorating electrical characteristics. Thereby, a highly reliable electronic component can be obtained.
【００３０】また、金属バンプとジュメットの接着及び
ジュメットとチップ裏面との接続部の溶着に溶着材料の
超微粒子膜を用いるので、金属バンプとジュメットの接
着及びジュメットとチップ裏面とを電気特性が劣化しな
いように接続することができる。これにより、信頼性の
高い半導体装置の製造方法を得ることができる。また、
溶着材料の付着方法が容易であるので、溶着部の形成工
程のコストが低減することができる。Further, since the ultrafine particle film of the welding material is used for bonding the metal bump to the dumet and for welding the connection between the dumet and the back surface of the chip, the bonding between the metal bump and the dumet and the electrical characteristics between the dumet and the back surface of the chip are deteriorated. Not be able to connect. Thereby, a highly reliable method for manufacturing a semiconductor device can be obtained. Also,
Since the method of attaching the welding material is easy, the cost of the step of forming the welding portion can be reduced.
【図１】本発明による実施形態（実施例）１のガラスパ
ッケージダイオードの外観構成を示す斜視図である。FIG. 1 is a perspective view illustrating an external configuration of a glass package diode according to a first embodiment of the present invention.
【図２】図１のＡ−Ａ’線における断面図である。FIG. 2 is a cross-sectional view taken along line A-A 'of FIG.
【図３】本実施形態（実施例）１の溶着材料の超微粒子
を付着させる手段を説明するための図である。FIG. 3 is a view for explaining means for attaching ultrafine particles of a welding material according to the first embodiment (Example).
【図４】本実施形態（実施例）１の溶着材料の超微粒子
を付着させる別の手段を説明するための図である。FIG. 4 is a view for explaining another means for adhering ultrafine particles of a welding material according to the first embodiment (Example).
【図５】本発明による実施形態（実施例）２の半導体装
置の概略構成を示す断面図である。FIG. 5 is a sectional view showing a schematic configuration of a semiconductor device according to Embodiment 2 (Example) of the present invention;
１…ガラススリーブ ２…リード線 ３…ジュメット ４…リード線とジュメットとの溶接部（溶接材） ５…半導体チップ ６…半導体チップの外部電極（パッド） ７…金属バンプ（Ａｇバンプ） ８…金属膜（電極） ９…溶着材料の超微粒子膜 ９Ａ…溶着材料の超微粒子を溶剤に溶したインク状溶液 ９Ｂ…溶着材料の超微粒子を溶剤に溶した溶液 １０…ローラ １１…プリント基板 １２…配線端子 １３…半導体チップ １４…金属バンプ（Ａｕバンプ） １５…溶着材料の超微粒子膜 DESCRIPTION OF SYMBOLS 1 ... Glass sleeve 2 ... Lead wire 3 ... Dumet 4 ... Welded part (weld material) of lead wire and dumet 5 ... Semiconductor chip 6 ... External electrode (pad) of semiconductor chip 7 ... Metal bump (Ag bump) 8 ... Metal Film (electrode) 9: Ultrafine particle film of welding material 9A: Ink-like solution of ultrafine particles of welding material dissolved in solvent 9B: Solution of ultrafine particles of welding material dissolved in solvent 10: Roller 11: Printed circuit board 12: Wiring Terminal 13 Semiconductor chip 14 Metal bump (Au bump) 15 Ultrafine particle film of welding material
Claims (2)
の製造方法であって、前記少なくとも一方の部品の表面
に、直経０.０１μｍ以下の溶着材料の超微粒子を溶剤
に溶した溶液を塗って仮焼結し、前記仮焼結された溶着
材料の超微粒子膜を付着させた部品と他の部品を接触接
続させ、それをガス封止した後、融点降下現象焼結法を
用いて前記接触接続部を溶着融合させることを特徴とす
る電子部品の製造方法。1. A method of manufacturing an electronic component for connecting a certain component to another component, comprising: a solution in which ultrafine particles of a welding material having a diameter of 0.01 μm or less are dissolved in a solvent on a surface of the at least one component. And temporarily sintering it, contacting and connecting the part to which the ultrafine particle film of the temporarily sintered welding material is adhered and another part, and gas-sealing it, using a melting point lowering phenomenon sintering method. And fusing and fusing the contact connection parts.
気めっきにより金属バンプを形成し、前記形成された金
属バンプとリード線の先端に溶接されたジュメットとを
接続し、前記接続部を封止部材で封止する半導体装置の
製造方法であって、前記金属バンプを形成した後に、前
記金属バンプ表面もしくは前記ジュメット表面に、直経
０.０１μｍ以下の溶着材料の超微粒子を溶剤に溶した
溶液を塗って仮焼結し、前記半導体チップの金属バンプ
とジュメット、及びジュメットとチップ裏面をそれぞれ
接触接続させて封止し、融点降下現象焼結法を用いて溶
着融合させることを特徴とする半導体装置の製造方法。2. A metal bump is formed on a circuit forming surface (surface) of a semiconductor chip by electroplating, the formed metal bump is connected to a dumet welded to the tip of a lead wire, and the connection portion is sealed. A method of manufacturing a semiconductor device to be sealed with a stopper member, wherein after forming the metal bump, ultrafine particles of a welding material having a diameter of 0.01 μm or less are dissolved in a solvent on the surface of the metal bump or the surface of the dumet. A solution is applied and pre-sintered, and the metal bumps and the dumet of the semiconductor chip, and the dumet and the back surface of the chip are respectively contact-connected and sealed, and fusion-bonded using a melting point depressing phenomenon sintering method. A method for manufacturing a semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000223408A JP2002043491A (en) | 2000-07-25 | 2000-07-25 | Manufacturing method of electronic component |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000223408A JP2002043491A (en) | 2000-07-25 | 2000-07-25 | Manufacturing method of electronic component |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2002043491A true JP2002043491A (en) | 2002-02-08 |
Family
ID=18717505
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000223408A Pending JP2002043491A (en) | 2000-07-25 | 2000-07-25 | Manufacturing method of electronic component |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2002043491A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005197334A (en) * | 2004-01-05 | 2005-07-21 | Seiko Epson Corp | Joining structure and joining method for member |
| WO2007053976A1 (en) * | 2005-11-09 | 2007-05-18 | Tak Cheong Electronics (Shanwei) Co., Ltd. | A new glass packaging diode |
| US7534979B2 (en) | 2004-05-14 | 2009-05-19 | Mitsubishi Denki Kabushiki Kaisha | Pressure-contact type rectifier with contact friction reducer |
-
2000
- 2000-07-25 JP JP2000223408A patent/JP2002043491A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005197334A (en) * | 2004-01-05 | 2005-07-21 | Seiko Epson Corp | Joining structure and joining method for member |
| US7534979B2 (en) | 2004-05-14 | 2009-05-19 | Mitsubishi Denki Kabushiki Kaisha | Pressure-contact type rectifier with contact friction reducer |
| WO2007053976A1 (en) * | 2005-11-09 | 2007-05-18 | Tak Cheong Electronics (Shanwei) Co., Ltd. | A new glass packaging diode |
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