JP2001318805A - Test method for built-in system and test system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To quickly and inexpensively perform the inspection or debug work of the software of a built-in system. SOLUTION: A simulator (managing part) 22 for simulating the hardware constitution of a built-in system is constructed on a computer, and the software (target software) of an built-in system is operated by using the simulator. Thus, it is possible to quickly and inexpensively perform highly precise inspection without being constrained by the quantity or quality of the electronic equipment of the built-in system.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for testing a system incorporated in an electronic device, an electric device, and the like.
The present invention relates to a test method and a test system for testing an embedded system by simulating hardware configurations (targets) of various devices on an electronic computer.

[0002]

2. Description of the Related Art In recent years, electronic devices and electric devices have incorporated therein a small computer device having a calculation processing function, and the small computer device performs various calculation processes to operate the device. I have. In a system in which such calculation processing functions are incorporated (embedded system), the software that performs the computation processing naturally depends largely on the device to be incorporated and the hardware configuration of the computation processing functions.

[0003] Therefore, when verifying the operation of the created software, conventionally, the software is mounted on an actual electronic device or the like, and a monitor or a dumb terminal or the like is connected to a computer device incorporated in the software. For example, a command is input from the device to verify whether the software operates normally on the device.

[0004]

[0005] Recent electronic devices and the like have advanced functions and become more complicated, and the types of devices to be incorporated have increased. Accordingly, the types of calculation processing software have also increased. As they become larger, they are becoming larger and more complex.

[0005] In order to quickly perform the operation verification and debugging work of such calculation processing software, it is preferable to prepare a large number of devices to be verified so that the work can be divided into a plurality of works and performed in parallel. However, it is difficult to prepare a large number of electronic devices and the like under development for software verification, and there is a problem that even if one can be prepared, the cost is too high.

[0006] Further, the electronic device to be verified and the software are usually developed in parallel, and the verification of the software using the electronic device under development requires that the quality of the electronic device is still stable. It is a verification at the stage where it has not been done,
In order to enhance the reliability, it is necessary to further verify the software at the stage when the development of the electronic device has been completed.

Further, there is a problem that it takes too much time to compile and link the software, download the software, and investigate the cause of a bug, in order to actually load and verify the software in an actual electronic device or the like. .
When debugging a multi-CPU configuration,
There is also a problem that it is difficult to isolate a bug unless the PU is equipped with an ICE (In Circuit Emulator) and debugged.

An object of the present invention is to provide a built-in system that enables low-cost, highly accurate verification and quick debug work, regardless of the hardware configuration of a device to be built-in and a calculation processing function built into the device. To provide a test method and a test system.

[0009]

SUMMARY OF THE INVENTION The object of the present invention is to provide a method for testing an embedded system, wherein a simulator for simulating the hardware configuration of the embedded system is built on a computer, and the software of the embedded system is used by using the simulator. Is achieved by verifying

Preferably, the computer has an OS manufactured by Microsoft Corporation, and the simulator is configured by application software running on the OS, and communication between CPUs on the hardware configuration, memory management, The interface with the internal bus is allocated to various interfaces and resources of the computer.

In this case, a simulator having the hardware configuration of a multi-CPU is built on a computer having a single CPU, or a simulator having the hardware configuration of a multi-CPU is distributed and configured on a plurality of computers. Also, the software can be tested using commercially available debugger software.

An object of the present invention is to provide a test system for verifying software of an embedded system (hereinafter referred to as target software), which has a simulator for simulating the hardware configuration of the embedded system, and has a target software when launched as a child process. A management unit that generates and deletes the configuration task of
This is achieved by including a manager that starts up as a parent process when receiving a start command and starts the child process.

[0013] Preferably, the computer is constructed as a Windows application on a computer equipped with a Microsoft Windows OS, one window is assigned to one target software, and one target software is assigned to a test system. Terminal software for monitoring and controlling the simulator prepared in the above.

Since the software of the embedded system is verified and debugged by using the hardware configuration simulator (pseudo target) built on the computer,
Verification can be performed without being restricted by the quantity and quality of electronic devices and the like. The OS installed on a computer is a widely used and widely used Microsoft Windows OS, and by building this pseudo target system as a Windows application, it becomes possible to have a general-purpose OS. It can be used.

[0015]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a conceptual configuration diagram of a test system according to an embodiment of the present invention. In this embodiment, Windows NT or W, which is a Microsoft operating system (hereinafter referred to as OS), is used.
A pseudo target system (VTS: Virt), which is a Windows application, is placed on a personal computer (hereinafter, referred to as a PC) 10 equipped with Windows 95/98 (both are registered trademarks of Microsoft Corporation).
A virtual target system 20 is constructed, and on this pseudo target system 20, testing and debugging of software to be verified of the embedded system are performed.

In the pseudo target system 20, the PC 10 and Windows manage hardware such as communication between CPUs on a hardware configuration (target) of electronic equipment and the like, memory management, and interface with an internal bus. The target hardware configuration is simulated by quasi-allocating computer resources such as a hard disk file, an RS232C interface, and a communication port of Ethernet (registered trademark).

FIG. 2 is a configuration diagram of the architecture of the pseudo target system 20 according to the first embodiment of the present invention. The pseudo target system 20 includes a VT manager 21, a target software management unit 22 provided for each target CPU, and target software. Communication between the VT manager and each software management unit 22 is performed by socket communication. The target software is composed of a plurality of target tasks. The pseudo target system 20 has the VT manager 21 as a parent process, and the user starts the VT manager 21 first. The target software also includes console software connected to the target.

The VT manager 21 implements management of activation / termination of the target software A, B,... And communication management between a plurality of target software. The target software mounted on one CPU on the target is composed of a plurality of user tasks (target tasks). On the pseudo target system 20, one target software is allocated to one window, that is, one process. Can be Each user task is assigned to a thread in the corresponding process, and these are controlled by the target software management unit 22.

The target software management unit 22 manages creation / deletion of a user task by controlling the corresponding thread,
Management of communication between user tasks using win events,
Memory management for realizing and securing the memory managed by Windows and provided to the user;
An event input to a user task by an external event generation function such as an OS-dependent system call simulation or an interrupt by the S simulator and a pseudo driver communication by a target simulation function are realized.

The pseudo target system 20 replaces the drivers for controlling the interface of the target software with the real-time OS and the hardware with a real-time OS simulator and a driver simulator. Enables testing equivalent to. A real-time OS simulator, a driver simulator, and a target simulator for simulating a target hardware operation are mounted on the target software management unit 22.

For example, the user sets target software A shown in FIG. 2 as software to be verified, and sets target software B as terminal software for monitoring and controlling the pseudo target realized on the pseudo target system 20. Then, a command is input from one process (window) allocated to the target software B, and the result output to the screen is verified to confirm the target software A and other operations. In addition, using the target simulation function, a pseudo alarm is given as an event, and it is confirmed whether or not the target software A handles this event as expected.

FIG. 3 is a diagram showing an operation sequence of the pseudo target system. When the user starts the VT manager via the OS, a start screen shown in FIG. 4 is displayed, and then a new target information creation property screen shown in FIG. 5 is displayed. When the user writes and registers the target information on the property screen, the VT manager starts the software management unit A of the target software A and the software management unit B of the target software B as child processes. The software management unit A and the software management unit B
Operates according to the same procedure as described above, so only the software management unit A will be described below.

Next, the software management unit A generates and deletes a target task constituting the target software A as a thread of its own process. Here, the target software A started as a child process follows the target information registered in FIG. When each task of the target software A requests a resource from the real-time OS, the software management unit A transmits the resource request to the OS of the PC (Windows in this example).
wsNT), the OS allocates the managed resource to the software manager A, and the software manager A allocates this resource to each task.

When it becomes necessary to perform communication between CPU_A and CPU_B, for example, target software A
When it is necessary to transmit data from the target software B to the target software B, the target software A transmits data to the software management unit A, and the software management unit A
Send to T manager. Then, the VT manager receiving the data transmits the data to the software management unit B, and the software management unit B transmits the data to the target software B.

In the above-described embodiment, a target having a multi-CPU configuration is simulated on a computer having a single CPU. However, a target having a multi-CPU may be distributed and simulated on a plurality of computers. It is possible.

FIG. 6 is a configuration diagram of the architecture of the pseudo target system 20 according to the second embodiment of the present invention. In this embodiment, the target software A is VC ++
(Integrated environment manufactured by Microsoft Corporation) using the debugging function. Therefore, the VT manager launches VC ++ as a child process at the request of the user, and then specifies the target software to be debugged. For example, the target software A is specified. Next, when a GO command is input, the target software A is started, and socket communication with the VT manager is established. Thereafter, the process is the same as that of the embodiment of FIG.

FIG. 7 is a configuration diagram of the architecture of the pseudo target system 20 according to the third embodiment of the present invention. In the present embodiment, the target software management unit 22 is in charge of communication between target tasks, a memory management function, and the like, and the target software management unit 22 transmits information of the managed task control block (TCB) to the hard disk 24 or the like. In the secondary storage device. Then, this information is displayed as message sequence data between tasks according to the user's request, memory acquisition information,
It is displayed as task operation status information and task operation time information. Other functions and operations are the same as those in the embodiment of FIG.

According to each of the above-described embodiments, it is easy to construct a test environment, and it is easy to secure a quantity required for a test. In addition, from the occurrence of a failure on the target, it is possible to confirm the results of the failure reproduction on the simulated target system, and to check the results of handling, compiling, linking, and processing on the personal computer, and use the source code of the target software as is. This makes it possible to verify all target software except for hardware-dependent parts, thereby enabling quick and accurate verification and debugging at low cost.

Furthermore, it is possible to integrate with a commercially available compiler, and as a result, it has advanced static analysis functions (for example, stack related, initialization failure, variable initialization omission, invalid code easily). Detection function) and the trace function can be used. It also allows integration with commercially available test-related tools.

[0030]

According to the present invention, low-cost, highly-accurate verification and quick debugging can be performed regardless of the hardware configuration of the equipment to be incorporated and the computation processing function incorporated therein. .

[Brief description of the drawings]

FIG. 1 is a conceptual configuration diagram of a test system according to an embodiment of the present invention.

FIG. 2 is an architecture configuration diagram of a pseudo target system according to the first embodiment of the present invention.

FIG. 3 is a diagram showing an operation sequence of the pseudo target system shown in FIG.

FIG. 4 is a diagram showing a start screen of a VT manager.

FIG. 5 is a diagram showing a new target information creation property screen.

FIG. 6 is an architectural configuration diagram of a pseudo target system according to a second embodiment of the present invention.

FIG. 7 is an architectural configuration diagram of a pseudo target system according to a third embodiment of the present invention.

[Explanation of symbols]

10 Personal computer (PC) 20 Virtual target system
tem) 21 VT manager 22 Target software management unit

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Kazuaki Miyoshi 1-403 Kosugi-cho, Nakahara-ku, Kawasaki-shi, Kanagawa F-term in NEC Telecom System Corporation (reference) 5B042 GA11 GA13 GA21 GC10 HH07 JJ09 5B048 AA11 AA17 DD14

Claims (9)

[Claims] 1. A method for testing an embedded system, wherein a simulator for simulating a hardware configuration of the embedded system is constructed on a computer, and software of the embedded system is verified using the simulator. How to test embedded systems. 2. The test method for an embedded system according to claim 1, wherein the computer is equipped with an OS manufactured by Microsoft Corporation, and the simulator is configured by application software running on the OS. How to test embedded systems. 3. The test method for an embedded system according to claim 1, wherein the computer has communication between CPUs on the hardware configuration, memory management, and an interface with an internal bus. A method for testing embedded systems, characterized by allocating to interfaces and resources. 4. The test method for an embedded system according to claim 1, wherein the simulator having the hardware configuration of a multi-CPU is constructed on a computer having a single CPU. Test method. 5. The embedded system test method according to claim 1, wherein the simulator having the hardware configuration of a multi-CPU is distributed and configured on a plurality of computers. How to test the system. 6. The method for testing an embedded system according to claim 1, wherein said software is tested using commercially available debugger software. 7. A test system for verifying software of an embedded system (hereinafter referred to as target software), comprising a simulator for simulating the hardware configuration of the embedded system, and a target software configuration task when launched as a child process. A management unit that generates and deletes the process as a thread of the own process, and a manager that starts up as a parent process and starts the child process when a start instruction is received. 8. The test system according to claim 7, wherein on a computer equipped with a Microsoft Windows OS, a Windows application is constructed and one window is assigned to one target software. Characteristic test system. 9. The test system according to claim 8, wherein one of the target software is terminal software for monitoring and controlling the simulator prepared on the test system.