JP2001266492A - Data transfer circuit, recording and reproducing unit provided with the same and data transfer method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a data transfer circuit capable of transferring decoded managing data, which are read out of a disk, to a specified memory area for updating the contents thereof with more simplified configuration and operation, a recording and reproducing unit provide with such a circuit and a data transfer method. SOLUTION: At the time of reproducing the managing data from a recording medium, the managing data read out of the recording medium are demodulated and temporarily stored on a decoding area 12a of an SDRAM 12. The stored managing data are read out for each of processing such as ECC, EDC and SCR and after such processing is applied, these data are directly transferred to a system area 12a of the SDRAM 12 without being written back to the decoding area 12a. Thus, correcting (updating) processing of contents is applied to the managing data held in the system area 12b by an MPU 112.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transfer circuit, a recording / reproducing apparatus provided with the data transfer circuit, and a data transfer method, and more specifically, to managing a recording medium read from a recording medium. The present invention relates to a data transfer circuit for transferring data locally in a recording / reproducing device without transferring data to a host, a recording / reproducing device including the data transfer circuit, and a data transfer method.

[0002]

2. Description of the Related Art Conventionally, in a recording / reproducing apparatus for a magneto-optical disc as an example of a recording medium, a write system modulates scrambled user data by adding redundant data such as an error correction code to the magneto-optical disc. It is magneto-optically recorded thereon.

On the other hand, in the read system, the scrambled data reproduced and demodulated from the magneto-optical disk is temporarily stored in a decoding area of the memory in error correction block units, and thereafter, the error is corrected for error correction processing. Read out in units of correction blocks. The read data in units of error correction blocks are subjected to an error correction process using, for example, a product code, and descrambling of the data is performed when an error residual determination is performed on the data on which the error correction process has been completed.

[0004] In this manner, the error-corrected and descrambled data in units of error-corrected blocks is written back to the decoding area of the memory again, and then the user data is output from the memory for output to the host. Is read.

[0005]

On the other hand, the data read from the magneto-optical disk includes various types of management data for managing the disk in addition to the user data finally transmitted to the host. Management data is stored in a drive controller (M
PU) and are not used and transferred to the host side.

In the conventional magneto-optical disk recording / reproducing apparatus, not only user data transferred to the host side but also these management data are subjected to error correction and descrambling, and then written once to a decoding area of the memory. After that, only the management data is extracted and transferred to a specific area of the memory, where the management data is modified (updated) by the drive controller of the disk.

More specifically, a typical example of such management data is a defect management list data used as maintenance data for coping with a disk defect. This data consists of a table that registers defective frames on the disk, and the drive control of the disk
When the frame or the like is accessed, processing such as accessing an alternative area on the disk is performed.

The contents of such a defect management list need to be updated for maintenance every time a write / read operation is performed and written back to the disk. Therefore, separately from the user data transferred to the host, the contents of the defect management list need to be updated. Must be stored locally in the recording / reproducing device for the update process. Therefore, as described above,
Only the management data is transferred to a specific area of the memory separately from the user data, and the drive controller (MPU)
Must be kept in a state in which data processing by the server can be performed.

However, as described above, the operation of locally transferring the management data once written back to the decoding area of the memory to a specific area of the memory after processing such as error correction is complicated in the following points. .

That is, the operation of once writing back the management data in the decoding area of the memory, then reading out the management data and transferring it locally is time-consuming and wasteful. More specifically, various data are accumulated in the data of the decoding area, and in order to cut out (address) only the management data, the logical address of the memory is converted into the physical address on the disk. Complicated procedures are necessary.

For example, to cut out management data from data stored in a decoding area, MP
It is necessary to read the management data and transfer it to a specific area by software in U or by hardware in DMA, which complicates the circuit configuration and operation.

Therefore, an object of the present invention is to provide a data transfer circuit capable of locally transferring only management data to a specific area of a memory with a simpler configuration and operation, and a recording device having such a data transfer circuit. Playback device,
And a data transfer method.

[0013]

According to the present invention, in a recording / reproducing apparatus for a recording medium, management data for managing the recording medium read from the recording medium is not transferred to the host side. A data transfer circuit for locally transferring data in the memory includes a randomly accessible memory, data writing means, decoding means, and data transfer means. The memory includes a decoding area for decoding management data, and a specific area for correcting management data by control means for controlling recording and reproduction of the recording medium. The data writing means writes the read management data to a decode area of the memory. The decoding means reads out the management data stored in the decoding area and performs a decoding process. The data transfer means transfers and writes the decoded management data to a specific area of the memory.

Preferably, the control means activates the data transfer means when recognizing that the data read from the recording medium is management data.

More preferably, the decoding means includes means for performing error correction processing on the management data read from the decoding area, descrambling means for descrambling the error-corrected management data, and descrambling. Error detecting means for determining whether an error remains in the management data.

More preferably, the management data includes a defect management list for dealing with a defect of the recording medium.

According to another aspect of the present invention, a recording / reproducing apparatus for a recording medium comprises: means for reading management data for managing the recording medium from the recording medium; and control means for controlling recording / reproduction of the recording medium. And a data transfer circuit for locally transferring the read management data within the recording / reproducing apparatus without transferring the management data to the host. The data transfer circuit includes a randomly accessible memory, a data writing unit, a decoding unit, and a data transfer unit. The memory includes a decode area for decoding the management data and a specific area for correcting the management data by the control unit. The data writing means writes the read management data to a decode area of the memory. The decoding means reads out the management data stored in the decoding area and performs a decoding process. The data transfer means transfers and writes the decoded management data to a specific area of the memory.

Preferably, the control means activates the data transfer means when recognizing that the data read from the recording medium is management data.

More preferably, the decoding means includes means for performing error correction processing on the management data read from the decoding area, descrambling means for descrambling the management data subjected to the error correction processing, and descrambling. Error detecting means for determining whether an error remains in the management data.

More preferably, the management data includes a defect management list for dealing with a defect of the recording medium.

According to still another aspect of the present invention, in a recording / reproducing apparatus for a recording medium, management data for managing the recording medium read from the recording medium is transferred to the recording / reproducing apparatus without being transferred to the host. A local transfer method, wherein the recording / reproducing apparatus includes a decoding area for management data decoding processing, and a specific area for management data correction processing by control means for controlling recording / reproduction of a recording medium. A memory that can be accessed randomly, and the transfer method includes a step of writing the read management data to a decode area of the memory, a step of reading the management data stored in the decode area and performing a decoding process, Transferring the applied management data to a specific area of the memory and writing the same.

Preferably, the control means activates a step of transferring the management data to a specific area when recognizing that the data read from the recording medium is management data.

More preferably, the step of performing the decoding process includes a step of performing an error correction process on the management data read from the decode area, a step of descrambling the management data subjected to the error correction process, Determining the error remaining in the released management data.

More preferably, the management data includes a defect management list for dealing with a defect of the recording medium.

As described above, according to the present invention, after the management data for managing the recording medium is read out from the decode area of the memory and subjected to various decoding processes, one time without writing back to the decode area, Since the operation is performed by transferring the data to a specific area of the memory and enabling the control unit to correct the management data, a complicated operation for cutting out and transferring the management data from the data in the decode area is omitted. The circuit configuration and operation can be simplified.

[0026]

Embodiments of the present invention will be described below in detail with reference to the drawings. In the drawings, the same or corresponding portions have the same reference characters allotted, and description thereof will not be repeated.

First, a format of information recorded and reproduced on a magneto-optical disk as a recording medium to which the present invention is applied will be described.

Referring to FIG. 1, a plurality of tracks (t ₁ , t ₂ , t ₃ , t ₄ ,..., T _n-1 ) are concentrically (or spirally) formed on the recording surface of the magneto-optical disk _1. , T _n ) (FIG. 1 shows only a part of the track formed on the entire surface of the disk in a sector shape), and the plurality of concentric tracks further extend from the outer circumference to the inner circumference. band is formed on each of a plurality of adjacent tracks in the radial direction (e.g., forming one band in track t ₁ ~t ₄ in FIG. 1), a buffer area (not shown) between the adjacent bands and the band is formed You.

Each track on the magneto-optical disk is divided at equal intervals, and a plurality of frames 2 as information recording units are arranged.

As shown in FIG. 1, each frame 2 has 39 segments (S0, S1, S2, S3,..., S).
n,..., S38). The first segment S0 of the 39 segments is an address segment, and the remaining 38 segments S1 to S38 are data segments.

In each of the address segment and the data segment, a fine clock mark (FC) serving as a phase reference for generating a clock signal serving as a reference for a recording / reproducing operation is provided at a head position in each segment.
M) is formed.

Referring to FIG. 1, the physical shapes of the address segment S0 and the data segment Sn are further schematically shown. Each track is composed of a pair of lands and grooves. Grooves indicated by diagonal lines are
The grooves are formed on the recording surface, and the lands are other portions.

First, as described above, in both the address segment and the data segment, the FCM is preformatted at the head position of each segment by reversing the concavo-convex relationship between the groove and the land. The area where the FCM is formed in this way is
It is called a field.

In the address segment S0, FC
In the address field following the M field, the boundary line between the groove and the land is wobbled by the signal obtained by modulating the address information for the frame during the manufacture of the magneto-optical disk, so that the address information is preformatted.

This address information is composed of a frame number (frame address), a band number (band address), and a track number (track address) on the disk. The "physical address information" for specifying the position of the information on the disk It has the meaning as "."

On the other hand, in the data segment Sn,
Subsequent to the FCM field, a data field for magneto-optical recording of data is provided. The data can be magneto-optically recorded on either or both of the grooves and lands constituting the track.

FIG. 2 schematically shows the entire layout of the data zone on the magneto-optical disk using the above-mentioned physical addresses. In FIG. 2, the entire data layout is roughly classified into a user area, which is a rewritable zone, and a portion other than the user area due to a difference in physical address. That is, the information stored differs depending on the physical address. User data can be rewritably written to the physical address of the user area. In the area of the other physical addresses, data DML1 to DML4 of a rewritable defect management list (DML), which is a kind of management data described later, are recorded.

Next, with reference to FIG. 3, the format of a frame as a recording unit of information described with reference to FIG. 1 will be described in more detail.

As described above, each frame is composed of a total of 39 segments, for example, segment 0 to segment 38 (FIG. 3 (a)). Each segment is, for example, 532 bits long, so that F
The CM is repeated at a cycle of 532 bits.

As shown in FIG. 3B, the leading segment 0 of the 39 segments is an address segment. This address segment is composed of a 12-bit FCM field in which the FCM is pre-formatted, and a 520-bit address field in which the address data is pre-formatted.

As shown in FIG. 3C, the second segment 1 of the 39 segments corresponds to the first data segment. The first data segment 1 is 1
A 2-bit length FCM field, a pre-write field in which a 4-bit fixed pattern “0011” indicating data writing is recorded, and 320 bits (40 bits) used for confirming a recording start position in frame units during reproduction.
Byte) fixed length header field,
It is composed of a 192 bit (24 byte) data field for storing data, and a post-write field in which a 4-bit fixed pattern "1100" indicating the end of the data field is recorded.

As shown in FIG. 3D, the remaining segments 2 to 38 are all data segments of the same format. Each of these data segments is composed of a 12-bit long FCM field, a 4-bit long pre-write field, a 512-bit (64-byte) long data field, and a 4-bit long post-write field.

As is apparent from FIGS. 3C and 3D, the first data segment 1 of the data segments
Only include header fields.

FIG. 2 is a data layout diagram expressing the contents of the data field (data zone) of such a data segment in accordance with the physical address on the disk.

Next, the format of an ECC (Error Correction Code) layout block as a data unit for error correction will be described with reference to FIG.

First, in one frame composed of 39 segments shown in FIG. 3A, as shown in FIG. 4A, the remaining 39 data segments S1 to S38 excluding the address segment S0 are used. From the header and data fields, as shown in FIG. 4B, a header field having a length of 40 bytes, 24 bytes + 64 bytes × 37 = 2
A data block composed of a data field (main data field) having a length of 392 bytes is formed.

Then, as shown in FIG.
The data blocks shown in (b) are collected for 16 frames to constitute a block called an ECC block in the magneto-optical recording standard.

The error correction processing (hereinafter, ECC processing) does not actually cover the entire ECC block shown in FIG.

First, as shown in FIG. 4D, a block is composed of 16 frames of main data (2392 bytes each) excluding the head (2392 bytes × 16 = 38).
272 bytes), and as shown in FIG. 4 (e), the remaining 37856-byte length data obtained by deleting a 416-byte DSV (Digital Sum Variation) therefrom is used as the actual E-byte data.
It becomes an error correction block for CC processing. Hereinafter, this block is referred to as an ECC layout block.

Further, as shown in FIG.
The data of the CC layout block includes original user data (2048 bytes × 16 frames = 32768 bytes), ECC, EDC (Error Deteciton Code),
D and other redundant data (5088 bytes). The ECC processing of the ECC layout block data in FIG. 4F will be described later in detail.

FIG. 5 is a functional block diagram showing the configuration of a magneto-optical disk recording / reproducing apparatus to which the present invention is applied.

Referring to FIG. 5, the recording operation of the recording / reproducing apparatus will be described first. First, data to be recorded is input to the error correction code adding circuit 113, scrambled, and redundant data such as an error correction code (ECC data) is added. The data to which the error correction code has been added is digitally modulated by the data modulator 114 and supplied to the magnetic head drive circuit 115. The magnetic head driving circuit 115 controls the magnetic head 1 based on the input data.
The magnetic head 116 applies a magnetic field modulated based on the data to the magneto-optical disk 101.

The laser driving circuit 117 drives a semiconductor laser (not shown) in the pickup 102 so as to generate a laser beam having a predetermined intensity.
Irradiates the magneto-optical disk 101 with laser light of a predetermined intensity. As a result, magnetic domains having magnetizations in different directions are formed on the magneto-optical disk 101 based on the data, and the data is magnetically modulated and recorded.

Next, the reproducing operation of the recording / reproducing apparatus will be described with reference to FIG. First, data is reproduced by the pickup 102 from the magneto-optical disk 101 rotated and driven by the motor 118, and the signal operation circuit 10
0 is given. The signal calculation circuit 100 calculates each sensor output signal of the pickup to record the reproduced data signal RF, the tangential push-pull signal TPP for detecting the FCM of each segment, and the wobbling in the address field of the address segment. And a radial push-pull signal RPP for reproducing the reproduced address data.

A frequency that can be demodulated from the reproduced data signal RF is extracted through a band-pass filter (BPF) 103, and is converted into a digital signal by an AD converter 104. The output of the AD converter 104 is waveform-equalized by a waveform equalization circuit 105 and supplied to a well-known Viterbi decoder 106.

The output decoded by the Viterbi decoder 106 is
The digital modulation applied to the data demodulator 108 and applied at the time of recording is digitally demodulated.
9 given. The error correction circuit 109 performs error correction using redundant data such as an error correction code (ECC data) added at the time of recording. The details of the error correction will be described later in detail.

The output of the Viterbi decoder 106 is also given to a header detection circuit 107, which outputs
The position of the header field recorded in the aforementioned segment 1 is detected, and a header detection signal is generated and provided to the data demodulator 108.

On the other hand, the TPP signal output from signal operation circuit 100 is applied to PLL circuit 110, which generates data clock CLK based on the TPP signal which is a signal obtained by reproducing the FCM of each segment. I do. Data clock CL generated by PLL circuit 110
K is the aforementioned AD converter 104, waveform equalization circuit 105,
The signal is supplied to the Viterbi decoder 106, the header detection circuit 107, and the data demodulator 108, and is also supplied to the address detection circuit 111 and the data modulator 114.
Further, a signal corresponding to FCM is supplied from the PLL circuit 110 to the address detection circuit 111 based on the TPP signal.

Further, the RPP signal extracted from the signal operation circuit 100 is given to the address detection circuit 111. The address detection circuit 111 detects a synchronization signal included in the address data reproduced from the address segment, accurately extracts the address information of the frame, and supplies the extracted address information to the controller 112.

The controller (MPU) 112 exchanges control data with the data demodulator 108 and the error correction circuit 109 and the error correction code adding circuit 113 and the data modulator 114.

FIG. 6 is a block diagram schematically showing a circuit configuration in a case where the portion 10 relating to error correction and modulation / demodulation, which is surrounded by a broken line in the recording / reproducing apparatus shown in FIG. 5, is actually realized as an LSI. FIG.

First, referring to FIG.
The operation of the recording / reproducing apparatus at the time of writing will be briefly described. At the time of writing, user data to be recorded is provided to the DMA 11 from the host via a host interface (I / F). The given data is DM
The data is sequentially written to the SDRAM 12 by A11.

The data stored in SDRAM 12 is E
The data is read out to the CC / EDC / SCR / encoder / decoder 13 and scrambled by a known method to user data, and redundant data including codes (ECC data and EDC data) for error correction and error detection is added. And written back to the SDRAM 12.

The data written back to the SDRAM 12 is digitally modulated by a modulator / demodulator / formatter / deformatter 14 and adjusted to a predetermined data format suitable for recording. This is applied to the head drive circuit 115.

Next, referring to FIG.
The operation of the recording / reproducing apparatus at the time of reading will be briefly described. At the time of reading, the data reproduced from the magneto-optical disk 101 is subjected to the waveform equalization and the Viterbi decoding circuit 15.
To perform waveform equalization and Viterbi decoding. The waveform-equalized and Viterbi-decoded data is modulated by a modulator / demodulator / formatter / deformatter 14.
The data is digitally demodulated, deformed into the data of the ECC layout block described above, and written into the SDRAM 12.

The data stored in the SDRAM 12 is E
The data is read out by the CC / EDC / SCR / encoder / decoder 13 and subjected to various processes such as error correction, error detection, and descrambling. The data subjected to these processes is SDR
It is written back to AM12.

The user data among the data written back to the SDRAM 12 is read via the DMA 11 and sent to the host via the host I / F.

The DMA 11, SDRAM 12, EC
The C / EDC / SCR / encoder / decoder 13, the modulator / demodulator / formatter / deformatter 14, the waveform equalization and Viterbi decoding circuit 15, and the controller 112 (FIG. 5) composed of the MPU are connected to the MPU bus. The control signals are exchanged with each other via the control unit.

FIG. 7 shows the conventional error correction (ECC), error detection (EDC), and descrambling of the read system data reproduced from the magneto-optical disk in the circuit configuration of the LSI shown in FIG. FIG. 3 is a diagram extracting and showing a circuit configuration for performing (SCR) processing and locally transferring management data to a specific area (system area).

Referring to FIG. 7, a description will now be given of a conventional ECC, EDC, and SCR process for read data. The read system data output from the waveform equalization and Viterbi decoding circuit 15 in FIG. 6 is supplied to a modulator / demodulator / formatter / deformatter 14, and the modulator / demodulator / formatter / deformatter 14 converts the data into digital data. Demodulated, and then de-formatted into the 37856-byte ECC layout block shown in FIG.
Write to AM12.

FIG. 8 is a diagram schematically showing one ECC layout block stored in a two-dimensional memory area of the SDRAM 12. Referring to FIG. 8, the data of the ECC layout block has a length of 182 bytes consisting of 172 bytes of data and 10 bytes of PI parity in the horizontal direction, and 192 lines of data and 16 bytes in the vertical direction.
It has 208 lines consisting of the PO parity of the line.

In the ECC layout block shown in FIG. 8, PI parity and PO parity, which are ECC data, are calculated and added to user data by a well-known product coding method using a Reed-Solomon code.

Next, ECC processing for data of one unit of ECC layout block stored in the SDRAM 12 will be described.

First, 208 lines of horizontal (PI direction) data (182 bytes each) are sequentially read from the SDRAM 12 line by line to the ECC circuit 13a (RPI).
1) An error correction process is performed for each line. The ECC circuit 13a can correct, for example, up to 5 bytes out of 182 bytes in the PI direction, and
The data is written back to the DRAM 12 (WPI1). This ECC processing is called PI1.

Next, 182 lines of vertical (PO direction) data (each 208 bytes) are sequentially read from the SDRAM 12 line by line to the ECC circuit 13a (RPO).
1) An error correction process is performed for each line. The ECC circuit 13a can correct up to 15 bytes out of 208 bytes in the PO direction, for example, and writes only the corrected data back to the SDRAM 12 (WPO1). This ECC processing is called PO1.

Next, 192 lines of horizontal (PI direction) data (182 bytes each) are sequentially read from the SDRAM 12 to the ECC circuit 13a line by line (RPI2).
Error correction processing is performed for each line. This ECC processing is called PI2.

In the conventional circuit configuration shown in FIG.
All scrambled user data (2048 bytes) subjected to ECC processing in the PI2 processing of the circuit 13a is subjected to descrambling processing for descrambling by the descrambling circuit 13b. The descrambled user data is written back to the SDRAM 12 (WPI2), and the EDC circuit 13c detects the presence or absence of an error.

The user data among the data of the ECC layout block in the SDRAM 12 which has completed the ECC processing is read out by the DMA 11 shown in FIG. 6 and sent to the host side (host computer) via the host I / F.

FIG. 9 is a diagram showing pipeline processing by the circuit configuration shown in FIG. Referring to FIG.
An ECC layout block (hereinafter, simply referred to as a block) n demodulated by the deformatter 14 is used in the next stage.
ECC, EDC, and SCR (descrambling) processes are performed by the C circuit 13a, the EDC circuit 13c, and the SCR circuit 13b, and during the period, the next block n
+1 is demodulated.

In the next stage, block n is DMA11
, During which the subsequent block n + 1
Undergoes ECC, EDC, and SCR processing, and simultaneously demodulates the next block n + 2. Hereinafter, similarly, the processing of demodulation → ECC / EDC / SCR → OUT is continued in a pipeline manner.

Next, the transfer operation of management data in the conventional circuit configuration shown in FIG. 7 will be described.

As described above, the management data is various data for managing the disk, and is read by the MPU (controller 112) for controlling the drive of the disk, and the contents are stored for maintenance. The data to be modified.

Unlike the data transmitted to the host side (host computer) such as user data, such management data is only read by the MPU in the recording / reproducing apparatus, and its management data exists from the host side. Can be said to be invisible data.

As a typical example of such management data, the aforementioned defect management list (DM)
There is data of L). This management data is data arranged in the physical address space excluding the user area in the data zone of the data layout on the disk, as described above with reference to FIG. Sometimes, the contents are read from the disk, the contents are modified (updated) according to the contents of the maintenance of the disk, and written back to the disk.

In the conventional circuit configuration shown in FIG.
After each decoding process of C, EDC and SCR is completed, SDR
Management data is cut out from the data written back to the decoding area 12a of the AM 12 and stored by the MPU 112 by software, and is locally transferred to the system area 12b dedicated to management data. The management data held in the system area 12b is transmitted to the MPU 11
According to No. 2, a correction according to the contents of the disk maintenance was added. Extraction of such management data
It is also possible to carry out by a hardware configuration using the DMA 11 (FIG. 6).

FIG. 10 is a diagram showing, with time, data mapping to SDRAM 12 at the time of reading in the circuit configuration of FIG.

That is, one area constituting the decoding area 12a of the SDRAM 12 is one ECC
In FIG. 10, it is assumed that an upper area corresponds to past data, and a lower area corresponds to future data in FIG.

In FIG. 10, when the latest ECC layout block data read from the disk and demodulated is stored in the third area from the top of the decoding area 12a, the second block from the top one block before is stored. For the ECC layout block data stored in the area, the ECC circuit 13a, the SCR circuit 13b,
ECC, SCR, and EDC processes are performed by the EDC circuit 13c, and the data is written back to the area.

The data which has been subjected to the ECC, EDC and SCR processings stored in the uppermost area one block before is read out to the MPU or DMA. It is cut out by hardware or cut out by hardware by the DMA (11) and transferred to the system area 12b.

The management data held in the system area 12b is modified (updated) by the MPU 112 as shown in FIG.

However, in such a conventional circuit configuration, it is necessary to recognize and cut out management data by once converting a logical address of data in the decoding area 12a into a physical address. It is troublesome to read the management data of ECC, EDC, and SCR once, and then to write it back to the decoding area 12a and read the management data therefrom twice. This has led to a decrease in management data transfer efficiency.

FIG. 11 is a block diagram showing a circuit configuration according to an embodiment of the present invention for locally transferring management data read from a disk to a system area.

The circuit configuration shown in FIG. 11 differs from the conventional circuit configuration shown in FIG. 7 in the following points. That is, MP
U112 always recognizes the type of data read from the disk, so if the data read from the disk is management data, a special flag is set in a setting register (not shown) of MPU 112, Only during the period in which the flag is set, the transfer operation specific to the management data described below is executed.

That is, the management data read from the disk is provided to the modulator / demodulator / formatter / deformatter 14, and the modulator / demodulator / formatter / deformatter 14 digitally demodulates the management data and outputs the data.
Deformat to CC layout block, then S
Write to DRAM12.

The ECC processing of the PI1, PO1, and PI2 described above is executed by the ECC circuit 13a on the management data of the ECC layout block stored in the SDRAM 12. If a special flag is set in the MPU 112 and the data currently being processed is management data,
The management data descrambled by the SCR circuit 13b is stored in the decoding area 12 as in the conventional example of FIG.
a, but is directly transferred to the system area 12b of the SDRAM 12.

Thus, the transfer from the descrambling circuit 13b to the system area 12b can be performed once without going through the two operations of writing back to the decoding area 12b and reading from the decoding area 12b as in the conventional example. With the operation described above, local transfer of management data can be executed efficiently.

In summary, since the MPU 112 recognizes what data is currently being read from the disk (for example, the defect management list DML is read when the disk is started to rotate), such management data is read out. When the MPU 112 recognizes that only the transfer of the management data is performed, the MPU 112 sets a special flag in the register, forms a transfer path from the descramble circuit 13b to the system area 12b as shown in FIG. Performs a forced local transfer.

FIG. 12 is a diagram showing, with time, mapping of management data to SDRAM 12 when management data is read in the circuit configuration of FIG.

That is, one area constituting the decoding area 12a of the SDRAM 12 is an area corresponding to one ECC layout block of management data. In FIG. 12, the upper area corresponds to the past data. The lower area corresponds to future data.

In FIG. 12, when the ECC layout block of the latest management data read out from the disk and demodulated is stored in the third area from the top of the decoding area 12a, the second block from the top one block before is stored. For the ECC layout block of the management data stored in the area indicated by ECC, the ECC circuit 13a, the SCR circuit 13b, and the EDC circuit 13c shown in FIG.
DC processing is performed, and the data is directly transferred to the system area 12b.

The management data held in the system area 12b is modified (updated) by the MPU 112 in connection with the maintenance of the read / write operation.

As described above, according to the embodiment of the present invention, regarding the management data read from the disk,
After each processing of ECC, EDC, and SCR, local transfer is forcibly transferred to the system area 12b without writing back to the decoding area 12a of the SDRAM 12, so that
As in the related art, it is possible to save the trouble of once writing back to the decoding area 12a and then reading. Particularly, in the conventional example, since the operation of cutting out the management data from the data once written back to the decoding area 12a is complicated (such as conversion of a logical address to a physical address), the circuit configuration and operation are simplified according to the present invention. And the efficiency of data transfer can be improved.

The embodiments disclosed this time are to be considered in all respects as illustrative and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

[0104]

As described above, according to the present invention, the management data read from the disk is transferred directly to a specific memory area after various decoding processes so that the contents can be modified (updated). Since the configuration is such that the data is held, the circuit configuration and operation relating to the transfer of the management data can be simplified, and the data transfer efficiency can be improved.

[Brief description of the drawings]

FIG. 1 is a diagram schematically showing a relationship between a signal recording mode and a signal format on a magneto-optical disk.

FIG. 2 is a schematic diagram schematically showing an entire data layout on a magneto-optical disk by physical addresses.

FIG. 3 is a schematic diagram showing the format of one frame of recording data in detail.

FIG. 4 is a schematic diagram showing a process of forming data of an ECC layout block.

FIG. 5 is a schematic block diagram of a magneto-optical recording / reproducing apparatus according to an embodiment of the present invention.

FIG. 6 is a schematic block diagram in a case where a part relating to error correction and modulation / demodulation in the recording / reproducing apparatus shown in FIG. 5 is realized by an LSI.

7 is a block diagram showing a conventional circuit configuration related to error correction, descrambling, and local transfer of management data among the circuit configurations shown in FIG. 6;

FIG. 8 shows one unit of EC stored in the SDRAM of FIG. 7;
FIG. 3 is a diagram illustrating a data configuration of a C layout block.

FIG. 9 is a schematic diagram showing pipeline processing by a circuit configuration of a conventional technique.

10 shows an SDR according to the conventional circuit configuration shown in FIG.
FIG. 3 is a schematic diagram showing mapping of an AM to a memory area over time.

FIG. 11 is a diagram showing a circuit configuration for error correction, descrambling, and local transfer of management data according to the embodiment of the present invention.

FIG. 12 is a schematic diagram showing mapping over time to a memory area of the SDRAM according to the embodiment of the present invention;

[Explanation of symbols]

1 magneto-optical disk, 2 frames, 10 LSI, 1
1 DMA, 12 SDRAM, 12a decoding area, 12b system area, 13 ECC / E
DC / SCR / Encoder / Decoder, 13a ECC
Circuit, 13b SCR circuit, 13c EDC circuit, 14
Modulator / Demodulator / Formatter / Deformatter, 15
Waveform equalization and Viterbi decoding circuit, 100 signal operation circuit, 101 magneto-optical disk, 102 pickup,
103 BPF, 104 AD converter, 105 waveform equalization circuit, 106 Viterbi decoder, 107 header detection circuit, 108 data demodulator, 109 error correction circuit, 1
10 PLL circuit, 111 address detection circuit, 112
Controller, 113 error correction code adding circuit, 11
4 data modulator, 115 magnetic head drive circuit, 11
6 Magnetic head, 117 laser drive circuit, 118 motor.

Claims (12)

[Claims] In a recording / reproducing apparatus for a recording medium, management data for managing the recording medium read from the recording medium is locally transferred within the recording / reproducing apparatus without being transferred to a host. A data transfer circuit, comprising: a decoding area for decoding the management data; and a specific area for correcting the management data by control means for controlling recording and reproduction of the recording medium. A possible memory; data writing means for writing the read management data into the decode area of the memory; decoding means for reading and decoding the management data stored in the decode area; Data transfer means for transferring and writing the processed management data to the specific area of the memory; Comprising a data transfer circuit. 2. The data transfer circuit according to claim 1, wherein said control means activates said data transfer means when recognizing that data read from said recording medium is said management data. 3. The decoding means includes means for performing error correction processing on management data read from the decoding area, descrambling means for descrambling the error-corrected management data, and scrambling. 3. The data transfer circuit according to claim 1, further comprising: an error detection unit configured to determine whether an error remains in the management data having been released. 4. The data transfer circuit according to claim 1, wherein said management data includes a defect management list corresponding to a defect of said recording medium. 5. A recording / reproducing apparatus for a recording medium, comprising: means for reading management data for managing the recording medium from the recording medium; control means for controlling recording / reproduction of the recording medium; A data transfer circuit for locally transferring the managed data without transferring it to the host side in the recording / reproducing apparatus, wherein the data transfer circuit comprises: a decode area for decoding the management data; A randomly accessible memory including a specific area for correction processing of the management data by the control means; a data writing means for writing the read management data to the decode area of the memory; Decoding means for reading out the management data stored in the decode area and performing a decoding process; Data, and a writing data transfer unit is transferred to the specific area of the memory, the recording and reproducing apparatus. 6. The recording / reproducing apparatus according to claim 5, wherein said control means activates said data transfer means when recognizing that the data read from said recording medium is said management data. 7. The decoding means, comprising: means for performing error correction processing on management data read from the decode area; descrambling means for descrambling the management data subjected to the error correction processing; 7. The recording / reproducing apparatus according to claim 5, further comprising: an error detecting unit that determines whether an error remains in the management data for which the error has been canceled. 8. The recording / reproducing apparatus according to claim 5, wherein the management data includes a defect management list for dealing with a defect of the recording medium. 9. A recording / reproducing apparatus for a recording medium, wherein management data for managing the recording medium read from the recording medium is locally transferred within the recording / reproducing apparatus without being transferred to a host. Wherein the recording and reproducing apparatus includes a decoding area for decoding the management data, and a specific area for correcting the management data by a control unit that controls recording and reproduction of the recording medium. A memory that is randomly accessible; the method comprising: writing the read management data to a decode area of the memory; reading the management data stored in the decode area and performing a decoding process; Transferring the management data subjected to the decoding process to the specific area of the memory and writing the management data; Including, method. 10. The control unit activates a step of transferring the management data to the specific area when recognizing that the data read from the recording medium is the management data. The method described in. 11. The step of performing the decoding process includes the steps of: performing an error correction process on the management data read from the decode area; descrambling the management data that has been subjected to the error correction process; Determining the residual error of the descrambled management data. 12. The method according to claim 9, wherein the management data includes a defect management list corresponding to a defect of the recording medium.