JP2001203607A - Reception synchronization circuit and reception synchronization device using it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a reception synchronization device that can quickly state data communication by shortening a processing time required for the synchronization. SOLUTION: A searcher/finger circuit (reception synchronization circuit) [k] (k=1, 2, 3, or 4) is provided with a searcher/finger section acting like a searcher circuit that searches an object of a phase for inverse spread demodulation synchronously with a phase of a spread modulation signal from a received signal including the spread modulation signal in a search mode and acting like a finger circuit that tries synchronization according to the searched phase to demodulate the spread modulation signal in a finger mode and with a mode setting section that selects the search mode or the finger mode for the operating mode of the searcher/finger section on the basis of the search result in the search mode, and the selection of the operating mode is automatically conducted in the inside of the reception synchronization circuit [k].

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a CDMA (Code D)
Spread S, including ivision Multiple Access (Code Division Multiple Access) mobile communications
The present invention relates to a reception synchronization circuit that synchronizes the phase of despread demodulation with the phase of a spread modulation signal received by a receiver in (pectrum: SS) communication.

[0002]

2. Description of the Related Art The CDMA system employs a spread spectrum communication technique and has a signal frequency bandwidth of 1.25 [MH].
z], and finely controlling the transmission power enables soft handoff by site diversity and rake reception at the same frequency, thereby realizing a large-capacity communication system. In the CDMA system, an interference signal multiplexed with a communication signal (desired wave) can be treated as thermal noise by a process of spread modulation and despread demodulation.

In the CDMA system, on the transmission side, transmission data is spread-modulated with a spread code called a PN (Pseudorandom Noise) code, and a carrier is modulated with the spread modulation signal to generate a transmission signal. The receiving side converts the received signal including the spread modulated signal into a baseband signal, and demodulates the transmission data by despreading and demodulating the baseband processed received signal with the same PN code as the transmitting side. I do. The receiving side knows in advance the carrier frequency, the bit rate of the transmission data, the chip rate of the PN code, and the 0 and 1 patterns of the PN code.
The phase of the PN code is unknown. Therefore, before starting communication, it is necessary to synchronize the phase of the PN code for despread demodulation generated on the receiving side with the phase of the PN code of the spread modulation signal included in the baseband signal. That is, it is necessary to match the timing of the PN code on the transmission side with that on the reception side. Therefore, the CDMA receiver is provided with a reception synchronization device for synchronizing the phase of the PN code for despread demodulation with the phase of the PN code of the spread modulation signal.

A conventional CDMA receiving synchronization apparatus will be described below. If nothing is done between the transmitting side and the receiving side, the phase of the PN code is shifted. Therefore, in order to achieve synchronization, the phase of the PN code on the receiving side is slid in order, and the correlation with the received signal subjected to baseband processing is obtained.
When the correlation value becomes equal to or greater than a predetermined threshold value, it is treated as having been synchronized. The above correlation value becomes a peak value when the phase of the PN code on the receiving side matches the transmitted PN code included in the received signal.

[0005] Telecommunications Industry Association of the United States (TIA: Telecommunications Industry)
Association and the Electronic Industries Association of the United States (EIA)
ronic Industries Association)
Standard) -95. Hereinafter, a circuit configuration and a synchronization procedure necessary for synchronization with a spread-modulated transmission signal in a CDMA system conforming to the IS-95 will be described.

FIG. 20 is a block diagram of a conventional reception synchronizer provided in a CDMA receiver. The receiving side (receiver) provided with the receiving synchronization device 10 of FIG.
It is a terminal such as a mobile phone, and the transmitting side (transmitter) is a base station.

In FIG. 20, a received signal including a transmission signal from a base station received by antenna 11 is an RF signal.
/ IF circuit 12 converts the signal into a baseband signal.
The baseband reception signal is converted into a binary signal that can be digitally processed by the A / D converter 13, shaped by the digital filter 14, and input to the reception synchronizer 10. The reception synchronizer 10 includes a searcher (Searche
r) a circuit 15, a plurality (three in FIG. 20) of finger circuits 16 to 18 ([1] to [3]), and a CP
U19.

[0008] The searcher circuit 15 searches the baseband reception signal for a candidate for a phase synchronized with the transmission signal from the transmitter (base station). The finger circuits [1] to [3]
A rake (Rake) receiving circuit is configured to demodulate the same data transmitted from different base stations. The finger circuit [n] (k = 1, 2, or 3) performs despread demodulation of the received signal and demodulates transmission data according to the searched phase. The CPU 19 controls the searcher circuit 15 and the finger circuits [1] to [3], and detects the synchronization phase candidate and the finger circuit [1] retrieved by the searcher circuit 15.
The data demodulated by [3] are combined.

In the receiver, if the reception strength of the signal from the transmitter is strong and the phase searched by the searcher circuit 15 is synchronized with the phase of the signal from the transmitter, the finger circuit [n] Data reception becomes possible. Also, 3
The rake receiving circuit including the finger circuits [1] to [3] enables removal of selective fading and soft band off.

In the receiving synchronizer 10, the searcher circuit 15 and the finger circuit [1], the searcher circuit 15 and the finger circuit [2], and the searcher circuit 15 and the finger circuit [3].
Respectively constitute one reception synchronization circuit (conventional reception synchronization circuit).

With reference to FIGS. 21 to 23, a process up to the synchronization (synchronization establishment process) will be described. FIG. 21 is a flowchart of a conventional synchronization establishing process. FIG. 22 is a subroutine of the search process (step ST1) of FIG. 21, and FIG. 23 is a subroutine of the finger assignment process (step ST3) of FIG. In the conventional reception synchronizer 10, the control of the entire synchronization establishment process is performed by C
PU19.

Referring to FIG. 21, first, in step ST1.
Then, the CPU 19 sends a search start command to the searcher circuit 15 to search for a synchronizable phase (synchronous phase candidate). That is, in the searcher circuit 15, the PN on the receiving side is
The phase of the code is sequentially shifted, and the correlation value with the received signal at each phase is calculated. Next, step ST2
Then, the CPU 19 reads the above correlation value, and if the correlation value is equal to or greater than the threshold Th, the phase of the correlation value is:
It is determined that it is a synchronization phase candidate, and in step ST3, the phase of the PN code of the finger circuit [n] is set according to the synchronization phase candidate. That is, finger assignment is performed. If the correlation value is less than the threshold value Th, the process returns to step ST1 to search for a synchronization phase candidate again.

Next, in step ST4, the CPU 19
It is determined whether or not synchronization has been established in the finger circuit [n] to which the finger assignment has been made. Note that establishment of synchronization is referred to as lock, and that synchronization is not established is referred to as unlock. That is,
In the finger circuit [n], a correlation value (reception strength) at the assigned phase is calculated, and the correlation value is read. If the correlation value is equal to or greater than the threshold Th, synchronization is established at the assigned phase and communication starts. It is determined that it is now possible to complete this flow. Further, the correlation value is equal to the threshold value Th.
If it is less than the threshold, it is determined that synchronization has not been established at the assigned phase, and the process returns to step ST1 to search for a synchronization phase candidate again. When the above-described synchronization control sequence is completed and synchronization is established, a telephone call (data communication) can be started.

The search processing in step ST1 is performed as shown in FIG.
This will be described with reference to FIG. The CPU 19 determines in step S of FIG.
At T11, the chip rate and the pattern of the PN code generated by the searcher circuit 15 are set, and at step ST12
Then, the search start phase, search phase range, and the like of the PN code are set. In step ST13, the search phase width, search phase shift pitch, and the like of the PN code are set.
In step ST15, a search start command is set, and this search start command is sent to the searcher circuit 15. In the searcher circuit 15, the correlation value at each search phase is set. Is calculated.

Next, at step ST16, the CPU 19
Determines whether the calculation of the correlation values in the entire search phase range has been completed, and if the calculation of all the correlation values has been completed, in step ST17, the three peak correlation values ( Peak [1], Peak [2], Peak [3]) are read, and in step ST18, the phase of the peak correlation value (the search phase when the peak correlation value is calculated) is read to perform the search process. Complete.

The finger assignment processing in step ST3 will be described with reference to FIG. The finger assignment processing of FIG. 23 includes three finger circuits [1], [2], and [3].
Is carried out for each. Therefore, the finger assignment process of FIG. 23 is a three-time loop process. CPU
In step ST21 of FIG. 23, the finger circuit number (the number of loops) n is initialized to n = 1, and step ST21 of FIG.
At T22, the P currently set for the finger circuit [1] is set.
The phase of the N code (PN phase) is read, and step ST2 is executed.
In step 3, the chip rate and pattern of the PN code (PN code used in the search process) to be set are set in the finger circuit [1]. In step ST24, the phase of the peak correlation value Peak [1] and the finger circuit are set. The phase difference from the PN phase currently set in [1] is calculated, the PN phase of the finger circuit [1] is shifted by the above-described phase, and the phase of the peak correlation value Peak [1] is changed to the finger circuit [1]. And the finger assignment of the finger circuit [1] ends.

Next, steps ST25 and ST26
Then, the finger circuit number n is incremented to n = 2,
In steps ST22 to ST24, the peak correlation value Pe
The phase of ak [2] is assigned to finger circuit [2]. After that, the finger circuit number n is incremented to n = 3, and the phase of the peak correlation value Peak [3] is assigned to the finger circuit [3]. Then, in step ST25, n
If = 3, the finger assignment process is completed. If the three finger circuits [1], [2], and [3] can synchronously capture the same transmission signal from different base stations, soft handoff by site diversity can be realized.

FIG. 24 is a circuit diagram of the searcher circuit 15. 24, the searcher circuit 15 includes a PN code generator 21, a multiplier 22, an accumulator 23, an amplitude calculator 24, a phase counter 25, and a multiplexer (MU).
X) 26, a sorter 27, and a memory 28.

The PN code generator 21 generates a PN code for synchronizing phase search. This PN code generator 21
Mask of the generated PN code (chip rate, pattern,
And a function of adjusting the phase (timing) of the generated PN code from the phase counter 25. The phase of the PN code generator 21 is adjusted in accordance with a phase shift command from the CPU 19 or a phase shift command from the phase counter 25 input from the multiplexer 26.

In the multiplier 22, the input received signal and P
Multiplying by the PN code from the N code generator 21, the sampler (correlation length) requested by the CPU 19 is accumulated by the accumulator 23, and the received signal and P are accumulated by the amplitude calculator 24.
A correlation value with the N code is calculated.

When the correlation value is calculated by the amplitude calculator 24, the phase counter 25 sends a signal to the PN code generator 21.
A request is made to shift the phase of the PN code by the search phase shift pitch. When the calculation of the correlation values in the entire search phase range requested by the CPU 19 is completed, the CPU 19 is notified of the end of the search. The sorter 27 rearranges the search result (a set of a phase and a correlation value), and holds the top three phases and the correlation values having a large correlation value in the memory 28.

FIG. 25 is a flowchart of the operation sequence of the searcher circuit 15. The operation is started by a search start command from the CPU 19, and first, in step ST
In step 31, the PN phase of the PN code generator 21 is shifted to the search start phase in accordance with the search start command, and step ST
At 32, a correlation value with the received signal at the search phase is calculated. Next, in step ST33, the search results are rearranged in descending order of the correlation value (Sort), and in step ST34, the PN
The phase is shifted by the search phase shift pitch. Next, in step ST35, it is determined whether or not the search in the entire search phase range (calculation of the correlation value in the entire search phase range) is completed. If the search in the entire search phase range is not completed, Step ST
Returning to 32, the above operation sequence is repeated. Also,
When the search in the entire search phase range is completed, the CPU 19
To the end of the search, and this flow is completed.

FIG. 26 shows a finger circuit [n] (n = 1,
FIG. 2 is a circuit configuration diagram of 2 or 3). The finger circuits [1], [2], and [3] have the same circuit configuration. FIG.
, The finger circuit [n] includes a PN code generator 31
, A multiplier 32, an accumulator 33, an amplitude calculator 34,
Filter 35 and lock / unlock
A determiner 36, a DLL (Delay Locked Loop) 37,
And a multiplexer (MUX) 38.

The DLL 37 is composed of two sets of correlators. The two sets of correlators have a PN code that is a half chip ahead of the PN code used for despread demodulation of the actual signal.
An early code and a PN code (late code) delayed by half a chip phase are injected. This DLL
37 finely adjusts the phase of the PN code for despread demodulation generated by the PN code generator 31 so that the correlation value becomes maximum, and varies with the change in the path between the base station and the terminal. The synchronization between the spread modulation signal transmitted from the base station and the PN code generated on the receiving side is maintained. PN code generator 31
Is for generating a PN code for despreading demodulation. The function of setting the mask (chip rate, pattern, phase, etc.) of the generated PN code from the CPU 19 and the phase (timing) of the generated PN code. It has a function of fine adjustment from the DLL 37. The phase of the PN code generator 31 is adjusted according to a phase shift command from the CPU 19 or a phase shift command from the DLL 37, which is input from the multiplexer 38.

In the multiplier 32, the input transmission signal and P
The PN code from the N code generator 31 is multiplied, and the accumulator 33 accumulates one symbol (for example, 64 chips), and the amplitude calculator 34 calculates a correlation value (reception strength) with the received signal. The calculated correlation value is applied to the filter 35
, And the average received signal strength is input to the lock / unlock determiner 36. The lock / unlock determiner 36 determines that the received signal strength is equal to or greater than a predetermined threshold value, and determines that the received signal strength is unlocked, and outputs the unlocked signal to the CPU 19. The DLL 37 finely adjusts the PN phase (timing) of the PN code generator 31 so that the correlation value in the amplitude calculator 34 becomes maximum with respect to the fluctuation of the input received signal, and maintains the synchronization.

FIG. 27 is a flowchart of the operation sequence of the finger circuit 16. The operation is started by a phase shift command from the CPU 19, and first, in step ST
At 41, the PN phase of the PN code generator 31 is shifted in accordance with the phase shift command.
37, fine adjustment of the phase is started.
Calculates the correlation value (reception strength), and proceeds to step ST44.
Then, the correlation value is filtered to generate an average reception intensity. Next, in step ST45, if the average reception intensity is equal to or higher than the predetermined threshold, it is determined that the lock is completed (synchronization is completed), and if the average reception intensity is less than the predetermined threshold, the lock is determined to be unlocked (sync failure). The result is notified to the CPU 19, and this flow is completed.

[0027]

However, the above-mentioned conventional reception synchronization circuit and reception synchronization device have the following problems. In order for the receiver to synchronize with the transmitted signal,
A synchronization control sequence such as 1 is required, and the processing time required for these is not short. Until the receiver synchronizes with the signal from the transmitter, the data from the transmitter cannot be demodulated, and the time between them is wasted in data communication. Taking a mobile phone as an example, it takes time for the user to start a call after turning on the power, it takes time to start a call after moving from outside the service area to the service area, and intermittent during standby. There is a problem in that the power for the time required for the synchronization process besides the data reception is additionally consumed in the reception.

An object of the present invention is to provide a reception synchronization circuit that can reduce the processing time required for synchronization and enable a receiver to start data communication quickly. Another object of the present invention is to provide a reception synchronization circuit capable of reducing power consumption.

[0029]

SUMMARY OF THE INVENTION A reception synchronization circuit according to the present invention is a reception synchronization circuit for synchronizing a phase of a despread demodulation with a phase of a received spread modulation signal. A searcher for searching for a candidate for a despread demodulation phase synchronized with the phase of the spread modulation signal from a received signal including the signal, and in a finger mode, attempts synchronization in accordance with the searched phase and demodulates the spread modulation signal. / Finger unit, and a mode setting unit for switching the operation mode of the searcher / finger unit to the search mode or the finger mode based on a search result in the search mode.

[0030]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment FIG. 1 is a block diagram of a reception synchronization apparatus according to a first embodiment of the present invention provided in a CDMA receiver. In FIG. 1, the same components as those in FIG. 20 are denoted by the same reference numerals. It is assumed that the receiving side (receiver) provided with the receiving synchronizer 40 in FIG. 1 is a terminal such as a mobile phone, and the transmitting side (transmitter) is a base station.

In FIG. 1, a received signal including a transmission signal from a base station received by antenna 11 is RF /
The signal is converted into a baseband signal by the IF circuit 12. The baseband reception signal is converted into a digital signal that can be digitally processed by the A / D converter 13, shaped by the digital filter 14, and input to the reception synchronization circuit 40. The reception synchronizer 40 according to the first embodiment includes a plurality of (four in FIG. 1) searcher / finger (Searcher-
Finger) circuits 41 to 44 ([1], [2], [3],
[4]), and a CPU 45.

Searcher / finger circuit [k] (k = 1,
2, 3, or 4) is a reception synchronization circuit for synchronizing the phase of the despread demodulation with the phase of the received spread modulation signal,
In the search mode, a candidate for a despread demodulation phase synchronized with the phase of the spread modulation signal is searched from the received signal including the spread modulation signal, and in the finger mode, synchronization is attempted according to the searched phase, and the spread is attempted. A searcher / finger section for demodulating the modulated signal; and a mode setting section for switching an operation mode of the searcher / finger section to a search mode or a finger mode based on a search result in the search mode.

That is, the searcher / finger circuit [k]
Is a search function of the searcher circuit 15 in FIG. 21 (a function of searching for a synchronization phase candidate) and a finger function of the finger circuit [n] (determines whether or not synchronization can be established with the assigned phase, and establishes synchronization. If possible, maintain synchronization and demodulate the transmitted data).
By automatically switching between the two functions, the process from the search for the synchronization phase candidate to the establishment of the synchronization is performed without the intervention of the CPU 45.

The CPU 45 starts synchronization with the searcher / finger circuit [k] when the terminal is turned on or when the terminal shifts from a standby state in which the terminal stops its operation to an operation state in which a signal can be received. A command (corresponding to a conventional search start command) is sent. When the searcher / finger circuit [k] cannot establish synchronization, the synchronization start command is sent again. Also, the CPU 45
Synthesizes data demodulated by the respective searcher / finger circuits [1] to [4] when the searcher / finger circuits [1] to [4] are operating in the finger mode. In the reception synchronizer 40 of the first embodiment, FIG.
Unlike the conventional reception synchronizer of 0, the CPU 40 does not need to control the reception synchronization circuit during the synchronization establishment process.

Further, the searcher / finger circuits [1] to
[4] constitutes a rake receiving circuit. If the four searcher / finger circuits [1] to [4] can synchronously capture the same transmission signal from different base stations, soft handoff by site diversity can be realized.

FIG. 2 is a circuit diagram of the searcher / finger circuit [k]. Searcher / finger circuit [1],
[2], [3], and [4] have the same circuit configuration. 2, a searcher / finger circuit [k] includes a PN code generator 51 (spreading code generator), a multiplier 52, an accumulator 53, an amplitude calculator 54, a phase counter 55, and a multiplexer (MUX). ) 56 and DLL (Delay Locked L)
oop) 57, sorter (Sorter) 58, and memory 59
, A threshold value determination circuit 60 (mode setting unit), a filter 61, and a lock / unlock (Lock / Unlock) determination device 62.

The PN code generator 51 generates a PN code for synchronous phase search in the search mode, and generates a PN code for despread demodulation in the finger mode. The PN code generator 51 converts the mask (chip rate, pattern, phase, etc.) of the generated PN code into a CP
The function to be set from U45 and the phase (timing) of the generated PN code are set by the phase counter 55 (in the search mode), the DLL 57 (in the finger mode), or the threshold value judgment circuit 60 (switching from the search mode to the finger mode). Has a function to adjust from PN
The phase of the code generator 51 is the same as the phase shift command from the CPU 45, the phase shift command from the phase counter 55, the phase shift command from the DLL 57, or the phase shift command from the threshold value judgment circuit 60, which is input from the multiplexer 51. It is adjusted according to.

The multiplier 52 receives the input transmission signal and PN
The PN code from the code generator 51 is multiplied. In the finger mode, the input transmission signal is multiplied by a PN code generated by the PN code generator 51 (a PN code synchronized with a spread modulation transmission signal included in the transmission signal), whereby
The transmitted data can be despread and demodulated. The accumulator 53 accumulates the multiplied value of the sample (correlation length) requested by the CPU 45 and outputs the accumulated multiplied value to the amplitude calculator 5.
4 is output. Here, one symbol (for example, 64
The product of (chips) is accumulated. The amplitude calculator 54 calculates P
A correlation value between the N code and the received signal is calculated, and the correlation value is output to the phase counter 55, the sorter 58, and the filter 61.

When the correlation value is calculated by the amplitude calculator 54 in the search mode, the phase counter 55
It requests the code generator 51 to shift the PN phase by a predetermined phase shift width. The sorter 58 rearranges search results (a set of phase and correlation value) in the search mode,
A set of phases and correlation values having the largest correlation value is stored in the memory 5
9 is held.

When the calculation of the correlation values of all the phases within the search phase range is completed, the threshold determination circuit 60
Is compared with a predetermined threshold value. If the correlation value is equal to or larger than the threshold value, the operation mode of the searcher / finger circuit [k] is switched from the search mode to the finger mode. If the correlation value stored in the memory 59 is less than the threshold value, it indicates that the synchronization phase candidate could not be searched for.
Notify PU45.

The DLL 57 has two sets of correlators in which a PN code advanced by a half-chip phase and an PN code delayed by a half-chip phase than the PN code used for despread demodulation of an actual signal. (Late code) is injected. When the DLL 57 is in the finger mode, P
PN for despread demodulation generated by N code generator 31
The phase of the code is finely adjusted so that the correlation value becomes maximum, and the spread modulation signal transmitted from the base station which fluctuates with the change of the path between the base station and the terminal, and the PN code generated on the receiving side Keep in sync with.

The filter 61 filters the correlation value (reception intensity) and outputs the average reception intensity to the lock / unlock decision unit 62. Lock / unlock determiner 6
In the finger mode, when the average reception intensity is equal to or higher than a predetermined threshold, the lock is established (synchronization is established, synchronization is completed), and when the average reception intensity is lower than the threshold, unlock ( It is determined that synchronization has not been established or synchronization has failed), and the determination result is notified to the CPU 45.

FIG. 3 is a flowchart of the operation sequence of the searcher / finger circuit [k]. The operation is started by a synchronization start command from the CPU 45. First, in step ST51, the PN phase of the PN code generator 51 is shifted to a phase to be searched, and in step ST52, a correlation value at the above-described search phase is calculated. Next, step ST
At 53, the correlation results are rearranged in descending order of correlation value, and at step ST54, the PN phase is shifted by a predetermined shift width.
Next, in step ST55, it is determined whether or not all phases within the search phase range have been searched. If all phases have not been searched, the process returns to step ST52, and new settings are made in step ST54. The correlation value of the calculated phase is calculated. The operation sequence so far corresponds to the operation sequence of the conventional searcher circuit of FIG.

If the search for all phases within the search phase range has been completed, it is determined in step ST56 whether or not the maximum correlation value is equal to or greater than the threshold value Th, and the maximum correlation value is determined to be less than the threshold value Th. In the case of, it is determined that the synchronization has failed, and the CPU 4
Notify 5. When the maximum correlation value is equal to or larger than the threshold Th, the mode is switched from the search mode to the finger mode, and the process proceeds to step ST57.

In step ST57, the PN code generator 31
Is shifted to the phase having the maximum correlation value, and the fine adjustment of the phase by the DLL 57 is started in step ST58, the correlation value (reception intensity) is calculated in step ST59, and the correlation value is calculated in step ST60. A filtering process is performed to generate an average reception intensity. Next, step ST61
If the average reception intensity is equal to or higher than a predetermined threshold, it is determined to be locked (synchronization completed).
Notify U45. If unlocked, the judgment result is C
After notifying the PU 45, the searcher / finger circuit [k] stops operating. If locked, the searcher / finger circuit [k] maintains synchronization in the finger mode and demodulates transmitted data. The processing after step ST57 corresponds to the operation sequence of the conventional finger circuit in FIG.

Steps ST51 to ST55 in FIG. 3 will be described below with reference to FIG. The CPU 45 includes a searcher /
Activate the finger circuit [k] and send a synchronization start command. Here, in order to realize the site diversity, synchronization start commands of different search phase ranges are sent to the searcher / finger circuits [1] to [4]. When activated, the searcher / finger circuit [k] starts operating in the search mode. In this search mode, the DLL
The operation of the filter 57, the filter 61, and the lock / unlock determiner 62 is stopped.

When the synchronization start command is input, the phase counter 55 shifts the PN phase of the PN code generator 51 to the phase to be searched. The multiplier 52, the accumulator 53, and the amplitude calculator 54 calculate a correlation value between the received signal and the PN phase. After the correlation value is calculated, the phase counter 55
It requests the PN code generator 51 to shift the PN phase. In this way, the PN phases are sequentially shifted within the search phase range, and the correlation value at each PN phase is calculated. Sorter 58 stores the phase having the largest correlation value and the correlation value in memory 59 by sequentially comparing the calculated correlation value with the correlation value stored in memory 59. When the search is completed for all phases within the search phase range, the phase counter 55 activates the threshold value determination circuit 60 and notifies the threshold value determination circuit 60 of this fact.

Step ST56 of FIG. 3 will be described below with reference to FIG. When the calculation of the correlation value is completed, the threshold value determination circuit 60 compares the maximum correlation value stored in the memory 59 with a predetermined threshold value.
It requests the N code generator 51 to shift the PN phase to the phase stored in the memory 59, and
7 is started to start fine adjustment of the PN phase. Further, the correlation length of the accumulator 53 is represented by a symbol length (for example, for 64 chips).
, And activates the filter 61 and the lock / unlock determiner 62. Thereby, the operation mode of the searcher / finger circuit [k] is switched from the search mode to the finger mode. Further, the operations of the phase counter 55, the sorter 58, the memory 59, and the threshold determination circuit 60 are stopped to reduce power consumption.

If the maximum correlation value stored in the memory 59 is less than a predetermined threshold value, the threshold value judgment circuit 6
0 indicates that the synchronization phase candidate could not be searched.
5 and then stop the operation of the searcher / finger circuit [k].

Steps ST57 to ST61 in FIG. 3 will be described below with reference to FIG. The PN code generator 51 shifts the PN phase to the phase having the maximum correlation value stored in the memory 59 according to the request from the threshold value judgment circuit 60,
The LL 57 finely adjusts the PN phase so that the correlation value with the received signal becomes maximum (so that the correlation value follows the peak value). Multiplier 52, accumulator 53, and amplitude calculator 5
4 calculates a correlation value (reception strength) between the reception signal and the PN phase. The filter 61 performs a filtering process on the calculated correlation value to generate an average reception intensity. The lock / unlock determiner 62 determines that the lock (synchronization has been completed) if the average reception strength is equal to or higher than a predetermined threshold, and determines that the lock (unsynchronization has failed) if the average reception strength is lower than the predetermined threshold. The CPU 45 is notified of the determination result. When the synchronization is completed, the synchronization is maintained and the transmitted data is despread and demodulated. If the synchronization has failed, the determination result is returned to the CPU.
After notifying 45, the searcher / finger circuit [k]
Stop the operation of.

As described above, the PN code generator 51, the multiplier 52, the accumulator 53, the amplitude calculator 54, the phase counter 5
5. The multiplexer 56, the DLL 57, the sorter 58, the memory 59, the filter 61, and the lock / unlock determiner 62 search for a candidate for the phase of the despread demodulation synchronized with the phase of the spread modulation signal in the search mode. , In the finger mode, a searcher / finger unit that maintains synchronization according to the searched phase and demodulates the spread modulation signal. The threshold value determination circuit 60 corresponds to a mode setting unit that switches the operation mode of the searcher / finger unit to the search mode or the finger mode based on a search result in the search mode.

In the search mode in the searcher / finger section, the PN code generator 51, multiplier 52, accumulator 53, amplitude calculator 54, phase counter 55, multiplexer 56, sorter 58, and memory 59 store the synchronous phase. It operates as a searcher circuit for searching for candidates. In the finger mode, the PN code generator 51,
Multiplier 52, accumulator 53, amplitude calculator 54, multiplexer 56, DLL 57, filter 61, and lock /
The unlock determiner 62 operates as a finger circuit that maintains synchronization and demodulates the spread modulation signal.

As described above, in the first embodiment, the searcher / finger section which operates as a searcher circuit or a finger circuit according to the operation mode, and switches from the search mode to the finger mode based on the search result in the search mode. A mode setting unit (threshold value judging circuit 60) for storing the maximum correlation value and the phase at that time in the memory 59 in the search mode, and comparing the correlation value with the threshold value by the mode setting unit By providing a reception synchronization circuit (searcher / finger circuit [k]) for switching to the finger mode when the correlation value is equal to or greater than the threshold value, the operation mode of the reception synchronization circuit can be switched by the CPU 4.
This is automatically performed inside the reception synchronization circuit without going through the step 5.
Switching of the operation mode by hardware in the reception synchronization circuit is faster than switching by software control of the general-purpose CPU, so that the time required for the synchronization process can be reduced, thereby enabling the receiver to quickly perform data communication. Can be started, and power consumption can be reduced. Also, the CPU 45
Can be reduced, and the communication between the reception synchronization circuit and the CPU 45 can be reduced.

Second Embodiment In the above-described first embodiment, one phase having the largest correlation value is stored in the memory 59, and synchronization is attempted using this one phase. Then, the above-mentioned N (N ≧ 2) phases having large correlation values are stored in the memory 59, and synchronization is sequentially attempted with the N phases.

FIG. 4 is a circuit diagram of a searcher / finger circuit according to a second embodiment of the present invention. Searcher of Fig. 4 /
The finger circuit 70 can be applied to the searcher / finger circuit [k] (k = 1, 2, 3, or 4) in FIG. In FIG. 4, the same components as those in FIG. 2 are denoted by the same reference numerals, and the description of the overlapping portions will be omitted.

The searcher / finger circuit 70 is obtained by adding a counter 71 to the searcher / finger circuit of FIG. In the search mode, the operation until the correlation value is input to the sorter 58 is the same as in the first embodiment. The sorter 58 rearranges the search results and stores the top N phases having the largest correlation values and the corresponding correlation values in the memory 59.
To memorize.

When the N synchronization phase candidates are stored in the memory 59, the threshold value judgment circuit 60 resets the counter 71, reads the first synchronization phase candidate and its correlation value from the memory 59, and To the threshold value. When the read correlation value is equal to or larger than the threshold value, the mode is switched to the finger mode. However, even if it is in finger mode,
The operation of the threshold determination circuit 60 does not stop. When the read correlation value is smaller than the threshold value, the counter 71
Is incremented, and the next synchronization phase candidate and its correlation value are read and compared with a predetermined threshold value.

The lock / unlock determiner 62
The average received signal strength is compared with a predetermined threshold value, and if it is determined that the lock (synchronization is completed), the CPU 45 (FIG. 1)
(See). As a result, the searcher / finger circuit 70 maintains synchronization and demodulates the transmitted signal.
When the lock / unlock determiner 62 determines that the lock is unlocked, the lock / unlock determiner 62 increments the counter 71.

The threshold value judging circuit 60 sequentially reads the N synchronization phase candidates and their correlation values from the memory 59 while referring to the counter 71, and tries successive synchronization. If the synchronization cannot be established in any of the N synchronization phase candidates, the CPU 45 is notified of the synchronization failure.

FIG. 5 is a flowchart of the operation sequence of the searcher / finger circuit 70. In FIG. 5, the same steps as those in FIG. 3 are denoted by the same reference numerals, and the description of the overlapping portions will be omitted.

If the correlation value stored in the memory 59 is less than the threshold value Th in step ST56 of FIG. 5, the process proceeds to step ST62. Also, when it is unlocked (synchronization failure) in step ST61, the process proceeds to step ST62.

In step ST62, it is determined whether or not synchronization has been attempted with respect to the N synchronization phase candidates. If synchronization has already been attempted with all N candidates, and synchronization has failed, the synchronization failure is determined by the CPU 45. (See FIG. 1) and the flow ends. Also, if there is a synchronization phase candidate that has not attempted synchronization,
Returning to step ST56, the synchronization phase candidate is compared with the threshold value Th.

Thus, for N synchronization phase candidates,
Synchronization is attempted sequentially, and if any of the synchronization phase candidates can lock the finger operation, the completion of the synchronization is notified to the CPU 45 (see FIG. 1), the synchronization is maintained, and the transmitted data is despread and demodulated.

As described above, in the second embodiment, in the search mode, the upper N synchronization phase candidates having large correlation values and the corresponding correlation values are stored in the memory 59, and in the finger mode, the N synchronization phase candidates are stored. By sequentially trying to synchronize with the phase candidates, even when the correlation value of the noise temporarily becomes larger than the correlation value of the spread modulation transmission signal at the time of search, synchronization with the spread modulation transmission signal can be established. . As in the first embodiment, the time required for the synchronization processing can be reduced, the power consumption can be reduced, the processing load on the CPU can be reduced, and the reception synchronization circuit and the CPU can be used.
The communication between them can be reduced.

Third Embodiment In the first embodiment, the phase having the largest correlation value is used. In the second embodiment, the upper N (N ≧ N) having the largest correlation value is used.
2) The phases are stored in the memory 59 and then compared with the threshold value. In the third embodiment, the calculated correlation value is compared with the threshold value first, and the correlation value is determined by the threshold value. The above phase is stored in the memory 59.

FIG. 6 is a circuit diagram of a searcher / finger circuit according to a third embodiment of the present invention. Searcher of Figure 6 /
The finger circuit 80 can be applied to the searcher / finger circuit [k] (k = 1, 2, 3, or 4) in FIG. 6, the same components as those in FIG. 4 are denoted by the same reference numerals, and the description of the overlapping portions will be omitted.

In the searcher / finger circuit 80, the correlation value calculated by the amplitude calculator 54 in the search mode is input to the threshold value judgment circuit 60. If the correlation value input from amplitude calculator 54 is equal to or greater than a predetermined threshold, threshold value determination circuit 60 stores the correlation value and phase in memory 59. The sorter 58 rearranges the search results (the set of the correlation value and the phase) stored in the memory 59 in descending order of the correlation value.

Thereafter, the threshold value judging circuit 60 switches from the search mode to the finger mode, and tries to synchronize in order from the synchronization phase candidate having the largest correlation value stored in the memory 59. First, the threshold determination circuit 60 includes a counter 71
Is reset, and a request is made to shift the PN phase of the PN code generator 51 to the synchronization phase candidate having the largest correlation value. The lock / unlock determiner 62 determines whether or not the finger operation can be locked with the synchronization phase candidate having the largest correlation value,
If locked, the CPU 45 is notified of the completion of synchronization.
If the synchronization is completed, the searcher / finger circuit 80
The transmitted data is demodulated while maintaining synchronization in the above phase. The lock / unlock determiner 62 increments the counter 71 if unlocked. When the counter 71 is incremented, the threshold value judgment circuit 6
0 attempts to synchronize with the next synchronization phase candidate.

As described above, the threshold determination circuit 60 attempts to sequentially synchronize all the synchronization phase candidates equal to or higher than the threshold value, and when the finger operation is unlocked for all the synchronization phase candidates. , The synchronization failure is reported to the CPU 45.

FIG. 7 is a flowchart of the operation sequence of the searcher / finger circuit 80. Note that, in FIG. 7, the same steps as those in FIG. 5 are denoted by the same reference numerals, and description of overlapping parts will be omitted.

When the correlation value is calculated in step ST52 of FIG. 7, it is determined in step ST71 whether or not the correlation value is equal to or larger than a threshold value Th. In ST72, the above-described correlation value and the phase at that time are written in the memory 59, and the process proceeds to step ST54. If the correlation value is less than the threshold value Th, the data is not written in the memory 59 and the process proceeds to step ST5.
Proceed to 4.

In step ST55, it is determined whether or not all phases within the search phase range have been searched. If all phases have been searched, in step ST73, the search written in the memory 59 is performed. The results are rearranged in descending order of the correlation value. In step ST74, the synchronization phase candidates are read from the memory 59 (the synchronization phase candidates stored in the memory 59 are sent to the PN code generator 51), and the process proceeds to step ST57.

If it is unlocked in step ST61, it is determined in step ST62 whether or not synchronization has been attempted for all the synchronization phase candidates written in the memory 59. If the candidate remains, the process returns to step ST74, and attempts to synchronize. Also. Synchronization is attempted for all the synchronization phase candidates, and if none of the synchronization phase candidates can lock the finger operation, the CPU 45 (see FIG. 1) is notified of the synchronization failure and stops the operation.

As described above, in the third embodiment, in the search mode, the synchronization phase candidate having the correlation value equal to or more than the predetermined threshold value and the corresponding correlation value are stored in the memory 59, and in the finger mode, the memory 59 is stored. By sequentially trying to synchronize with the synchronization phase candidates stored in the above, even if the correlation values of a large number of noises temporarily become larger than the correlation values of the spread modulation transmission signal at the time of search, the spread modulation transmission signal And synchronization can be established. Further, since only the correlation value equal to or greater than the predetermined threshold value is stored in the memory 59, there is no need to store in the memory 59 a useless phase in which synchronization is not attempted at a value less than the threshold value. Further, similarly to the first embodiment, the time required for the synchronization process can be reduced, the power consumption can be reduced, the processing load on the CPU can be reduced, and the communication between the reception synchronization circuit and the CPU can be reduced. .

Fourth Embodiment In the first to third embodiments, in the search mode, the search mode is switched to the finger mode after searching for a synchronization phase candidate. However, in the fourth embodiment, In the search mode, the correlation value of the searched synchronization candidate phase is calculated again (verification of the synchronization candidate phase). If the calculated correlation value is equal to or more than a predetermined threshold value, the mode is switched to the finger mode.

FIG. 8 is a circuit diagram of a searcher / finger circuit according to a fourth embodiment of the present invention. Searcher of Fig. 8 /
The finger circuit 90 can be applied to the searcher / finger circuit [k] (k = 1, 2, 3, or 4) in FIG. 8, the same components as those in FIG. 6 are denoted by the same reference numerals, and the description of the overlapping portions will be omitted.

The searcher / finger circuit 90 differs from the searcher / finger circuit 80 of FIG. 6 in that the threshold value judgment circuit 60 is replaced by a threshold value judgment circuit 91 and the filter 61 and the lock / unlock judgment device 62 are deleted. is there.
In the searcher / finger circuit 90, the operation of storing the synchronization phase candidates whose correlation values are equal to or greater than the threshold value in the memory 59 and rearranging them in the descending order of the correlation values is the same as that of the third embodiment.

After rearranging the correlation values, the threshold determination circuit 91 does not immediately switch to the finger mode, but calculates the correlation value again for the synchronization phase candidates stored in the memory 59, and Verify If the re-calculated correlation value becomes equal to or larger than the threshold value again, the correlation value is for the spread modulation transmission signal, it is determined that the spread modulation signal exists, the mode is switched to the finger mode, and the completion of synchronization is notified. The CPU 45 (see FIG. 1) is notified. If the correlation value calculated again is less than the threshold value, it is determined that the first correlation value is for the noise component, and the memory 59
Will be verified with respect to the other synchronization phase candidates stored in.
If the correlation values calculated again for all the synchronization phase candidates stored in the memory 59 are less than the threshold value, the CPU 45 is notified of the synchronization failure.

FIG. 9 is a flowchart of the operation sequence of the searcher / finger circuit 90. In FIG. 9, the same steps as those in FIG. 7 are denoted by the same reference numerals, and the description of the overlapping portions will be omitted.

In step ST81 of FIG. 9, a correlation value is calculated again for the synchronization phase candidate stored in the memory 59,
In step ST82, it is determined whether or not the recalculated correlation value is equal to or greater than the threshold Th. When the correlation value calculated again is equal to or larger than the threshold Th, in step ST83, the mode is switched to the finger mode, it is determined that the synchronization is completed, and the finger operation is maintained. The correlation value calculated again is equal to the threshold value T.
If it is less than h, it is determined that synchronization cannot be established, and the process proceeds to step ST62.

In step ST62, it is determined whether or not verification has been attempted for all the synchronization phase candidates written in the memory 59. If there are remaining synchronization phase candidates for which verification has not been performed, the process proceeds to step ST74. Return and try verification.
Also. Verification is attempted for all the synchronization phase candidates, and if it is determined that synchronization cannot be established with any of the synchronization phase candidates, a synchronization failure is notified to the CPU 45 and the operation is stopped.

As described above, in the fourth embodiment, in the search mode, after searching for a synchronization phase candidate, a correlation value is calculated again for this synchronization candidate phase, and synchronization is performed with the synchronization candidate phase. It verifies whether the spread modulated signal can be demodulated reliably (that is, whether the spread modulated signal exists reliably), and if it can verify that the spread modulated signal exists reliably, switches to the finger mode and maintains synchronization. By doing so, before switching to the finger mode, it is possible to determine whether the synchronization phase candidate is synchronized with the spread modulation transmission signal or temporarily synchronized with noise. It is not necessary to switch the operation mode for the determination, and the filter 61 (FIG. 6)
) Can be reduced. As a result, further speeding up of the synchronization processing can be expected. Further, similarly to the first embodiment, the time required for the synchronization process can be reduced, the power consumption can be reduced, the processing load on the CPU can be reduced, and the communication between the reception synchronization circuit and the CPU can be reduced. .

The threshold discriminating circuit 91 of the fourth embodiment, which switches to the finger mode after verifying the retrieved synchronization phase candidate, can be applied to the first or second embodiment. is there.

Fifth Embodiment FIG. 10 is a circuit diagram of a searcher / finger circuit according to a fifth embodiment of the present invention. The searcher / finger circuit 100 of FIG. 10 corresponds to the searcher / finger circuit [k] of FIG.
(K = 1, 2, 3, or 4). In FIG. 10, the same components as those in FIG. 8 are denoted by the same reference numerals, and the description of the overlapping portions will be omitted.

The searcher / finger circuit 100 includes, in the searcher / finger circuit 90 of FIG. 8, a correlation value accumulator 101 (correlation value accumulating means) for accumulating a correlation value, and a correlation value accumulation number for setting the accumulation number of correlation values. An adjuster 102 (correlation value cumulative number setting means) is provided. Correlation value accumulator 1
01 accumulates the correlation value (correlation value at the same search phase) calculated by the amplitude calculator 54 m times, and uses the accumulated value (average value) of the m correlation values as the correlation value at the search phase; It is input to the phase counter 55 and the threshold value determination circuit 91.

Correlation value accumulation number m in correlation value accumulator 101
Is the CPU 45 (see FIG. 1) or the cumulative number adjuster 10
2 can be set. When searching for a synchronization phase candidate in each phase within the search phase range, the CPU 45 sets the correlation value cumulative number m. The number m of accumulated correlation values when searching for a synchronization phase candidate is, for example, m = 1 (or 2).
Set to. When verifying the searched synchronization phase candidate, the cumulative number adjuster 102 sets the correlation value cumulative number m. The cumulative number adjuster 102 sets the correlation value cumulative number m based on the correlation value calculated first. For example,
If the first calculated correlation value is greater than the threshold value by 3 dB or more, m = 2 (or 3), and if it is smaller than that, m = 3 (or 4). In addition, by increasing the number of accumulated correlation values at the time of verification compared to the time of search, the accuracy of verification can be increased without lengthening the time of the search operation.

As described above, in the fifth embodiment, the correlation value accumulator 101 for accumulating the correlation value and the accumulation number adjuster 102 for setting the accumulation number of the correlation value are provided, and the accumulated correlation value is calculated based on the accumulated correlation value. Therefore, the reliability of the verification can be increased, and the probability of erroneously switching to the finger mode can be reduced. Further, since the number of times of accumulation can be changed, it is possible to set an appropriate number of times of accumulation in accordance with the correlation value of the retrieved synchronization phase candidate. In addition, the first
As in the embodiment, the time required for the synchronization process can be reduced, the power consumption can be reduced, the processing load on the CPU can be reduced, and the communication between the reception synchronization circuit and the CPU can be reduced.

It is also possible to apply the correlation value accumulator 101 of the fifth embodiment to the searcher / finger circuits of the first to third embodiments. By accumulating the correlation values when searching for the synchronization phase candidate, it is possible to temporarily exclude the correlation value synchronized with the noise component, and it is possible to prevent the erroneous synchronization phase candidate from being stored in the memory 59. .

Sixth Embodiment In the sixth embodiment, when there is no synchronization phase candidate in the search phase range (no spread modulation transmission signal exists), the same phase range is searched again. is there.

FIG. 11 is a block diagram of a reception synchronization circuit according to the sixth embodiment of the present invention. The reception synchronization circuit 110 shown in FIG. 11 uses the searcher / finger circuit [k] (k =
1, 2, 3, or 4).

The reception synchronization circuit 110 shown in FIG. 11 includes a searcher / finger circuit 111 and a search repetition count circuit 1
12 are provided. Searcher / finger circuit 111
Is the searcher / in any one of the first to fifth embodiments.
It is a finger circuit. However, in the case of lock (synchronization completed), the searcher / finger circuit 111
U45 (see FIG. 1) is notified, but if unlocked (synchronization is impossible), the
Output to 2.

When the unlocking is input from the searcher / finger circuit 111, the search repetition count circuit 112 outputs a reset (reset) signal to the searcher / finger circuit 111. When the searcher / finger circuit 111 receives the reset signal, it resets the contents of the memory 59, returns the timing of the PN code generator 51 to the first search start phase, and again searches the synchronization phase candidate within the same phase range as the first. Search for. At this time, the search phase width, the PN code setting, and the correlation length use values preset in the searcher / finger circuit 111 by the CPU 45. The reception synchronization circuit 110 performs the above-described search operation with the CP
If U45 repeats the preset number of search times and still cannot be synchronized, the search repetition count circuit 11
2, the CPU 45 is informed of the unlocking, and the operation of all circuits is stopped.

As described above, in the sixth embodiment, when the searcher / finger circuit 111 has failed to search for a synchronous phase candidate, the search repetition count circuit 112 for searching the same phase range again is provided, and the same phase range is repeated. By performing the search, it is possible to reduce a search error of the synchronization phase.
For example, in wireless communication applications such as mobile communications, there is a case where synchronization with a signal that actually exists cannot be temporarily performed due to time fluctuation of a transmission path. Can be retrieved. Further, similarly to the first embodiment, the time required for the synchronization process can be reduced, the power consumption can be reduced, the processing load on the CPU can be reduced, and the communication between the reception synchronization circuit and the CPU can be reduced. .

Seventh Embodiment In the seventh embodiment, when there is no synchronization phase candidate in the search phase range (no spread modulation transmission signal exists), a different phase range is searched.

FIG. 12 is a block diagram of a reception synchronization circuit according to the seventh embodiment of the present invention. The reception synchronization circuit 120 shown in FIG. 12 corresponds to the searcher / finger circuit [k] (k =
1, 2, 3, or 4). 12, the same components as those in FIG. 11 are denoted by the same reference numerals, and the description of the overlapping portions will be omitted.

The reception synchronization circuit 120 shown in FIG. 12 includes a searcher / finger circuit 111 and a search repetition count circuit 1
12 and a next search control circuit 121. However, if the search repetition count circuit 112 determines that the lock is unlocked (synchronization is impossible), it outputs that fact to the next search control circuit 121.

When the next search control circuit 121 receives an unlock message from the search repetition count circuit 112,
The CPU 45 outputs an offset value in a search phase range (timing) set in advance to the searcher / finger circuit 111. Searcher / finger circuit 111
Shifts the timing of the PN code generation circuit 51 by the timing requested by the next search control circuit 121, and searches for a synchronization phase candidate in a phase range different from the first. At this time, the search phase width, the PN code setting, and the correlation length are determined by the CPU.
45 uses a value preset for the searcher / finger circuit 111. The reception synchronization circuit 120 repeats the above-described search operation for a search count set in advance by the CPU 45. If synchronization is still impossible, the next search control circuit 121 notifies the CPU 45 of the unlocking,
Stop the operation of all circuits.

FIG. 13 is a timing chart for explaining the search operation of the reception synchronization circuit 120. The search start phase is "30", the search phase width is "50", the search repetition count is "2", and the next search offset. Is an operation example in the case where is set to “80”.

When a synchronization start command is input from the CPU 45, the searcher / finger circuit 111 shifts the PN phase from the initial timing “0” to the search start phase “30”, and sets the synchronization phase candidate within the phase range “30 to 80”. (Search (seach) A1).

In search A1, searcher / finger circuit 1
When 11 outputs unlock, the search repetition count circuit 112 requests the searcher / finger circuit 111 to search again within the same phase range as the search A1, and the searcher / finger circuit 111 outputs the same phase range “30” as the search A1. ８０80 ”again to search for a synchronization phase candidate (search A2).

In search A2, when the search repetition count circuit 112 outputs unlock, the next search control circuit 12
1 requests the searcher / finger circuit 111 to shift the search phase range by the next search offset.
The finger circuit 111 searches for a synchronization phase candidate in the phase range “160 to 210” (search B1). Search B1
In the case of unlocking, the synchronization phase candidate is searched again in the same phase range "160 to 210" as the search B1 (search B2).

In search B2, when the search repetition count circuit 112 outputs unlock, the next search control circuit 12
1 requests the searcher / finger circuit 111 to further shift the search phase range by the next search offset, and the searcher / finger circuit 111 sets the phase range “290 to 37”.
A search for a synchronization phase candidate in "0" (search C1). Then, in search C1, searcher / finger circuit 111 notifies CPU 45 of the lock (synchronization completed), and searcher / finger circuit 111 maintains synchronization at the phase searched in search C1, and demodulates the transmitted data. .

As described above, in the seventh embodiment, the next search control circuit 121 for searching a different phase range when the searcher / finger circuit 111 cannot search for a synchronization phase candidate is provided. When synchronization is impossible, a phase range different from this phase range is searched, so that even when the phase of the transmission signal is not included in the first search phase range set by the synchronization start command, the signal is transmitted through the CPU. Synchronization can be established quickly without using For example, when the power is turned on, the reception synchronizer does not hold any phase information of the transmission signal at all, and therefore the first search phase range often does not include the phase of the transmission signal. The effect of speeding up is great. As in the first embodiment, the time required for the synchronization processing can be reduced, the power consumption can be reduced, the processing load on the CPU can be reduced, and the reception synchronization circuit and the CPU can be used.
The communication between them can be reduced.

In the seventh embodiment, it is possible to provide only the next search control circuit 121 without providing the search repetition count circuit 112.

Eighth Embodiment In the first to seventh embodiments, the search mode is switched to the finger mode after all the phases within the search phase range have been searched in the search mode. In the above, by switching to the finger mode immediately after one synchronization phase candidate is searched, it is possible to complete the synchronization processing without searching the entire search phase range.

FIG. 14 is a circuit diagram of a searcher / finger circuit (reception synchronization circuit) according to an eighth embodiment of the present invention. The searcher / finger circuit 130 of FIG. 14 can be applied to the searcher / finger circuit [k] (k = 1, 2, 3, or 4) of FIG. 14, the same components as those in FIG. 2 are denoted by the same reference numerals, and the description of the overlapping portions will be omitted.

Searcher / finger circuit 130 of FIG.
Is a PN code generator 51 (spreading code generator), a multiplier 52, an accumulator 53, an amplitude calculator 54, a phase counter 55, a multiplexer 56, a DLL 57, a sorter 58, Memory 59 and mode determiner 13
1 (mode setting unit), a filter 61, and a lock / unlock (Lock / Unlock) determiner 62. That is, the searcher / finger circuit 130 is different from the searcher / finger circuit (see FIG. 2) of the first embodiment in that
Sorter 58, memory 59, and threshold determination circuit 60
Is deleted, and a mode determiner 131 is provided. In the searcher / finger circuit of FIG. 2, the correlation value calculated by the amplitude calculator 54 in the search mode is input to the phase counter 55 and the sorter 58. Then, the correlation value calculated by the amplitude calculator 54 in the search mode is input to the mode determiner 131.

The mode determiner 131 compares the calculated correlation value with a predetermined threshold value. If the correlation value is equal to or greater than the threshold value, the mode determination unit 131 calculates the correlation values of all phases within the search phase range. The operation mode of the searcher / finger circuit 130 is immediately switched from the searcher mode to the finger mode without waiting for the termination. If the correlation value is less than the threshold value, the phase counter 55 is requested to shift the phase. Thereby, a synchronization phase candidate is searched in another phase range within the search phase range.

When the mode determination unit 131 is notified of the unlock determination from the lock / unlock determination unit 62, the mode determination unit 131 switches the operation mode of the searcher / finger circuit 110 from the finger mode to the searcher mode. Request a shift. Thereby, the search for the synchronization phase candidate is restarted in another phase range within the search phase range.

In the finger mode, the lock / unlock determiner 62 locks (synchronization has been established, synchronization has been completed) if the average received signal strength is equal to or greater than a predetermined threshold value. If it is less than the threshold value, it is determined to be unlocked (synchronization is not established, synchronization is impossible). If it is locked, the CPU 45 is notified of the lock.
If it is unlocked, the mode judgment unit 131 informs that effect.
Notify.

When a phase shift is requested from the mode determining unit 131 in the search mode, the phase counter 55 determines whether or not the search in all phases within the search phase range set by the CPU 45 has been completed. Is determined. If there is an unsearched phase within the search phase range, PN
It requests the code generator 51 to shift the PN phase by a predetermined phase shift width. Further, when the search in all phases within the search phase range has already been completed (thus, when synchronization cannot be established in all the above phases), the fact that synchronization is impossible is notified to the CPU 45, and then the searcher is searched. / Operation of finger circuit 130 is stopped.

FIG. 15 is a flowchart of the operation sequence of the searcher / finger circuit 130. The operation is started by the synchronization start command from the CPU 45 (the searcher / finger circuit 110 is started, and first, the step ST
At 101, the operation mode of the searcher / finger circuit 110 at the time of startup is set to the search mode, and step ST10
In step 2, the PN phase of the PN code generator 51 is shifted to the phase to be searched, and in step ST103, the correlation value at the search phase is calculated. Next, step ST104
Then, it is determined whether or not the calculated correlation value is equal to or larger than the threshold value Th. If the correlation value is smaller than the threshold value Th, the process proceeds to step ST105. The process proceeds to step ST106.

If the correlation value is less than the threshold value Th in step ST104, the PN phase is shifted by a predetermined shift width in step ST105, and in step ST112, the search of all phases within the search phase range is completed. It is determined whether or not all phases have been searched, and the process returns to step ST103 to calculate a correlation value of the phase newly set in step ST105. If all phases within the search phase range have been searched, the CPU 45 is notified that synchronization is not possible, and then the searcher / finger circuit 13
0 stops the operation.

If the correlation value is equal to or greater than the threshold value Th in step ST104, the search mode is immediately switched from the search mode to the finger mode in step ST106 without waiting for the end of the search of the entire phase range.
The fine adjustment of the phase by the DLL 57 is started.
At 108, a correlation value (reception strength) is calculated, and the
At 109, the correlation value is filtered to generate an average reception intensity. Next, in step ST110, it is determined that locking (synchronization is completed) if the average reception intensity is equal to or higher than a predetermined threshold, and unlocking (synchronization is impossible) if the average reception intensity is lower than the predetermined threshold. If it is locked, the CPU 45 is informed of the lock, the synchronization is maintained in the finger mode, and the transmitted data is demodulated. If unlocked, step ST111
To switch from the finger mode to the searcher mode. Steps ST105, ST112, ST103, ST10
According to 4, the synchronization phase candidate is searched for the unsearched phase range within the search phase range.

Steps ST101 to ST103 in FIG.
Will be described below with reference to FIG. The CPU 45 activates the searcher / finger circuit 130 and sends a synchronization start command. When activated, the searcher / finger circuit 130 starts operating in the search mode. In this search mode, DLL 57, filter 6
1, and the lock / unlock determiner 62 has stopped operating. When the synchronization start command is input, the phase counter 55 shifts the PN phase of the PN code generator 51 to a phase to be searched. The multiplier 52, the accumulator 53, and the amplitude calculator 54 calculate a correlation value between the received signal and the PN phase.

Steps ST104 to ST106 in FIG.
The mode switching operation from the search mode to the finger mode will be described below with reference to FIG. The mode determiner 131 compares the calculated correlation value with a predetermined threshold. If the correlation value is less than the threshold value, the mode determination unit 131 requests the phase counter 55 to shift the phase, and the phase counter 55 sends the PN code generator 51
A request is made to shift the PN phase by a predetermined shift width. If the correlation value is equal to or larger than the threshold value, the mode decision unit 13
1 requests the PN code generator 51 to maintain the PN phase, activates the DLL 57, and starts fine adjustment of the PN phase. Further, the correlation length of the accumulator 53 is fixed to the symbol length (for example, for 64 chips), and the filter 61 and the lock / unlock determiner 62 are activated.

Steps ST107 to ST110 in FIG.
Will be described below with reference to FIG. The DLL 57 finely adjusts the PN phase so that the correlation value with the received signal becomes maximum (so that the correlation value follows the peak value). The multiplier 52, the accumulator 53, and the amplitude calculator 54 calculate a correlation value (reception strength) between the received signal and the PN phase. The filter 61 performs a filtering process on the calculated correlation value to generate an average reception intensity. The lock / unlock determiner 62 locks (synchronization completed) if the average reception intensity is equal to or higher than a predetermined threshold, and unlocks (synchronization failure) if the average reception intensity is lower than the predetermined threshold.
Is determined. If it is locked, the lock / unlock determiner 62 informs the CPU 45 of the fact, and the searcher / finger circuit 130 maintains synchronization in the finger mode and performs despread demodulation of the transmitted data. If it is unlocked, the lock / unlock determiner 62 notifies the mode determiner 131 of that fact.

The mode switching operation from the finger mode to the search mode in step ST111 of FIG.
4 will be described below. When it is determined that the lock is unlocked, the mode determiner 131
1, the operation of the lock / unlock determiner 62 is stopped, the correlation length of the accumulator 53 is returned to the value set at the time of the search set by the CPU 45, and a phase shift is requested to the phase counter 55.

The operation of step ST112 in FIG. 15 will be described below with reference to FIG. When the correlation value is less than the predetermined threshold value (see step ST104), or when the mode is switched from the finger mode to the search mode in accordance with the unlock determination (see step ST111), the phase shift from the mode determination unit 131 is performed. When requested (see step ST105), the phase counter 55 determines whether the search has been completed for all phases within the search phase range. If the search has been completed for all the phases, the phase counter 55 notifies the CPU 45 that synchronization is not possible, and then the searcher / finger circuit 13
0 operation is stopped. If the search has not been completed for all phases within the search phase range, that is, if the phase set by the phase shift request is an unsearched phase within the search phase range, the phase counter 55 sets the PN code The generator 51 is requested to perform the above-described phase shift.

As described above, the PN code generator 51, the multiplier 52, the accumulator 53, the amplitude calculator 54, the phase counter 5
5, multiplexer 56, DLL 57, filter 61,
And lock / unlock determiner 62 searches for a candidate for a despread demodulation phase synchronized with the phase of the spread modulation signal in the search mode, and maintains the synchronization according to the searched phase in the finger mode. , A searcher / finger unit for demodulating the spread modulation signal. The mode determination unit 131 corresponds to a mode setting unit that switches the operation mode of the searcher / finger unit to the search mode or the finger mode based on the search result in the search mode.

In the searcher / finger section, in the search mode, a PN code generator 51, a multiplier 52, an accumulator 53, an amplitude calculator 54, a phase counter 55, and a multiplexer 56 search for a synchronization phase candidate. Works as In the finger mode, the PN code generator 51, the multiplier 52, the accumulator 53, the amplitude calculator 54, the multiplexer 56, the DLL 57, the filter 61, and the lock / unlock determiner 62 maintain synchronization and perform spreading. It operates as a finger circuit for demodulating the modulated signal.

As described above, in the eighth embodiment, the searcher / finger section which operates as a searcher circuit or a finger circuit according to the operation mode, and switches to the search mode or the finger mode based on the search result in the search mode. If the correlation value calculated in the search mode by the mode setting unit is equal to or greater than the threshold value, the mode setting unit (mode determination unit 131) is immediately switched to the finger mode, and if the synchronization cannot be established in the finger mode, By providing the reception synchronization circuit (searcher / finger circuit 130) for returning to the search mode, the operation mode of the reception synchronization circuit is automatically switched inside the reception synchronization circuit without the intervention of the CPU 45. As a result, similarly to the first embodiment, the time required for the synchronization process can be reduced, the power consumption can be reduced, and the CPU
, And the communication between the reception synchronization circuit and the CPU can be reduced.

Further, since the switching to the finger mode is performed immediately after the search for the candidate for the synchronization phase without waiting for the search for all the phases within the search phase range to be completed, the search for all the phases within the search phase range is completed. The time required for the search mode can be reduced as compared with the first to fifth embodiments in which the mode is switched to the finger mode after that. Further, it is not necessary to provide a memory and a sorter which are necessary for the reception synchronization circuits of the first to fifth embodiments.

The searcher / finger circuit 130 of the eighth embodiment is applied to the searcher / finger circuit 111 of the reception synchronization circuit (see FIG. 11) of the sixth embodiment, and the synchronization phase is within the search phase range. When there is no candidate (the spread modulation transmission signal does not exist), it is also possible to search again in the same phase range.

Further, the searcher / finger circuit 130 of the eighth embodiment is applied to the searcher / finger circuit 111 of the reception synchronization circuit (see FIG. 12) of the seventh embodiment, and the synchronization phase is within the search phase range. When there are no candidates,
It is also possible to search for a phase range different from the first.

Ninth Embodiment In the eighth embodiment, the search mode is switched to the finger mode as soon as a synchronization phase candidate having a correlation value equal to or larger than a predetermined threshold can be searched. Then, as soon as the above-mentioned synchronization phase candidate can be searched, the correlation value of the synchronization phase candidate is calculated again (verification of the synchronization candidate phase). If the calculated correlation value is equal to or more than a predetermined threshold value, the finger mode is set. Switch.

FIG. 16 is a circuit diagram of a searcher / finger circuit (reception synchronization circuit) according to a ninth embodiment of the present invention. The searcher / finger circuit 140 of FIG. 14 can be applied to the searcher / finger circuit [k] (k = 1, 2, 3, or 4) of FIG. In FIG. 16, the same components as those in FIGS. 10 and 14 are denoted by the same reference numerals, and the description of the overlapping portions will be omitted.

The searcher / finger circuit 140 corresponds to FIG.
In the searcher / finger circuit 130, the correlation value accumulator 101 and the correlation value accumulation number adjuster 102 shown in FIG. 10 are provided, and the mode decision unit 131 is replaced with a mode decision unit 141. In this searcher / finger circuit 140,
The correlation value (correlation value at the same search phase) calculated by the amplitude calculator 54 is accumulated m times by the correlation value accumulator 101, and m
The cumulative value (average value) of the correlation values is input to the mode determiner 131 as the correlation value at the search phase.

The mode determiner 141 compares the calculated correlation value with a predetermined threshold value in the search mode.
If the correlation value is equal to or greater than the threshold, the correlation value of the synchronization phase candidate is immediately calculated again without waiting for the calculation of the correlation values of all phases within the search phase range to end (the synchronization candidate phase Verification) If the recalculated correlation value is equal to or larger than the predetermined threshold value and it can be verified that the spread modulation signal exists, the mode is switched to the finger mode. If the correlation value is less than the threshold value, the phase counter 55 is requested to shift the phase.

When the mode determination unit 141 is notified of the unlock determination from the lock / unlock determination unit 62, the mode determination unit 141 switches the operation mode of the searcher / finger circuit 110 from the finger mode to the searcher mode. Request a shift. Thereby, the search for the synchronization phase candidate is restarted in another phase range within the search phase range.

Further, mode determiner 141 uses correlation value accumulative number adjuster 102 to calculate the correlation value in each of the search for the synchronization phase candidate in the search mode, the verification of the searched synchronization phase candidate, and the finger mode. Is changed (the average number of times) m. For example, at the time of searching for a synchronization phase candidate, the cumulative number m is set to 2, and at the time of verification, the cumulative number m is set to be larger than that at the time of searching, and the calculation accuracy of the correlation value is increased. In the finger mode, the cumulative number m = 1.

As described above, in the ninth embodiment, when a synchronization phase candidate is searched for in the search mode, the correlation value is immediately calculated again for this synchronization candidate phase, and the synchronization is performed with the synchronization candidate phase. It is verified whether or not the spread modulation signal can be demodulated reliably (that is, whether or not the spread modulation signal exists reliably). If it can be verified that the spread modulation signal exists reliably, the mode is switched to the finger mode. If synchronization cannot be established, by providing a reception synchronization circuit (searcher / finger circuit 140) for returning to the search mode, the operation mode of the reception synchronization circuit can be automatically switched inside the reception synchronization circuit without passing through the CPU 45. Is made. As a result, similarly to the first embodiment, the time required for the synchronization process can be reduced, the power consumption can be reduced, the processing load on the CPU can be reduced, and the communication between the reception synchronization circuit and the CPU can be reduced. it can.

Further, before switching to the finger mode, it is possible to determine whether the synchronization phase candidate is synchronized with the spread modulation transmission signal or temporarily synchronized with noise. Increase the reliability of
It is possible to reduce the probability of unlocking in the lock / unlock determination in the finger mode. Since the lock / unlock determination in the finger mode takes a relatively long time, if it is verified that the spread modulation transmission signal exists before switching to the finger mode, and if the reliability of the synchronization phase candidate is increased, The number of lock / unlock determinations can be reduced, thereby reducing the time required for the synchronization process.

The correlation value accumulator 10 accumulates the correlation value.
1 and a cumulative number adjuster 102 for setting the cumulative number of correlation values
By verifying the synchronization phase candidates based on the accumulated correlation values, the reliability of the verification can be increased, and the probability of erroneously switching to the finger mode is reduced. In addition, since the number of times of accumulation can be changed, an appropriate number of times of accumulation can be set according to the correlation value of the searched synchronization phase candidate, thereby increasing the reliability of verification without increasing the time of the search operation. can do.

In the ninth embodiment, it is also possible to switch to the finger mode immediately after the synchronization phase candidate is searched based on the accumulated correlation value. Alternatively, the correlation value calculated by the amplitude calculator 54 may be input to the mode determination unit without providing the correlation value accumulator 101 and the accumulation number adjuster 102.

Also, the searcher / finger circuit 140 of the ninth embodiment is applied to the searcher / finger circuit 111 of the reception synchronization circuit (see FIG. 11) of the sixth embodiment, and the synchronization phase within the search phase range is obtained. When there is no candidate (the spread modulation transmission signal does not exist), it is also possible to search again in the same phase range.

Also, the searcher / finger circuit 140 of the ninth embodiment is applied to the searcher / finger circuit 111 of the reception synchronization circuit (see FIG. 12) of the seventh embodiment, and the synchronization phase is within the search phase range. When there are no candidates,
It is also possible to search for a phase range different from the first.

Tenth Embodiment In the tenth embodiment, when there is no synchronous phase candidate in the search phase range (the spread modulation signal does not exist), the threshold is lowered and the same phase range is set again. Search by.

FIG. 17 is a block diagram of a tenth reception synchronization circuit according to the present invention. In FIG. 17, FIG.
Alternatively, the same components as those in FIG. 12 are denoted by the same reference numerals, and description of overlapping portions will be omitted. The reception synchronization circuit 150 of FIG.
Is the searcher / finger circuit [k] (k = 1,
2, 3, or 4).

The reception synchronization circuit 150 shown in FIG. 17 includes a searcher / finger circuit 111 and a search repetition count circuit 1
12 and a threshold control circuit 151. The searcher / finger circuit 111 is the searcher / finger circuit according to any of the first to ninth embodiments. However, the searcher / finger circuit 111 notifies the CPU 45 (see FIG. 1) of the lock (synchronization is completed) when it is locked (synchronization is completed). Output to When the unlocking is input from the searcher / finger circuit 111, the search repetition count circuit 112 requests the searcher / finger circuit 111 to repeatedly search the same search phase range with the same threshold value. If synchronization is not possible even after repeating a preset number of searches, the fact is output to the threshold control circuit 151.

When unlocking is input from the search repetition counting circuit 112, the threshold value control circuit 151 outputs a corrected value of the threshold value set in advance by the CPU 45 to the searcher / finger circuit 111. The searcher / finger circuit 111 reduces the threshold value to be compared with the correlation value by the correction value input from the threshold value control circuit 151,
The synchronization phase candidate is searched in the same phase range as the first. The reception synchronization circuit 150 repeats the above search operation for a search count set in advance by the CPU 45. If synchronization is still not possible, the threshold control circuit 151
Inform 45 that it is unlocked, and stop all circuit operations.

As described above, in the tenth embodiment, when the searcher / finger circuit 111 has failed to search for a synchronization phase candidate, the threshold value control circuit 151 for lowering the threshold value and searching again for the same phase range is provided. If synchronization is not possible in the repeatedly searched phase range, lowering the threshold value and searching the above phase range again enables synchronization with a spread modulation transmission signal having a low level, and enables transmission signal transmission. Can be increased. Further, similarly to the first embodiment, the time required for the synchronization process can be reduced,
Power consumption can be reduced, the processing load on the CPU can be reduced, and communication between the reception synchronization circuit and the CPU can be reduced.

Eleventh Embodiment In the eleventh embodiment, the direction of shifting the search phase in the search mode can be set to the direction in which the phase advances or the direction in which the phase lags.

FIG. 18 is a circuit diagram of a searcher / finger circuit (reception synchronization circuit) according to an eleventh embodiment of the present invention. 18, the same components as those in FIG. 14 are denoted by the same reference numerals, and the description of the overlapping portions will be omitted. The searcher / finger circuit 160 of FIG.
The finger circuit 130 is provided with a timing shift direction control circuit 161 (phase shift direction control means).

The timing shift direction control circuit 161
The direction of shifting the search phase in the search mode is set to the direction in which the phase advances or the direction in which the phase lags, and when a phase shift is requested from the phase counter 55, the PN code generator 5
One PN phase is shifted by a predetermined shift width in the set direction. The CPU 45 sets the phase shift direction of the timing shift direction control circuit 161. The CPU 45 notifies the phase counter 55 of the phase shift direction, and the phase counter 55 requests the timing shift direction control circuit 161 to set the phase shift direction in accordance with the notification from the CPU 45. For example, the timing shift direction control circuit 161
Delays the PN phase by 1/2 chip each time the phase counter 55 requests a phase shift, or 1
Advance by 2 chips.

FIG. 19 is a timing chart for explaining the phase search operation of searcher / finger circuit 160. The search phase ranges of the searcher / finger circuit (1) and the searcher / finger circuit (2) are both set as shown in FIG. 19B, and within this phase range, the signal 1 as shown in FIG. And signal 2 exists. Searcher / finger circuit (1) and searcher / finger circuit (2)
When the search directions are the same, both the searcher / finger circuit (1) and the searcher / finger circuit (2) synchronously capture the signal 1 and cannot synchronously capture the signal 2. Alternatively, the signal 2 cannot be synchronously acquired and the signal 1 cannot be synchronously acquired.

However, if the searcher / finger circuits (1) and (2) include the timing shift direction control circuit 161 as in the searcher / finger circuit 160 of the eleventh embodiment, the searcher / finger circuits (1) and (2) 1)
By setting the search directions in (2) and (3) in the opposite direction, signal 1 and signal 2 can be synchronously captured, respectively. For example, the search direction of the searcher / finger circuit (1) is set to a direction in which the phase is delayed as shown in FIG. 19C, and the search direction of the searcher / finger circuit (2) is set to FIG.
If the phase is set in the direction in which the phase advances as shown in (d), the signal 1 can be synchronously captured by the searcher / finger circuit (1) and the signal 2 can be synchronously captured by the searcher / finger circuit (2).

As described above, in the eleventh embodiment, the timing shift direction control circuit 161 for setting the phase shift direction in the searcher mode is provided, so that the multipath signal exists within the search phase range. Can also be synchronized with the respective signals. Further, similarly to the first embodiment, the time required for the synchronization process can be reduced, the power consumption can be reduced, and the CPU can be reduced.
, And the communication between the reception synchronization circuit and the CPU can be reduced.

In the eleventh embodiment, the timing shift direction control circuit 161 is provided in the searcher / finger circuit of the eighth embodiment. 7. Ninth Embodiment A ninth embodiment may be provided in the searcher / finger circuit of the ninth embodiment.

In the first to eleventh embodiments,
Although the example in which the reception synchronization circuit of the present invention is applied to a mobile terminal has been described, the reception synchronization circuit of the present invention can also be applied to, for example, a base station reception system or a mobile station reception system.

[0151]

According to the reception synchronization circuit of the present invention, a searcher / finger unit which operates as a searcher circuit or a finger circuit according to an operation mode and a search mode or a finger mode based on a search result in the search mode. By providing a mode setting unit for switching, and by automatically switching the operation mode of the reception synchronization circuit inside the circuit, the time required for the synchronization process can be reduced,
There is an effect that power consumption can be reduced. Also CPU
And the communication load between the reception synchronization circuit and the CPU can be reduced.

[Brief description of the drawings]

FIG. 1 is a block configuration diagram of a reception synchronization device according to a first embodiment of the present invention.

FIG. 2 is a circuit configuration diagram of a searcher / finger circuit (a reception synchronization circuit) according to the first embodiment of the present invention.

FIG. 3 is a flowchart of an operation sequence of the searcher / finger circuit of FIG. 2;

FIG. 4 is a circuit configuration diagram of a searcher / finger circuit (receiving synchronization circuit) according to a second embodiment of the present invention.

FIG. 5 is a flowchart of an operation sequence of the searcher / finger circuit of FIG. 4;

FIG. 6 is a circuit configuration diagram of a searcher / finger circuit (reception synchronization circuit) according to a third embodiment of the present invention.

FIG. 7 is a flowchart of an operation sequence of the searcher / finger circuit of FIG. 6;

FIG. 8 is a circuit configuration diagram of a searcher / finger circuit (reception synchronization circuit) according to a fourth embodiment of the present invention.

FIG. 9 is a flowchart of an operation sequence of the searcher / finger circuit of FIG. 8;

FIG. 10 is a circuit configuration diagram of a searcher / finger circuit (receiving synchronization circuit) according to a fifth embodiment of the present invention.

FIG. 11 is a block diagram of a reception synchronization circuit according to a sixth embodiment of the present invention.

FIG. 12 is a block diagram of a reception synchronization circuit according to a seventh embodiment of the present invention.

FIG. 13 is a timing chart for explaining a search operation of the reception synchronization circuit of FIG.

FIG. 14 is a circuit configuration diagram of a searcher / finger circuit (reception synchronization circuit) according to an eighth embodiment of the present invention.

FIG. 15 is a flowchart of an operation sequence of the searcher / finger circuit of FIG. 14;

FIG. 16 is a circuit configuration diagram of a searcher / finger circuit (reception synchronization circuit) according to a ninth embodiment of the present invention.

FIG. 17 is a block diagram of a reception synchronization circuit according to a tenth embodiment of the present invention.

FIG. 18 is a circuit configuration diagram of a searcher / finger circuit (reception synchronization circuit) according to an eleventh embodiment of the present invention.

FIG. 19 is a timing chart for explaining a phase search operation of the searcher / finger circuit of FIG. 18;

FIG. 20 is a circuit configuration diagram of a conventional reception synchronization circuit provided in a CDMA receiver.

FIG. 21 is a flowchart of a conventional synchronization process.

FIG. 22 is a subroutine of a search process (step ST1) in FIG. 21;

FIG. 23 shows a finger assignment process (step ST) in FIG.
This is a subroutine of 3).

FIG. 24 is a circuit configuration diagram of a conventional searcher circuit.

FIG. 25 is a flowchart of an operation sequence of the conventional searcher circuit.

FIG. 26 is a circuit configuration diagram of a conventional finger circuit.

FIG. 27 is a flowchart of an operation sequence of a conventional finger circuit.

[Explanation of symbols]

40 reception synchronizer, 41-44 ([1]-
[4]), 70, 80, 90, 100, 130, 14
0,160 searcher / finger circuit (receiving synchronization circuit), 51 PN code generator, 52 multiplier, 53
Accumulator, 54 amplitude calculator, 55 phase counter, 56 multiplexer, 57 DLL, 58
Sorter, 59 memory, 60, 91 threshold value judgment circuit (mode setting unit), 61 filter, 62 lock / unlock judgment device, 71 counter, 101
Correlation value accumulator, 102 Correlation value accumulation frequency adjuster, 1
10, 120, 150 reception synchronization circuit, 111 searcher / finger circuit, 112 search repetition count circuit, 121 secondary search control circuit, 131, 141
A mode decision unit (mode setting unit); 151 threshold control circuit; 161 timing shift direction control circuit.

Claims (13)

[Claims] 1. A reception synchronization circuit for synchronizing the phase of despread demodulation with the phase of a received spread modulation signal, comprising: A searcher / finger unit for searching for a candidate for the phase of despread demodulation synchronized with the phase, trying synchronization in accordance with the searched phase in the finger mode, and demodulating the spread modulation signal, and a search result in the search mode And a mode setting unit for switching an operation mode of the searcher / finger unit to a search mode or a finger mode based on the above condition. 2. The searcher / finger section calculates a correlation value with a received signal in order in each phase within a predetermined phase range in a search mode, and calculates a largest correlation value and a phase corresponding thereto. In the memory,
The mode setting unit compares the correlation value with a predetermined threshold value. When the correlation value is equal to or greater than the threshold value, the mode setting unit switches from the search mode to the finger mode. When the searcher / finger unit is in the finger mode, 2. The reception synchronization circuit according to claim 1, wherein despread demodulation is performed at the phase having the largest correlation value. 3. The searcher / finger unit sequentially calculates a correlation value with a received signal in each phase within a predetermined phase range in a search mode, and calculates a predetermined number of correlation values having a large correlation value. The values and the number of phases corresponding to the values are stored in a memory, and the stored correlation values are compared with predetermined threshold values, respectively. The mode setting unit determines that the correlation value is greater than or equal to the threshold value. In some cases, the search mode is switched from the search mode to the finger mode. In the finger mode, the searcher / finger section sequentially reads out a phase having a correlation value equal to or larger than the threshold from the memory and performs despread demodulation according to the phase. The reception synchronization circuit according to claim 1, wherein: 4. The searcher / finger section sequentially calculates a correlation value with a received signal in each phase within a predetermined phase range in a search mode, and sets the correlation value to a predetermined threshold value. Comparing, storing a correlation value equal to or more than the threshold value and a phase corresponding to the correlation value in a memory, the mode setting unit searches if a phase having a correlation value equal to or more than the threshold value is stored in the memory. The searcher / finger section switches from a mode to a finger mode, and in the finger mode, reads out phases from the memory in descending order of the correlation value, and performs despread demodulation according to the phases. Receive synchronization circuit. 5. The searcher / finger section sequentially calculates a correlation value with a received signal in a phase within a predetermined phase range in a search mode, and the mode setting section calculates the calculated correlation value. Is compared with a predetermined threshold value, and when a phase whose correlation value is equal to or greater than the threshold value is searched, the mode is immediately switched from the searcher mode to the finger mode. 2. The reception synchronization circuit according to claim 1, wherein despread demodulation is performed according to the phase that is equal to or larger than the threshold. 6. The mode setting unit switches from a finger mode to a search mode when the searcher / finger unit cannot establish synchronization in the finger mode,
The reception synchronization circuit according to claim 5, wherein the search for the synchronization phase candidate is restarted. 7. The searcher / finger unit calculates a correlation value again for a phase whose correlation value is equal to or greater than the threshold value in a search mode, and confirms that the correlation value exists in the spread modulation signal. 6. The reception synchronization circuit according to claim 2, wherein the mode setting unit switches from the search mode to the finger finger mode when it is confirmed that the spread modulation signal exists. 8. The searcher / finger section has a correlation value accumulating means for accumulating correlation values in the same phase, and a correlation value accumulating number setting means for setting the accumulating number of correlation values, wherein the accumulated correlation value is Is treated as a correlation value at each phase, and when confirming the presence of a spread modulation signal, the number of accumulations of the correlation value is made larger than when searching for a synchronization phase candidate. Reception synchronization circuit. 9. The searcher / finger unit has correlation value accumulating means for accumulating correlation values at the same phase,
6. The reception synchronization circuit according to claim 2, wherein the accumulated correlation values are handled as correlation values at respective phases. 10. The reception synchronization circuit according to claim 2, wherein when the reception synchronization circuit fails to establish synchronization with the spread modulation signal, the same phase range is searched again. Means for controlling the searcher / finger section of the reception synchronization circuit. 11. A different phase range when the reception synchronization circuit according to claim 2, 3, 4, 5, or 10 cannot establish synchronization with the spread modulation signal. Means for controlling the searcher / finger unit of the reception synchronization circuit so as to perform the operation. 12. The reception synchronization circuit according to claim 2, wherein, when the reception synchronization circuit fails to establish synchronization with the spread modulation signal, the threshold value is reduced and the same value is set again. Means for controlling the searcher / finger unit of the reception synchronization circuit so as to search for a phase range. 13. The searcher / finger section includes phase shift direction control means for setting a search phase shift direction in a search mode to a phase advance direction or a phase delay direction. 6. The reception synchronization circuit according to any one of 2 to 5.