JP2001167996A - Substrate treatment apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a substrate treatment apparatus for effectively managing process quality control, corresponding to a multi-kind small quantity production in the apparatus for sequentially treating many substrates one by one. SOLUTION: This substrate-treatment apparatus 1, sequentially processes a plurality of semiconductor wafers W as prescribed. The apparatus 1 comprises an ID reader 5 for reading an intrinsic wafer ID provided on each wafer W, substrate treatment units 10, 11, 15 and 3 for treating the wafers W under prescribed process conditions, substrate inspecting units 9, 12 for inspecting the treated results of the wafers by the units 10, 11, 15 and 3, and an output commanding unit 43 for outputting one or both of the treating history case and the inspected results in a state related to the substrate ID.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a substrate processing apparatus such as a semiconductor device manufacturing apparatus for forming a circuit pattern on a semiconductor wafer.

[0002]

2. Description of the Related Art As is well known, a photolithography technique is used in a semiconductor device manufacturing process. In photolithography technology, a resist solution is applied and formed on the surface of a substrate to be processed such as a semiconductor wafer,
This is exposed to a predetermined pattern and further developed.
Subsequently, a predetermined circuit pattern is formed on the wafer by performing an etching process.

[0003] Generally, the semiconductor wafer is composed of 1
It is supplied in a state where 25 sheets are stored in a cassette.
One lot is taken as a cassette, and one lot is sequentially taken out of the cassette and processed.

[0004]

In the conventional semiconductor device manufacturing apparatus as described above, the minimum unit for managing the wafer processing quality is each lot, and the SEMI, which is a standard of the semiconductor manufacturing apparatus, is not used. Various standards are defined assuming management on a lot basis.

[0005] However, in the near future, demand for high-mix low-volume production is expected to increase sharply. In this case, the management of one lot may be too large. Particularly, in the case of a large wafer such as a 300 mm size, since a very large number of semiconductor chips can be obtained from one wafer, it is possible to support a large number of types with one cassette. In some cases, the process conditions must be changed.

However, in the conventional apparatus, the minimum unit of process management is one lot, that is, one cassette unit, and it is difficult to meet such a demand.

The present invention has been made in view of such circumstances, and in a substrate processing apparatus that sequentially processes a large number of substrates one by one, it is possible to perform process quality management effectively corresponding to high-mix low-volume production. It is an object to provide a substrate processing apparatus.

[0008]

According to a first aspect of the present invention, there is provided a substrate processing apparatus for sequentially performing a predetermined processing on a plurality of substrates to be processed,
Substrate ID reading means for reading a unique substrate ID provided on each of the substrates to be processed, substrate processing means for processing the substrates to be processed based on predetermined process conditions, and processing of the substrates by the substrate processing means A substrate inspection unit for inspecting a result, and an output unit for outputting one or both of a processing history of the substrate to be processed and the inspection result in a state associated with the substrate ID. I will provide a.

According to such a configuration, in a substrate processing apparatus for sequentially performing a plurality of substrates, for example, performing photolithography processing on a semiconductor wafer, it is possible to perform process management for each substrate to be processed. Then, even when the process conditions are changed in units of one or several substrates, the process conditions are set for the substrate to be processed next based on the evaluation of the processing result of one substrate. It becomes possible to make corrections.

Therefore, according to one embodiment of the present invention, it is preferable that the substrate processing apparatus further includes an evaluation means for evaluating the process condition based on the processing result.

According to one embodiment of the present invention,
The substrate processing apparatus further includes a process condition storage unit configured to store the process condition in a state associated with the predetermined process ID, and a process associated with the process ID based on an evaluation result of the process condition by the evaluation unit. Correction means for correcting conditions, wherein the substrate processing means retrieves the process conditions stored by the process condition storage means based on the process ID, and processes the substrate to be processed based on the process conditions. Preferably, it is

Further, according to another main aspect of the present invention, the substrate processing means has a plurality of processing units for sequentially performing different processing on a substrate to be processed,
The substrate inspection means has one or more substrate inspection units useful for inspecting a processing result by one or more arbitrary processing units among the plurality of processing units.

According to such a configuration, when sequentially performing different processing on one substrate, the process conditions of each processing unit and the inspection result of the inspection apparatus are output in association with the substrate ID. Can be. For example, when a plurality of processing units are used as in lithography processing of a semiconductor wafer, process management for each substrate can be performed. Then, even if the process conditions are changed in units of one to several substrates, an arbitrary process is performed for a substrate to be processed next based on the evaluation of the processing result of one substrate. It becomes possible to correct the process conditions of the unit.

Therefore, in this case, it is preferable to have an evaluation means for evaluating each of the process conditions of the one or more arbitrary processing units based on the processing result.

According to one embodiment of the present invention,
The substrate processing apparatus further includes: a process condition storage unit configured to store a process condition of each processing unit in a state associated with a predetermined process ID; and an evaluation result of each processing unit output by the output unit. Correction means for correcting each process condition associated with the process ID, wherein each processing unit extracts the process condition stored by the process condition storage means based on the process ID, and The substrate to be processed is processed.

Further, according to one embodiment of the present invention,
The apparatus further includes a whole process condition storing unit that stores process IDs of all process conditions of the substrate to be processed in association with the substrate ID, and each of the processing units is stored by the all process condition storing unit based on the substrate ID. A substrate processing apparatus for extracting the process conditions stored by the process condition storage means based on the process ID and processing the substrate based on the process conditions. You.

According to such a configuration, by reading the substrate ID, it is possible to obtain the process ID necessary for processing the substrate to be processed, and perform the required processing. If the process condition referred to by the process ID is corrected in the process of the substrate to be processed before the substrate to be processed, the process is performed based on a suitable process condition.

It should be noted that other characteristic configurations and effects of the present invention can be suitably understood by those skilled in the art by referring to the following embodiments of the present invention and drawings.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor wafer processing apparatus according to an embodiment of the present invention will be described below.

FIG. 1 is a schematic diagram showing the overall configuration of the semiconductor wafer processing apparatus 1, and FIG. 2 is a block diagram showing the system configuration.

The semiconductor wafer processing apparatus 1 includes, for example,
It comprises a coating and developing device 2 and an exposure device 3 (DEV).
In the figure, an arrow (α) indicates a flow of a semiconductor wafer W (hereinafter, referred to as “wafer”) in the processing apparatus 1.

That is, first, in the coating and developing apparatus 2, the wafers W are sequentially taken out from the cassette CR in which 25 wafers W of, for example, 300 mm size are stored. The unloading of the wafer W is performed by a sub-arm (not shown), and then the wafer W is transferred to a main arm (not shown) and transported along a predetermined path α.

The wafer W taken out of the cassette CR
The wafer ID is read by a wafer ID (recognition code) reading unit (LD) indicated by 5 in FIG. The wafer ID is formed, for example, along the edge where the orientation flat 7 is formed, as shown by 6 in FIG.
TITLE (not shown) provided separately from
R).

Next, the wafer W is passed through a base reflectance inspection device 9. The base reflectance is an important parameter that affects the resist film thickness and the amount of exposure. Thereafter, the wafer W is coated with a resist liquid by the resist liquid coating unit 10 (COT). This resist liquid application unit 1
At 0, the wafer W is held on a spin chuck (not shown), and a predetermined minute amount (for example, 4
ml) of the resist solution. Next, the spin chuck is rotated and the wafer W is rotated at a high speed, so that the resist liquid is diffused to spread over the entire surface of the wafer W by centrifugal force. Here, the thickness of the resist solution can be controlled by the number of rotations (rotation speed) of the wafer W, which is one of the process conditions. However, recently, saving of the resist solution and thinning of the resist film have been performed. Tend to be faster to meet the demands of

The resist liquid coating unit 10 (CO
The wafer W taken out of T) is placed in the heating unit 11
(HP), the solvent is volatilized from the resist solution, and the resist solution is dried. Since the volatilization amount of the solvent has a very large effect on the thickness of the formed resist film, the temperature, humidity and heating time of the inside of the heating unit 11 are very important process conditions.

Thereafter, after the wafer W is cooled by a cooling unit (not shown), unnecessary resist on the peripheral portion is removed by a peripheral resist removing device (not shown). Before or after the peripheral resist removing device or inside the peripheral resist removing device, a film thickness inspection device 12 for detecting a resist film thickness is provided.

After the thickness of the resist film is detected, the wafer W is transferred to the exposure apparatus 3 (EXP). The exposure apparatus 3 irradiates a resist film formed on the wafer W with exposure light through a predetermined pattern of an exposure mask, and transfers a mask pattern of the exposure mask to the resist film on the wafer W. In this exposure apparatus, important process conditions include the focal length, the position of the wafer, the intensity of the exposure light, and the exposure time.

The exposed wafer W is returned to the coating / developing apparatus 2 again, and after the heat treatment, is subjected to the development processing unit 15 (DE
V). This development processing is performed, for example, according to a paddle method. In the paddle method, the developing process is performed by filling the developing solution on the wafer W for a predetermined time. Of the process conditions of the developing unit 15, the developing solution discharge speed and the liquid filling time greatly affect the development progress. Then, immediately after a predetermined liquid filling time has elapsed, pure water is sprayed onto the wafer W immediately, and the developing solution is washed away, thereby stopping the development.

The wafer W after the development processing is heated and dried and then discharged into the cassette CR. Before that, the wafer inspection apparatus 16 inspects the defect inspection apparatus 16 for the presence of a serious defect. The defect inspection device 16 includes, for example, a defocus inspection for detecting a positional shift of a pattern generated by the exposure device 3, an application unevenness detection inspection for detecting application unevenness of a resist solution, a development defect detection inspection for detecting a defect in a development process, Scratch detection inspection for detecting minute scratches generated on the surface of the wafer W, particle detection inspection for detecting particles attached to the wafer W,
A comet detection inspection for detecting a comet generated by bubbles or foreign matter in the resist solution on the surface of the wafer W after the resist application, and a splash back in which the solvent of the resist solution that has jumped out of the surface of the wafer W and adheres to the wafer W again Splash-back detection inspection, common defect detection inspection for detecting common defects appearing in the same shape on the same location on the surface of the wafer W, scum detection inspection for detecting resist residues remaining on the wafer W after development processing, and the previous process of the photolithography process Clamp ring inspection for detecting scars remaining on the wafer edge by holding (clamping) the wafer edge, and NO RESIST and NO DEVELO for detecting that resist coating processing and development processing have not been performed
P inspection, line width measurement inspection for measuring the line width of the resist film formed on the wafer W, and inspection for comparing the overlay accuracy between the wafer W exposed by the exposure device 3 and the photomask with standard values. It is configured such that all or a part of the inspection such as the overlay inspection can be selectively performed.

The series of inspections is divided into a macro inspection and a micro inspection.
The micro inspection can detect a defect of 0.1 μm or more, for example, in a micro inspection.

Next, a control system of the semiconductor wafer processing apparatus will be described.

First, as shown in FIG. 1, the apparatus comprises a control unit 20 for each processing unit connected to each of the processing units (10, 11, 15), and an inspection device (9, 1).
A control unit 21 for each inspection device connected to (2, 16);
The control unit 22 for the exposure apparatus connected to the exposure apparatus 3
And a central control unit 23 to which the control units 20 and 22 are connected.
And an information storage unit 24 connected to the central control unit 23.
And a control program storage unit 25.

FIG. 2 is a block diagram for explaining this system in more detail.

The central controller 23 has, for example, an input unit 27, a CPU 28, a RAM 29 and a display unit 30,
The information storage unit 24 and the control program storage unit 25 are connected to a bus 31 to which these are connected. These storage units may be, for example, fixed storage devices such as hard disks, but the form is not particularly limited. The input unit 27 and the display unit 30 are connected to, for example, an operation panel provided on the front surface of the coating and developing apparatus 2, and input a wafer processing recipe (process condition) via the input unit 27 and the display unit 30. And settings. The recipe includes an entire recipe and a recipe for each of the processing units 10, 11, 15, and 3 constituting the entire recipe. The recipe for each of the processing units 10, 11, 15, and 3, that is, the setting of the process conditions is as described above. The processing can be performed for each of the processing units 10, 11, 15, and 3 through the operation panel.

The information storage unit 24 includes a recipe-process ID storage unit 33 for storing a recipe (process condition) of each processing unit in association with a process ID, an entire recipe storage unit 34 for storing the entire recipe, a wafer A wafer ID storing processing ID information and processing history information of the wafer; a wafer ID storing processing history information storage unit 35;
And an inspection result information storage unit 36. The process ID
Is a unique code for identifying a processing unit and its process conditions. The overall recipe is a combination of the recipes of the respective processing units as described above, and is specified by the combination of the process IDs. This whole recipe may be stored in association with the wafer ID.

The control program storage unit 25 stores
Recipe-process ID setting section 38, overall recipe setting section 39, wafer processing execution command section 40, wafer ID-processing history storage command section 41, wafer ID-inspection result storage command section 42, wafer ID-various An information output command unit 43;
It has a process condition evaluation unit 44 and a process condition correction unit 45.

The recipe-process ID setting unit 38 includes:
A recipe (process condition) input for each of the processing units 10, 11, 15, and 3 is assigned a process ID and stored in the recipe-process ID storage unit 33. The whole recipe setting section 39 sets the whole recipe of the wafer processing as a combination of the process IDs and stores it in the whole recipe storage section 34. The wafer processing execution command unit 40 includes:
Based on the overall recipe, each of the processing units 10, 1
A command is issued to the control units 20, 21 of 1, 15, and 3 to perform wafer processing according to the process condition referred to by the process ID. The wafer ID-processing history storage command unit 41 receives wafer IN / OUT information from the processing units 10, 11, and 16 from the wafer ID reader 5 from the wafer ID reading device 5, respectively, and uses the received wafer IN / OUT information as history information. It is stored in the processing history information storage unit 25. Also, the wafer ID-inspection result storage command section 42
Stores the inspection result of each inspection apparatus in the wafer ID-inspection result storage unit 36 in association with the wafer ID.
The wafer ID-various information output command unit 43 outputs information stored in the information storage unit 24 in association with the wafer ID, for example, to a process condition evaluation unit 44. The process condition evaluation unit 44 evaluates a process condition in each processing apparatus referred to in the processing history of the wafer based on the inspection result. The process condition correction section 45 corrects the process conditions if necessary based on the evaluation result. As shown in FIG. 3, the control section of the wafer ID reader 5 and each of the processing units 10, 11, 15 2
0, control unit 21 of each inspection apparatus and control unit 2 of exposure apparatus 3
2 is a bus 3 via an interface (not shown).
1 connected.

Next, the operation of the substrate processing apparatus 1 will be described.

First, a processing recipe for the wafer W is set.
That is, the recipe in each of the processing units 10, 11, 15, and 3, and the overall processing recipe are set. A recipe for each processing unit is assigned a process ID, and the entire recipe is referred to by the combination of the process IDs. The entire recipe may be stored in advance in association with a known wafer ID.

Next, the coating and developing device 2 and the exposure device 3 are operated based on the entire recipe, and the processing of the wafer is started. That is, the wafer W is taken out from the cassette CR, and the wafer ID is read by the wafer ID reading device. Then, each processing unit 10, 11, 1
Steps 5 and 3 sequentially process wafers based on the process conditions referred to by the process ID. Here, when the whole recipe is associated with the wafer ID, the whole recipe is specified from the wafer ID, and the process ID is extracted from the whole recipe.

Each processing unit 10, 11, 15, 3
When a wafer W is introduced into the processing units 10, 11, 15, and 3, an IN signal is generated, and when processing of the wafer is completed and the wafer is discharged, an OUT signal is generated. This IN / OUT
The information is associated with the wafer ID and acquired as history information together with the process ID. In addition, each inspection device 9, 1
The inspection results obtained by 2 and 16 are also stored in association with the wafer ID.

When a series of processing of the wafer W is completed,
Various kinds of information referred to by the wafer ID of the wafer W are output according to a command from the wafer ID-various information output command unit 43.

The evaluation section 44 receives the output information and evaluates the process conditions in each of the processing units 10, 11, 15, and 3. For example, when a defect is detected by the defocus inspection, the line width measurement inspection, and the overlay inspection in the defect inspection device 16, the process condition of the exposure device 3 is evaluated as inappropriate. For example, when a position shift equal to or more than a predetermined threshold value of the pattern is detected by the defocus inspection, the focusing performed by the exposure device 3 is evaluated as inappropriate. In addition, when a pattern shift of a predetermined value or more is detected by the defocus inspection, the focusing performed by the exposure device 3 is evaluated as inappropriate.

When the evaluation section 44 outputs such an evaluation, the process condition correction section 45 corrects the process conditions of each processing unit to be evaluated based on the evaluation. For example, in the above case, the process condition of the exposure apparatus 3, that is, the exposure condition is corrected. The corrected process conditions are stored in the recipe-process ID storage unit 33.

Therefore, after this, the same process ID
The corrected process conditions are applied to the wafer W processed with reference to FIG.

According to such a configuration, in a semiconductor device manufacturing apparatus which has a plurality of processing units and sequentially performs a predetermined process on a semiconductor wafer, an individual wafer ID is read, and various information relating to the processing of the wafer is read. Is the wafer I
D is stored and output. According to such a configuration, it is possible to manage the processing in wafer units, not in lot units. Therefore, there is an effect that a processing apparatus suitable for high-mix low-volume production can be constructed.

Further, based on the inspection result associated with the wafer ID, the same process condition of the wafer is appropriately evaluated and corrected if necessary. This process condition is overwritten and stored in association with the process ID.
As a result, the corrected process conditions are applied to the processes that refer to the same process ID. According to such a configuration, process conditions are evaluated each time wafer processing is performed,
Because it can be corrected, in high-mix low-volume production,
There is an effect that quality can be easily ensured.

The present invention is not limited to the above-described embodiment, but can be variously modified without changing the gist of the invention.

For example, in the above-described embodiment, as the processing units of the coating and developing apparatus 2, only the resist liquid coating unit 10, the heating unit 11, and the developing processing unit 15 are shown for convenience of explanation, but the present invention is not limited to this. Instead, various processing units including a transport system are actually provided. Then, the same control, process condition setting, evaluation and correction are performed on these various processing units.

In the above embodiment, the inspection devices 9, 12, and 16 are connected in-line in the device. However, the inspection devices 9, 12, and 16 may be placed outside the substrate processing apparatus 1.

Further, in the above embodiment, the evaluation and correction results of the process conditions are used only by one processing apparatus 1, but the present invention is not limited to this. As shown in FIG. 4, various types of information, process condition evaluations, and process condition correction results associated with wafer IDs obtained by one processing apparatus are transferred to another processing apparatus 1 'for use. Is also good. In this case, it is preferable that the information storage unit 24 is shared.

According to such a configuration, when the same wafer processing is performed in parallel by a plurality of processing apparatuses, the processing quality can be more effectively improved.

[0053]

As described above, according to the present invention, in view of such circumstances, a substrate processing apparatus that sequentially processes a large number of substrates can be effectively used for high-mix low-volume production. A substrate processing apparatus capable of performing corresponding process quality control can be provided.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of a substrate processing apparatus according to an embodiment of the present invention.

FIG. 2 is also a system configuration diagram.

FIG. 3 is a perspective view for explaining a relationship between a wafer and a wafer ID.

FIG. 4 is a schematic configuration diagram showing a modification.

[Explanation of symbols]

W: semiconductor wafer CR: cassette α: wafer transfer path 1: semiconductor wafer processing device (substrate processing device) 2: coating / developing device (substrate processing device) 3: exposure device (substrate processing device) 5: ID reader (substrate) 7: Orientation flat 9: Base reflectance inspection device (substrate inspection device) 10: Resist liquid application unit (substrate processing device) 11: Heating unit (substrate processing device) 12: Film thickness inspection device (substrate inspection device) 15: Development processing unit (substrate processing means) 16: Defect inspection device (substrate inspection means) 16: Development processing unit (substrate processing means) 20: Control unit of each processing unit 21: Control unit of each inspection device 22: Exposure Device control unit 23 Central control device 24 Information storage unit 25 Control program storage unit 27 Input unit 28 RAM 29 CPU 30 Display unit 31 Bus 33 Recipe ID storage unit (process condition storage unit) 34 Overall recipe storage unit 35 Wafer ID processing history information storage unit 36 Wafer ID inspection result information storage unit 38 Recipe process ID Setting section (process condition storage means) 39: overall recipe setting section 40: wafer processing execution command section 41: wafer ID-processing history storage command section 42: wafer ID-inspection result storage command section 43: wafer ID-various information output command Unit 44: Process condition evaluation unit (evaluation unit) 45: Process condition correction unit (correction unit)

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification FI FI Theme Court ゛ (Reference) H01L 21/66 H01L 21/66 P 21/30 562 (72) Inventor Kunie Kei Ogata 5-chome, Akasaka, Minato-ku, Tokyo No. 3-6 Tokyo Electron Co., Ltd. (72) Inventor Ryoichi Uemura 2655 Tsukure, Kikuyo-cho, Kikuchi-gun, Kumamoto Prefecture F-term (reference) 4M106 AA01 CA38 DJ21 DJ38 DJ40 5F046 AA17 DA29 DD03 JA22 LA18

Claims (7)

[Claims] 1. A substrate processing apparatus for sequentially performing a predetermined processing on a plurality of substrates to be processed, wherein: a substrate ID reading unit configured to read a unique substrate ID provided on each of the substrates to be processed; A substrate processing means for processing the substrate based on predetermined process conditions; a substrate inspection means for inspecting a processing result of the substrate to be processed by the substrate processing means; and a processing history of the processing target substrate and the inspection result. An output means for outputting one or both of them in a state associated with the substrate ID. 2. The substrate processing apparatus according to claim 1, further comprising: an evaluation unit configured to evaluate the process condition based on the inspection result. 3. The substrate processing apparatus according to claim 2, wherein said substrate processing apparatus further comprises: a process condition storage unit for storing a process condition in a state associated with a predetermined process ID; Correction means for correcting a process condition associated with the process ID based on the evaluation result of the above. The substrate processing means converts the process condition stored by the process condition storage means based on the process ID. A substrate processing apparatus for taking out and processing the substrate to be processed based on the process conditions. 4. The substrate processing apparatus according to claim 1, wherein the substrate processing unit has a plurality of processing units for sequentially performing different processing on the substrate to be processed, A substrate processing apparatus comprising one or more substrate inspection units useful for inspecting a processing result by one or more arbitrary processing units among the plurality of processing units. 5. The substrate processing apparatus according to claim 4, wherein each of the one or more processing units evaluates a process condition of the one or more processing units based on an inspection result of the one or more substrate inspection units. A substrate processing apparatus comprising: 6. The substrate processing apparatus according to claim 5, further comprising: a process condition storage unit configured to store a process condition of each processing unit in a state associated with a predetermined process ID; Correction means for correcting each process condition associated with the process ID on the basis of the evaluation result of each processing unit output by the processing unit. A substrate processing apparatus for extracting a process condition stored by a storage unit and processing the substrate to be processed based on the process condition. 7. The substrate processing apparatus according to claim 6, further comprising: all process condition storing means for storing process IDs of all process conditions of the target substrate in association with the wafer ID. , The process ID stored by the entire process condition storing means based on the wafer ID.
To retrieve the process conditions stored by the process condition storage means based on the process ID.
A substrate processing apparatus for processing the substrate to be processed on the basis thereof.