JP2001160656A - Nitride compound semiconductor device - Google Patents

Nitride compound semiconductor device

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Publication number
JP2001160656A
JP2001160656A JP34182599A JP34182599A JP2001160656A JP 2001160656 A JP2001160656 A JP 2001160656A JP 34182599 A JP34182599 A JP 34182599A JP 34182599 A JP34182599 A JP 34182599A JP 2001160656 A JP2001160656 A JP 2001160656A
Authority
JP
Japan
Prior art keywords
nitride
compound semiconductor
substrate
plane
based compound
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP34182599A
Other languages
Japanese (ja)
Inventor
Nobuaki Teraguchi
信明 寺口
Yasuyuki Nanishi
▲やす▼之 名西
Akira Suzuki
彰 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Ritsumeikan Trust
Original Assignee
Sharp Corp
Ritsumeikan Trust
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp, Ritsumeikan Trust filed Critical Sharp Corp
Priority to JP34182599A priority Critical patent/JP2001160656A/en
Publication of JP2001160656A publication Critical patent/JP2001160656A/en
Pending legal-status Critical Current

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  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a nitride compound semiconductor device which can improve electrical characteristics, while suppressing carrier scattering. SOLUTION: GaN having crystal of a wurtzite structure is selected as a substrate material 1. Nitride semiconductor layers 2, 3, 4, 5 are laminated on a surface (a) (1,1,-2,0) of the substrate material, which is a substrate surface 1a. The source-drain direction, which serves as an electrical path, is rendered parallel with the direction of an axis (c) of the crystal which constitutes the laminated nitride semiconductor layers.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、ウルツ鉱構造の結
晶をもつ基板材料の特定の面に窒化物系化合物半導体を
積層することによって、キャリア散乱を抑えて電気的特
性を改善した窒化物系化合物半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nitride-based compound having a wurtzite crystal structure and a nitride-based compound semiconductor laminated on a specific surface of the substrate material to suppress carrier scattering and improve electrical characteristics. The present invention relates to a compound semiconductor device.

【0002】[0002]

【従来の技術】従来、窒化物系化合物半導体用の基板と
して、図3中に(0,0,0,1)で示される六方晶系のSiCの
c面、サファイアのc面が主に用いられている。これ
は、ウルツ鉱構造をもつ窒化物系化合物半導体が、c軸
配向した成長を取り易いため、c面基板上に,より結晶
性に優れた膜が得られるという利点があるためである。
一方、窒化物系化合物半導体を用いたレーザとして、特
開平7‐297495号公報、特開平10‐41547
号公報に記載のものが知られおり、これらのレーザ半導
体は、c面のへき開性を用いて共振器面を得るために、
基板の積層面にa面(図3中の(1,1,-2,0)参照)を用いて
いる。
2. Description of the Related Art Conventionally, a c-plane of hexagonal SiC and a c-plane of sapphire indicated by (0,0,0,1) in FIG. Have been. This is because a nitride-based compound semiconductor having a wurtzite structure can easily grow with c-axis orientation, and thus has an advantage that a film having more excellent crystallinity can be obtained on a c-plane substrate.
On the other hand, as a laser using a nitride-based compound semiconductor, JP-A-7-297495 and JP-A-10-41547.
Nos. 1 and 2 are known, and these laser semiconductors are used to obtain a cavity surface using cleaving property of a c-plane.
The a-plane (see (1,1, -2,0) in FIG. 3) is used for the laminated surface of the substrate.

【0003】[0003]

【発明が解決しようとする課題】c面基板21上に窒化
物系化合物半導体を積層した従来の発光ダイオード(L
ED)あるいはレーザダイオード(LD)は、図4の矢印
で示すように、c軸と平行に電流を流すため[S. Nakamu
ra et.al,Jpn.J. Appl. Phys. 34 (1995) L797, 35
(1996) L74]、結晶中に存在する転位Dによるキャリア
散乱の影響が少なく、発光特性が悪化することは殆どな
い。ところが、c面基板22上に窒化物系半導体を積層
してなるヘテロ構造電界効果型トランジスタ(HFET)
は、図5に示すように、基板面に垂直に並ぶ転位Dが、
矢印で示すソース23-ドレイン24間の電流経路に直
交する構造となるため、転位Dによってキャリアが著し
く散乱され、その結果、電気的特性が悪化するという問
題がある。
A conventional light emitting diode (L) in which a nitride-based compound semiconductor is laminated on a c-plane substrate 21.
ED) or a laser diode (LD), as shown by the arrow in FIG. 4, flows a current parallel to the c-axis [S. Nakamu
ra et. al, Jpn. J. Appl. Phys. 34 (1995) L797, 35
(1996) L74], the effect of carrier scattering due to dislocations D present in the crystal is small, and the emission characteristics are hardly deteriorated. However, a heterostructure field effect transistor (HFET) formed by laminating a nitride-based semiconductor on a c-plane substrate 22
As shown in FIG. 5, dislocations D arranged perpendicular to the substrate surface are
Since the structure is orthogonal to the current path between the source 23 and the drain 24 indicated by the arrow, carriers are remarkably scattered by the dislocations D, and as a result, there is a problem that electrical characteristics are deteriorated.

【0004】そこで、本発明の目的は、ウルツ鉱構造の
結晶をもつ材料の特定の面を基板表面に選び、この表面
に窒化物系化合物半導体を積層することによって、キャ
リア散乱を抑えて電気的特性を改善することができる窒
化物系化合物半導体装置を提供することにある。
Accordingly, an object of the present invention is to select a specific surface of a material having a crystal having a wurtzite structure as a substrate surface and to laminate a nitride-based compound semiconductor on this surface, thereby suppressing carrier scattering and providing electrical characteristics. An object of the present invention is to provide a nitride-based compound semiconductor device capable of improving characteristics.

【0005】[0005]

【課題を解決するための手段】本発明者らは、電流経路
に平行に転位が走るような積層構造によって素子特性が
飛躍的に向上することに着目し、かかる積層構造が得ら
れる基板表面の面指数を見出すべく鋭意研究を重ねた結
果、以下の構成の本願発明を成すに至った。即ち、請求
項1の発明は、窒化物系化合物半導体を用いた窒化物系
化合物半導体装置であって、ウルツ鉱構造の結晶をもつ
材料の(1,1,-2,0)面(a面)または(1,-1,0,0)面(m
面)を基板として用い、かつ電流を流す方向がc軸方向
と平行になっていることを特徴とする。
Means for Solving the Problems The present inventors have focused on the fact that the device characteristics are dramatically improved by a laminated structure in which dislocations run parallel to the current path, and the surface of the substrate on which such a laminated structure is obtained is considered. As a result of intensive studies to find a surface index, the present invention having the following configuration has been achieved. That is, the invention of claim 1 is a nitride-based compound semiconductor device using a nitride-based compound semiconductor, wherein a material having a wurtzite structure crystal has a (1,1, -2,0) plane (a-plane). ) Or (1, -1,0,0) plane (m
Surface) as a substrate, and the direction in which current flows is parallel to the c-axis direction.

【0006】請求項1の窒化物系化合物半導体装置で
は、上記特定の面指数をもつ基板表面上に積層された窒
化物系化合物半導体は、結晶のc軸が基板面と平行にな
って、転位が基板面に平行に走るようになる。そして、
この窒化物系化合物半導体装置には、c軸方向つまり基
板面に対して平行に電流が流れるから、キャリアの散乱
が小さくなって電気的特性に優れた半導体装置が実現さ
れる。
In the nitride-based compound semiconductor device of the first aspect, the nitride-based compound semiconductor stacked on the substrate surface having the specific plane index has a dislocation in which the c-axis of the crystal is parallel to the substrate surface. Run parallel to the substrate surface. And
In this nitride-based compound semiconductor device, a current flows in the c-axis direction, that is, in parallel to the substrate surface, so that scattering of carriers is reduced and a semiconductor device having excellent electrical characteristics is realized.

【0007】請求項2の窒化物系化合物半導体装置は、
ヘテ口構造を用いた電界効果型トランジスタであり、ソ
ース−ドレインの方向がc軸方向と平行になっているこ
とを特徴とする。請求項2の窒化物系化合物半導体装置
では、その電流経路であるソース−ドレインの方向が、
積層された窒化物系化合物半導体中で転位が走る方向で
あるc軸と平行になっているので、キャリア散乱が小さ
くなって電気的特性に優れた電界効果型トランジスタが
実現される。
According to a second aspect of the present invention, there is provided a nitride-based compound semiconductor device.
This is a field-effect transistor using a flute mouth structure, in which a source-drain direction is parallel to a c-axis direction. In the nitride-based compound semiconductor device according to claim 2, the direction of the source-drain, which is the current path, is:
Since it is parallel to the c-axis, which is the direction in which dislocations travel in the stacked nitride-based compound semiconductor, carrier scattering is reduced and a field-effect transistor with excellent electrical characteristics is realized.

【0008】請求項3の窒化物系化合物半導体装置は、
上記ウルツ鉱構造の結晶をもつ基板材料が、GaN,Al
N,SiC,ZnOのいずれかであることを特徴とする。請
求項3の窒化物系化合物半導体装置の基板材料は、安定
な六方晶であるとともに、積層される窒化物系化合物半
導体との格子不整を小さくできるため、結晶性に優れた
窒化物系化合物半導体を成長させることができる。
According to a third aspect of the present invention, there is provided a nitride-based compound semiconductor device.
The substrate material having the wurtzite structure crystal is GaN, Al
It is characterized by being one of N, SiC and ZnO. The substrate material of the nitride-based compound semiconductor device according to claim 3, which is a stable hexagonal crystal and can reduce lattice mismatch with the nitride-based compound semiconductor to be laminated, so that the nitride-based compound semiconductor having excellent crystallinity is obtained. Can grow.

【0009】請求項4の窒化物系化合物半導体装置は、
上記ウルツ鉱構造の結晶をもつ基板材料が、傾斜角5度
以内のオフ基板であることを特徴とする。請求項4の窒
化物系化合物半導体装置では、基板表面が上記a面また
はm面に対して5度以内で傾斜しているので、基板表面
に結晶の成長起点となるステップが多数存在して、結晶
性に優れたa面またはm面上に結晶性に優れた窒化物系
化合物半導体を一層安定に成長させることができる。
The nitride-based compound semiconductor device of claim 4 is
The substrate material having the crystal having the wurtzite structure is an off-substrate having an inclination angle of 5 degrees or less. In the nitride-based compound semiconductor device according to claim 4, since the substrate surface is inclined within 5 degrees with respect to the a-plane or the m-plane, there are many steps on the substrate surface that serve as crystal growth starting points, A nitride-based compound semiconductor having excellent crystallinity can be more stably grown on the a-plane or m-plane having excellent crystallinity.

【0010】請求項5の窒化物系化合物半導体装置は、
上記ウルツ鉱構造の結晶をもつ基板材料が、SiCであ
り、AlNのバッファ層を有することを特徴とする。六
方晶系に属し,4H(ABCBA)の単位格子をもつウルツ鉱構
造の基板材料としての4H-SiCのa面またはm面であ
る表面上に、バッファ層を介さずに窒化物系化合物とし
て例えばGaNを直接成長させた場合、4H-SiCの積
層(ABCBA)の中に六方晶2HのAB積層と面心立方晶3
CのABC積層が混在するため、2H(ABAB)と3C(ABC
ABC)のGaNが形成され、その界面に基板表面に垂直な
方向,つまり例えば電界効果型トランジスタの電流経路
に直交する方向に積層欠陥が形成されるため、この積層
欠陥によってキャリアが著しく散乱されることになる。
しかし、請求項5の窒化物系化合物半導体装置では、バ
ッファ層として2H構造が安定なAlNを用いているの
で、このバッファ層上に積層欠陥のない2H-GaN(六
方晶GaN)等が安定して得られるから、積層欠陥による
キャリア散乱が生じない輸送特性に優れた窒化物系化合
物半導体装置を実現することができる。
According to a fifth aspect of the present invention, there is provided a nitride-based compound semiconductor device.
The substrate material having the crystal having the wurtzite structure is SiC, and has a buffer layer of AlN. It belongs to a hexagonal system and has a unit cell of 4H (ABCBA). On a surface which is an a-plane or an m-plane of 4H-SiC as a wurtzite structure substrate material, for example, as a nitride compound without a buffer layer, When GaN is directly grown, an AB stack of hexagonal 2H and a face-centered cubic 3 are stacked in a 4H-SiC stack (ABCBA).
2H (ABAB) and 3C (ABC)
ABC) is formed, and stacking faults are formed at the interface in a direction perpendicular to the substrate surface, that is, for example, in a direction perpendicular to the current path of the field effect transistor, so that the stacking faults cause significant scattering of carriers. Will be.
However, in the nitride-based compound semiconductor device according to claim 5, since AlN having a stable 2H structure is used as the buffer layer, 2H-GaN (hexagonal GaN) or the like having no stacking faults on the buffer layer is stable. Accordingly, a nitride-based compound semiconductor device having excellent transport characteristics in which carrier scattering due to stacking faults does not occur can be realized.

【0011】[0011]

【発明の実施の形態】以下、本発明を図示の実施の形態
により詳細に説明する。 (実施例1)図1は、窒化物系化合物半導体装置の第1
の実施例としてのヘテロ構造電界効果トランジスタ(H
FET)の概要を示す断面図である。図1において、1
は表面1aが図3の六方用面指数系で(1,1,-2,0)の指
数をもつa面であるGaNからなる基板、2はこの基板
1の表面にキャリア濃度5×1016cm-3,膜厚2μmで積
層したアンドープのGaN層、3はこのGaN層2の表面
に膜厚10nmで積層したアンドープのAl0.2Ga0.8Nの
スペーサ層、4はこのスペーサ層3の表面にキャリア濃
度2×1018cm-3,膜厚30nmで積層したn型Al0.2Ga
0.8Nのドナー層、5はこのドナー層4の表面両側に積
層したn型GaNのキャップ層、6はCl2によるエッチ
ングで中央のキャップ層5を除去した上記ドナー層4の
表面に形成したPt/Auからなるゲート電極、7は上記
両側のキャップ層5の表面に形成したTi/Alからなる
ソース/ドレイン電極である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the illustrated embodiments. (Example 1) FIG. 1 shows a first example of a nitride-based compound semiconductor device.
Heterostructure field effect transistor (H
FIG. 2 is a cross-sectional view showing an outline of the FET. In FIG. 1, 1
Is a substrate made of GaN whose surface 1a is an a-plane having an index of (1,1, -2,0) in the hexagonal plane index system of FIG. 3, and 2 is a carrier concentration of 5 × 10 16 cm -3, an undoped GaN layer laminated in a thickness of 2 [mu] m, 3 is a spacer layer of undoped Al 0.2 Ga 0.8 N was stacked in a film thickness 10nm on the surface of the GaN layer 2, 4 on the surface of the spacer layer 3 N-type Al 0.2 Ga laminated at a carrier concentration of 2 × 10 18 cm -3 and a thickness of 30 nm
0.8 donor layer of N, n-type GaN cap layer laminated on the surface on both sides of the donor layer 4 is 5, 6 were formed on the surface of the donor layer 4 is removed the center cap layer 5 by etching with Cl 2 Pt The gate electrode 7 of / Au is a source / drain electrode of Ti / Al formed on the surface of the cap layer 5 on both sides.

【0012】上記各層は、有機金属気相成長法(MOV
PE:Metal Organic Vapor Phase Epitaxy)や分子線エ
ピタキシャル成長法(MBE:Molecular Beam Epitaxy)
などを結晶成長方法として用いることができるが、本実
施例1ではMOVPE法を用いた。即ち、最初に、窒素
雰囲気中で基板1の表面を基板温度1000℃にて10分間
クリーニングした。次に、そのままの基板温度を保って
GaN層2の成長を行なった後、基板温度を1100℃に上
げて、Al0.2Ga0.8Nのスペーサ層3とドナー層4の成
長を行い、再び1000℃の基板温度でGaNのキャップ層
5を成長させた。
Each of the above layers is formed by metal organic chemical vapor deposition (MOV).
PE: Metal Organic Vapor Phase Epitaxy) and molecular beam epitaxy (MBE: Molecular Beam Epitaxy)
And the like can be used as a crystal growth method. In the first embodiment, the MOVPE method is used. That is, first, the surface of the substrate 1 was cleaned at a substrate temperature of 1000 ° C. for 10 minutes in a nitrogen atmosphere. Next, after growing the GaN layer 2 while keeping the substrate temperature as it is, raising the substrate temperature to 1100 ° C., growing the spacer layer 3 and the donor layer 4 of Al 0.2 Ga 0.8 N, and again 1000 ° C. A GaN cap layer 5 was grown at a substrate temperature of.

【0013】こうして製造された図1に示すHFET
は、基板1上に積層された窒化物の各層を構成する結晶
のc軸が基板1の表面と平行になり、この結晶中の転位
も主としてc軸に沿って,つまり基板表面と平行に延
び、この方向がHFETの電流経路であるソース−ドレ
イン方向に一致するので、キャリアの散乱が小さくなっ
て電気的特性に優れたヘテロ構造電界効果トランジスタ
が得られる。また、この実施例1では、ウルツ鉱構造の
結晶をもつ基板1の材料として、安定な六方晶であり,
積層される窒化物層との格子不整を小さくできるGaN
を用いているので、結晶性に優れた積層をもつヘテロ構
造電界効果トランジスタが得られる。なお、このような
安定な六方晶の基板材料として、GaNの他にAlN,Si
C,ZnOを用いることもできる。また、基板1の表面と
して、上記(1,1,-2,0)の面指数をもつa面に代えて、
(1,-1,0,0)の面指数をもつm面(図3参照)を選んで
も、この基板上に積層される各窒化物層を構成する結晶
のc軸を、基板表面と平行にして、電気的特性に優れた
ヘテロ構造電界効果トランジスタを得ることができる。
The thus manufactured HFET shown in FIG.
Is that the c-axis of the crystal constituting each nitride layer laminated on the substrate 1 is parallel to the surface of the substrate 1, and the dislocations in this crystal also extend mainly along the c-axis, that is, parallel to the substrate surface. Since this direction coincides with the source-drain direction which is the current path of the HFET, carrier scattering is reduced, and a heterostructure field effect transistor having excellent electrical characteristics can be obtained. Further, in Example 1, the material of the substrate 1 having the crystal having the wurtzite structure is a stable hexagonal crystal,
GaN that can reduce lattice mismatch with the nitride layer to be laminated
Is used, a heterostructure field-effect transistor having a stack with excellent crystallinity can be obtained. As such a stable hexagonal substrate material, in addition to GaN, AlN, Si, etc.
C, ZnO can also be used. As the surface of the substrate 1, instead of the a-plane having a plane index of (1,1, -2,0),
Even if an m-plane (see FIG. 3) having a plane index of (1, -1,0,0) is selected, the c-axis of the crystal constituting each nitride layer laminated on this substrate is parallel to the substrate surface. Thus, a heterostructure field effect transistor having excellent electric characteristics can be obtained.

【0014】上記実施例1の一例としてゲート長さ1μ
m,ソースドレイン間距離5μmのHFETを作製し、そ
の特性を従来のHFETと比較試験した。その結果、実
施例1によるHFETは、室温において、最大発振周波
数がfmax=20GHz、トランスコンダクタンスgm=1
80mS/mmであった。これに対して、同一構造でソース
ドレイン方向をc軸と垂直にした従来のHFETでは、
室温において、最大発振周波数がfmax=15GHz,ト
ランスコンダクタンスgm=140mS/mmとなっており、
電流経路が転位の走る方向と直交する従来のHFETで
はキャリア散乱の影響が大きいことが明かになった。
As an example of the first embodiment, the gate length is 1 μm.
An HFET having a distance of 5 μm and a source-drain distance of 5 μm was fabricated, and its characteristics were compared with those of a conventional HFET. As a result, the HFET according to the first embodiment has a maximum oscillation frequency of fmax = 20 GHz and a transconductance g m = 1 at room temperature.
It was 80 mS / mm. On the other hand, in a conventional HFET having the same structure and the source / drain direction perpendicular to the c-axis,
At room temperature, the maximum oscillation frequency is fmax = 15 GHz, the transconductance g m = 140 mS / mm,
It has been clarified that the influence of carrier scattering is large in the conventional HFET in which the current path is orthogonal to the direction in which the dislocation runs.

【0015】(実施例2)実施例2のHFETは、図1
の(1,1,-2,0)の指数をもつGaN基板1に代えて、図
1の破線で示すように(1,1,-2,0)面に対して2°傾い
た表面1'aをもつGaN基板1'を用いた点を除いて、図
1で述べた実施例1のHFETと同じ構造を有する。G
aN基板1'上に積層される各層の結晶成長方法は、実施
例1で述べたと同様である。
(Embodiment 2) The HFET of Embodiment 2 is shown in FIG.
In place of the GaN substrate 1 having an index of (1,1, -2,0), as shown by a broken line in FIG. It has the same structure as the HFET of the first embodiment described with reference to FIG. 1 except that a GaN substrate 1 having 'a' is used. G
The crystal growth method of each layer laminated on the aN substrate 1 'is the same as described in the first embodiment.

【0016】従って、実施例2のHFETは、実施例1
と同様の作用効果を奏するのに加えて、基板表面1'aが
a面に対して2°傾斜しているので、基板表面1'に沿
って結晶の成長起点となるミクロなステップ(段)が多数
でき、円滑かつ均一に結晶が成長するから、結晶性に優
れた窒化物の各層を一層安定に成長させることができ
る。なお、基板1'の表面として、(1,-1,0,0)の面指
数をもつm面(図3参照)に対して2°傾斜した面を選ん
でも、同様の作用効果を得ることができる。さらに、基
板表面のa面またはm面に対する傾斜は、実施例2の2
°に限らず、5°以内にすることができる。
Therefore, the HFET of the second embodiment is different from the HFET of the first embodiment.
In addition to having the same function and effect as described above, since the substrate surface 1′a is inclined by 2 ° with respect to the a-plane, a micro step (step) serving as a crystal growth starting point along the substrate surface 1 ′ Can be formed, and crystals can be grown smoothly and uniformly, so that each nitride layer having excellent crystallinity can be grown more stably. Even if a surface inclined by 2 ° with respect to the m-plane (see FIG. 3) having a plane index of (1, -1,0,0) is obtained as the surface of the substrate 1 ′, the same operation and effect can be obtained. Can be. Further, the inclination of the substrate surface with respect to the a-plane or the m-plane is 2
The angle can be set to not more than 5 °.

【0017】上記実施例2の一例として、実施例1同じ
くゲート長さ1μm,ソースドレイン間距離5μmのHF
ETを作製し、その特性を従来のHFETと比較試験し
た。その結果、実施例2によるHFETは、室温におい
て、最大発振周波数がfmax=25GHz、トランスコン
ダクタンスgm=200mS/mmとなり、実施例1よりも優
れた電気的特性をもつことが明らかになった。
As an example of the second embodiment, an HF having a gate length of 1 μm and a source-drain distance of 5 μm as in the first embodiment.
ET was manufactured and its characteristics were compared with those of a conventional HFET. As a result, it was found that the HFET according to Example 2 had a maximum oscillation frequency of fmax = 25 GHz and a transconductance g m = 200 mS / mm at room temperature, and had better electrical characteristics than Example 1.

【0018】(実施例3)図2は、本発明の第3の実施
例であるHFETの概要を示す断面図である。図2にお
いて、11は表面11aが図3の六方晶面指数で(1,-1,
0,0)の指数をもつm面である6H(ABCACB)のSiCか
らなる基板、12はこの基板11の表面に膜厚10nmで
積層したアンドープのAlNからなるバッファ層、13
はこのバッファ層12の表面に膜厚20nmで積層したア
ンドープのGaN層、14はこのGaN層13の表面に膜
厚20nmで積層したアンドープのAl0.2Ga0.8Nのスペ
ーサ層、15はこのスペサ層14の表面にキャリア濃度
5×1018cm-3,膜厚10nmで積層し、Siでド−プした
Al0.2Ga0.8Nのドナー層、16はこのドナー層15の
表面に膜厚2nmで積層したアンドープのAl0.2Ga0.8
からなるキャップ層、17はこのキャップ層16の表面
中央に形成したPt/Auからなるゲート電極、18は上
記キャップ層16の表面両側に形成したTi/Alからな
るソース/ドレイン電極である。
(Embodiment 3) FIG. 2 is a sectional view showing an outline of an HFET according to a third embodiment of the present invention. In FIG. 2, reference numeral 11 denotes a hexagonal plane index of the surface 11a of FIG.
A substrate made of 6H (ABCACB) SiC, which is an m-plane having an index of (0,0); 12 is a buffer layer made of undoped AlN laminated on the surface of the substrate 11 to a thickness of 10 nm;
Is an undoped GaN layer laminated on the surface of the buffer layer 12 to a thickness of 20 nm; 14 is an undoped Al 0.2 Ga 0.8 N spacer layer laminated on the surface of the GaN layer 13 to a thickness of 20 nm; A donor layer of Al 0.2 Ga 0.8 N doped with Si and having a carrier concentration of 5 × 10 18 cm −3 and a thickness of 10 nm is deposited on the surface of the donor layer 14, and a donor layer 15 of 2 nm thickness is deposited on the surface of the donor layer 15. Undoped Al 0.2 Ga 0.8 N
A cap layer 17 made of Pt / Au formed at the center of the surface of the cap layer 16; and a source / drain electrode 18 made of Ti / Al formed on both sides of the surface of the cap layer 16.

【0019】上記各層は、MOVPE法やMBE法など
を結晶成長方法として用いることができるが、本実施例
3ではRF(Radio Frequency)‐MBE法を用いた。即
ち、最初に、基板11の表面を基板温度900℃にて20
分間サーマルクリーニングし、続いてそのままの基板温
度を保ってAlNのバッファ層12を成長させた後、基
板温度を750℃に下げて、アンドープのGaN層13、ア
ンドープのAl0.2Ga0 .8Nのスペーサ層14、Siでド
ープしたAl0.2Ga0.8Nのドナー層15、アンドープの
Al0.2Ga0.8Nのキャップ層16を順次成長させた。用
いた原料は、Al,Gaの固体と高周波でプラズマ状態に
励起した窒素である。
For each of the above layers, the MOVPE method, the MBE method or the like can be used as a crystal growth method. In the third embodiment, the RF (Radio Frequency) -MBE method is used. That is, first, the surface of the substrate 11 is heated at 900 ° C. for 20 minutes.
Min thermal cleaning, followed after growing a buffer layer 12 of AlN kept intact substrate temperature, the substrate temperature is lowered to 750 ° C., an undoped GaN layer 13, the undoped Al 0.2 Ga 0 .8 N A spacer layer 14, a donor layer 15 of Al 0.2 Ga 0.8 N doped with Si, and a cap layer 16 of Al 0.2 Ga 0.8 N undoped are sequentially grown. The raw materials used are Al and Ga solids and nitrogen excited in a plasma state at a high frequency.

【0020】こうして製造された図2に示すHEFTの
特徴は、6HのSiCからなる基板11のm面である表
面11a上にAlNのバッファ層12を有することであ
る。従来のHEFTでは、例えば4HのSiCの基板表
面であるm面上に上記バッファ層12を介さずに窒化物
としてGaN等を積層していた。この場合、4H-SiC
の積層(ABCBA)の中に六方晶2HのAB積層と面心立方
晶3CのABC積層が混在するため、表面に2H(ABAB)
と3C(ABCABC)のGaNが形成され、その界面に基板表
面に垂直な方向,つまり電界効果型トランジスタのソー
ス-ドレイン間の電流経路に直交する方向に積層欠陥が
形成されるため、この積層欠陥によってキャリアが著し
く散乱されていた。しかし、本実施例3のHFETで
は、バッファ層12として2H構造が安定なAlNを用
いているので、このバッファ層12上に積層欠陥のない
2H-GaN(六方晶GaN)等が安定して得られる。従っ
て、積層欠陥によるキャリア散乱が生じない輸送特性に
優れたHFETを製造することができる。
The HEFT thus manufactured as shown in FIG. 2 is characterized in that it has an AlN buffer layer 12 on the m-plane surface 11a of the substrate 11 made of 6H SiC. In the conventional HEFT, for example, GaN or the like is laminated as a nitride on the m-plane, which is a 4H SiC substrate surface, without passing through the buffer layer 12. In this case, 4H-SiC
The hexagonal 2H AB laminate and the face-centered cubic 3C ABC laminate are mixed in the ABCA stack, so the surface has 2H (ABAB)
And 3C (ABCABC) GaN are formed, and stacking faults are formed at the interface in a direction perpendicular to the substrate surface, that is, in a direction orthogonal to the current path between the source and the drain of the field effect transistor. Carrier was significantly scattered. However, in the HFET of the third embodiment, since AlN having a stable 2H structure is used as the buffer layer 12, 2H-GaN (hexagonal GaN) or the like free from stacking faults is stably obtained on the buffer layer 12. Can be Therefore, it is possible to manufacture an HFET having excellent transport characteristics in which carrier scattering due to stacking faults does not occur.

【0021】上記実施例3の一例としてゲート長さ1μ
m、ソースドレイン間距離5μmのHFETを作製し、そ
の特性を従来のHFETと比較試験した。その結果、実
施例3によるHFETは、室温において、最大発振周波
数fmax=25GHz、トランスコンダクタンスgm=250
mS/mmであった。これに対して、AlNバッファ層を積
層しなかった従来のHFETでは、室温において、最大
発振周波数fmax=15GHz、トランスコンダクタンス
m=140mS/mmとなっており、従来のHFETでは積
層欠陥によるキャリア散乱の影響が大きいことが明らか
になった。なお、基板11の表面として、上記(1,-1,
0,0)の面指数をもつm面に代えて、(1,1,-2,0)の面
指数をもつa面 (図3参照)を選ぶこともできる。
As an example of the third embodiment, the gate length is 1 μm.
An HFET with a distance of 5 μm and a source-drain distance of 5 μm was fabricated, and its characteristics were compared with those of a conventional HFET. As a result, the HFET according to the third embodiment has a maximum oscillation frequency fmax = 25 GHz and a transconductance g m = 250 at room temperature.
mS / mm. On the other hand, in the conventional HFET in which the AlN buffer layer is not stacked, the maximum oscillation frequency fmax = 15 GHz and the transconductance g m = 140 mS / mm at room temperature. In the conventional HFET, carrier scattering due to stacking faults occurs. It became clear that the influence of was large. In addition, as the surface of the substrate 11, the above (1, -1,
Instead of the m-plane having a plane index of (0,0), an a-plane (see FIG. 3) having a plane index of (1,1, -2,0) can be selected.

【0022】[0022]

【発明の効果】以上の説明で明らかなように、請求項1
の発明は、ウルツ鉱構造の結晶をもつ材料の(1,1,-2,
0)面(a面)または(1,-1,0,0)面(m面)を基板として
用い、かつ電流を流す方向がc軸方向と平行になってい
るので、基板上に積層される窒化物系化合物半導体層の
結晶のc軸が基板面と平行になって、転位が基板面に平
行に走るようになり、この方向が電流を流す方向に一致
するから、キャリアの散乱が小さくなって電気的特性に
優れた半導体装置を得ることができる。
As is apparent from the above description, claim 1
The invention of (1, 1, -2,
Since the (0) plane (a plane) or (1, -1,0,0) plane (m plane) is used as the substrate and the direction in which the current flows is parallel to the c-axis direction, it is laminated on the substrate. The c-axis of the crystal of the nitride-based compound semiconductor layer becomes parallel to the substrate surface, and the dislocations run parallel to the substrate surface. This direction matches the direction in which current flows, so that carrier scattering is small. As a result, a semiconductor device having excellent electric characteristics can be obtained.

【0023】請求項2の発明は、窒化物系化合物半導体
装置としてのヘテロ構造電界効果型トランジスタは、ソ
ース−ドレインの方向が積層された窒化物系化合物半導
体中で転位が走る方向であるc軸と平行になっているの
で、キャリア散乱が小さくなって電気的特性に優れたヘ
テロ構造電界効果型トランジスタが得られる。
According to a second aspect of the present invention, there is provided a heterostructure field-effect transistor as a nitride-based compound semiconductor device, wherein a source-drain direction is a c-axis in which a dislocation runs in the stacked nitride-based compound semiconductor. , The carrier scattering is reduced and a heterostructure field effect transistor having excellent electrical characteristics is obtained.

【0024】請求項3の発明の窒化物系化合物半導体装
置は、ウルツ鉱構造の結晶をもつ基板材料が、GaN,A
lN,SiC,ZnOのいずれかであるので、これらの基板
材料が安定な六方晶であって、積層される窒化物系化合
物半導体との格子不整を小さくできるから、結晶性に優
れた窒化物系化合物半導体を成長させることができる。
According to a third aspect of the present invention, there is provided a nitride-based compound semiconductor device, wherein the substrate material having a crystal having a wurtzite structure is GaN, A
Since any one of lN, SiC, and ZnO is used, these substrate materials are stable hexagonal crystals and can reduce lattice mismatch with the nitride-based compound semiconductor to be laminated. Compound semiconductors can be grown.

【0025】請求項4の発明の窒化物系化合物半導体装
置は、上記ウルツ鉱構造の結晶をもつ基板材料の表面が
上記a面またはm面に対して5度以内で傾斜しているオ
フ基板であるので、基板表面に結晶の成長起点となるス
テップが多数存在して、結晶性に優れたa面またはm面
上に結晶性に優れた窒化物系化合物半導体を一層安定に
成長させることができる。
According to a fourth aspect of the present invention, there is provided a nitride-based compound semiconductor device comprising an off-substrate in which the surface of the substrate material having the wurtzite structure crystal is inclined within 5 degrees with respect to the a-plane or the m-plane. Since there are many steps on the substrate surface that serve as crystal growth starting points, a nitride-based compound semiconductor having excellent crystallinity can be more stably grown on the a-plane or m-plane having excellent crystallinity. .

【0026】請求項5の窒化物系化合物半導体装置は、
上記ウルツ鉱構造の結晶をもつ基板材料がSiCであ
り、AlNのバッファ層を有するので、従来のウルツ鉱
構造の基板材料としての4H-SiCのa面またはm面で
ある表面上にバッファ層を介さずに窒化物系化合物を直
接成長させた場合のように、電流経路に直交する方向に
積層欠陥が形成されることがなく、2H構造が安定なA
lNのバッファ層上に積層欠陥のない2H-GaN(六方晶
GaN)等が安定して得られるから、積層欠陥によるキャ
リア散乱が生じない輸送特性に優れた窒化物系化合物半
導体装置を得ることができる。
According to a fifth aspect of the present invention, there is provided a nitride-based compound semiconductor device.
Since the substrate material having the wurtzite structure crystal is SiC and has a buffer layer of AlN, a buffer layer is formed on the surface that is the a-plane or m-plane of 4H-SiC as the conventional wurtzite structure substrate material. Unlike the case where a nitride-based compound is directly grown without interposition, stacking faults are not formed in a direction perpendicular to the current path, and the 2H structure is stable.
Since 2H-GaN (hexagonal GaN) or the like free of stacking faults can be stably obtained on the 1N buffer layer, it is possible to obtain a nitride-based compound semiconductor device having excellent transport characteristics without carrier scattering due to stacking faults. it can.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の第1の実施例であるヘテロ構造電界
効果トランジスタの概要を示す断面図である。
FIG. 1 is a sectional view showing an outline of a heterostructure field effect transistor according to a first embodiment of the present invention.

【図2】 本発明の第3の実施例であるヘテロ構造電界
効果トランジスタの概要を示す断面図である。
FIG. 2 is a sectional view showing an outline of a heterostructure field effect transistor according to a third embodiment of the present invention.

【図3】 窒化物系化合物半導体の基板として用いられ
る六方晶系結晶材料の面指数を示す図である。
FIG. 3 is a view showing a plane index of a hexagonal crystal material used as a substrate of a nitride-based compound semiconductor.

【図4】 従来のc面基板上に窒化物系化合物半導体を
積層した発光ダイオードまたはレーザダイオードの断面
図である。
FIG. 4 is a cross-sectional view of a conventional light emitting diode or laser diode in which a nitride-based compound semiconductor is stacked on a c-plane substrate.

【図5】 従来のc面基板上に窒化物系化合物半導体を
積層したヘテロ構造電界効果トランジスタの断面図であ
る。
FIG. 5 is a cross-sectional view of a conventional heterostructure field-effect transistor in which a nitride-based compound semiconductor is stacked on a c-plane substrate.

【符号の説明】[Explanation of symbols]

1 GaN基板 1a (1,1,-2,0)の指数をもつa面である基板表面 1' a面に対して2°オフの表面をもつGaN基板 1'a a面に対して2°傾斜した基板表面 2 アンドープのGaN層 3 アンドープのAl0.2Ga0.8Nのスペーサ層 4 n型Al0.2Ga0.8Nのドナー層 5 n型GaNのキャップ層 6 ゲート電極 7 ソース/ドレイン電極 11 6H‐SiC基板 11a (1,-1,0,0)の指数をもつm面である基板表面 12 アンドープのAlNのバッファ層 13 アンドープのGaN層 14 アンドープのAl0.2Ga0.8Nのスペーサ層 15 SiでドープしたAl0.2Ga0.8Nのドナー層 16 アンドープのAl0.2Ga0.8Nのキャップ層 17 ゲート電極 18 ソース/ドレイン電極1 GaN substrate 1a Substrate surface which is an a-plane having an index of (1,1, -2,0) 1 'GaN substrate having a 2 ° off surface with respect to a-plane 1'a 2 ° with respect to a-plane Inclined substrate surface 2 Undoped GaN layer 3 Undoped Al 0.2 Ga 0.8 N spacer layer 4 n-type Al 0.2 Ga 0.8 N donor layer 5 n-type GaN cap layer 6 gate electrode 7 source / drain electrode 11 6H-SiC Substrate 11a Substrate surface which is an m-plane having an index of (1, -1,0,0) 12 Buffer layer of undoped AlN 13 Layer of undoped GaN 14 Spacer layer of undoped Al 0.2 Ga 0.8 N 15 Doped with Si Al 0.2 Ga 0.8 N donor layer 16 Undoped Al 0.2 Ga 0.8 N cap layer 17 Gate electrode 18 Source / drain electrode

フロントページの続き (72)発明者 鈴木 彰 大阪府大阪市阿倍野区長池町22番22号 シ ャープ株式会社内 Fターム(参考) 5F041 AA21 CA33 CA34 CA40 CA41 5F073 CB02 CB04 CB05 CB07 5F102 GB01 GC01 GD01 GJ02 GJ04 GK04 GL04 GM04 GN04 GQ01 GR01 Continued on the front page (72) Inventor Akira Suzuki 22-22 Nagaikecho, Abeno-ku, Osaka City, Osaka F-term (reference) 5F041 AA21 CA33 CA34 CA40 CA41 5F073 CB02 CB04 CB05 CB07 5F102 GB01 GC01 GD01 GJ02 GJ04 GK04 GL04 GM04 GN04 GQ01 GR01

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 窒化物系化合物半導体を用いた窒化物系
化合物半導体装置であって、 ウルツ鉱構造の結晶をもつ材料の(1,1,-2,0)面(a面)
または(1,-1,0,0)面(m面)を基板として用い、かつ電
流を流す方向がc軸方向と平行になっていることを特徴
とする窒化物系化合物半導体装置。
1. A nitride compound semiconductor device using a nitride compound semiconductor, wherein a (1,1, -2,0) plane (a plane) of a material having a wurtzite structure crystal is provided.
Alternatively, a nitride-based compound semiconductor device using a (1, -1,0,0) plane (m-plane) as a substrate and a direction in which a current flows is parallel to a c-axis direction.
【請求項2】 上記窒化物系化合物半導体装置は、ヘテ
口構造を用いた電界効果型トランジスタであり、ソース
−ドレインの方向がc軸方向と平行になっていることを
特徴とする請求項1に記載の窒化物系化合物半導体装
置。
2. The nitride-based compound semiconductor device is a field-effect transistor using a metal-edge structure, and a source-drain direction is parallel to a c-axis direction. 3. The nitride-based compound semiconductor device according to 1.
【請求項3】 上記ウルツ鉱構造の結晶をもつ基板材料
は、GaN,AlN,SiC,ZnOのいずれかであることを
特徴とする請求項1または2に記載の窒化物系化合物半
導体装置。
3. The nitride-based compound semiconductor device according to claim 1, wherein the substrate material having the wurtzite structure crystal is any one of GaN, AlN, SiC, and ZnO.
【請求項4】 上記ウルツ鉱構造の結晶をもつ基板材料
は、傾斜角5度以内のオフ基板であることを特徴とする
請求項3に記載の窒化物系化合物半導体装置。
4. The nitride-based compound semiconductor device according to claim 3, wherein the substrate material having the wurtzite structure crystal is an off-substrate having an inclination angle of 5 degrees or less.
【請求項5】 上記ウルツ鉱構造の結晶をもつ基板材料
は、SiCであり、AlNのバッファ層を有することを特
徴とする請求項3または4に記載の窒化物系化合物半導
体装置。
5. The nitride-based compound semiconductor device according to claim 3, wherein the substrate material having the crystal having the wurtzite structure is SiC and has an AlN buffer layer.
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