JP2001144823A - Time-division multiple transmission method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent error detection from delaying or malfunctioning. SOLUTION: In the signal processing part of an origination part, ON or OFF is set to be 12.5% to 30% of duty ratio, OFF or ON is originated in the form of 50% to 70% of duty ratio. In the selection circuit of a reception part, 12.5 to 30% of duty ratio is judged to be ON or OFF and 50% to 70% of duty ratio to be OFF or ON. A judgment pulse is emitted to the position of 30% to 50%, which is equivalent to a part between ON and OFF, at time which is slightly delayed from a head trigger at every bit. Idle time is installed at the latter half of one frame, frames are discriminated and a signal processing is executed in order from the head trigger of the next frame. Thus, the erroneous processing of the order of bits is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION In a multiplex communication system, a time-division multiplexing method in which certain data is divided in time and a plurality of signals are transmitted, and a certain data is divided into a plurality of frequency bands and a plurality of signals are simultaneously transmitted. Although there is a transmission method, the present invention belongs to a time division multiplex transmission method including a transmission unit and a reception unit.

[0002]

2. Description of the Related Art In a conventional time division multiplex transmission apparatus, a transmission unit converts a 0 into an OFF state and a 1 into an ON state to provide a start bit at the beginning of a data frame.
It has data by a combination of F and ON, has a stop bit at the end of the data frame, and transmits the data,
In the receiving unit, means for holding data in a memory, analyzing one frame, and reading data is mainly used.

[0003]

The conventional time division multiplex transmission apparatus has the following disadvantages.

First, ON and OFF when digital transmission is performed
Since the data consists of a combination of (1 and 0), the method of inputting one frame, analyzing the memory at the receiving unit, and reading the data analyzes the data from the detection of the start bit to the stop bit. . Therefore, the receiving unit has a time axis, and processing cannot be performed until after one frame is received, so that error detection is delayed when an error occurs, and the number of bits is analyzed after one frame is received. In some cases, error detection was delayed.
For this reason, the determination of the head trigger of the next frame becomes uncertain, which may cause a malfunction.

[0005]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and the means are as follows.

[0006] First, regarding time division multiplex transmission, when signal processing is performed in a transmission unit, ON or OFF is set to a duty ratio of 12.5% to 30%, and OFF or ON is set to duty.
The signal is transmitted in the ratio of 50% to 70%, and d is selected by the selection circuit of the receiving unit.
turn on or off the duty ratio 12.5% -30%,
A duty ratio of 50% to 70% is determined to be OFF or ON, and between bits ON and OFF is slightly delayed for each bit from the first trigger of the bit.
A determination pulse is issued at a position of 0% to 50% so that the determination can be made on the spot without having a memory. By providing an idle time of 50% or more and 200% or less of the character length in the latter half of the frame, more certainty is provided. In addition, the start trigger of the next frame can be determined, the number of bits in the frame can be counted, and the data can be invalidated when the number of bits does not match.

[0007]

FIG. 1 is a block diagram for explaining a time division multiplexing transmission method according to the present invention. A transmission section 1 has a signal generation circuit 2 (clock), and an input signal is inputted to a next conversion circuit 3. The transmitting unit 1 converts the parallel signal into a serial signal. The transmitting unit 1 converts the parallel signal into an optical signal and the like, transmits the optical signal to the receiving unit 4, converts the received signal into an electric signal, and converts the received serial signal. The signal is converted into a parallel signal by the circuit 5 and transmitted as an output signal, and has a signal generating circuit 6 (clock).

FIG. 2 shows a received waveform and a waveform of a pulse for determination. The received waveform goes from a receiving section to a serial-to-parallel conversion circuit. It is constituted by a circuit, and the length of the waveform is read by comparing the two.

[0009]

According to the present invention, ON has a duty ratio of 1
2.5% to 30%, OFF is transmitted in the form of 50% to 70%, and the receiving unit is in the position of 30% to 50%, which is between ON and OFF with a slight delay from the trigger for each bit for each bit. A judgment pulse is issued, and judgment can be made on the spot, and no memory is required. Further, since the number of bits in the frame is also counted, when the number of bits does not match, a malfunction may occur and data may be invalidated. As a result, the detection of an error or the like can be quickly performed and the occurrence of a malfunction or the like can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a time division multiplex transmission method according to the present invention.

FIG. 2 is a waveform diagram of a reception waveform and a determination pulse.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 transmission unit 2 signal generation circuit 3 parallel-serial conversion circuit 4 reception unit 5 serial-parallel conversion circuit 6 signal generation circuit

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Hiroshi Asano 1-49-15, Kamikada, Nakano-ku, Tokyo F-term in Shichisei Science Laboratory Co., Ltd. 5K028 AA01 BB08 EE05 FF07 NN01 SS06 SS16 5K029 AA01 DD02 EE18 GG03 GG07 GG10 HH01 HH13 HH26

Claims (1)

[Claims] 1. A signal processing section of a transmitting section which is turned on or off.
FF is set to a duty ratio of 12.5% to 30%, OFF or ON is transmitted in a duty ratio of 50% to 70%, and a duty ratio of 12.5 to 30% is set to ON or OFF by a selection circuit of a receiving unit. A duty ratio of 50% to 70% is determined to be OFF or ON, and a pulse for determination is provided at a position of 30% to 50% between ON and OFF with a time slightly delayed from the first trigger for each bit. Emits
When memory can be determined on the spot, idle time is provided in the latter half of one frame, signal processing is performed in order from the first trigger of the next frame by distinguishing between frames, and erroneous processing of bit order is prevented. Division multiplex transmission method.