JP2001134174A - Privacy communication device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a privacy communication device which is provided with a ciphering and deciphering means whose speed is faster as compared with a privacy communication device using a conventional block cipher E2 while securing the same safety as that of the device. SOLUTION: This device is provided with a key generating means 1 generating plural magnified key data based on pertinent key data, a ciphering means 2 generating ciphered data C from information data and the magnified key data and a deciphering means 3 reproducing information data P from the ciphered data and the magnified key data. First Sbox processing means 4 and second Sbox processing means 5 which are respectively arranged at doors of the means 2 and the means 3 are respectively composed of one means of a 2n-layer SPN processing means, a 2n-layer PSN processing means, a (2n+1)- layer SPN processing means and a (2n+1)-layer PSN processing means.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a secret system capable of performing communication while maintaining the confidentiality of contents by encrypting communication data with a secret key and decrypting the encrypted communication data. Related to a communication device.

[0002]

2. Description of the Related Art US AES to determine US government standard encryption
The block cipher E2 proposed in the project (NTT
T "Specification of E2-a 128-bit Block Cipher, 1
998) is one of 15 bit block ciphers. The structure of E2 is composed of an initial transformation (IT) including a 32-bit multiplication, a final transformation (FT), and a 12-stage Feistel structure. The Feistel structure is X in bytes.
It is configured to perform OR (exclusive OR) and only one type of bijective byte replacement.

FIG. 1 shows a configuration of a main part of a secret communication apparatus using encryption / decryption using a conventional block cipher E2.
This conventional device comprises an encryption means E, a decryption means D,
From the key data K, a plurality of expanded key data K1, K2,.
., K16, and supplies the expanded key data K1, K2,... K16 to the encryption means E and the decryption means D.

The encryption means E is supplied with an input plaintext data block P from an input signal source (not shown) to the initial conversion means IT. The initial conversion means IT performs a certain initial substitution on the input plaintext data block P, and then divides the input plaintext data block P right and left into two to generate a left conversion process block L0 and a right conversion process block R0. The generated left conversion process block L0 and right conversion process block R0 are connected to a 12-stage Feistel conversion unit f.
1, f2,..., F12 are supplied to the Feistel structure processing means F. The left conversion process block L0 and the right conversion process block R0 supplied to the Feistel structure processing means F
K12 means that the Feistel conversion means f1, f2,..., F12 undergo a conversion process in accordance with the expanded key data K1, K2,... K12, and perform a left conversion process block and a right conversion process block L1, R1,. , R12 are sequentially generated, and the finally generated left conversion process block and right conversion process block L12, R12 are supplied from the Feistel structure processing unit F to the final conversion unit FT.

[0005] The final conversion means FT performs predetermined arithmetic processing on the right conversion process blocks L12 and R12 and the expanded key data k15 and k16, and finally generates a ciphertext data block C.

The Feistel conversion means f1, f2,..., F
Each of 12 receives left-right changing process block data Lj-1 and Rj-1 (j is any integer from 1 to 12) from the preceding stage, and generates Lj and Rj. here,

[0007]

(Equation 1)

The conversion in the Feistel conversion means is executed so that

FIG. 2 shows Feistel conversion means f1, f2,
, F12 is a block diagram showing a specific circuit configuration example of Sbox (SB) included in each of f12. In this conventional device, Sbox (SB) is a non-linear conversion means (NL).
T), linear conversion means (LT), and non-linear conversion means (N
LT) and three layers SPN processing means.

When the non-linear conversion means (NLT) receives a conversion process block Rj composed of, for example, 8 bits (x1, x2,... X8), each bit (x1, x2,.
x8), an exclusive OR with the expanded key data k _p (p is an integer from 1 to 12) is obtained, and each exclusive OR is
It is input to the corresponding replacement conversion means (S). Each permutation conversion means (S) performs a predetermined permutation conversion process, and outputs the result as z
1, z2,..., Z8, the linear conversion means (L
T).

As shown in FIG. 2, the linear conversion means (LT) performs a linear conversion by taking an exclusive OR of any combination of z1, z2,.
z2 ',... z8' are converted to non-linear conversion means (NLT) of the third layer.
Output to

The nonlinear transforming means (NLT) of the third layer, like the nonlinear transforming means (NLT) of the first layer, expands the key data k _p for each bit (z1 ′, z2 ′,..., Z8 ′).
(P is an integer from 1 to 12), and each exclusive OR is input to the corresponding permutation conversion means (S). Each replacement conversion means (S) performs a predetermined replacement conversion process, and outputs the result as a conversion process data block Rj ′ including y1, y2,..., Y8.

In this conventional apparatus, the decoding means D
Has the same configuration as the encryption means E, as shown in FIG. Note that the nonlinear inverse transform means has a function of calculating the inverse function of the nonlinear transform means (NLT), and the linear inverse transform means has a function of calculating the inverse function of the linear transform means (LT).

[0014]

The above block cipher E2
The conventional device according to the literature "Matsui" Differential path search of block cipher E2 ", IEICE technical report ISEC99-1
According to 9 1999-07, it was impossible to guarantee the security against attacks using truncated differential, and it was pointed out that it was possible to decipher the data using eight or less rounds. However, for E2 (12 steps) according to the specifications, no security problem has been found.
It has been found that it has sufficient security against attacks using ted differential (Sorimori et al., “Truncated Di
Security of E2 against fferential Cryptanalysis, ”IEICE technical report ISEC99-20 1999-0
7).

However, when a 12-stage configuration is adopted, the total number of the permutation conversion means (S) is 144. Each replacement conversion means (S) is a component that occupies most of the calculation amount in the encryption or decryption device, and the calculation amount required for encryption / decryption increases in proportion to the increase in the number thereof. As a result, there is an inconvenience that the time required for processing of the apparatus, power consumption, and the like also increase.

[0016]

SUMMARY OF THE INVENTION In view of the above, the present invention guarantees the same security as a conventional secret communication device using a block cipher E2 and achieves faster encryption / decryption. It is an object of the present invention to provide a confidential communication device provided with an encryption means. By using the confidential communication device according to the present invention, it is possible to improve the convenience of confidential communication between the business operator and the user.

The configuration of the privacy communication device according to the present invention will be described below.

According to the first embodiment of the present invention, at the time of encryption, information data and key data are input to output encrypted data, and at the time of decryption, the encrypted data and key data are input and the original information is input. A secret communication device for obtaining data, wherein the secret communication device receives key data and generates a plurality of expanded key data based on the key data; and inputs information data and the expanded key data. Encryption means for generating encrypted data from the input data; and decryption means for receiving the encrypted data and the expanded key data and reproducing information data from the input data. Comprises first Feistel structure processing means composed of N first Feistel transform means, and said decoding means comprises a second Feistel structure means composed of N second Feistel transform means.
el structure processing means F2, each of the first Feistel conversion means includes a first Sbox processing means,
Each of the second Feistel conversion means is provided with a second Sb
ox processing means, wherein the first Sbox processing means and the second Sbox processing means are respectively 2n-layer SPN processing means, 2n-layer PSN processing means, and (2n + 1) -layer SPN processing Means, and (2n
+1) There is provided a secret communication device characterized by being constituted by any one of the layer PSN processing means.

In the first embodiment, Feiste1
The structure processing means has a structure for connecting a plurality of Feiste1 conversion means. The Feiste1 conversion means has two bits having the same number of bits.
Information data (L, R) as input values, using Sbox means
(R, R + Sbox (L)) (“+” means XOR (exclusive OR)). The Sbox processing means has a structure for outputting output data obtained by calculating from input data and key data as an output.

In this embodiment, the 2n layer SP
The N processing means has a structure in which 2n non-linear processing stages and linear processing stages are alternately connected in this order. Also, 2n layer PSN
The processing means has a structure in which 2n linear processing means and non-linear processing means are alternately connected in this order. (2n + 1)
The layer SPN processing means has a structure in which nonlinear processing means and linear processing stages are alternately connected in this order.

The non-linear processing means has a structure in which a plurality of the non-linear conversion means are arranged in parallel, receives a plurality of input data blocks as input values, and inputs each input data block to the corresponding non-linear conversion means. It has a function of obtaining the same number of output blocks as input blocks as output values. The non-linear conversion means constituting the non-linear processing means has a function of inputting a value obtained by XORing the input data and the key data from the input data and the key data to the substitution conversion means and outputting a value obtained by the input. This replacement conversion means has a function of calculating a corresponding output value from input data based on a conversion table stored in advance.

The linear processing means uses the input data block as an input value, calculates the same number of output blocks as the input data block by a finite field linear operation from the input data block of the input value, and outputs the obtained multiple output block. It has the function of making a value.

The non-linear inverse processing means has a structure in which a plurality of non-linear inverse conversion means are arranged in parallel. An input data block is used as an input value, and each input data block is inputted to the corresponding non-linear inverse conversion means. It has a function of using as many output data blocks as input data blocks as output values. This non-linear inverse conversion means has a function of outputting a value obtained by XORing a value obtained by inputting input data into the replacement inverse conversion means and key data. The permutation inverse conversion means has a function of calculating an inverse function of the permutation conversion means based on the conversion table of the permutation means.

According to a second embodiment of the present invention, the first Sbox processing means and the second Sbox
The x processing means may be constituted by a 2n-layer PSN processing means.

According to a third embodiment of the present invention, the first Sbox processing means and the second Sbox
The x processing means may be constituted by a 2n-layer SPN processing means.

According to the fourth embodiment of the present invention, the non-linear processing means is provided at the input end and the output end of the encryption means, respectively, and the non-linear processing means is also provided at the input end and the output end of the decryption means. The first Sb is provided with respective reverse processing means.
ox processing means and the second Sbox processing means are 2n
It may be constituted by a layer SPN processing means.

According to the fifth embodiment of the present invention, the input end and the output end of the encryption means are provided with nonlinear processing means, respectively, and the input end and the output end of the decryption means are also provided with the non-linear processing means. The first Sb is provided with respective reverse processing means.
ox processing means and the second Sbox processing means are 2n
It may be constituted by a layer SPN processing means.

According to a sixth embodiment of the present invention, in the first Feistel structure processing means,
First and second stage first Feistel transform means and (N-1) th
The first Feistel transform means of the stage and the Nth stage is (2n + 1)
The first Feistel conversion means is composed of 2n-layer PSN processing means, and the second Feistel conversion means is composed of 2n-layer PSN processing means.
In the istel structure processing means, the second stage of the first stage and the second stage
Of the Feistel transform means of the (N-1) th stage and the second stage of the Nth stage
Is composed of (2n + 1) -layer SPN processing means, and the other second Feistel conversion means is a 2n-layer PS
N processing means may be used.

Further, according to a seventh embodiment of the present invention, in the first Feistel structure processing means, the first and second stages of the first Feistel conversion means and the (N-
1) The first Feistel transform means of the stage and the N-th stage are (2n +
1) It is composed of layer SPN processing means, and other first Feiste
The conversion means is composed of 2n-layer SPN processing means,
In the Feistel structure processing means, the first and second-stage second Feistel conversion means and the (N-1) -th and N-th second Feistel conversion means are constituted by (2n + 1) -layer SPN processing means. However, the other second Feistel conversion means may be constituted by a 2n-layer SPN processing means.

[0030]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of a secret communication device according to the present invention will be described with reference to the drawings.

[First Embodiment] FIG. 1 shows a first embodiment of a secret communication device according to the present invention. Confidential communication apparatus according to the present invention, expanded from the key data K plurality of key data _{k1, k2, ..., k N-} 1, k N generates, the enlarged key data _{k1, k2, ..., k N} -1, encryption means the k _N 2
, A key generation unit 1 for supplying the data to the decryption unit 3, the plaintext block data P and the expanded key data k1, k2,.
_N-1, k _N is inputted, the encryption means 2 for generating the ciphertext block data C from these input data, the ciphertext block data C and the enlarged key data k1, k2,
.., K _N−1, k _N are input, and the decoding means 3 generates plaintext block data P from the input data.

The encrypting means 2 comprises a first Feistel structure processing means F1, and the decrypting means 3 comprises a second Feistel structure processing means F1.
It comprises a tel structure processing means F2.

The first Feistel structure processing means F1 has N pieces.
First Feistel conversion means f₁₁, F ₁₂, ..., f
_{1 (N-1),}f_1NHas an N-stage structure consisting of
You.

As shown in FIG. 2, each of the first Feistel conversion means receives two pieces of information block data L _j-1 and R _j-1 having the same number of bits as input values, and outputs the first Sbox.
Using the processing means 4 and the XOR operation means 6, L _j , R
Output two pieces of information block data consisting of _j . Note that L _j−1 , R _j−1, L _j , and R _j have the following relationship.

[0035]

(Equation 2)

Next, the configuration of the first Sbox processing means 4 will be described. The first Sbox processing means 4 is a 2n-layer SPN processing means, a 2n-layer PSN processing means, (2n + 1)
It is constituted by any one of the layer SPN processing means and the (2n + 1) layer PSN processing means.

As shown in FIG. 3, the 2n waste SPN processing means comprises a two-layer SP having a two-layer structure in which a non-linear processing means 7 is disposed as a first layer and a linear processing means 8 is disposed in a second layer.
This means a structure having a structure in which 2n N processing means are connected. FIG. 4 shows a four-layer SPN processing unit when n = 2.

As shown in FIG. 5, the 2n-layer PSN processing means is a two-layer PSN processing means having a two-layer structure in which a linear processing means 8 is provided as a first layer and a non-linear processing means 7 is provided in a second layer. PS
This means a structure having a structure in which 2n N processing means are connected. FIG. 6 shows a four-layer PSN processing unit when n = 2.

The (2n + 1) -layer SPN processing means means that a non-linear processing means is provided in the first layer, a linear processing means is provided in the second layer, and a non-linear processing means is provided in the third layer. In the following, non-linear processing means and linear processing means are alternately arranged to obtain (2n +
1) Refers to a structure of a layer structure. FIG. 7 shows a three-layer SPN processing means when n = 1, and FIG.
5 shows a five-layer SPN processing means in the case of 2.

Next, the configuration of the nonlinear processing means 7 will be described. The nonlinear processing means 7 has a structure in which a plurality of m nonlinear conversion means 9 are arranged in parallel, uses input data blocks (x1, x2,..., Xm) as input values, and converts each input data into a corresponding nonlinear data. The output block data x'1, corresponding to the input block data, obtained by inputting to the conversion means 9,
x'2, ..., x'm).

Each of the non-linear conversion means 9 has the following configuration. That is, as shown in FIG. 10, the nonlinear conversion means 9 receives one of the components xj of the input block data and kj which is the corresponding element of the expanded key data, and obtains the exclusive OR of xj and kj. XOR operation means 10 for outputting a predetermined replacement conversion processing (for example, function S
(Execution of (x)) and outputs a permutation conversion result. The replacement conversion means 11 generates output data determined on a one-to-one basis based on the input data. For example, an output value (S (x)) corresponding to the input data (x) is generated based on a conversion table as shown in FIG.

Next, the configuration of the linear processing means 8 will be described. As shown in FIG. 12, when an input data block (x1, x2,..., Xm) is input from a plurality of data to the linear processing means 8, the linear processing means 8 The output block (x'1, x'2, ..., x ') having the same number of components as the input data block by the linear operation
m) and outputs this.

On the other hand, as shown in FIG. 1, the decrypting means 3 has substantially the same configuration as the above-mentioned encrypting means 2. That is, the decoding means 3 includes the second Feistel structure processing means F2, and the second Feistel structure processing means F2
2 is N second Feistel transform means f ₂₁ , f ₂₂ ,
, F2 _{(N-1) and f2N} . The second Feistel conversion means f ₂₁ , f ₂₂ ,
.., F _{2 (N−1) and} f _{2 N} are the same as the first Feistel transform unit shown in FIG.
The information block data L _j−1 and R _j−1 are input values, the second Sbox processing means 5 and the XOR operation means 6
To output two pieces of information block data composed of L _j and R _j .

Next, the configuration of the second Sbox processing means 5 will be described. The second Sbox processing means 5 is a 2n-layer SPN processing means, a 2n-layer PSN processing means, (2n + 1)
The first Sb in that it is constituted by one of the layer SPN processing means and the (2n + 1) layer PSN processing means
This is the same as the ox processing means 4, but the nonlinear processing means 7 (used in each of the 2n layer SPN processing means, the 2n layer PSN processing means, the (2n + 1) layer SPN processing means, and the (2n + 1) layer PSN processing means. 3 to 8) is replaced by a nonlinear inverse processing means. FIG. 13 shows the configuration of the nonlinear inverse processing means. The nonlinear inverse processing means 12 has a structure in which a plurality of nonlinear inverse transform means 13 are arranged in parallel. The input data blocks (y1, y2,., Ym) are used as input values, and each input data element is subjected to a corresponding nonlinear inverse transform. An output data block (x1, x2,...) Obtained by inputting to the means 13 and having the same number of components as the input block.
xm) and outputs this.

Each of the non-linear inverse transform means 13 has the following configuration. That is, as shown in FIG. 10, the nonlinear inverse transform means 13 performs a predetermined inverse permutation transform process (for example, execution of an inverse function of the function S (x)) based on one of the components yj of the input block data. Do
A permutation conversion inversion means 14 for outputting the inverse permutation conversion result, and an XOR operation means for receiving the inverse permutation conversion result and kj which is a corresponding element of the expanded key data, and outputting an exclusive OR of them 15 Inversion means 1
4 performs an inverse operation of the operation S (x) performed by the permutation conversion means 11. That is, an output value x corresponding to the input data S (x) is generated based on the conversion table shown in FIG.

[Second Embodiment] In the second embodiment, the configuration of the secret communication device is basically the same as the device according to the above-described first embodiment. Sb
The ox processing means 4 and the second Sbox processing means 5 are both constituted by the aforementioned 2n-layer PSN processing means.

[Third Embodiment] In the third embodiment, the configuration of the confidential communication device is basically the same as that of the device according to the above-described first embodiment. Sb
The ox processing means 4 and the second Sbox processing means 5 are both constituted by the aforementioned 2n-layer SPN processing means.

[Fourth Embodiment] FIG. 15 shows a configuration of a secret communication device according to a fourth embodiment. In the present embodiment, the configuration is almost the same as that of the first embodiment. However, in the encryption means 2, the non-linear processing means 7 is provided at the input end and the output end of the first Feistel structure processing means F1, respectively. And the second Fe
A nonlinear inverse processing unit 12 is provided at each of an input terminal and an output terminal of the istel structure processing unit F2, and both the first Sbox processing unit 4 and the second Sbox processing unit 5 perform the aforementioned 2n-layer SPN processing. It is constituted by means.

[Fifth Embodiment] In the present embodiment, the structure is almost the same as that of the first embodiment. However, the encryption means 2 receives the input of the first Feistel structure processing means F1. Non-linear processing means 7 at each end and output end
Is provided in the decoding means 3 and the second Feiste
(1) A nonlinear inverse processing means 12 is provided at each of an input end and an output end of the structure processing means F2 (see FIG. 15), and both the first Sbox processing means 4 and the second Sbox processing means 5 are described above. 2n layer PSN processing means.

[Sixth Embodiment] According to the present embodiment.
The configuration of the secret communication device is the same as that of the first embodiment shown in FIG.
Has basically the same configuration as the device according to the first embodiment. First fruit
The difference from the device according to the embodiment is that the encryption unit 2
In the first Feistel structure processing means F1
The last and last two Feistel conversion means include (2n +
1) Use layer SPN processing means, otherwise use the
Of the decoding means 3 using the 2n-layer PSN processing means of
In the second Feistel structure processing means F2, the first two
And the last two Feistel transform means in the above (2n + 1)
Layer SPN processing means.
The point is that an n-layer PSN processing means is used. That is, the real
The embodiment will be described with reference to FIG.
Feistel conversion means f₁₁, F₁₂,
f_{1 (N-1)}, F_1N, And decoding means 3
f₂₁, F_{2 2}, F_{2 (N-1)}, F_2NIs each
(2n + 1) layer SPN processing means, other Fe
istel conversion means f₁₃Or f_{1 (N-2)}, And f
₂₃Or f _{2 (N-2)}Consists of 2n-layer PSN processing means
Is done.

[Seventh Embodiment] According to the present embodiment.
The configuration of the secret communication device is the same as that of the first embodiment shown in FIG.
Has basically the same configuration as the device according to the first embodiment. First fruit
The difference from the device according to the embodiment is that the encryption unit 2
In the first Feistel structure processing means F1
The last and last two Feistel conversion means include (2n +
1) Use layer SPN processing means, otherwise use the
Of the decoding means 3 using the 2n-layer SPN processing means of
In the second Feistel structure processing means F2, the first two
And the last two Feistel transform means in the above (2n + 1)
Layer SPN processing means.
The point is that n-layer SPN processing means is used. That is, the real
The embodiment will be described with reference to FIG.
Feistel conversion means f₁₁, F₁₂,
f_{1 (N-1)}, F_1N, And decoding means 3
f₂₁, F_{2 2}, F_{2 (N-1)}, F_2NIs each
(2n + 1) layer SPN processing means, other Fe
istel conversion means f₁₃Or f_{1 (N-2)}, And f
₂₃Or f _{2 (N-2)}Consists of 2n-layer SPN processing means
Is done.

In any of the above embodiments, the form of the linear transformation on the finite field in the permutation table and the linear processing means can be arbitrarily selected.

[0053]

According to the present invention, this encryption / decryption means uses a 2n-layer SP instead of the 3-layer SPN processing means in the block cipher E2.
N processing means or 2n waste PSN processing means is used. Even when encryption is performed by the above process, it is possible to implement encryption with high security equivalent to the encryption according to the conventional E2.

As shown in Table 1 below, the conventional 12
In the stage E2, 144 permutation conversion means 11 and permutation conversion inversion means 14 were required. However, in the privacy communication device according to the first to seventh embodiments according to the present invention, 88 to 112 Permutation conversion means 11, permutation conversion inverse means 14
Thus, safety can be guaranteed. As a result, it is possible to provide a privacy communication device using a high-security and high-speed encryption / decryption unit, which has been impossible in the past, and the convenience of the business operator and the user for privacy communication is improved.

[0055]

[Table 1]

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of a main part of a secret communication device according to a first embodiment;

FIG. 2 is a block diagram illustrating a configuration of a Feistel conversion unit.

FIG. 3 is a block diagram illustrating a configuration of a two-layer SPN processing unit, which is one mode of configuring the Sbox processing unit.

FIG. 4 is a block diagram showing a configuration of a four-layer SPN processing unit which is one mode of the Sbox processing unit;

FIG. 5 is an example of an embodiment of the Sbox processing unit, 2
FIG. 3 is a block diagram showing a configuration of a layer PSN processing unit.

FIG. 6 is a block diagram showing a configuration of a four-layer PSN processing unit, which is an embodiment of the Sbox processing unit.

FIG. 7 is a block diagram showing a configuration of a three-layer SPN processing unit, which is one mode of configuring the Sbox processing unit.

FIG. 8 is a block diagram showing a configuration of a five-layer SPN processing unit, which is an embodiment of the Sbox processing unit.

FIG. 9 is a schematic block diagram showing a configuration of the nonlinear processing means 7;

FIG. 10 is a schematic block diagram showing a configuration of a non-linear conversion means 9;

FIG. 11 is a diagram showing an example of the contents of permutation conversion / inversion permutation performed by permutation conversion means and permutation reverse conversion means.

FIG. 12 is a schematic block diagram showing a configuration of a linear processing means 9;

FIG. 13 is a schematic block diagram showing a configuration of the nonlinear inverse processing means 12.

FIG. 14 is a schematic block diagram illustrating a configuration of a nonlinear conversion unit 13;

FIG. 15 is a block diagram showing a schematic configuration of a main part of a secret communication device according to fourth and fifth embodiments.

FIG. 16 is a block diagram showing a configuration of a main part of a secret communication device using encryption / decryption by a conventional block cipher E2.

FIG. 17 is a block diagram showing a specific circuit configuration example of Sbox (SB) in a secret communication device using encryption / decryption by a conventional block cipher E2.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Key generation means 2 ... Encryption means 3 ... Decryption means 4 ... First Sbox processing means F1, F2 ... Feistel structure processing means 5 ... Second Sbox processing means 6 ... XOR operation means 7 ... Non-linear processing means 8 ... linear processing means 9 ... non-linear conversion means 10 ... XOR operation means 11 ... substituted conversion means 12 ... nonlinear inverse processing means 13 ... non-linear inverse transform unit 14 ... substituted conversion reverse unit 15 ... XOR operation means f _11, ... _{f 1N} ... First Feistel conversion means f ₂₁ ,... F _2N ... Second Feistel conversion means

 ────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shuji Kubota 2-3-1 Otemachi, Chiyoda-ku, Tokyo F-term in Nippon Telegraph and Telephone Corporation (reference) 5J104 AA01 JA09 JA18

Claims (7)

[Claims] At the time of encryption, information data (P) and key data (K) are input to output encrypted data (C). At the time of decryption, encrypted data (C) and key data (K) are input. , And obtains the original information data (P). The secret communication device receives the key data (K), and generates a plurality of expanded key data (k1, k2,...) Based on the key data. , k _{N-1, k N)} key generating means for generating (1), is the extended key data is input information data (P), encryption means for generating encrypted data (C) from the input data And (2) a decryption unit (3) to which the encrypted data (C) and the expanded key data are input and reproduce the information data (P) from the input data. is, N pieces of the first Feistel transformation means _(f 11, ... _{f 1N)} composed of Comprise one of the Feistel structure processing section (F1), said decoding means (3) of the N second Feistel converting means _(f 21, ... _{f 2N)} second Feistel structure processing section composed of F2 Wherein each of the first Feistel conversion means comprises a first Sb
ox processing means (4), wherein each of the second Feistel conversion means includes a second Sb
ox communication means (5), wherein each of said first Sbox processing means and second Sbox processing means is a 2n layer SPN processing means, a 2n layer PS
A secret communication device comprising one of N processing means and (2n + 1) -layer SPN processing means. 2. The secret communication apparatus according to claim 1, wherein said first Sbox processing means (4) and said second Sbox processing means (4).
A secret communication device, wherein each of the box processing means (5) is constituted by a 2n-layer PSN processing means. 3. The confidential communication device according to claim 1, wherein said first Sbox processing means (4) and said second Sbox processing means (4).
A secret communication device, wherein each of the box processing means (5) is constituted by a 2n-layer SPN processing means. 4. The confidential communication device according to claim 1, wherein a non-linear processing means (7) is provided at an input end and an output end of said encryption means (2), respectively. The non-linear inverse processing means (12) is provided at the input end and the output end of the means (3), respectively.
Box processing means 4 and second Sbox processing means 5
Are all configured by 2n-layer SPN processing means. 5. The confidential communication device according to claim 1, wherein a non-linear processing means (7) is provided at an input end and an output end of said encryption means (2), respectively. The non-linear inverse processing means (12) is provided at the input end and the output end of the means (3), respectively.
Box processing means 4 and second Sbox processing means 5
Are all configured by 2n-layer PSN processing means. 6. The confidential communication device according to claim 1, wherein said first Feistel structure processing means (F ₁ ) includes first and second stages of first Feistel conversion means (f ₁₁ , f
₁₂₎ and the (N-1) stage and the first Feistel transformation means of the N-stage _{(f 1 (N-1), f 1N)} is (2n + 1) layers S
PN processing means, and the other first Feistel conversion means are constituted by 2n-layer PSN processing means. In the second Feistel structure processing means (F ₂ ), the first and second stage Feistel conversion means (f ₂₁ , f
₂₂ ) and the second Feistel conversion means (f _{2 (N−1)} , f _2N ) of the (N−1) th and Nth stages are (2n + 1) layer S
A secret communication device comprising PN processing means, and the other second Feistel conversion means comprising 2n-layer PSN processing means. 7. The confidential communication device according to claim 1, wherein the first Feistel structure processing means (F ₁ ) includes first and second stages of first Feistel conversion means (f ₁₁ , f
₁₂₎ and the (N-1) stage and the first Feistel transformation means of the N-stage _{(f 1 (N-1), f 1N)} is (2n + 1) layers S
PN processing means, and the other first Feistel conversion means are composed of 2n-layer SPN processing means. In the second Feistel structure processing means (F ₂ ), the first and second stage Feistel conversion means (f ₂₁ , f
₂₂ ) and the second Feistel conversion means (f _{2 (N−1)} , f _2N ) of the (N−1) th and Nth stages are (2n + 1) layer S
A secret communication device comprising PN processing means, and the other second Feistel conversion means comprising 2n-layer SPN processing means.