JP2001100120A - Driving means for actuator array device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem that it becomes difficult to make fine an actuator array device wherein an actuator requiring a high driving voltage is arrayed together with a driving means because a circuit becomes large in size since the driving means needs to be formed in a high-dielectric-strength process. SOLUTION: The driving means of the actuator array device consists of a selecting means which receives a scanning signal and selects a data signal, a storage means which stores the voltage of the data signal, and a buffer amplifying means which outputs a signal with a high voltage corresponding to the output voltage of the storage means.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving means for an optical switching element which performs optical switching by applying a voltage.

[0002]

2. Description of the Related Art A prior art related to the present invention will be described.

The present invention relates to a driving means for an actuator array device, and a representative example of the actuator array device is a display device having a structure in which optical switching elements using electrostatic actuators are arranged in an array. Can be Before describing the related art relating to the driving unit, an optical switching element that constitutes one pixel of the display device driven by the driving unit will be described.

Many optical switching elements that perform optical switching by applying a voltage have been proposed. here,
As an example, an optical switching element that switches light using evanescent wave coupling as shown in FIGS. 20 and 21 will be described. Hereinafter, the operation of the optical switching element will be briefly described with reference to the drawings.

First, a description will be given with reference to FIG. The optical switching element includes a waveguide 1, a reflecting prism 3 approaching and moving away from the waveguide 1, a prism electrode 5 for moving the reflecting prism 3 by electrostatic force, and the prism electrode 5 and the reflecting prism 3 being integrated. The prism base 4, the substrate 10, the support 9 fixed on the substrate 10, which is mechanically connected so as to move, one end is attached to the support 9, and the other end is attached to the prism electrode 5. It comprises a cantilever 6 that elastically supports it. Here, illumination light 11 is supplied to the waveguide 1 from an appropriate light source. The illumination light 11 is substantially parallel light, and light is repeatedly and totally reflected at all interfaces inside the waveguide 1 so that the inside of the waveguide 1 is incident at a constant incident angle such that the inside of the waveguide 1 is filled with light rays. Is set to In this state, the illumination light 11 is macroscopically confined inside the waveguide 1 and propagates through the waveguide 1 without loss. On the other hand, microscopically, in the vicinity of the surface of the waveguide 1 which is totally reflected, the illumination light 11 leaks once from the waveguide 1 by a very small distance of about the wavelength of light, and changes its course. Is returned into the waveguide 1 again. The leaked light is generally called an evanescent wave. The evanescent wave can be extracted by bringing another optical member close to the total reflection surface of the waveguide 1 at a distance of about the wavelength of light or less. That is, if an optically transparent member is approached as the optical member, the optical member can be transmitted and taken out. If an optically reflective member is approached as the optical member, the evanescent wave is reflected. Then, the waveguide 1 can be transmitted and taken out.
Therefore, if the optical member is moved toward and away from the actuator, an operation such as taking out or not taking out the illumination light 11 becomes possible.

The operation of the optical switching element will be described in detail. The reflecting prism 3 is, as shown in FIG.
Initially, a voltage is applied between the prism electrode 5 and the lower electrode 8, and the prism electrode 5 is positioned below in the figure by the attraction force of the electrostatic force between the two. Therefore, the reflection prism 3 connected to the prism electrode 5 is also located below, and the waveguide 1
Is away from The situation at this time is shown in FIG. In this state, the illumination light 11 remains confined inside the waveguide 1 and does not exit to the outside. This is a state where the optical switching is OFF.

Next, the voltage applied between the prism electrode 5 and the lower electrode 8 is released. Then, as shown in FIG. 21, the reflection prism 3 is pushed up by the elasticity of the cantilever 6 and approaches the waveguide 1 at a sufficiently small distance. In this state, the evanescent light of the illumination light 11 leaked from the waveguide 1 is guided to the reflection prism 3 and the reflection prism 3
The light is reflected by the reflection film provided on the waveguide 1, changes its course, and enters the waveguide 1 again. At this time, since the angle of the light that has entered is no longer the angle at which the light is totally reflected inside the waveguide 1, the light penetrates the waveguide 1 as it is and is emitted to the outside as the derived light 12. This is optical switching O
N state.

The above is the operation of an example of an optical switching element that performs optical switching by applying a voltage. still,
If a large number of the above arrangements are used to display one pixel and arranged in an array or matrix, a display device for displaying images or a light modulation element can be formed. At this time, the size of the reflecting prism 3 in the surface direction should be
If the thickness is 20 μm, a light modulator having the same size as a conventional liquid crystal light modulator or a DMD manufactured by Texas Instruments can be obtained. In this case, the driving means is provided as an IC below each of the optical switching elements corresponding to each pixel.

Next, a description will be given of a driving means conventionally used for driving the optical switching element.

FIG. 19 shows an example of conventional driving means for the optical switching element. The driving means includes two switching elements 2 and two inverters 5 connected in a loop.
, Which is a so-called SRAM circuit form. The driving means is supplied with an address signal 7 by an address line 15 and a positive data signal 13 and a negative data signal 14 having a phase inverted with respect to the positive data signal 13 by data lines 16 and 17. Has been
The address signal 7 is connected to a control input terminal of the switching element 2, and the positive data signal 13 and the negative data signal 14 are connected to a controlled input terminal of the switching element 2. The operation of the driving means will be described using these.

The switching element 2 conducts when the address line 15 is selected and the address signal 7 becomes H, and the positive data signal 13 and the negative data signal 14 are supplied to both ends of the two inverters 5. Has the function of supplying. Here, the positive data signal 13 and the negative data signal 14 are digital signals and have one of two potentials of H and L. Therefore, both ends of the inverter 5 are set to H or L according to the potentials of the positive data signal 13 and the negative data signal 14.
In addition, since this driving means has an SRAM configuration,
Even if the address signal 7 is inverted to L and the switching element 2 is turned off, the data set at H is maintained.

The two inverters 5 connected in a loop
The optical switching element 2 is connected to one end of the optical switching element. The optical switching element 2 turns light ON and OFF according to the HL of the positive data signal 13. The ON / OFF state of the light is also determined by the driving means of the SRAM.
With this configuration, the address signal 7 becomes L
, The same state is maintained until the address line 15 is selected next and becomes H. That is, the state where the optical switching is ON or OFF is changed to the data line 16.
And 17, and when the address line 15 is selected, the target optical switching element 2 on the matrix is turned ON or OFF.

[0013]

In the optical switching element as shown in FIGS. 20 and 21, a certain driving force is required to move the reflection prism to reliably turn ON / OFF the optical switching. The SRAM circuit is generally manufactured by a so-called low-voltage process in which a power supply voltage is about 3.3 [V], and in that case, a driving voltage for driving an optical switching element is also about the same. With the above voltage, it is difficult to obtain a sufficient driving force for performing optical switching. Therefore, some measures to increase the driving force are required. As the method, a method of increasing the area of the electrodes facing each other and a method of increasing the applied voltage between the electrodes can be considered. The former method of increasing the area of the electrode due to the structure
There is a limit due to the demand for miniaturization and miniaturization of elements. Therefore,
There is no other way but to increase the applied voltage.

However, in order to configure the SRAM circuit having a high power supply voltage, in other words, a high withstand voltage, a high withstand voltage transistor must be used. Then, the size of the transistor becomes large, and a large area is required to form the driving means. On the other hand, the size of the light modulation element used for image display is limited due to the problem of cost and the like, and the size of the light switching element forming each pixel must be at most about 20 μm. . Naturally, the space allowed for the driving means stacked on the lower part is the same.
It is difficult to accommodate the number of high voltage transistors forming the RAM circuit. The light modulation element is expected to be further miniaturized and miniaturized in the future, and the necessity of a driving means capable of outputting a high driving voltage and having a small occupied area is increasing.

Accordingly, the present invention provides a driving means for an optical switching element as described above, a driving means for a display device having a configuration in which the optical switching elements are integrated in an array, or an actuator such as the optical switching element in an array. It is an object of the present invention to provide a driving means for an actuator array device integrated in a shape.

[0016]

Means for Solving the Problems (1) A driving means of an actuator array device according to the present invention is a driving means which is paired with an actuator which operates by applying a voltage and which operates by applying a voltage to the actuator. Means, the driving means comprises: a scanning line for transmitting a scanning signal; a data line for transmitting a data signal; and a pair of the scanning line and the data line. Selecting means for switching and selecting the data signal by the scanning signal, and storage means for holding and storing the voltage of the data signal selected by the selecting means in a binary or multi-valued manner A drive current supply line having a voltage sufficient to drive the actuator, and an N-channel field effect transistor. Buffer amplifier means, the data signal stored in the storage means is input to the gate terminal of the field effect transistor, the drive current supply line is connected to the drain terminal of the field effect transistor, The actuator is connected to a source terminal of the field effect transistor.

(2) The driving means of the actuator array device of the present invention comprises an actuator which operates by applying a voltage, and a driving means which forms a pair with the actuator and which operates by applying a voltage to the actuator. In the arranged actuator array device, the driving unit is provided for each pair of a scanning line transmitting a scanning signal, a data line transmitting a data signal, and the scanning line and the data line. Selecting means for switching and selecting the data signal by a signal; and setting the voltage of the data signal selected by the selecting means to 2
Storage means for holding and storing in a value or multi-value manner, a drive current supply line having a voltage sufficient to drive the actuator, and buffer amplification means comprising an N-channel type field effect transistor; The data signal stored in the storage means is input to a gate terminal of the field effect transistor, a source terminal of the field effect transistor is grounded, and one end of the actuator is connected to a drain terminal of the field effect transistor. The other end of the actuator is connected to the drive current supply line.

(3) The driving means of the actuator array device of the present invention comprises an actuator which operates by applying a voltage, and a driving means which forms a pair with the actuator and which operates by applying a voltage to the actuator. In the arranged actuator array device, the driving unit is provided for each pair of a scanning line transmitting a scanning signal, a data line transmitting a data signal, and the scanning line and the data line. Selecting means for switching and selecting the data signal by a signal; and setting the voltage of the data signal selected by the selecting means to 2
Storage means for holding and storing a value or multi-valued, a drive current supply line having a voltage sufficient to drive the actuator, and buffer amplification means including a P-channel field effect transistor, The data signal stored in the storage unit is input to a gate terminal of the field-effect transistor, the drive current supply line is connected to a source terminal of the field-effect transistor, and a drain terminal of the field-effect transistor is connected to a drain terminal of the field-effect transistor. It is characterized in that the actuator is connected.

(4) The driving means of the actuator array device according to the present invention comprises an actuator which operates by applying a voltage, and a driving means which forms a pair with the actuator and which operates by applying a voltage to the actuator. In the arranged actuator array device, the driving unit is provided for each pair of a scanning line transmitting a scanning signal, a data line transmitting a data signal, and the scanning line and the data line. Selecting means for switching and selecting the data signal by a signal; and setting the voltage of the data signal selected by the selecting means to 2
Storage means for holding and storing a value or multi-valued, a drive current supply line having a voltage sufficient to drive the actuator, and buffer amplification means including a P-channel field effect transistor, The data signal stored in the storage unit is input to a gate terminal of the field effect transistor, a drain terminal of the field effect transistor is grounded, and one end of the actuator is connected to a source terminal of the field effect transistor. The other end of the actuator is connected to the drive current supply line.

(5) The driving means of the actuator array device according to the present invention is the driving means of the actuator array device according to any one of the first, second, third, and fourth aspects, wherein the storage means is an SRAM circuit. It is characterized by the following.

(6) The driving means of the actuator array device according to the present invention is the driving means of the actuator array device according to the above item (1), (2), (3) or (4). It is a sample-and-hold circuit including one transistor and one capacitor.

(7) The driving means for the actuator array device according to the present invention is the driving means for the actuator array device according to the above item (1), (2), (3) or (4). And a voltage limiting means for limiting the voltage at the connection part of the above to not more than the withstand voltage of the storage means or the selection means.

(8) The driving means of the actuator array device according to the present invention is characterized in that, in the driving means of the actuator array device according to the seventh aspect, the voltage limiting means is a diode.

[0024]

(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings. The present invention relates to a driving unit of an actuator array device. Before describing the driving unit of the present invention, a display device which is an example of an actuator array device driven by the driving unit will be described.

FIGS. 2 and 3 are explanatory views showing the structure of an example of an optical switching element forming a pixel of a display device to be driven by the driving means of the present invention. The display device,
It is constituted by integrating the optical switching elements in an array. Hereinafter, the operation of the optical switching element will be briefly described with reference to the drawings.

First, a description will be given with reference to FIG. The optical switching element includes a waveguide 1, a reflecting prism 3 approaching and moving away from the waveguide 1, a prism electrode 5 for moving the reflecting prism 3 by electrostatic force, and the prism electrode 5 and the reflecting prism 3 being integrated. The prism base 4, the substrate 10, the support 9 fixed on the substrate 10, which is mechanically connected so as to move, one end is attached to the support 9, and the other end is attached to the prism electrode 5. It comprises a cantilever 6 that elastically supports it. Here, illumination light 11 is supplied to the waveguide 1 from an appropriate light source. The illumination light 11 is substantially parallel light, and light is repeatedly and totally reflected at all interfaces inside the waveguide 1 so that the inside of the waveguide 1 is incident at a constant incident angle such that the inside of the waveguide 1 is filled with light rays. Is set to In this state, the illumination light 11 is macroscopically confined inside the waveguide 1 and propagates through the waveguide 1 without loss. On the other hand, microscopically, in the vicinity of the surface of the waveguide 1 which is totally reflected, the illumination light 11 leaks once from the waveguide 1 by a very small distance of about the wavelength of light, and changes its course. Is returned into the waveguide 1 again. The leaked light is generally called an evanescent wave. The evanescent wave can be extracted by bringing another optical member close to the total reflection surface of the waveguide 1 at a distance of about the wavelength of light or less. That is, if an optically transparent member is approached as the optical member, the optical member can be transmitted and taken out. If an optically reflective member is approached as the optical member, the evanescent wave is reflected. Then, the waveguide 1 can be transmitted and taken out.
Therefore, if the optical member is moved toward and away from the actuator, an operation such as taking out or not taking out the illumination light 11 becomes possible.

This conventional example is an optical switching element utilizing the above phenomenon. As shown in FIG. 2, a voltage is first applied between the prism electrode 5 and the lower electrode 8 in the reflection prism 3, and the prism electrode 5 is moved by the attraction force due to electrostatic force between the two. It is located below. Therefore, the reflection prism 3 connected to the prism electrode 5 is also located below and separated from the waveguide 1. The situation at this time is shown in FIG. In this state, the illumination light 11 remains confined inside the waveguide 1 and does not exit to the outside. This is a state where the optical switching is OFF.

Next, the voltage applied between the prism electrode 5 and the lower electrode 8 is released. Then, as shown in FIG. 3, the reflection prism 3 is pushed up by the elasticity of the cantilever 6, and the waveguide 1
Approach at a distance small enough to In this state, the evanescent light of the illumination light 11 leaked from the waveguide 1 is guided to the reflection prism 3 and the reflection prism 3
The light is reflected by the reflection film provided on the waveguide 1, changes its course, and enters the waveguide 1 again. At this time, since the angle of the light that has entered is no longer the angle at which the light is totally reflected inside the waveguide 1, the light penetrates the waveguide 1 as it is and is emitted to the outside as the derived light 12. This is optical switching O
N state.

The above is the operation of an example of an optical switching element that performs optical switching by applying a voltage. still,
If a large number of the above configurations are used in the display of one pixel and arranged in an array or a matrix, a display device for displaying video / image or a light modulation element can be configured. At this time, if the size of the reflecting prism 3 in the plane direction is set to 15 to 20 μm, a light modulator having a size similar to that of a conventional liquid crystal light modulator or a DMD manufactured by Texas Instruments or the like can be obtained. In that case, the driving means is an IC
Thus, each of the optical switching elements corresponding to each pixel is attached to a corresponding lower part.

Next, the driving means of the actuator array device of the present invention used for driving the display device will be described.

FIG. 1 is an explanatory diagram showing the structure of the driving means of this embodiment. The driving means is provided with a buffer stage 18 of an n-channel type field effect transistor in addition to an SRAM circuit configuration including two switching elements 2 and two inverters 5 connected in a loop. The switching element 2 and the inverter 5 are low-breakdown-voltage transistors, and the buffer stages are high-breakdown-voltage transistors. The driving means is supplied with an address signal 7 by an address line 15 and a positive data signal 13 and a negative data signal 14 having a phase inverted with respect to the positive data signal 13 by data lines 16 and 17. The address signal 7 is connected to a control input terminal of the switching element 2, and the positive data signal 13 and the negative data signal 14 are connected to a controlled input terminal of the switching element 2. A high voltage line 19 is connected to the buffer stage 18. The H potential of the address signal 7, the data signal 13, and the negative data signal 14 is, for example, about 3.3 [V], and the potential of the high voltage line 19 is, for example, about 15 [V]. The operation of the driving means will be described using these.

The switching element 2 conducts when the address line 15 is selected and the address signal 7 becomes H, and the positive data signal 13 and the negative data signal 14 are supplied to both ends of the two inverters 5. It has a function as a selection means for supplying. Here, the positive data signal 1
The negative data signal 3 and the negative data signal 14 are digital signals and have one of two potentials, H and L. Therefore, both ends of the inverter 5 are set to H or L according to the potentials of the positive data signal 13 and the negative data signal 14. In this circuit, since the inverter 5 has a circuit configuration of an SRAM in which the inverter 5 is loop-connected, even if the address signal 7 is inverted to L and the switching element 2 is turned off, the data set when H is set. Function as storage means such that is maintained.

The buffer stage 18 is connected to one end of the two inverters 5 connected in a loop.
Further, the output of the buffer stage 18 is connected to the optical switching element 2. The buffer stage 18 switches in response to the HL of the positive data signal 13;
A current is supplied to the optical switching element 2. Since the current is supplied independently from the high voltage line 19, the voltage is 15 [V]. Therefore, the optical switching element 2
Is supplied with a sufficient amount of charge, and the positive data signal 1
3 is driven with a large driving force according to the HL, and performs optical switching. The ON / OFF state of the light is also changed until the address line 15 is next selected and becomes H even if the address signal 7 becomes L because the driving means has the SRAM configuration. The same state is maintained during. That is, the state where the optical switching is ON or OFF is set by the data lines 16 and 17, and when the address line 15 is selected, the target optical switching element 2 on the matrix is turned ON or OFF.
can do.

In the optical switching element as shown in FIGS. 2 and 3, a certain driving force is required to move the reflection prism and to perform ON / OFF of the optical switching reliably. According to the means, even when the SRAM circuit is generally manufactured by a so-called low voltage process in which a power supply voltage is about 3.3 [V], a high voltage is supplied to the optical switching element from the high voltage line by the buffer stage 18. Therefore, a sufficient driving force for performing optical switching can be obtained.

The driving means of this embodiment comprises the SRAM circuit having a low withstand voltage and the buffer stage 18 having a high withstand voltage. The low breakdown voltage SRAM circuit can be formed in a small area, and only one high breakdown voltage transistor occupies a large area. Therefore, a large area is not required to form the driving means. The size of the light modulating element used for image display is limited due to problems such as cost, and the size of the light switching element forming each pixel must also be made at most about 20 μm. It is required that the space allowed for the driving means to be stacked on the same is also contained in the same space, but with the configuration of the present embodiment, it is possible to fit the driving means in the space with the current technology. is there. The light modulation element is expected to be further miniaturized and miniaturized in the future, and the need for a driving means capable of outputting a high driving voltage and having a small occupied area is increasing more and more. The measures are useful.

Here, a display device in which optical switching elements are arranged in an array is used as an example of the actuator array device. However, in the present invention, a driving means capable of driving the actuator device at a high voltage can be formed with a small area. But there is its essence. Therefore, the actuator array device to be driven is not limited to the optical switching element or the display device. For example, it may be another type, that is, a transmission type or reflection type light modulation element in which a movable mirror or a movable film is arranged in an array, or not only a light modulation element but also an electrostatic micro relay array. You may. The operating principle of the actuator may be a piezoelectric type or the like in addition to the electrostatic type. This is the same in other embodiments described below. The driving means of the actuator array device of the present invention can output a large driving voltage with a small area for any of the above, and contribute to miniaturization and miniaturization of the actuator array device.

(Embodiment 2) FIG. 4 is an explanatory view for explaining the structure of a driving means of an actuator array device according to another embodiment of the present invention. In the first embodiment, the buffer stage 18 is a source follower type amplifier of an n-channel type field effect transistor, but may be a drain follower type amplifier as shown in FIG. With the above configuration, the driving unit can be configured more easily depending on the type of the process or the positional relationship between the terminals and the optical switching element 2 to be stacked.

The other configurations and effects are the same as those of the first embodiment, and a detailed description thereof will be omitted.

(Embodiment 3) FIG. 5 is an explanatory view for explaining the structure of a driving means of an actuator array device according to another embodiment of the present invention. In the first embodiment, the buffer stage 18 is a source follower type amplifier of an n-channel type field effect transistor, but may be a source follower type amplifier of a p-channel type field effect transistor as shown in FIG.

The driving means is provided with a buffer stage 18 of a p-channel type field effect transistor in addition to an SRAM circuit configuration comprising two switching elements 2 and two inverters 5 connected in a loop.
The switching element 2 and the inverter 5 are low-breakdown-voltage transistors, and the buffer stages are high-breakdown-voltage transistors. The driving means includes an address line 1
5, the address signal 7 and the data lines 16 and 17
The positive data signal 13 and the positive data signal 13
, A negative data signal 14 whose phase is inverted is supplied to the switching element 2.
The positive data signal 13 and the negative data signal 14 are connected to a controlled input terminal of the switching element 2. The source terminal of the p-channel field-effect transistor serving as the buffer stage 18 is connected to the optical switching element 2 to be driven by the present driving means.
The other end of the optical switching element 2 is connected to a power supply line 24 having the same potential as the power supply line of the inverter 5 and a potential of about 3.3 [V]. The drain terminal of the p-channel field effect transistor is connected to a negative bias line 23 having a potential of, for example, about -11.7 [V].

With the above configuration, the driving means of the present embodiment has the same function as the driving means of the first embodiment, but the type of the process or the terminal of the optical switching element 2 to be laminated. Depending on the positional relationship, the driving means can be configured more easily.

Other configurations and effects are the same as those of the first embodiment, and a detailed description thereof will be omitted.

(Embodiment 4) FIG. 6 is an explanatory view for explaining the structure of the driving means of an actuator array device according to another embodiment of the present invention. In the first embodiment, the buffer stage 18 is a source follower type amplifier of an n-channel type field effect transistor. However, as shown in FIG. 6, it may be a drain follower type amplifier of a p-channel type field effect transistor.

The driving means is provided with a buffer stage 18 of a p-channel type field effect transistor, in addition to an SRAM circuit configuration comprising two switching elements 2 and two inverters 5 connected in a loop.
The switching element 2 and the inverter 5 are low-breakdown-voltage transistors, and the buffer stages are high-breakdown-voltage transistors. The driving means includes an address line 1
5, the address signal 7 and the data lines 16 and 17
The positive data signal 13 and the positive data signal 13
, A negative data signal 14 whose phase is inverted is supplied to the switching element 2.
The positive data signal 13 and the negative data signal 14 are connected to a controlled input terminal of the switching element 2. The source terminal of the p-channel field-effect transistor as the buffer stage 18 is:
A power supply line 24 having the same potential as the power supply line of the inverter 5 and a potential of about 3.3 [V] is connected. Further, the optical switching element 2 to be driven by the driving means
Has one end connected to the drain terminal of the p-channel field effect transistor, and the other end connected to a negative bias line 23 having a potential of, for example, about -11.7 [V].

With the above configuration, the driving means of the present embodiment has the same function as the driving means of the first embodiment, but the type of the process or the terminal of the stacked optical switching element 2 Depending on the positional relationship, the driving means can be configured more easily.

Other configurations and effects are the same as those of the first embodiment, and a detailed description thereof will be omitted.

(Embodiment 5) FIG. 7 is an explanatory diagram for explaining the structure of the driving means of an actuator array device according to another embodiment of the present invention.

In the first embodiment, the buffer stage 18 powered by the high voltage line 19 is connected at its gate terminal to the SRAM circuit which is a low voltage circuit. When the buffer stage 18 switches, the characteristics of the transistors used in the buffer stage 18 and the high voltage line 19
Depending on the voltage or constant distributed on the circuit, high-voltage noise may enter the low-breakdown-voltage SRAM circuit through the gate-channel capacitance and other paths of the buffer stage 18 and damage the SRAM circuit. is there.
In the present embodiment, the protection diode 21 is inserted into the gate of the buffer stage 18, so that the destruction can be prevented. That is, the protection diode 21 has a characteristic that a breakdown voltage is sufficiently lower than a breakdown voltage of the SRAM circuit and is higher than a voltage necessary for driving the buffer stage 18. Then, even if a high voltage surge is mixed in from the channel of the buffer stage 18, it has a function of bypassing to the ground side. That is, the SRAM circuit can be protected and destruction can be prevented. On the other hand, since the breakdown voltage is higher than the voltage required to drive the buffer stage 18, the same switching operation as in the first embodiment can be performed. If a Schottky barrier type is further used as the protection diode 21, the response speed is improved, and it is possible to cope with noise having a higher frequency or a faster rise.

The other configurations and effects are the same as those of the first embodiment, and a detailed description thereof will be omitted.

(Embodiment 6) FIG. 8 is an explanatory view for explaining the structure of a driving means of an actuator array device according to another embodiment of the present invention.

In the third embodiment, the buffer stage 18 is of a source follower type, but may be of a drain follower type as shown in FIG. With the above configuration, the driving unit can be configured more easily depending on the type of the process or the positional relationship between the terminals and the optical switching element 2 to be stacked.

Other configurations and effects are the same as those of the third embodiment, and thus detailed description is omitted.

(Embodiment 7) FIG. 9 is an explanatory view for explaining the structure of the driving means of an actuator array device according to another embodiment of the present invention.

The present embodiment has a configuration in which the protection diode 21 is inserted in the configuration of FIG. 5, whereby the switching element 2 and the inverter 5 can be protected from destruction. In other words, when noise is mixed so that the potential of the connection between the switching element 2 and the inverter 5 and the buffer stage 18 becomes lower than the ground potential, the protection diode 21 functions to bypass the noise current to the ground terminal. Have. On the other hand, a signal is normally transmitted in the same manner as in the first embodiment due to the directionality of the diode.
If a Schottky barrier type is further used as the protection diode 21, the response speed is improved, and it is possible to cope with noise having a higher frequency or a faster rise.

Other configurations and effects are the same as those of the third embodiment, and therefore, detailed description is omitted.

(Embodiment 8) FIG. 10 is an explanatory view for explaining the structure of the driving means of an actuator array device according to another embodiment of the present invention.

The present embodiment has a configuration in which a protection diode 21 is inserted in the configuration of FIG. 6, whereby the switching element 2 and the inverter 5 can be protected from destruction. In other words, when noise is mixed so that the potential of the connection between the switching element 2 and the inverter 5 and the buffer stage 18 becomes lower than the ground potential, the protection diode 21 functions to bypass the noise current to the ground terminal. Have. On the other hand, a signal is normally transmitted in the same manner as in the first embodiment due to the directionality of the diode.
If a Schottky barrier type is further used as the protection diode 21, the response speed is improved, and it is possible to cope with noise having a higher frequency or a faster rise.

Other configurations and effects are the same as those of the fourth embodiment, and a detailed description thereof will be omitted.

(Embodiment 9) FIG. 11 is an explanatory view for explaining the structure of the driving means of an actuator array device according to another embodiment of the present invention.

In the first to fourth embodiments, the driving means is constituted by the selection means comprising the switching element 2 and the storage means which comprises the SRAM circuit and holds the data potential and the buffer stage 18. As the selection unit and the storage unit, a sample-and-hold circuit that holds a potential in an analog manner using a capacitor may be used.

In FIG. 11, the sample and hold circuit comprises a switching element 2 and a capacitor 22. Hereinafter, the operation of the present embodiment will be described.

The switching element 2 is an n-channel type field effect transistor.
Is selected and conducts when the address signal 7 becomes H,
It has a function as a selection unit for supplying the positive data signal 13 to the capacitor 22. Here, the positive data signal 13 may be an analog signal or a digital signal. Here, it is assumed that the positive data signal 13 is a digital signal having one of two potentials of H and L. When the positive data signal 13 is supplied by the selection means, the capacitor 22
Reaches the potential of the positive data signal 13,
Set to H or L. Further, even when the address signal 7 is inverted to L and the switching element 2 is turned off, the capacitor 22 holds the data set when it is H. That is, the capacitor 22 functions as storage means.

The buffer stage 18 composed of an n-channel type field effect transistor is connected to one end of the capacitor 22, and the optical switching element 2 is connected to the output of the buffer stage 18. The buffer stage 18 supplies a current to the optical switching element 2 from the high voltage line 19 according to the positive data signal 13. Since the current is supplied independently from the high voltage line 19, the voltage is 15 [V]. Therefore, a sufficient amount of electric charge is supplied to the optical switching element 2, and the optical switching element 2 is driven with a large driving force in accordance with the positive data signal 13, thereby performing optical switching. Further, even if the address signal 7 becomes L due to the operation of the capacitor 22 serving as the storage means, the address line 15
The same state is maintained until is selected and becomes H.

As described above, according to the present embodiment, the driving means can be constituted by a smaller number of transistors. When the number of transistors is small, when the optical switching element 2 and the driving means are integrated to constitute a display device, this is an overwhelmingly advantageous condition for reducing the size and cost.

(Embodiment 10) FIG. 12 is an explanatory view for explaining the structure of a driving means of an actuator array device according to another embodiment of the present invention. In Example 9,
The buffer stage 18 is of a source follower type, but may be of a drain follower type as shown in FIG. This allows the type of process, or
The driving means can be configured more easily depending on the positional relationship between the terminals and the optical switching element 2 to be stacked.

The other configurations and effects are the same as those of the ninth embodiment, and a detailed description will be omitted.

(Embodiment 11) FIG. 13 is an explanatory view for explaining the structure of a driving means of an actuator array device according to another embodiment of the present invention. In Example 9,
The buffer stage 18 is an n-channel field effect transistor source follower amplifier, but may be a p-channel field effect transistor source follower amplifier as shown in FIG. This makes it possible to more easily form the driving means depending on the type of process or the positional relationship between the terminals and the optical switching element 2 to be stacked.

The other configurations and effects are the same as those of the ninth embodiment, and a detailed description thereof will be omitted.

(Embodiment 12) FIG. 14 is an explanatory view for explaining the structure of a driving means of an actuator array device according to another embodiment of the present invention. In the eleventh embodiment, the buffer stage 18 is a source follower type amplifier of a p-channel field effect transistor.
As described above, a drain follower type amplifier of a p-channel type field effect transistor may be used. This makes it possible to more easily form the driving means depending on the type of process or the positional relationship between the terminals and the optical switching element 2 to be stacked.

The other configuration and effects are the same as those of the eleventh embodiment, and a detailed description will be omitted.

(Embodiment 13) FIG. 15 is an explanatory view for explaining the structure of the driving means of an actuator array device according to another embodiment of the present invention. In Example 9,
The buffer stage 18 powered by the high voltage line 19 is connected at a gate terminal to the SRAM circuit which is a low voltage circuit. When the buffer stage 18 switches, high-voltage noise may occur in the buffer stage 1 depending on the characteristics of transistors used in the buffer stage 18, the voltage of the high-voltage line 19, or constants distributed on a circuit.
There is a possibility that the SRAM circuit may be destroyed by being mixed into the low-breakdown-voltage SRAM circuit through the gate-channel capacitance 8 or other paths. In this embodiment, the buffer stage 1
The protection diode 21 is inserted into the gate of the gate 8, thereby preventing the destruction.
That is, the protection diode 21 has a characteristic that a breakdown voltage is sufficiently lower than a breakdown voltage of the SRAM circuit and is higher than a voltage necessary for driving the buffer stage 18. Then, the buffer stage 1
It has a function of bypassing to the ground side even if a high voltage surge is mixed in from channel 8. That is, the SRA
The M circuit can be protected and destruction can be prevented. On the other hand, since the breakdown voltage is higher than the voltage required to drive the buffer stage 18, the same switching operation as in the ninth embodiment can be performed.
If a Schottky barrier type is further used as the protection diode 21, the response speed is improved, and it is possible to cope with noise having a higher frequency or a faster rise.

Other structures and effects are the same as those of the ninth embodiment, and a detailed description thereof will be omitted.

(Embodiment 14) FIG. 16 is an explanatory view for explaining the structure of the driving means of the display device according to another embodiment of the present invention.

In the thirteenth embodiment, the buffer stage 18
Is a source follower type, but may be a drain follower type as shown in FIG. With the above-described configuration, the driving unit can be configured more easily depending on the type of process or the positional relationship between the terminal and the terminal 20 to be stacked.

The other configuration and effects are the same as those of the thirteenth embodiment, and a detailed description thereof will be omitted.

(Embodiment 15) FIG. 17 is an explanatory view for explaining the structure of the driving means of an actuator array device according to another embodiment of the present invention.

The present embodiment has a configuration in which the protection diode 21 is inserted in the configuration of FIG. 13, whereby the switching element 2 and the inverter 5 can be protected from destruction. That is, the switching element 2
In addition, when noise is mixed so that the potential of the connection between the inverter 5 and the buffer stage 18 becomes lower than the ground potential, the protection diode 21 has a function of bypassing the noise current to the ground terminal. On the other hand, a signal is normally transmitted in the same manner as in the first embodiment due to the directionality of the diode.
If a Schottky barrier type is further used as the protection diode 21, the response speed is improved, and it is possible to cope with noise having a higher frequency or a faster rise.

The other configuration and effects are the same as those of the eleventh embodiment, and a detailed description will be omitted.

(Embodiment 16) FIG. 18 is an explanatory view for explaining the structure of the driving means of an actuator array device according to another embodiment of the present invention.

The present embodiment has a configuration in which the protection diode 21 is inserted in the configuration of FIG. 14, so that the switching element 2 and the inverter 5 can be protected from destruction. That is, the switching element 2
In addition, when noise is mixed so that the potential of the connection between the inverter 5 and the buffer stage 18 becomes lower than the ground potential, the protection diode 21 has a function of bypassing the noise current to the ground terminal. On the other hand, a signal is normally transmitted in the same manner as in the first embodiment due to the directionality of the diode.
If a Schottky barrier type is further used as the protection diode 21, the response speed is improved, and it is possible to cope with noise having a higher frequency or a faster rise.

The other configuration and effects are the same as those of the twelfth embodiment, and a detailed description will be omitted.

[0082]

According to the present invention, the following effects can be obtained.

(1) The driving means of the present invention comprises a low withstand voltage SRAM circuit which is a storage means and the buffer stage 18. Since the driving current of the buffer stage 18 is supplied independently from the high voltage line 19, the voltage is 15
[V]. Therefore, a sufficient amount of electric charge is supplied to the optical switching element 2, and the optical switching element 2 can be driven with a large driving force.

The low-breakdown-voltage SRAM circuit can be formed in a small area, and the high-breakdown-voltage transistor occupying a large area is only one transistor used in the buffer stage 18. Therefore, a large area is not required to form the driving means. The size of the light modulation element used for image display is limited due to the problem of cost and the like, and it is required that the driving means be configured with an area as small as possible. It is possible with technology to fit the drive means in said space. The light modulation element is expected to be further miniaturized and miniaturized in the future, and the need for a driving means capable of outputting a high driving voltage and having a small occupied area is increasing more and more. The measures are useful.

(2) The driving means according to the present invention selects the source follower type or drain follower type circuit of the n-channel field effect transistor or the p-channel field effect transistor as the buffer stage 18, so that the type of the process is selected. Alternatively, the driving means can be configured more easily depending on the positional relationship between the terminals and the optical switching element 2 to be stacked.

(3) The driving means of the present invention is arranged such that, when the buffer stage 18 switches, high-voltage noise is generated by inserting a protection diode 21 into the gate of the buffer stage 18. Even if the SRAM circuit having a low withstand voltage is mixed through the inter-channel capacitance or other paths, the storage means in the preceding stage can be prevented from being destroyed. That is, if the protection diode 21 has a characteristic that the breakdown voltage is sufficiently smaller than the breakdown voltage of the SRAM circuit, even if a high voltage surge is mixed in from the channel of the buffer stage 18, the protection diode 21 is bypassed to the ground side. Therefore, the SRAM circuit can be protected and destruction can be prevented. On the other hand, the same switching operation as in the first embodiment can be performed depending on the directionality of the diode. If a Schottky barrier type is further used as the protection diode 21, the response speed is improved, and it is possible to cope with noise having a higher frequency or a faster rise.

(4) The driving means according to the present invention is characterized in that the driving means serves as the storage means for holding a data potential, and
In addition to the RAM circuit, a sample-and-hold circuit that holds a potential in an analog manner using a capacitor may be used. In that case, the driving unit can be configured with a smaller number of transistors. The small number of transistors means that
When the light switching element 2 and the driving means are integrated to form a light modulation element, it is an overwhelmingly advantageous condition to reduce the size and cost.

(5) The driving means of the present invention has a structure in which a protection diode 21 is inserted into the gate of the buffer stage 18 so that the storage means in the preceding stage, that is, the SRA
Destruction of the M circuit or the sample hold circuit can be prevented. That is, when the buffer stage 18 switches, even if high-voltage noise may enter the low-withstand-voltage SRAM circuit through the gate-channel capacitance and other paths of the buffer stage 18, it is bypassed to the ground side. Since it has a function, the noise voltage is not applied to the storage means. On the other hand, the same switching operation as in the first embodiment can be performed depending on the directionality of the diode. If a Schottky barrier type is further used as the protection diode 21, the response speed is improved, and it is possible to cope with noise having a higher frequency or a faster rise.

[Brief description of the drawings]

FIG. 1 is an explanatory view showing one embodiment of a driving means of an actuator array device of the present invention.

FIG. 2 is an explanatory diagram showing an example of an optical switching element which is one element of an actuator array device driven by a driving unit of the present invention.

FIG. 3 is an explanatory diagram showing an example of an optical switching element which is one element of an actuator array device driven by a driving unit of the present invention.

FIG. 4 is an explanatory view showing another embodiment of the driving means of the actuator array device of the present invention.

FIG. 5 is an explanatory view showing another embodiment of the driving means of the actuator array device of the present invention.

FIG. 6 is an explanatory view showing another embodiment of the driving means of the actuator array device of the present invention.

FIG. 7 is an explanatory view showing another embodiment of the driving means of the actuator array device of the present invention.

FIG. 8 is an explanatory view showing another embodiment of the driving means of the actuator array device of the present invention.

FIG. 9 is an explanatory view showing another embodiment of the driving means of the actuator array device of the present invention.

FIG. 10 is an explanatory view showing another embodiment of the driving means of the actuator array device of the present invention.

FIG. 11 is an explanatory view showing another embodiment of the driving means of the actuator array device of the present invention.

FIG. 12 is an explanatory view showing another embodiment of the driving means of the actuator array device of the present invention.

FIG. 13 is an explanatory view showing another embodiment of the driving means of the actuator array device of the present invention.

FIG. 14 is an explanatory view showing another embodiment of the driving means of the actuator array device of the present invention.

FIG. 15 is an explanatory view showing another embodiment of the driving means of the actuator array device of the present invention.

FIG. 16 is an explanatory view showing another embodiment of the driving means of the actuator array device of the present invention.

FIG. 17 is an explanatory view showing another embodiment of the driving means of the actuator array device of the present invention.

FIG. 18 is an explanatory view showing another embodiment of the driving means of the actuator array device of the present invention.

FIG. 19 is an explanatory view showing an embodiment of a driving means of a conventional actuator array device.

FIG. 20 is an explanatory diagram showing an example of an optical switching element which is one element of an actuator array device driven by a conventional driving unit.

FIG. 21 is an explanatory view showing an example of an optical switching element which is one element of an actuator array device driven by a conventional driving unit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Waveguide 2 Switching element 3 Reflection prism 4 Prism stand 5 Inverter 6 Cantilever 7 Address signal 8 Lower electrode 9 Support 10 Substrate 11 Illumination light 12 Derivation light 13 Data signal 14 Data signal 15 Address line 16 Data line 17 Data line 18 Buffer stage Reference Signs List 19 High voltage line 20 Optical switching element 21 Protection diode 22 Capacitor 23 Bias line 24 Power supply line

Claims (8)

[Claims] 1. An actuator array device in which an actuator that operates by applying a voltage and a driving unit that is paired with the actuator and that applies a voltage to the actuator to operate the actuator are arranged in an array. A scanning line that transmits a scanning signal, a data line that transmits a data signal, and a selection in which the scanning line and the data line are provided for each pair, and the data signal is switched and selected by the scanning signal. Means, storage means for holding and storing the voltage of the data signal selected by the selection means in a binary or multilevel manner, and a drive current supply line having a voltage sufficient to drive the actuator. Buffer amplifying means comprising an N-channel type field effect transistor, wherein a gate terminal of the field effect transistor is provided. The data signal stored in the storage means is input, the drive current supply line is connected to a drain terminal of the field effect transistor, and the actuator is connected to a source terminal of the field effect transistor. Driving means for the actuator array device. 2. An actuator array device in which an actuator that operates by applying a voltage and a driving unit that is paired with the actuator and that operates by applying a voltage to the actuator are arranged in an array. A scanning line that transmits a scanning signal, a data line that transmits a data signal, and a selection in which the scanning line and the data line are provided for each pair, and the data signal is switched and selected by the scanning signal. Means, storage means for holding and storing the voltage of the data signal selected by the selection means in a binary or multilevel manner, and a drive current supply line having a voltage sufficient to drive the actuator. Buffer amplifying means comprising an N-channel type field effect transistor, wherein a gate terminal of the field effect transistor is provided. The data signal stored in the storage unit is input, a source terminal of the field effect transistor is grounded, one end of the actuator is connected to a drain terminal of the field effect transistor, and the other end of the actuator is connected to the drive terminal. Driving means for an actuator array device, wherein the driving means is connected to a current supply line. 3. An actuator array device in which an actuator that operates by applying a voltage and a driving unit that is paired with the actuator and that operates by applying a voltage to the actuator are arranged in an array. A scanning line that transmits a scanning signal, a data line that transmits a data signal, and a selection in which the scanning line and the data line are provided for each pair, and the data signal is switched and selected by the scanning signal. Means, storage means for holding and storing the voltage of the data signal selected by the selection means in a binary or multilevel manner, and a drive current supply line having a voltage sufficient to drive the actuator. Buffer amplifying means comprising a P-channel type field effect transistor, wherein a gate terminal of the field effect transistor is The data signal stored in the storage unit is input, the drive current supply line is connected to a source terminal of the field effect transistor, and the actuator is connected to a drain terminal of the field effect transistor. Driving means for the actuator array device. 4. An actuator array device in which an actuator that operates by applying a voltage and a driving unit that is paired with the actuator and that operates by applying a voltage to the actuator are arranged in an array. A scanning line that transmits a scanning signal, a data line that transmits a data signal, and a selection in which the scanning line and the data line are provided for each pair, and the data signal is switched and selected by the scanning signal. Means, storage means for holding and storing the voltage of the data signal selected by the selection means in a binary or multilevel manner, and a drive current supply line having a voltage sufficient to drive the actuator. Buffer amplifying means comprising a P-channel type field effect transistor, wherein a gate terminal of the field effect transistor is The data signal stored in the storage unit is input, a drain terminal of the field effect transistor is grounded, one end of the actuator is connected to a source terminal of the field effect transistor, and the other end of the actuator is connected to the drive terminal. Driving means for an actuator array device, wherein the driving means is connected to a current supply line. 5. A driving means for an actuator array device according to claim 1, wherein said storage means is an SRAM circuit. 6. The apparatus according to claim 1, wherein said selection means and said storage means are a sample and hold circuit comprising one transistor and one capacitor.
A driving means for the actuator array device according to claim 3 or 4. 7. The driving means further comprises voltage limiting means for limiting a voltage at a connection between the storage means and the buffer amplification means to a level not higher than a withstand voltage of the storage means or the selection means. The driving means of the actuator array device according to claim 1, 2, 3, or 4. 8. The driving means for an actuator array device according to claim 7, wherein said voltage conversion means is a diode.