JP2001034508A - Memory dump collection method and its execution device, and recording medium recording memory dump collection program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten the stop time of a computer system when a fault occurs by restarting a processor after saving the dump data on a dump collection object processor in a fast storage and then outputting the saved dump data to a slow external storage. SOLUTION: A processor having a fault such as an OS panic transmits the data on a main storage 42 to a designated dump data saving processor 4. The processor 4 saves the received dump data in a dump data saving area 421 of the storage 42. When this saving operation is over, a dump data output processing part 412 is started to output the stored dump data to a dump file 51 of a slow external storage 5. Meanwhile, a system management processor 1 restarts the processor 2 where the dump data saving operation is over in parallel to the output of the dump data.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory dump collecting system for collecting information when a computer system fails, and more particularly to a memory dump collecting system for collecting a memory dump when a failure occurs in a memory distributed parallel computer system having a large-scale memory. It is related to technology that is effective when applied to

[0002]

2. Description of the Related Art Conventionally, a memory dump is collected in order to collect information when a computer system fails. For example, in the high-speed data dump method disclosed in JP-A-5-20137, dump data is output to an extended storage device at the same time as dump data is output to a magnetic storage device, thereby shortening the time required for dump output and stopping the computer system. It is described that the time is shortened.

Further, a memory dump collecting method disclosed in Japanese Patent Application Laid-Open No. 5-53882, a dump output device described in Japanese Patent Application Laid-Open No. 5-151034, a memory dump collecting method disclosed in Japanese Patent Application Laid-Open No. 5-1738851, and Japanese Patent Application Laid-Open No. 5-250228 are disclosed. In the fault information collecting method described in JP-A-5-257761 and the fault information collecting method described in JP-A-7-325738, only the memory image necessary for analyzing the fault is selected and dumped. It describes that the time for dump output and the used capacity of the secondary storage device are reduced, and the downtime of the computer system is shortened.

In the memory dump collecting method disclosed in Japanese Patent Application Laid-Open No. 10-333944, only the core memory area of the OS is collected, and then the OS is reloaded to reduce the suspension time of the computer system and restart the system. Later, it is described that the remaining memory area is collected.

In the field of distributed memory type parallel computers, the dump collecting apparatus and the dump collecting method disclosed in Japanese Patent Application Laid-Open No. 9-50424 disclose dump data of another processor related to the failed processor. It describes that the processor other than the failed processor is restarted at the time of completion of the writing to shorten the downtime of the computer system.

[0006]

When a failure occurs in a computer system and the system stops, a memory image (collection of a memory dump) at the time of the failure necessary for investigating the cause is performed. The main memory capacity mounted with the increase in the scale and density of computer systems is increasing, but in general, a low-speed magnetic storage device is used as an external storage device for storing a memory dump. The time required for dump collection tends to be long. While the memory dump is being collected, the computer system cannot be used, thereby causing a disadvantage to the user. Therefore, as shown in the conventional examples of the above publications, a special memory device is provided, or only a specific area is selected, thereby shortening the time for outputting a memory dump.

However, as in the high-speed data dump method disclosed in Japanese Patent Application Laid-Open No. Hei 5-20137, when there is no special storage device or when a sufficient capacity cannot be prepared, the restart of the system cannot be shortened.

[0008] Further, as in a method of selecting a memory image such as a dump output device disclosed in Japanese Patent Application Laid-Open No. H5-151534 or a memory dump collecting method disclosed in Japanese Patent Application Laid-Open No. H10-333944, a memory at the core of an OS is used. If only the area is collected first, the system cannot be restarted until the output to the low-speed secondary storage device is completed.

In the dump collecting apparatus and the dump collecting method disclosed in Japanese Patent Application Laid-Open No. 9-50424, the failed processor cannot be restarted until the output of the dump data to the external storage device is completed.

An object of the present invention is to solve the above-mentioned problems and to provide a technique capable of reducing the downtime of a computer system when a failure occurs.

Another object of the present invention is to provide a technique capable of effectively utilizing the storage area of the dumped processor and shortening the time required for saving the dump data to the storage device.

[0012]

SUMMARY OF THE INVENTION The present invention provides a memory dump collecting system for collecting a memory dump when a failure occurs, by saving dump data of a dumped processor to be dumped to a high-speed storage device. After restarting the processor, the saved dump data is output to a low-speed external storage device.

In the present invention, when a failure occurs in a computer system, first, dump data of a dumped processor to be dumped is stored on a storage device which is faster than an external storage device which finally outputs the dump data. evacuate. Here, it is assumed that the high-speed storage device is a storage device connected to a dump data save processor different from the dumped processor to be dumped, but the dump is stored in the storage device of the dumped processor itself. The data may be saved and the contents of the specific area where the dump data is saved at the time of restart may be saved.

Then, the dumped processor whose dump data has been saved on the high-speed storage device is restarted, and in parallel with this, the dump data saved on the high-speed storage device is deleted. Output to an external storage device that is slower than the storage device.

As described above, according to the present invention, the dumped processor can be restarted immediately after the dump data of the dumped processor is saved on the high-speed main storage device. It is possible to reduce the stop time when stopping.

[0016] Further, by providing means for saving the contents of a specific area of the storage device upon restart, the dump data is saved in the storage device of the dumped processor itself and restarted. The evacuation to the device can be performed in a short time, and the stop time when the computer system stops due to a failure can be reduced.

As described above, according to the memory dump collection system of the present invention, the dump data of the dumped processor to be dumped is saved on a high-speed storage device and the processor is restarted. Since the saved dump data is output to a low-speed external storage device, it is possible to reduce the stop time of the computer system when a failure occurs.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (Embodiment 1) Hereinafter, dump data of a dumped processor to be dumped is saved on a storage device of a dump data saving processor and then output to an external storage device. The memory dump collection system will be described.

FIG. 1 is a diagram showing an example of a distributed memory type parallel computer according to this embodiment. As shown in FIG. 1, the distributed memory type parallel computer of the present embodiment includes a plurality of arithmetic processors that perform large-scale numerical calculations such as scientific and technological calculations at high speed and a system management processor that manages the entire system. , Are communicably connected to each other by a network X.

In this embodiment, P1 is a faulty processor, P2
And P3 are related processors, P5 to P7 are dump data saving processors, and the dump data saving processor needs an area on the main memory for dump data saving. For this reason, the dump data saving processor is determined by the system configuration. However, the faulty processor and the related processor can correspond to all processors constituting the system. That is, the system management processor and the dump data saving processor are also faulty processors. And related processors.

FIG. 2 is a diagram showing a schematic configuration of each section of the distributed memory type parallel computer of the present embodiment. As shown in FIG. 2, the distributed memory parallel computer according to the present embodiment includes a failure detection processing unit 21, a related processor specifying processing unit 22, a failure notification processing unit 23, a dump data transmission processing unit 24, a dump data transmission Processing unit 31 and system control unit initialization processing unit 1
11, a dump information receiving processor 112, a dump data saving processor selecting processor 113, a dump data saving request processor 114, a restart processor 115, a dump data receiving processor 411, and a dump data output processor. 412
And

The failure detection processing section 21 is a processing section for detecting the occurrence of a failure. The related processor specifying processor 22 includes:
This is a processing unit that specifies a related processor 3 which may be related to a failure and needs to collect data on its main memory.

The failure notification processing unit 23 includes the system control unit 1
1 is a processing unit for notifying the occurrence of a failure and the related processor 3 to 1. The dump data transmission processing unit 24 transfers the dump data in the main storage of the failed processor 2 to be dumped to the dump data saving processor 4 selected by the system control unit 11 and saves the dump data on the main storage device 42. This is a processing unit.

The dump data transmission processing unit 31 transfers the dump data in the main memory of the relevant processor 3 to be dumped to the dump data saving processor 4 selected by the system control unit 11 and transfers the dump data to the main storage device 42. This is a processing unit that is evacuated upward.

The system control section initialization processing section 111 is a processing section for performing initialization for dump collection by the system control section 11. The failure information reception processing unit 112 is a processing unit for receiving failure information from the failure processor 2.

Dump data saving processor selection processing unit 1
A processing unit 13 selects the dump data saving processor 4 for saving the main storage data of the dumped processor (indicating the failed processor 2 and the related processor 3).

The dump data saving request processing unit 114 is a processing unit that requests the dumped processor to save the main storage data to the selected dump data saving processor 4. The restart processing unit 115 restarts the dumped processor whose dump data has been completely saved to the storage device of the dump data saving processor 4 without waiting for the end of outputting the dump data to the external storage device 5. It is a processing unit.

The dump data reception processing section 411 is a processing section that receives dump data transferred from the dumped processor and saves the dump data in the dump data saving area 421. The dump data output processing unit 412 stores the dump data saved in the dump data saving area 421 on the main storage device 42 of the dump data saving processor 4 in the external storage device 5.
Is a processing unit that outputs the data to

The distributed memory type parallel computer is connected to a failure detection processing unit 21, a related processor specifying processing unit 22, a failure notification processing unit 23, a dump data transmission processing unit 24, a dump data transmission processing unit 31, a system control unit initialization processing unit 111. , A failure information reception processor 112, a dump data save processor selection processor 113, a dump data save request processor 114,
A program for functioning as the restart processing unit 115, the dump data reception processing unit 411, and the dump data output processing unit 412 is recorded on a recording medium such as a DAT (Digital Audio Tape) and executed. The recording medium for recording the program may be a recording medium other than DAT.

The system management processor 1 shown in FIG.
In the example of the configuration of the system management processor S1 shown in FIG. 2, the faulty processor 2 shown in FIG.
The related processor 3 in FIG. 2 shows an example of the configuration of the arithmetic processors P2 and P3 which have no failure in FIG. 1 but may be related to the failure of the arithmetic processor P1.
The dump data saving processor 4 in FIG. 2 shows a configuration example of the arithmetic processors P5 to P7 having a main memory area for dump saving in FIG.

As shown in FIG. 2, the dump data saving processor 4 of this embodiment has a dump data saving area 421 for receiving and saving dump data transferred from the dumped processor. It is assumed that the memory is secured by adding a memory to the main storage device 42, but without adding a memory to the main storage device 42,
The empty area of the main storage device 42 is stored in the dump data save area 42.
It may be 1. At this time, if the dump data transferred from the dump collection processor cannot be saved in one dump data saving area 421, the dump data is compressed and saved, or the plurality of dump data saving processors 4
The dump data transferred from the dumped processor may be saved in a virtual area where the dump data saving area 421 is regarded as a single area.

The external storage device 5 includes a dump file 51 for storing dump data output from the dump data saving processor 4. Network 6
Is a network used when the system management processor 1, the failed processor 2, the related processor 3, and the dump data saving processor 4 communicate with each other.

Hereinafter, the operation of this embodiment configured as described above will be described with reference to the flow charts of FIGS. FIG. 3 is a flowchart showing a processing procedure of the system management processor 1 and the faulty processor 2 of the present embodiment. For example, when a failure such as an OS panic occurs in the arithmetic processor P1 of FIG. 1, the failure detection processing unit 21 of the arithmetic processor P1 as the failed processor 2 detects the occurrence of the failure and activates the related processor specifying processing unit 22. (S210).

The related processor identification processing unit 22 identifies the related processor 3 which has not failed but may be related to the failure from the content of the failure, and outputs the failure notification processing unit 23.
Is started (S220). In this description, the arithmetic processor
Assume that the associated processor 3 of P1 is arithmetic processors P2 and P3.

The fault notification processing unit 23 includes an arithmetic processor
Failure information indicating that there is an arithmetic processor P2 or P3 as a related processor 3 in which a failure has occurred in P1 and possibly related to the failure is notified to the system management processor S1 via the network X (the network 6 in FIG. 2). Do (S
230).

On the other hand, the system management processor 1 creates a management table for the dump data save area 421 of the dump data save processor 4 in the system control unit initialization processing unit 111 (S1110), and then proceeds to the failure information reception processing unit of FIG. Activate 112 and enter a failure notification reception wait state. Upon receiving a fault notification from the fault processor 2, the received fault information is analyzed and the arithmetic processors P1, P2 and P3 are analyzed.
It is determined that a memory dump is to be collected, and the dump data saving processor selection processing unit 113 is started (S112).
0).

Dump data saving processor selection processing unit 1
13, a dump data save processor that saves the dump data of each of the arithmetic processors P1, P2, and P3 based on the main storage capacity of the arithmetic processors P1, P2, and P3 from which the dump is collected and the usage status of the dump data save area 421 in the system. 4 and activates the dump data save request processing unit 114 (S1130). In this description, it is assumed that the dump data saving processor 4 of the faulty arithmetic processor P1 is an arithmetic processor P5, and the dump data saving processors 4 of the arithmetic processors P2 and P3 as the related processors 3 are arithmetic processors P6 and P7, respectively.

The dump data saving request processing unit 114 includes arithmetic processors P1, P2, which are dumped processors, and
P3 is requested to transfer dump data to the main storage of the arithmetic processors P5, P6, and P7, which are the dump data saving processors 4, respectively (S1140).

FIG. 4 is a flowchart showing the processing procedure of the failed processor 2 / related processor 3 and the dump data saving processor 4 of the present embodiment. The dump data transmission processing unit 24 or the dump data transmission processing unit 31 of the arithmetic processors P1, P2, and P3, which are the dumped processors, transmits the data in the main storage to the specified dump data saving processor 4 (S240).

On the other hand, the dump data reception processing units 411 of the arithmetic processors P5, P6, and P7, which are the dump data saving processors 4, enter a dump data reception waiting state after the system is started (S4110), and dump data is received from the dumped processor. When the data is transferred, the dump data is saved in the dump data save area 421 on the main storage device 42, and when the save is completed, the dump data output processing unit 412 is activated (S4111).

Further, the dumped processor notifies the restart processing unit 115 of the system management processor 1 of the completion of the transfer of the dump data, and requests a restart (S2).
41).

The dump data output processor 412 of the dump data save processor 4 has a dump data save area 421
Is output to the dump file 51 of the external storage device 5 (S4120). When the output is completed, the dump data save area 421 is set to a free area, and the dump data is saved to the system control unit 11 of the system management processor 1. The completion of dump data output is notified (S4121).

On the other hand, in parallel with the dump data output, the restart processing unit 115 of the system control unit 11 of the system management processor 1 restarts the dumped processor whose dump data has been saved.

As described above, according to the memory dump collection system of the present embodiment, the dump data of the dumped processor to be dumped is saved on a high-speed storage device and the processor is restarted. Since the saved dump data is output to a low-speed external storage device,
It is possible to reduce the downtime of the computer system when a failure occurs.

(Embodiment 2) A memory dump collection system according to Embodiment 2 in which dump data of a dumped processor to be dumped is output to an external storage device after being saved in a storage device of the processor. I do.

In the above embodiment, when the dumped processor and the dump data saving processor 4 that saves its main storage data are the same processor, the dumped data is output to the external storage device 5 and then the dumped data is output. I have to restart the sampling processor. This is because data on the main memory is not generally held at the time of restart. Therefore, by providing means for holding data in a certain unit area on the main memory, it becomes possible to output the dump data to the external storage device 5 after the restart of the dumped processor.

If the dump data saving processor 4 of this embodiment has a dump data saving area 421 on the main storage device 42 for saving the dump data of the dumped processor, the system management shown in FIG. The processor S1 or any of the arithmetic processors P1 to P7 may be used.

FIG. 5 is a diagram showing a schematic configuration of the dump data saving processor 4 of the present embodiment. As shown in FIG. 5, the dump data saving processor 4 of the present embodiment includes a restart-time main memory initialization processing unit 7 and a restart-time non-initialization area designation processing unit 43.

The restart-time main memory initialization processing unit 7 is a processing unit that restarts the dump data saving processor 4 which is the dumped processor while holding the saved dump data on the main storage device 42. The restart-time non-initialization area designation processing unit 43 is a processing unit that sets a non-initialization area 422 for saving data on the main storage device 42 at the time of restart.

A program for causing the dump data save processor 4 to function as the restart-time main memory initialization processing unit 7 and the restart-time non-initialization area designation processing unit 43 is recorded on a recording medium such as a DAT and executed. Shall be. The recording medium for recording the program may be a recording medium other than DAT.

In the main storage device 42 included in the dump data saving processor 4 of FIG. 5, the upper part of the figure is expressed as a higher address having a larger address value, and the lower part of the figure is expressed as a lower address having a small address value.

The restart non-initialization area designation processing unit 43 of the dump data save processor 4 has a non-initialization start address 431 and can set an area for saving data on the main memory at the time of restart. At the time of this setting, it can be set so that the dump data save area 421 is included in the non-initialization area 422. Also, the main memory initialization processing unit 7 at the time of restarting
According to the non-initialization area 422 set by the non-initialization area designation processing unit 43 at the time of restart, when the processor is restarted,
Starts up by saving the data in the specified area on the main memory.
The restart-time main memory initialization processing unit 7 is one of processing units for restarting the dump data saving processor 4, and is generally realized as a function of firmware incorporated in the processor.

The schematic configuration of the distributed memory type parallel computer of this embodiment is the same as that of the first embodiment, but the dump data saving processor selection processing unit 113 of the system management processor 1 of this embodiment is As the dump data saving processor 4 for saving the main storage data of the dump collecting processor, the dumped processor itself is selected, and the dump data transmitting processor 2 of the dumped processor serving as the dump data saving processor 4 is selected.
No. 4 performs processing for saving the dump data on the storage device of the own processor.

FIG. 6 is a flowchart showing a processing procedure of the memory dump collection system of the present embodiment. Hereinafter, the operation of the present embodiment configured as described above will be described with reference to the flowchart of FIG.

When the dump data saving processor 4 is started, the non-initialization area designation processing unit 43 at the time of restart on the main memory is used.
Thus, the dump data save area 421 for storing the dump data of the failed processor 2 is set as the non-initialization area 422 (S4300 to S4302). The restart non-initialization area designation processing unit 43 of the present embodiment sets an area of an address higher than the address set as the non-initialization start address 431 as the non-initialization area 422.

When the setting of the non-initialization area 422 is completed, the dump data save processor 4 enters a dump data reception waiting state (S4110). Here, when a failure occurs in the dump data save processor 4, as in the above-described embodiment, the dump data save processor 4 notifies the system management processor 1 of FIG. 2 and the dump data save processor selection processing unit 113 saves its own dump data. It is assumed that the processor 4 has been selected.

This is because, if there is no other dump data save processor 4 due to the system configuration, the dump data save area 42 of the other dump data save processor 4
This corresponds to a case where there is no free space in 1 or a case where the own processor is preferentially selected as a processor for saving the dump data in order to make use of the characteristics of the present embodiment.

The failed dump data saving processor 4 saves the data on the main memory to the dump data saving area 421 of the non-initialized area 422 (S4111). At this time, the dump data save area 421 itself is not a save target.

After the evacuation is completed, if a restart is required due to a failure (S4112), the system control unit 11 shown in FIG.
(S4113), the restart processing unit 115
As a result, the failed dump data saving processor 4 is restarted (S1150 and S1151).

At the time of this restart, the restart-time main memory initialization processing unit 7 shown in FIG. 5 keeps the contents of the non-initialization area 422 set by the restart non-initialization area designation processing unit 43. The main storage device 42 is initialized (S700).

After the restart of the dump data saving processor 4 is completed, the dump data is stored in the dump data saving area 421 before the non-initializing area 422 is set by the restart non-initializing area designation processing unit 43. It is determined whether or not the data has been saved (S4300). If the data is saved, the data is saved in the dump data save area 421 in parallel with the system service provision (application processing such as scientific and technological calculations performed by the distributed memory parallel computer). The dump data that has been output is output to the dump file 51 of the external storage device 5 by the dump data output processing unit 412 in FIG. 2, and the completion of the output of the dump data is notified to the system management processor 1 (S4120 and S4121).

As described above, according to the memory dump collection system of the present embodiment, the dump data is saved in the storage device of the dump collection processor itself, which is the target of the dump collection, and restarted. It is possible to effectively use the storage area of the collection processor and reduce the time required for saving the dump data to the storage device.

[0063]

According to the present invention, after dump data of a dumped processor to be dumped is saved on a high-speed storage device and the processor is restarted, the saved dump data is saved on a low-speed external device. Since the data is output to the storage device, it is possible to reduce the downtime of the computer system when a failure occurs.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating an example of a distributed memory parallel computer according to a first embodiment.

FIG. 2 is a diagram illustrating a schematic configuration of each unit of the distributed memory parallel computer according to the first embodiment;

FIG. 3 is a flowchart illustrating a processing procedure of a system management processor 1 and a faulty processor 2 according to the first embodiment.

FIG. 4 is a flowchart illustrating a processing procedure of a failed processor 2 / related processor 3 and a dump data save processor 4 according to the first embodiment.

FIG. 5 is a diagram illustrating a schematic configuration of a dump data saving processor 4 according to a second embodiment.

FIG. 6 is a flowchart illustrating a processing procedure of the memory dump collection system according to the second embodiment.

[Explanation of symbols]

1 ... System management processor, 2 ... Failed processor, 3
... Related processor, 4 ... Dump data saving processor,
5: external storage device, 6: network, 11: system control unit, 42: main storage device, 51: dump file, 4
21: dump data save area, 21: failure detection processing unit
Reference numeral 22: related processor specifying processing unit, 23: failure notification processing unit, 24: dump data transmission processing unit, 31: dump data transmission processing unit, 111: system control unit initialization processing unit
112: Failure information reception processing unit, 113: Dump data saving processor selection processing unit, 114: Dump data saving request processing unit, 115: Restart processing unit, 411: Dump data reception processing unit, 412: Dump data output processing unit 42
2 ... uninitialized area, 431 ... uninitialized start address, 7
... Restart main memory initialization processing unit, 43.

Continuing from the front page (72) Inventor Kozo Kobayashi 5030 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture F-term in Hitachi Software Co., Ltd. F-term (reference) 5B042 GA11 KK02 KK08 LA20 MA09 MC07

Claims (5)

[Claims] In a memory dump collecting method for collecting a memory dump when a failure occurs, a step of saving dump data of a dumped processor to be dumped to a storage device of a dump data saving processor is provided. Restarting the saved dumped processor without waiting for the end of the output of the dump data to the external storage device; and saving the dump data saved on the storage device of the dump data saving processor to the external storage device. Outputting the data to a memory dump. 2. The memory dump according to claim 1, wherein the dump data is saved in a virtual area where the area on the storage device of the plurality of dump data saving processors is regarded as a single area. Collection method. 3. A method for collecting a memory dump when a failure occurs, wherein a dump data of a dumped processor to be dumped is saved on a storage device of the dumped processor itself, A memory dump comprising: a step of restarting the dumped processor while holding the dump data saved on the device; and a step of outputting the dump data saved on the storage device to an external storage device. Collection method. 4. A dump data transmitting system for saving a dump data of a processor to be dumped to a storage device of a dump data saving processor in a memory dump collecting system for collecting a memory dump when a failure occurs. A restart processing unit that restarts the dumped processor whose dump data has been saved without waiting for the end of the output of the dump data to the external storage device; and a restart processing unit that saves the dumped processor on the storage device of the dump data save processor. A dump data output processing unit that outputs the dump data to an external storage device. 5. A computer-readable recording medium that records a program for causing a computer to function as a memory dump collection system that collects a memory dump when a failure occurs. The dump data transmission processor that saves the data on the storage device of the dump data save processor and the dumped processor that saves the dump data are restarted without waiting for the end of the output of the dump data to the external storage device. A recording medium recording a program for causing a computer to function as a restart processing unit and a dump data output processing unit that outputs dump data saved on a storage device of a dump data saving processor to an external storage device. .