JP2000353969A - Receiver for digital voice broadcasting - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a silent period in switching a program in a DAB receiver. SOLUTION: This device is provided with a channel selector circuit 61 which switches the digital audio data of a first program which are being reproduced at present and the digital audio data of a second program to be reproduced from now on by bit units and outputs the data and a time de-interleaver 62 to which the output of the channel selector circuit 61 is supplied. Upon switching from the reproduction of the first program to the reproduction of the second program, the channel selector circuit 61 switches the digital audio data of the first program to the digital audio data of the second program in the order of a shorter delay time imparted to each bit by time interleave and for every logical frame, and supplies the data to the time de-interleaver circuit 62.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital audio broadcasting receiver.

[0002]

2. Description of the Related Art DAB (Eur
digital audio broadcasting according to the Eka 147 standard). This DAB has a transmission bandwidth of 1.5 MHz, a modulation method of OFDM (each carrier component is a D-QPS
K) Data compression method for audio signals: Digital audio data and digital data of up to 64 channels are simultaneously broadcast by employing Layer II of MPEG audio.

For this reason, in the DAB, the broadcast of a program has a hierarchical structure, for example, as shown in FIG. That is, as described above, DAB is 1.5
Although using a transmission bandwidth of MHz, this transmission channel is called an "ensemble" and the ensemble is selected by tuning to the center frequency of the ensemble.

[0004] The ensemble is divided into groups called "services". In the case of FIG. 7, the service is divided into four services. This service is further divided into several "service components", each of which is digital audio data or digital data constituting one program.

[0005] In this case, the service corresponds to one of the broadcasting stations in FM broadcasting or the like. The service component is, for example, the first service component of the service 1 and the soccer (program 1) at the first venue.
A), and the second service component broadcasts soccer (program 1B) at the second venue, and is used as in. Alternatively, the first service component broadcasts news (program 2A) in English,
The second service component broadcasts the news (program 2B) in French and is used like.

Further, the ensemble, the service and the service component are given identification codes called “ensemble ID”, “service ID” and “sub-channel ID” for identifying them. Ensembles and services are also given "ensemble labels" and "service labels" to indicate their names. Note that the service components are not generally labeled, and are referred to as “primary service component”, “secondary service component 1”, “secondary service component 2”, and so on.

[0007] Therefore, when listening to a DAB program, an ensemble (frequency) is selected, one of a plurality of services included in the ensemble is selected, and an objective is selected from the selected services. Service component (program) to be selected.

Since the DAB has the above-mentioned format, the DAB receiver is configured as shown in FIG. 8, for example.

That is, the DAB broadcast wave signal is received by the antenna 11 and the received signal is transmitted to the tuner circuit 12.
Supplied to The tuner circuit 12 is configured in a superheterodyne system, and is configured in a synthesizer system having a PLL. By changing the frequency dividing ratio N of the variable frequency dividing circuit of the PLL, the tuner circuit 12 can change the reception frequency. Has been. And this tuner circuit 12
, A baseband signal of DAB is demodulated and extracted, and this signal is supplied to an A / D converter circuit 13 and A / D converted into a digital signal.

The digital signal is supplied to a quadrature demodulation circuit 14 to demodulate data of an in-phase component (real axis component) and a quadrature component (imaginary axis component).
In the T differential demodulation circuit 15, each carrier component is reproduced by performing a complex Fourier transform.
-QPSK demodulation and frequency deinterleaving are performed, and the output is supplied to a Viterbi decoder circuit 16 to perform time deinterleaving and error correction, and select digital audio data of a target service component (program). You.

Subsequently, the selected data is supplied to an audio decoder circuit 17, where decoding processing such as MPEG data expansion is performed.
Digital audio data of a target service component is extracted. Then, the extracted digital audio data is supplied to a D / A converter circuit 18 and D / A converted into analog audio signals L and R. The signals L and R are supplied to speakers 21L and 21R through amplifiers 19L and 19R. Is done.

A microcomputer 31 is provided for controlling the system.
Ensemble (reception frequency) from 1 to tuner circuit 12
Is supplied as frequency data for selecting a frequency division ratio N of the variable frequency dividing circuit in the PLL.

Further, data such as a service ID and a sub-channel ID are taken out from the Viterbi decoder circuit 16 as data necessary for identifying or specifying the service and the service component, and these data are supplied to the microcomputer 31. Also,
Viterbi decoder circuit 16 from microcomputer 31
Are supplied with selection signals SSV and SCH, a service is selected by the signal SSV, and digital audio data of a target service component is selected from the selected services by the signal SSC.

The microcomputer 31 is connected to various operation keys 32 constituted by, for example, non-lock type push switches, and is connected to, for example, an LCD 33 as a display element.

When the key 32 is operated in this way, the frequency division ratio N supplied to the tuner circuit 12 is changed to select the target ensemble, and the service included in this ensemble is selected by the selection signal SSV.
The service component included in the selected service is selected by the selection signal SSC. Therefore, the digital audio data of the target program is output from the Viterbi decoder circuit 16 and the speakers 21L, 21R
Output the sound of the target program.

[0016]

As described above, DAB
In, a maximum of 64 channels of digital audio data can be broadcast simultaneously by one ensemble, but the digital audio data
The bits are interleaved and each bit in one original logical frame is temporally dispersed.

For this reason, in the DAB receiver, when the service component is switched, the service component before switching (currently being reproduced) and the service component after switching (to be reproduced later) are the same even if the service component of the same ensemble has the same service. However, at the time of the switching, the following problem occurs.

That is, when the target digital audio data is selected by the Viterbi decoder circuit 16 by the selection signals SSV and SSC, the digital audio data is still time-interleaved. Therefore, the Viterbi decoder circuit 16 time-deinterleaves the digital audio data,
Each bit distributed by time interleaving is
It is necessary to aggregate the original word.

FIG. 9 shows a minimum basic configuration of a time deinterleaver circuit for performing the time deinterleaving. This time deinterleaver circuit is constituted by shift registers SR00 to SR15, and the shift registers SR00 to SR15 give delay times 15T to 0T as shown in FIG. I have. Note that 1T is 1 in the DAB signal.
This is a logical frame period. Also, the shift register S
R15 has a delay time of 0 and therefore does not need to be provided, but is added to the description and figures for convenience (the same applies hereinafter).

The bits cr, 0 to cr, 15 of the time-interleaved digital audio data (convolution codeword) Cr are stored in shift registers SR00 to SR00.
The data is supplied to R15 and delayed, and the result of the delay is taken out as data Br.

At this time, each bit br, 0 to br, 15 of the data Br is set to 1 before the time interleave.
Each bit in one word, and therefore data Br is time-deinterleaved digital audio data (convolutional codeword).

If the bit sizes of the data Cr and Br are Nr and Mr, respectively, Cr = (cr, 0 to cr, (Nr
-1)), Br = (br, 0 to br, (Mr-1)), but without switching the service components and without changing the size of the service components due to the reconfiguration of multiplexing, Nr = Mr.

However, when the size of the service component increases or decreases due to the reconfiguration of the multiplexing, the time and the number of bits having the larger size before and after the increase and decrease are determined.
Deinterleaved.

When the bit size of data Cr and data Br changes due to the switching of the service component, time deinterleaving is performed with the bit size of the larger bit size data,
Data having the smaller bit size is extended to “0” to have the same bit size.

Further, when Nr> 16, a plurality of the basic circuits of FIG. 9 are provided in parallel to constitute a time deinterleaver circuit. As an extreme example (though it is not possible in a normal broadcast), the maximum sub-channel size
In the case of supporting up to 864 CUs, since 1 CU = 64 bits, Nr = 864 CU × 64 bits, and Nr / 16 bits = 3456 basic circuits in FIG. 9 are connected in parallel, and a time deinterleaver circuit is provided. Will be composed. Each shift register has a bit number of bits cr, 0 to cr, (Nr-1) (0 to (Nr-1)).
Is divided by the value 16 to correspond to the remainder.

In the above-described time deinterleaver circuit, it is assumed that the input digital audio data Cr is switched from a service component to a service component at a time ta as shown in FIG. 10A, for example.

Then, each shift register SR00 to SR15 of the time deinterleaver circuit gives the above-described delay time to each bit cr, 0 to cr, 15 of the data Cr. The output digital audio data Br is, as shown in FIG.
Until the time point ta, only the bit of the service component is included, but from the time point ta, the bit of the service component and the bit of the service component are mixed. Then, from time point tb, which is 15 logical frames after time point ta, the bit of the service component is set.

Therefore, the output data Br during the period ta to tb is determined by the bits of the service component,
When the bits of the service component are mixed, the data becomes noise data. Therefore, the period ta ~
For example, it is necessary to apply muting to tb in the audio decoder circuit 17 so that the noise data is not output as reproduced sound.

However, when muting is performed, if the muting is rapidly turned on and off at times ta and tb, noise (pop noise) is generated due to the on / off.

Therefore, actually, when there is a request to switch the service component, as shown in FIG. 10C,
Muting is gradually turned on. When the muting is completely turned on, the switching of the service component is executed as shown in FIGS. 10D and 10E. When the switching of the service component is completed, the muting is gradually turned off. I try to go.

However, this makes the apparent muting period longer. For this reason, when the listener performs the switching operation of the service component, a silence period occurs for a short time.

Also, in DAB, when a broadcasting station broadcasts a "notification" to a listener, no matter what service component the listener is listening to, the service component is forcibly switched to another service component. Listeners may be notified by the service component. Then, in such a case, the music or the like that has been listened to up to that point becomes silent, and then a notice is output. When the notification ends, the sound is silenced again, and then the original music is output.

As described above, in the DAB, when a service component is switched or switched, even if the service component before the switching and the service component after the switching are included in the same service of the same ensemble. At the time of the switching, a silent period occurs.

To avoid such a silent period, the digital audio data of all the service components is time-deinterleaved in advance, and the digital audio data of the target service component is extracted from the data. This may be selected, but this is not practical because the circuit scale of the IC increases and the power consumption increases.

The present invention is to solve such a problem.

[0036]

Therefore, according to the present invention, digital audio data of a plurality of programs is time-interleaved and multiplexed to receive a digital audio broadcast broadcasted by one transmission band. The digital audio data of the first program currently being reproduced and the digital audio data of the second program to be reproduced from among the plurality of programs are supplied, and the supplied first and second digital audio data are supplied to the second program. A channel selector circuit for switching and outputting digital audio data in bit units, and an output of the channel selector circuit is supplied, and the output is subjected to time deinterleaving complementary to the above time deinterleaving and output. A time deinterleaver circuit for replaying the first program. When switching from the first program to the reproduction of the second program, the channel selector circuit adds the digital audio data of the first program and the digital audio data of the second program to each bit by the time interleaving. The digital audio broadcast receiver is configured to switch and supply the bits to the time deinterleaver circuit in the order of the bit having the shorter delay time and for each logical frame. Therefore, the digital audio data output from the time deinterleaver circuit simultaneously switches programs simultaneously.

[0037]

DESCRIPTION OF THE PREFERRED EMBODIMENTS [Summary of the Invention] FIG. 11 is a rewrite of the time deinterleaver circuit of FIG. 9 for easy understanding. In FIG. 11, shift registers SR00 to SR15 are shown. The shift registers SR00 to SR15 (and their signal lines) are rearranged so that the delay time of the shift registers is longer. Also, in FIG. 11, shift registers SR00 to SR15 are shown as serially connected by a corresponding number of shift registers having a delay time of 1T.

As is clear from FIG. 11, the bit cr, 0 of the input data Cr is extracted as the bit br, 0 of the output data Br after a period of 15T. The bit cr, 8 is extracted as a bit br, 8 after a period of 14T, and the bit cr, 4 is extracted as a bit br, 4 after a period of 13T. Furthermore, the remaining bits cr, 12
Similarly, the bits br, 12 are also stored in the bits br, 12
~ Br, 15.

At this time, the extracted bit b
r, 0 to br, 15 are bits in the same word before time interleaving as described above.

That is, each bit cr, 0 of the input data Cr
To cR, 15 are given different delay times due to time interleaving, but time deinterleaving is performed by the bits cr, 0 to cr, 15 of the input data Cr.
The output data Br constituting the original word is obtained by adding a delay time complementary to the delay time due to time interleaving.

Therefore, for example, as shown in FIG. 12, if the service component before switching is used and the service component after switching is used, when switching is performed, (1) At the time ta, the bits cr, Switch 0 from service component to service component. (2) At a point one T period after the point in time ta, the bits cr, 8
Is switched from the service component to the service component. (3) At the time 2T period after the time ta, the bits cr, 4
Is switched from the service component to the service component. (4) At the time point 3T after the time point ta, the bits cr, 12
Is switched from the service component to the service component. (5) ... (6) At time tb, which is 15T periods after time ta, the bits cr,
15 is switched from the service component to the service component. Thus, the bits cr, 0 to cr, 15 of the input data Cr
Are switched from the service component to the service component every 1T period in the order of longer delay time in the shift registers SR00 to SR15.

That is, the bit cr, 0 of the input data Cr
To cr, 15 in order of the delay time given to the bits cr, 0 to cr, 15 by time interleaving,
The service component is switched to the service component every 1T period. Then, FIG.
B, the bits br, 0 to br, of the output data Br
At 15, the service components are simultaneously switched from the service components to the service components at time tb. At the time of the switching, the service component bits and the service component bits are not mixed in the output data Br, and a data period corresponding to a silent period does not occur.

According to the present invention, the service components are switched as described above.

[One Embodiment of the Invention] The DAB receiver is configured, for example, as described with reference to FIG. And
The Viterbi decoder circuit 16 of the DAB receiver is provided with a channel selector circuit 61 as shown in FIG.

That is, in FIG. 1, reference numeral 62 denotes the above-described time deinterleaver circuit (in the Viterbi decoder circuit 16), and a channel selector circuit 61 is provided in front of the time deinterleaver circuit 62. .

Then, the channel selector circuit 61
Are supplied with two time-interleaved digital audio data (convolution codewords) C1 and C2. In this case, the data C1 and C2 are: C1: digital audio data of the service component before switching (currently being reproduced) C2: digital audio data of the service component after switching (to be reproduced) or C1: service after switching Component digital audio data C2: Digital audio data of the service component before switching. The data C1 and C2 may be any of the above combinations by the processing of the routine described later. Further, in the following description, it is assumed that the service component before switching is the service component and the service component after switching is the service component.

Then, in the channel selector circuit 61, the data C1 is output by the channel switching signal S61.
, C2 are switched on a bit basis as in the items (1) to (6), and the switching output Qr is supplied to the time deinterleaver circuit 62 as input data Cr.

In this case, the microcomputer 31 for system control includes, for example, routines 100 to 400 shown in FIGS.
Is provided and called by the channel switching signal S61. The details of the routines 100 to 400 will be described later.

The Viterbi decoder circuit 16 operates at the time t.
Up to b, the digital audio data of the service component is decoded, and from time tb, the digital audio data of the service component is decoded.

According to such a configuration, the time deinterleaved digital audio data Br is output from the time deinterleaver circuit 62.
In this case, as described above, the bits br, 0 to br, 15 of the output data Br of the time deinterleaver circuit 62 are simultaneously switched from the service component to the service component at the same time.

At the time of this switching, the output data B
r does not mix service component bits and service component bits, and
No data period corresponding to the silent period occurs.

Thus, according to the above-described circuit, the service component can be switched instantaneously. When switching, no silence period or noise period occurs.

[Preparation Routine for Service Component Switching] In the above description, which of the data C1 and C2 supplied to the channel selector circuit 61 is the digital audio data of the service component before the switching and which of the service components after the switching. Although it may be digital audio data, a routine for realizing this is routine 100 in FIG.

This routine 100 is executed immediately before switching the service component. In the routine 100, first, it is determined whether the digital audio data of the service component currently being reproduced is the data C1 or the data C2.

Then, CB: a variable indicating the service component before switching CA: a variable indicating the service component after switching The variables CB and CA are prepared, and the data CB and CA are stored in the variables CB and CA according to the discrimination result. C2 is set respectively.

In this routine, the variable ir is cleared. The variable ir is a bit number in the digital audio data C1 and C2, and is used in a service component switching routine executed thereafter.

Therefore, by executing the routine 100, which of the data C1 and C2 supplied to the channel selector circuit 61 is the digital audio data of the service component before switching and which is the digital audio data of the service component after switching. It may be.

In addition, even when a large number of service components are sequentially switched, the switching is facilitated.

[Routine for Specifying the Width of the Time Deinterleaver Circuit] As described above, when the bit size of the data Cr and the data Br changes due to the switching of the service component, the bit size of the larger bit size data And the data having the smaller bit size is extended to "0" to have the same bit size.

For this reason, the width of the time deinterleaver circuit 62 is specified by the specifying routine 200 shown in FIG. This routine 200 is executed immediately before switching the service component, for example, following the routine 100. Then, in the first half of this routine 200, it is determined whether the digital audio data of the service component currently being reproduced is data C1 or data C2.

At this time, MBr is the code length of the data Cr before the switching MAr is the code length of the data Cr after the switching M1 is the code length of the data C1 M2 is the code length of the data C2 , Variables MBr and MAR are set to their respective code lengths.

Further, in the latter half of the routine 200,
The data having the longer bit size is determined from the variables MBr and MAR, and the bit size is set in the variable Nr.
Therefore, the variable Nr indicates the deinterleaver width.

[Routine for Generating Switching Order of Bits cr, 0 to cr, 15] In the channel selector circuit 61,
When the bits of the data Cr are switched from the service component to the service component, as described above, the bits cr, 0 shown in the left side of FIG.
To cr, 15.

This switching can be performed by preparing a data table indicating the switching order. In the following, however, the switching is realized by bit manipulation and logical operation.

That is, as shown in FIG. 6A, a 4-bit counter (variable) ir is prepared, and the value of this counter ir is incremented from "0" by "1". Changes as shown. At this time, as shown in FIG. 6A, a 4-bit counter (variable) tc is prepared, and the third bit d3 of the counter tc ← the 0th bit d0 of the counter ir 〃 the second bit d2 ← 〃 the first bit d1コ ピ ー First bit d1 ← 〃 Second bit d2 〃 0th bit d0 ← 〃 Third bit d3, the value of counter tc is as shown in the right column of FIG. 6B.

The value of the counter tc is calculated as shown in FIG.
In the order of the suffixes of the bits cr, 0 to cr, 15. That is, the value of the counter tc matches the order of the bit numbers of the bits cr, 0 to cr, 15 when the shift registers SR00 to SR15 are arranged in descending order of delay time.

Therefore, data tc for switching bits cr, 0 to cr, 15 of data Cr can be obtained by performing bit operation and logical operation on the value of counter ir.

The routine 300 shown in FIG. 4 generates the data tc in this manner, and ir = 0 to (Nr-
It is executed for each value of 1). Also, j: bit number (j = 0 to 3).

The routine 300 has four loops corresponding to j = 0 to 3, and each time the loop is executed, the 0th bit (LSB) of the variable tc is finally replaced with the bit of the variable tc. Then, "0" or "1" is set and bit-shifted. As a result, the variable ir is converted to a variable tc.

Therefore, this routine 300 is performed during the period ta during which the service component is switched.
Nr times for each logical frame period T of .about.tb.

In the above description, the counter i
Although it is assumed that r is 4 bits, actually, since the data is 16 bits or more, the counter ir is set to the number of bits corresponding to the data size of the channel. However, even in such a case, the above algorithm can be used.

[Switching Routine of Bits cr, 0 to cr, 15] As described above, in the channel selector circuit 61, digital audio data is switched bit by bit to switch service components. Is executed, for example, by the routine 400 of FIG.

That is, this routine 400 is performed for the period t.
It is executed once for each logical frame period from a to tb, in which the variable ir is 0
To (Nr -1), and each bit is switched as described above.

Therefore, the loop of the first half of the routine 400 uses the result of the routine 200 and repeats the process Nr times corresponding to the bits cr, 0 to cr, Nr of the data Cr.

At this time, ti: the number of the logical frame period in the period ta to tb ti = 0 to 15 qr, ir: each bit of the switching output Qr cbr, ir: each bit of the data CB before switching, car, ir : Each bit of data CA after switching, logical frame period in which ti≥tc: qr, ir = cb
Logical frame period where r, ir ti <tc: qr, ir = ca
Switching of service components is realized as r and ir.

In the latter half of the routine 400, the frame number ti is incremented by "1" each time the routine 400 is executed, that is, for each logical frame period between the periods ta and tb. When the processing of the period ta to tb is completed (at this time,
ti = 15), Nr = MAr, and the width of the time deinterleaver circuit 62 after the time tb is set to the value MAR
Fixed to

[Summary] When a service component is switched, the service component can be switched instantaneously. When switching, no silence period or noise period occurs.

Further, when a broadcast station of DAB broadcasts a notice, no silence period occurs before and after the notice. Further, when the switching of the service component is completed at time tb, the microcomputer 31 does not need to perform any processing.

[0079]

According to the present invention, when a program is switched,
The switching can be performed instantaneously, and no silent period or noise period occurs at the time of the switching.

Further, when a broadcast station broadcasts a notice through another program, no silence period occurs before and after the notice. Furthermore, when the program switching is completed,
No action is required.

[Brief description of the drawings]

FIG. 1 is a system diagram illustrating one embodiment of the present invention.

FIG. 2 is a flowchart illustrating one embodiment of the present invention.

FIG. 3 is a flowchart illustrating one embodiment of the present invention.

FIG. 4 is a flowchart illustrating one embodiment of the present invention.

FIG. 5 is a flowchart illustrating one embodiment of the present invention.

FIG. 6 is a diagram for explaining the present invention.

FIG. 7 is a diagram for explaining the present invention.

FIG. 8 is a system diagram for explaining the present invention.

FIG. 9 is a system diagram for explaining the present invention.

FIG. 10 is a diagram for explaining the present invention.

FIG. 11 is a system diagram for explaining the present invention.

FIG. 12 is a diagram for explaining the present invention.

[Explanation of symbols]

11 antenna, 12 tuner circuit, 13 A / D converter circuit, 14 quadrature demodulation circuit, 15 FFT differential demodulation circuit, 16 Viterbi decoder circuit, 17 audio decoder circuit, 18 D / A converter circuit , 21L
And 21R speaker, 31 microcomputer, 32 operation keys, 33 LCD, 61 channel selector circuit, 62 time deinterleaver circuit

Claims (3)

[Claims] 1. A digital audio broadcasting receiver in which digital audio data of a plurality of programs are time-interleaved, multiplexed and broadcast in one transmission band, wherein the plurality of programs are currently reproduced. The digital audio data of the first program and the digital audio data of the second program to be reproduced are supplied, and the supplied first and second digital audio data are switched in bit units and output. A selector circuit, and an output of the channel selector circuit, and a time deinterleaver circuit that performs complementary time deinterleaving on the output and outputs the result. When switching from the reproduction of the first program to the reproduction of the second program, Serial channel selector circuit, the first
The digital audio data of the second program and the digital audio data of the second program are switched in the order of the bit having the shorter delay time given to each bit by the time interleaving, and for each logical frame, and A digital audio broadcast receiver to be supplied to a deinterleaver circuit. 2. The digital audio broadcast receiver according to claim 1, wherein switching from reproduction of said first program to reproduction of said second program is executed according to an instruction of a listener. Audio broadcast receiver. 3. The digital audio broadcast receiver according to claim 1, wherein the switching from the reproduction of the first program to the reproduction of the second program is executed according to an instruction of a broadcasting station. Digital audio broadcasting receiver.