JP2000349774A - Packet exchange multicast control method used for the same and recording medium recording control program for the same method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a packet exchange which can contain every one of mutlicatst traffic patterns without interfering a unicast traffic. SOLUTION: After multicast packets arriving at input buffer parts 1-1 to 1-n are switched to target output ports 101-1 to 101-n as unicast packets which has one of a plurality of branched parts as a destination, they are loopback- transferred to repeater buffer parts 5-1 to 5-n by splitter parts 6-1 to 6-n. The repeater buffer parts 5-1 to 5-n are also treated as unicast packets which has one of the plurality of branched parts to which the arrived multicast packets are not yet transferred as the destination and controlled so that they are switched to the target output ports.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a packet switching apparatus, a multicast control method used therefor, and a recording medium on which a control program is recorded.
Synchronous Transfer Mod
The present invention relates to a packet switching device that switches a packet between a specific input port and an output port using a packet communication technique such as e).

[0002]

2. Description of the Related Art In recent years, not only voice communication and data communication, but also multimedia communication including moving images has been increasingly required. As a means for realizing such broadband communication, ATM (Asynchronous Transfer) has been used.
Mode) -based switching technology is being put to practical use.

[0003] In the ATM system, all information is converted into fixed information called cells without depending on continuous information such as voice and moving image, burst information such as data, and without depending on each communication speed. Transfer at high speed. That is, in the ATM system, a line is allocated to a plurality of calls by multiplexing logical connections on a physical line. Thereafter, moving picture data, audio data, and the like from the terminal corresponding to each call are decomposed into fixed-length information units (referred to as cells), and sequentially transmitted to the line to realize multiplexing.

[0004] Also, before the ATM system was developed,
2. Description of the Related Art A technique for assembling moving image data, audio data, and the like into information units called packets and transmitting them on a communication path has been established. A packet switching device accommodating a plurality of different communication paths switches between the communication paths based on the destination of the packet. Since a cell is a kind of packet, the packet will be described below.

[0005] Packets are roughly classified into unicast packets having one destination and multicast packets having a plurality of destinations. A packet switching device located at a branch point is required to have a multicast function of switching a multicast packet having a plurality of switching destinations to all the branch destinations.

Conventionally, as a packet switching apparatus having such a multicast function, the Institute of Electronics, Information and Communication Engineers 19
Proceedings of the 1999 General Conference: Some are described in B-6-65.

FIG. 23 is an overall block diagram of a conventional packet switching apparatus, FIG. 24 is a block diagram of an input buffer section of the conventional packet switching apparatus, and FIGS. 25 and 26 are multicast control in the conventional packet switching apparatus. FIG. 4 is a detailed diagram for explaining the operation of FIG.

In FIG. 23 to FIG. 26, a conventional packet switching apparatus is provided with input ports 100-1 to 100-n.
(The input ports 100-3 to 100-n are not shown);
Output ports 101-1 to 101-n (output port 101
-3 to 101-n are not shown), and an input buffer unit 1-1 for temporarily storing packets arriving at an input port.
1-n (input buffer sections 1-3 to 1-n are not shown)
And an arbiter unit 3.

As an example of the configuration of the switch switching unit 2, an intersection of a transmission line routed in a grid is opened and closed (O
N / OFF). In this configuration, if multiple input ports transmit packets to a specific output port at the same time, a packet collision will occur and the data carried by the packet will be destroyed, so packets will be transmitted to a specific output port at the same timing It is necessary to limit the input ports to be used to at most one.

The arbiter unit 3 has output ports 101-1 to 101-1.
In order to prevent packet collision on 01-n, it is determined which of the input / output ports of the switch switching unit 2 should be used to switch the packet, and the input buffer unit 1- should determine which output port the packet should be sent to. Notify 1-1-n.

The input buffer units 1-1 to 1-n prepared for each of the input ports 100-1 to 100-n correspond to the output port 1
Logical queues 11-1 to 11-1 to 01-1 to 101-n
11-n.

The destinations of the packets arriving at the input ports 100-1 to 100-n are checked and stored at the end of a predetermined logical queue, and the head of the predetermined logical queue is sent to the packet switch switching unit 2.

The packet input unit 12 distinguishes between a unicast packet originally having one branch destination and a multicast packet having a plurality of branch destinations, and the unicast packet is directly sent to the logical queues 11-1 to 11-n. The multicast packets are stored and stored in the multicast queue 14.

The packet output unit 13 selects an appropriate logical queue based on the output permission destination notified from the arbiter unit 3 via the control signal line 4, extracts a packet stored at the head of the logical queue, and switches the packet. Send it to unit 2.

First, the switching operation of a unicast packet having one branch destination in the prior art will be described. As shown in FIG.
Packets arriving at .about.100-n are accumulated at the end of a predetermined logical queue corresponding to an output port as a destination.

The arbiter unit 3 grasps the state of all the input buffer units 1-1 to 1-n via the control signal line 4, and selects one of the output buffers 101-1 to 101-n for one output port 101-1 to 101-n. Arbitration is performed so that output permission is given only to the input buffer units 10-1 to 10-n. All output ports 101-
After performing arbitration so that packet collision does not occur in 1 to 101-n, the output permission destination is notified to the input buffer units 1-1 to 1-n via the control signal line 4.

The input buffer section 1-1 which has obtained the output permission
To 1-n are output ports 101-1 to 101-1 whose output is permitted
The first packet of the logical queue corresponding to 01-n is taken out and sent to the switch switching unit 2, and the switch switching unit 2 switches the packet based on the arbitration result obtained from the arbiter unit 3 to the predetermined output ports 101-1 to 101-1. Switch to -n.

As shown in FIG. 26, for a multicast packet having a plurality of branch destinations, the input buffer unit 1
-1 to 1-n temporarily store the multicast packets in the multicast queue 14, copy them for all branch destinations, and store them in predetermined logical queues 11-1 to 11-n, respectively.

The copy-generated packet is treated as a unicast packet having only one branch destination,
The multicast function is realized by independently switching each packet based on the switching operation for the unicast packet described above.

[0020]

In the above-described conventional packet switching apparatus, a copy of a multicast packet is generated in the input buffer unit corresponding to a branch destination. Assuming that the average load of the multicast packet arriving at the input port is ρM and the average number of branch destinations is M, the load ρ1 of the packet copied from the input buffer corresponding to the branch destination is ρ1 = ρM × M. That is, the multicast traffic arriving at the input buffer section is doubled to M times the load and transferred on the input link to the switch switching section.

Here, when the bandwidth available for the unicast traffic is calculated, assuming that the total bandwidth of the input port or the input link is BW, on the input port facing the input buffer section, ρ2 = BW−ρM Ρ2 ′ = BW-ρ1 = BW-ρM × M <ρ2 on the input link going out of the input buffer unit.

That is, in the case of the conventional technique, the multicast traffic reduces the bandwidth on the input link that can be used by the unicast traffic, and causes permanent packet retention in the input buffer.

Further, the prior art cannot accommodate a multicast traffic pattern in which the product ρ1 of the average load ρM of the multicast packets arriving at the input port and the average number of branch destinations M exceeds 100%. For example, a remarkable example is a case where a multicast packet destined to all output ports arrives at a load ρM = 100%.

In this case, the multicast traffic load on the input link always exceeds 100%, and constant congestion occurs in the input buffer unit, and the buffer overflows frequently.
Although the output port is not congested, a satisfactory throughput cannot be obtained due to packet discarding in the input buffer unit.

Accordingly, an object of the present invention is to solve the above-mentioned problems, to provide a packet switching apparatus capable of accommodating any multicast traffic pattern without affecting unicast traffic, a multicast control method used therefor, and a control method therefor. It is to provide a recording medium on which a program is recorded.

[0026]

A packet switching apparatus according to the present invention is a packet switching apparatus having a multicast function for switching a multicast packet having a plurality of switching destinations to all of its branch destinations, and arrives at an input port. Storage means for temporarily storing packets, switch means for switching the packets stored in the storage means to a target output port, outputting the packets switched by the switch means to the output ports, and Splitter means for loop-back transfer to the input side of the switch means, relay storage means provided on the input side of the switch means for storing packets loop-back transferred by the splitter means, and loop-back transfer by the splitter means Packet is the target switch. Discarding means for discarding the packet when the packet has been transferred to all the switching destinations, wherein the switch means switches the packets respectively stored in the storage means and the relay storage means to a target output port. I have.

The multicast control method according to the present invention comprises:
A multicast control method for a packet switching apparatus having a multicast function of switching a multicast packet having a plurality of switching destinations to all of its branch destinations, the method comprising temporarily storing packets arriving at an input port; Switching a packet to a target output port; outputting the switched packet to the output port; and loop-forwarding the packet to the input port side; and a packet loop-forwarded to the input port side. And discarding the packet loop-forwarded to the input port when the packet has been forwarded to all the intended switching destinations.

A recording medium on which a multicast control program according to the present invention is recorded is provided with a multicast control for causing a packet switching apparatus having a multicast function for switching a multicast packet having a plurality of switching destinations to all branch destinations to perform the multicast control. A recording medium on which a program is recorded, wherein the multicast control program causes the packet switching device to temporarily accumulate packets arriving at an input port, switch the accumulated packets to a target output port, and perform switching. A packet output to the output port, the packet is loop-forwarded to the input port side, the loop-backed packet is stored in the input port side, and the packet is loop-forwarded to the input port side. Tsu bets is the packet is discarded when it is forwarded to all purpose switching destination.

That is, the packet switching apparatus of the present invention has an input buffer unit having a logical queue for temporarily storing packets arriving at an input port, and the input side of the input buffer unit corresponding to the identifier of the input packet. There is provided a table for storing tag information for specifying a plurality of output ports to be transmitted and provided, and a first header analysis unit for adding tag information to an input packet is provided.

Further, the packet switching apparatus of the present invention has a relay buffer unit provided with a logical queue for temporarily storing the input packet, and each of the input links of the relay buffer unit is provided with the input packet. A second header analysis unit is provided at all branch destinations with reference to the tag information to identify and discard the packet whose copy transfer has been completed.

Further, the packet switching device of the present invention includes a switch switching unit for switching a packet transmitted from an input buffer unit or a relay buffer unit to a predetermined output port, and an input buffer for determining whether to permit output to the output port. An arbiter unit that determines whether the packet is to be supplied to the switch unit or the relay buffer unit, and a splitter unit that is provided on the output side of the switch exchange unit and that copies an input packet into a plurality of packets and branches and outputs the packets.

The input buffer unit refers to the tag information attached to the input multicast packet, processes the packet as a unicast packet destined to one of a plurality of branch destinations, and sends the packet to the output destination. Is updated so as to indicate that it has been transmitted, stored in a predetermined logical queue, and then transmitted to a predetermined output port via a switch exchange unit.

The splitter unit is controlled so as to copy a plurality of packets output from the switch exchange unit, branch and output the packets, connect one output to an output port, and connect the other output to a relay buffer unit. .

The relay buffer unit refers to the tag information added to the input packet, processes the packet as a unicast packet having one of a plurality of output destinations as an output destination, and sends the packet to the output destination. Is updated so as to indicate that it has been transmitted, stored in a predetermined logical queue, and then transmitted to a predetermined output port via a switch exchange unit.

That is, the multicast packet arriving at the input buffer is switched to a target output port as a unicast packet destined to one of a plurality of branch destinations, and then looped back to the relay buffer by the splitter. Will be transferred. The relay buffer unit is also controlled so that the arriving multicast packet is treated as a unicast packet destined for one of a plurality of branch destinations that have not yet been transferred, and is switched to a target output port. As described above, the present invention has a configuration in which the multicast packet is delivered one branch destination at a time while passing through the splitter unit and the relay buffer unit.

In this configuration, the multicast packet arriving at the input buffer unit is transferred only once on the input link to the switch exchange unit. In other words, multicast packets that are copied and generated in the input buffer unit and are originally the same do not waste the bandwidth of the input link, and it is possible to suppress interference with unicast traffic, which was a problem of the conventional technology. Become.

Also, when a multicast packet having all output ports as branch destinations arrives at an input port with a load ρM = 100%, one branch is made while looping back to a relay buffer via a splitter. Since the copy transfer is performed one by one, it is possible to accommodate the input buffer unit or the relay buffer unit without falling into a constant congestion state, and the multicast arriving at the input port which cannot be accommodated by the conventional technology. The product ρ1 of the average packet load ρM and the average number of branch destinations M is 100%
Can be accommodated.

The arbiter unit performs arbitration so that output permission to the output port is preferentially given to the input buffer unit.
Alternatively, by performing arbitration so as to give priority to the relay buffer unit, it is possible to reduce the amount of buffer required for the buffer unit given priority.

The input buffer section is a unicast packet,
By providing an independent logical queue for each destination output port for each multicast packet, it is possible to service the input buffer unit to give priority to either unicast packets or multicast packets. It becomes possible.

The input buffer unit or the relay buffer unit refers to the tag information added to the input packet, and sets the destination, which is the earliest output destination among the untransferred branch destinations, according to a predetermined output destination order. By processing as a unicast packet, the same output destination is always selected for a multicast packet having the same branch destination pattern that continuously arrives on the same connection,
Copy transfer to all branch destinations is possible while preserving the order relation.

[0041]

Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a packet switching device according to one embodiment of the present invention. FIG.
In the packet switching device according to one embodiment of the present invention, the input buffer units 1-1 to 1-n (input buffer units 1-3)
To 1-n are not shown), and the relay buffer units 5-1 to 5-
n (relay buffer sections 5-3 to 5-n are not shown) and first header analysis sections 7-1 to 7-n (first header analysis sections 7-3 to 7-n are not shown). ) And the second header analysis unit 8
-1 to 8-n (the second header analysis units 8-3 to 8-n are not shown) and the splitter units 6-1 to 6-n (the splitter units 6-3 to 6-n are not shown) ) And the switch exchange unit 2
And an arbiter unit 3.

The input links 200-1 to 200-n (input links 200-3 to 200-n are not shown) and output links 201-1 to 201-2n [output links 201-3 to
201-n, 201- (n + 3) to 201-2n are not shown]. As an example of the configuration of the switch exchange unit 2 for switching packets, the switching points of the transmission lines arranged in a grid are opened and closed. (ON / OFF) configuration is conceivable.

Input ports 100-1 to 100-n (input ports 100-3 to 100-n are not shown) and output ports 101-1 to 101-n (output ports 101-3 to 100-n)
101-n (not shown) is assigned a number for identification. Assuming that the number of ports is N, integers from 0 to N−1 are assigned. However, the input port number and
Input buffer units 1-1 to 1 installed at the input ports
It is assumed that the number matches the number of -n.

The arbiter unit 3 determines which input buffer unit 1-1.
１−1-n and the relay buffer units 5-1１〜5-n execute arbitration processing for determining which output port 101-1〜１０101-n is to be given output permission, and input link according to the arbitration result. The switching unit 2 is controlled so that packets are exchanged between the output links 201-1 to 201-n and the output links 201-1 to 201-n.

FIG. 2 is a block diagram showing the configuration of the first header analysis unit 7 of FIG. 2, the first header analysis unit 7 is provided on the input side of the input buffer units 1-1 to 1-n, and includes a flow information database 71 and a header processing unit 72.

The header processing section 72 has an input port 100-1.
The flow identifier (FI) is extracted from the header portion of the packet arriving at .about.100-n, and the branch destination of the packet is recognized by referring to the flow information database 71 using the flow identifier as a search key. For example, in the flow information database 71, a bitmap (BM) in which a bit area is prepared for an output port is prepared corresponding to a flow identifier.

In the bit map, "1" is described in a bit area corresponding to an output port as a branch destination, and "0" is described in other areas. If there is a potential request to copy and transfer a plurality of multicast packets to the same output port, a plurality of bit regions corresponding to the same output port may be prepared. Here, if only one bit "1" is described in the bitmap, the packet is a unicast packet, and if there is more than one, the packet is a multicast packet.

The first header analysis unit 7 has only to handle unitarily regardless of whether it is a unicast packet or a multicast packet, and the configuration can be simplified.

The first header analysis unit 7 adds a bit map to the packet as tag information and adds the bit map to the input buffer unit 1-1.
To 1-n. Although not shown, the first header analysis units 7-1 to 7-n shown in FIG. 1 have the same configuration as the above-mentioned first header analysis unit 7, and the operation is also the same. .

FIG. 3 is a block diagram showing the configuration of the second header analysis unit 8 of FIG. 3, the second header analysis unit 8 is provided on the input side of the relay buffer units 5-1 to 5-n, and includes a header processing unit 81.

The header processing unit 81 refers to the bit map added to the packet, and sets “1” in any bit area.
If is not described, the packet is discarded. If "1" is described in any of the bit areas, the data is transferred to the relay buffer units 5-1 to 5-n. Although not shown, the second header analysis unit 8-1 shown in FIG.
8-n have the same configuration as the above-mentioned second header analysis unit 8, and the operation is also the same.

FIG. 4 is a block diagram showing the configuration of the input buffer unit 1 of FIG. In FIG. 4, the input buffer unit 1
Are the logical queues 11-1 to 11-n and the packet input unit 1
2 and a packet output unit 13. A number for identification is assigned to the input buffer unit 1, and an integer of 0 to N−1 is assigned, where N is the number of ports.

The input buffer unit 1 has an output port 101-1
Logical queue 11-1 that is distinguished corresponding to the
To 11-n are built therein, and the input packets are distinguished and stored for each of the destination output ports 101-1 to 101-n. In this embodiment, for the sake of simplicity, the logical queues 11-1 to 11-n are connected to the destination output port 101-.
It is said that packets are stored for each of 1 to 101-n,
The present invention can be applied without any change even when accumulating data for each flow, and the same effect can be expected.

Further, by preparing the logical queues 11-1 to 11-n corresponding to the output ports constructed in the input buffer unit 1 for each service class, a multi-traffic class environment can be easily provided. In this embodiment, for the sake of simplicity, it is assumed that there is one service class. However, any number of service classes can be prepared.

The packet input unit 12 recognizes, from the bit map attached to the arriving packet, the branch destination of the packet that has not been delivered yet. Thereafter, the packet input unit 12 searches the bitmap according to a predetermined output destination order, and selects the earliest output destination in which “1” is described as the destination.

In a configuration in which a bit area corresponding to an output port is prepared in a bit map, it is possible to specify an output destination order by a combination of a start port number and a numerical order. The output destination order may be determined so as to be different for each input buffer unit 1. For example, in the input buffer #m corresponding to the input port #m, #m starting from the output port # m →
... # N−1 may be searched in the order of # m + 1 →... # N−1 → # 0 →... # M−1, or the output port # 0 may be uniformly determined regardless of the input buffer unit 1. The bit map may be searched in the order of # 0 → # 1 →.

After selecting the output destination, the packet input unit 12 writes "0" in the bit area corresponding to the selected output port 101-1 to 101-n, and outputs the output port 101-1 to 101-n. The logical queues are accumulated in the logical queues 11-1 to 11-n corresponding to n.

As described above, if the output destination selection order for selecting only one output destination from among a plurality of branch destinations is fixed in the input buffer unit 1, the same destination that continuously arrives on the same connection Since the same output destination is always selected for a packet having the above branch destination pattern, copy transfer to all branch destinations is possible while preserving the order relation. Of course, the same effect can be obtained even if the output destination selection order is determined for each connection.

The packet output unit 13 outputs the logical queues 11 corresponding to the output ports 101-1 to 101-n permitted to be notified from the arbiter unit 3 via the control signal line 4.
The head packets of -1 to 11-n are extracted and transmitted to the input links 200-1 to 200-n. Although not shown, the input buffer units 1-1 to 1-n shown in FIG. 1 have the same configuration as the above-described input buffer unit 1, and the operation thereof is also the same.

FIG. 5 is a block diagram showing another example of the configuration of the input buffer unit 1 of FIG. In FIG. 5, the input buffer unit 1 is a unicast logical queue 31-1 to 31-n.
And the logical queues for multicast 41-1 to 41-n
, A packet input unit 12 and a packet output unit 13.

Unicast logical queues 31-1 to 31
-N is an independent logical queue for each destination output port for unicast packets, and multicast logical queues 41-1 to 41-n are independent logical queues for each destination output port for multicast packets.

These unicast logical queues 31-1
31-n and the logical queue for multicast 41-1
41-n, the input buffer unit 1-1
1 to 1-n, it is possible to provide a service to give a priority to either a unicast packet or a multicast packet.

FIG. 6 is a block diagram showing a configuration of the relay buffer unit 5 of FIG. In FIG. 5, the relay buffer unit 5
Are the logical queues 11-1 to 11-n and the packet input unit 1
2 and a packet output unit 13. Also, a number for identification is assigned to the relay buffer unit 5, and an integer of 0 to N-1 is assigned, where N is the number of ports.

The relay buffer unit 5 has an output port 101-1
Logical queue 11-1 that is distinguished corresponding to the
To 11-n are built therein, and the input packets are stored for each of the destination output ports 101-1 to 101-n. In this embodiment, for the sake of simplicity, the logical queues 11-1 to 11-n are connected to the destination output ports 101-1 to 101-1.
Although it is described that packets are stored for each 01-n, the present invention can be applied without any change even when storing packets for each flow, and the same effect can be expected.

The packet input unit 12 recognizes, from the bit map attached to the arriving packet, the branch destination of the packet that has not been delivered yet. Thereafter, the packet input unit 12 searches the bitmap according to a predetermined output destination order, and selects the earliest output destination in which “1” is described as the destination.

In a configuration in which a bit area corresponding to an output port is prepared in a bitmap, it is possible to specify an output destination order by a combination of a start port number and a numerical order. The output destination order may be determined to be different for each relay buffer unit 5. For example, in the relay buffer #m corresponding to the output port #m, #m starting from the output port # m →
... # N−1 may be determined in the order of # m + 1 →... # N−1 → # 0 →... # M−1, or the output port # 0 may be uniformly determined regardless of the relay buffer unit 5. The bit map may be searched in the order of # 0 → # 1 →.

After selecting the output destination, the packet input unit 12 writes “0” in the bit area corresponding to the selected output port 101-1 to 101-n, and outputs the output port 101-1 to 101-n. The logical queues are accumulated in the logical queues 11-1 to 11-n corresponding to n.

As described above, if the output destination selection order when selecting only one output destination from a plurality of branch destinations is fixed in the relay buffer unit 5, the same destination that continuously arrives on the same connection Since the same output destination is always selected for a packet having the above branch destination pattern, copy transfer to all branch destinations is possible while preserving the order relation. Of course, the same effect can be obtained even if the output destination selection order is determined for each connection.

The packet output unit 13 outputs the logical queues 11 corresponding to the output ports 101-1 to 101-n to which the output notified from the arbiter unit 3 via the control signal line 4 is permitted.
The first packets of -1 to 11-n are extracted and transmitted to the input links 200- (n + 1) to 200-2n. Although not shown, the relay buffer units 5-1 to 5 shown in FIG.
−n has the same configuration as that of the above-described relay buffer unit 5, and its operation is also the same.

FIG. 7 is a block diagram showing the configuration of the splitter section 6 of FIG. In FIG. 7, the splitter unit 6 is 1
This is a functional module for copying and outputting packets input from two directions in two directions, and includes output ports 101-1 to 101-1.
-N is prepared.

The splitter unit 6 receives the output links 201-1 to 201-n of the switch switching unit 2 as inputs, and connects one output to the output ports 101-1 to 101-n, and the other to the output port 101-n. The relay links 300-1 to 300-n corresponding to the relay links 300-1 to 101-n (relay links 300
-3 to 300-n are not shown).

FIG. 8 is a block diagram showing the configuration of the switch exchange unit 2 of FIG. In FIG. 8, the switch exchange unit 2
Is composed of a switching unit 21. The switching unit 21 has a transmission line 24 laid in a grid pattern between 2 × N input links 200 and N output links 201, and opens and closes an intersection 23 between the transmission lines (ON / OF).
F), a packet can be switched between a specific input port and an output port.

Further, routing information indicating a destination may be added to the packet, and only the packet having specific routing information may be switched at the intersection 23. Switching unit 21
Variations on the control of are within the scope of the present invention.

FIG. 9 is a block diagram showing another example of the configuration of the switch exchange unit 2 in FIG. In FIG. 9, the switch exchange unit 2 includes a switching unit 21 and a concentrator unit 22.
It is composed of

The switching unit 21 has N input links 2
This is a function unit for switching a packet between 00 and the N output links 201, and the transmission line 24 is laid in a grid pattern between the N input links 200 and the N output links 201. By opening and closing (ON / OFF) the intersection 23 between the transmission paths, it is possible to switch the packet between a specific input link 200 and a specific output link 201.

Alternatively, routing information indicating the destination may be added to the packet, and only the packet having the specific routing information may be switched at the intersection 23. Switching unit 21
Variations on the control of are within the scope of the present invention.

The concentrator unit 22 is a functional unit that concentrates packets input from 2 × N input links 200 to N output links 201. The arbiter unit 3 controls the input buffer units 1-1 to 1-1 to prevent packet collisions on the N output ports 101-1 to 101-n.
Since the output permission given to n or the relay buffer units 5-1 to 5-n is arbitrated, the number of packets simultaneously input to the concentrator unit 22 is controlled so as to be N at most. Therefore, no packet discard occurs in the concentrator unit 22.

By configuring the switch switching unit 2 as described above, N input links 200 and N output links 2
01 can be used for the switching unit 21.

FIG. 10 is a block diagram showing another example of the configuration of the switch exchange unit 2 in FIG. In FIG. 10, the switch switching unit 2 includes a switching unit 21, a concentrator unit 22, a multiplexing unit 25, and a separating unit 26.

The switching unit 21 has N input links 2
This is a function unit for switching a packet between 00 and the N output links 201, and the transmission line 24 is laid in a grid pattern between the N input links 200 and the N output links 201. By opening and closing (ON / OFF) the intersection 23 between the transmission paths, it is possible to switch the packet between a specific input link 200 and a specific output link 201.

Further, routing information indicating the destination may be added to the packet, and only the packet having the specific routing information may be switched at the intersection 23. Switching unit 21
Variations on the control of are within the scope of the present invention.

The concentrator unit 22 is a functional unit that concentrates packets input from 2 × N input links 200 to N output links 201. The arbiter unit 3 controls the input buffer units 1-1 to 1-1 to prevent packet collisions on the N output ports 101-1 to 101-n.
Since the output permission given to n or the relay buffer units 5-1 to 5-n is arbitrated, the number of packets simultaneously input to the concentrator unit 22 is controlled so as to be N at most. Therefore, no packet discard occurs in the concentrator unit 22.

The multiplexing unit 25 is a functional unit that multiplexes the outputs from the plurality of input links 200 and passes the multiplexed output through one multiplexed link 202. The demultiplexing unit 26 multiplexes the packets transmitted on the multiplexed link 202. 25 is a functional unit for separating packets so as to be in a state before being multiplexed.

In FIG. 10, output from two input links is multiplexed, but output from more than two input links may be multiplexed. The transmission speed of the multiplex link 202 increases according to the degree of multiplexing. In the multiplexing unit 25, the input buffer units 1-1 to 1--1
n or the relay buffer units 5-1 to 5-n may be multiplexed, and the input buffer units 1-1 to 1-n
And the relay buffer units 5-1 to 5-n may be multiplexed.

By configuring the switch switching unit 2 as described above, N input links 200 and N output links 2
01 can be used as the switching unit 21 and the input buffer unit 1-
1 to 1-n or the number of links between the relay buffer units 5-1 to 5-n and the concentrator unit 22 can be reduced to N.

FIGS. 11 to 18 are state diagrams showing a multicast process according to an embodiment of the present invention. 11 to 1
Reference numeral 8 denotes multicast processing when multicast communication is performed in the packet switching apparatus having the number of ports N = 4.

FIG. 11 shows a state in which a packet having a flow identifier B (hereinafter referred to as packet B) has arrived at input buffer # 1 connected to input port # 1. FIG. 12 shows how the first header analysis unit 7 processes the packet B.

FIG. 13 shows a state in which the packet B arrives at the packet input section 12 of the input buffer # 1 and is accumulated in the logical queue. FIG. 14 shows a state in which the input buffer # 1 having the packet B has obtained the output permission from the arbiter unit 3 to the output port # 0.

FIG. 15 shows a state where the data has arrived at the second header analysis unit 8 of the relay buffer # 0 via the relay link # 0. FIG. 16 shows a state in which the packet B arrives at the packet input unit 12 of the relay buffer # 0 and is accumulated in the logical queue.

FIG. 17 shows a state in which the relay buffer # 0 having the packet B has obtained the output permission from the arbiter unit 3 to the output port # 3. FIG. 18 shows a state where the packet has arrived at the second header analysis unit 8 of the relay buffer # 3 via the relay link # 3.

FIGS. 19 and 20 are flowcharts showing the multicast processing according to one embodiment of the present invention. The multicast processing according to one embodiment of the present invention will be described with reference to FIGS. Here, it is assumed that 0, 1, 2, and 3 are assigned as the input / output port number / input buffer number.

The multicast processing shown in FIGS. 19 and 20 is realized by each part of the packet switching apparatus according to one embodiment of the present invention executing a program stored in a control memory (not shown). A ROM (Read Only Memory), an IC (Integrated Circuit) memory, or the like can be used.

A packet having a flow identifier B (hereinafter, a packet having a flow identifier B)
When the packet (referred to as packet B) arrives at the input buffer # 1 connected to the input port # 1 (step S1 in FIG. 19), the header processing unit 72 of the first header analysis unit 7 sets the flow identifier B of the flow information database 71 to The bitmap is acquired by referring to the corresponding column (step S2 in FIG. 19).

The bit map of the packet having the flow identifier B is “1001”. The bitmap shows the bit columns of output ports # 0, # 1, # 2, and # 3 in order from the left, and "1001" indicates that copy transfer is performed to output ports # 0 and # 3. The header processing unit 72 adds this bitmap as tag information and transfers it to the input buffer # 1 (step S3 in FIG. 19).

The packet input unit 12 executes a process of selecting one of the plurality of branch destinations of the arriving multicast packet and storing it in an appropriate logical queue. In the present embodiment, the packet input unit 12 uniformly searches the bitmap in the order of # 0 → # 1 →... # N−1 starting from the output port # 0, and searches for the smallest number in which “1” is described. Output port is selected as its output destination.

Of course, the search start port numbers and the order of the numbers may be determined to be different for each of the input buffer units 1-1 to 1-n. For example, in the input buffer #m corresponding to the input port #m, #m starting from the output port # m →
The bitmap may be searched in the order of # m + 1 →... # N−1 → # 0 →. Alternatively, the search start port number and the number order may be determined differently for each multicast connection.

If the output destination selection order is fixed in each of the packet input sections 12 of the input buffer sections 1-1 to 1-n and the relay buffer sections 5-1 to 5-n,
Since the same output destination is always selected for a multicast packet having the same branch destination pattern that continuously arrives on the same connection, copy transfer to all branch destinations is possible while preserving the order relation.

In this embodiment, as a result of searching the bit map in the order of # 0 → # 1 →... # N−1, the packet input unit 12 processes the packet B as a unicast packet addressed to the output port # 0. (Step S4 in FIG. 19). After that, the packet input unit 12 describes “0” in the bit area corresponding to the selected output port # 0 in the bit map, and stores it in the logical queue 11-1 corresponding to the output port # 0 (step in FIG. 19). S
5). As a result, the tag information added to the packet B becomes “0001”.

When the input buffer # 1 having the packet B obtains the output permission from the arbiter unit 3 to the output port # 0 (step S6 in FIG. 19), the packet output unit 13 sets the logical queue 11- corresponding to the output port # 0. The packet B stored at the beginning of the packet No. 1 is extracted and the input link 200-
1 (step S7 in FIG. 19).

The switching unit 2 switches the packet B from the input buffer # 1 to the output port # 0 (FIG. 19).
Step S8) The packet B is input to the splitter unit 6-1 connected to the output port # 0. Splitter section 6
1 copies and outputs the packet B to two, but one output is connected to the output port # 0, and the copy transfer to the output port # 0 which is one of a plurality of branch destinations of the packet B is performed. Complete here. The other output is relay link #
0, and the packet B is transferred to the relay buffer # 0 via the relay link # 0 (step S9 in FIG. 19).

Relay buffer # via relay link # 0
When it arrives at the second header analysis unit 8-1 corresponding to 0,
The second header analysis unit 8-1 refers to the tag information attached to the packet (step S10 in FIG. 20) and determines whether the packet has a branch destination that has not been copied and transferred (step S10 in FIG. 20). S11) If there is no branch destination for copy transfer, the packet is discarded (step S12 in FIG. 20).

If there is a branch destination to be copied and transferred, the second header analyzer 8-1 transfers the packet to the relay buffer 5-1 (step S14 in FIG. 20). At this point, the tag information added to the packet B is “0001”, and the packet B must be copied and transferred to the output port # 3. Transfer to relay buffer # 0.

When the packet B arrives at the packet input unit 12 of the relay buffer # 0, the packet input unit 12 selects one of a plurality of branch destinations for the arrived multicast packet, and selects an appropriate logical destination. Queue 11-1
11-n.

In the present embodiment, the packet input unit 12 uniformly starts from the output port # 0 # 0 → # 1 →.
The bitmap is searched in the order of -1, and the output port with the lowest number in which "1" is described is selected as its output destination.

Of course, the search start port number and the order of the numbers may be determined so as to be different for each of the relay buffer units 5-1 to 5-n. For example, in the relay buffer unit corresponding to the output port #m, #m starting from the output port # m →
The bitmap may be searched in the order of # m + 1 →... # N−1 → # 0 →. Alternatively, the search start port number and the number order may be determined differently for each multicast connection.

If the output destination selection order is fixed in each of the packet input sections 12 of the input buffer sections 1-1 to 1-n and the relay buffer sections 5-1 to 5-n,
Since the same output destination is always selected for a multicast packet having the same branch destination pattern that continuously arrives on the same connection, copy transfer to all the branch destinations is possible while preserving the order relation.

In this embodiment, the packet input unit 12 searches the bit map in the order of # 0 → # 1 →... # N−1, and determines that the packet B is a unicast packet addressed to the output port # 3. (Step S15 in FIG. 20). Thereafter, the packet input unit 12 describes “0” in the bit area corresponding to the selected output port # 3 in the bitmap, and stores the bit area in the logical queue 11-4 corresponding to the output port # 3 (step in FIG. 20). S1
6). As a result, the tag information added to the packet B becomes “0000”.

When the relay buffer # 0 having the packet B obtains the output permission from the arbiter unit 3 to the output port # 3 (step S17 in FIG. 20), the packet output unit 13 sets the logical queue 11- corresponding to the output port # 3. 4 and retrieves the packet B stored at the head of
-4 (step S18 in FIG. 20).

The switching unit 2 switches the packet B from the relay buffer # 0 to the output port # 3 (FIG. 20).
Step S19): Input the packet B to the splitter unit 6-4 connected to the output port # 3. Splitter section 6
-4 copies and outputs the packet B to two, but one output is connected to the output port # 3, and the packet B is transferred to the output port # 3 which is one of a plurality of branch destinations of the packet B. Is completed here. The other output is connected to relay link # 3, and packet B is transferred to relay buffer # 3 via relay link # 3 (step S20 in FIG. 20).

When the packet B arrives at the second header analysis section 8-4 corresponding to the relay buffer # 3 via the relay link # 3, the tag information attached to the packet B at this point is "0000". The second header analysis unit 8-4 discards the packet B because there is no branch destination to be copied and transferred. As a result, the output ports # 0 and # of the packet B arriving at the input port # 1
3 is completed.

In the above-described processing, if the arriving packet is a unicast packet, the processing in steps S1 to S12 is performed. If the packet is a multicast packet, the processing in steps S1 to S11 and S14 to S20 is performed.
In particular, the processes of steps S10, S11, and S14 to S20 are repeatedly performed until there is no more destination. The packet switching apparatus repeats the above process until the process is completed (FIG. 1).
9 steps S1 to S9 and FIG. 20 steps S10 to S2
0).

As described above, according to the present embodiment, since the multicast packet is configured to be delivered one branch destination at a time, any multicast pattern can be accommodated. Also, the input buffer units 1-1 to 1--1
n, the multicast packet arriving at switch n is configured to be transferred only once on input links 200-1 to 200-n to switch switching unit 2, so that input link 200-1
It is possible to suppress interference with unicast traffic without wasting the bandwidth of ~ 200-n.

FIGS. 21 and 22 are diagrams for explaining the operation of the arbiter unit 3 of FIG. These FIGS. 21 and 2
2 shows a state where the input buffer # 1 and the relay buffer # 3 hold the packet C addressed to the output port # 0.

The arbiter unit 3 has output ports 101-1 to 101-1.
It is possible to perform arbitration so that output permission to 01-n is preferentially given to the input buffer unit 1-2 or arbitration so as to give priority to the relay buffer unit 5-4. It is.

For example, when arbitration is controlled so as to give priority to the input buffer section 1-2, output permission to the output port # 0 is given to the input buffer # 1 (see FIG. 21).

When arbitration is controlled so as to give priority to the relay buffer unit 5-4, the relay buffer # 3 is given output permission to the output port # 0 (see FIG. 22).

By giving the output permission to one of the buffer units preferentially, it is possible to reduce the amount of buffer required for the buffer unit given the priority. The embodiments described in detail in the specification and the drawings do not limit the present invention. Further, various modifications within the spirit and scope of the present invention are within the scope of the present invention.

As described above, the input buffer units 1-1 to 1-
n is switched to a target output port 101-1 to 101-n as a unicast packet destined for one of a plurality of branch destinations, and then splitter units 6-1 to 6-n. The loopback transfer is performed to the relay buffer units 5-1 to 5-n by n.
The relay buffer units 5-1 to 5-n also handle the arriving multicast packet as a unicast packet destined for one of a plurality of branch destinations that have not been transferred, and are switched to a target output port. Control.

As described above, in the present invention, the multicast packets are delivered one branch destination at a time, so that the multicast packets arriving at the input buffer units 1-1 to 1-n are sent to the switch switching unit 2 only once. On the input links 200-1 to 200-n. That is, the multicast packets that are copied and generated in the input buffer units 1-1 to 1-n and are originally the same do not waste the bandwidth of the input links 200-1 to 200-n, and interfere with the unicast traffic. It is possible to provide a suppressed multicast function.

In addition, all output ports 101-1 to 101-1 to
1-n is the load ρ
Even when arriving at the input port with M = 100%,
The data is copied and transferred one branch destination at a time while being looped back to the relay buffer units 5-1 to 5-n via the splitter units 6-1 to 6-n.

Therefore, it is possible to accommodate the input buffer units 1-1 to 1-n or the relay buffer units 5-1 to 5-n without falling into a constant congestion state. It is possible to provide a multicast function for accommodating a multicast traffic pattern in which the product ρ1 of the average load ρM of the multicast packets arriving at .about.100-n and the average number of branch destinations M exceeds 100%.

Further, the arbiter unit 3 has an output port 1
Output buffer 01-1 to 101-n is set to input buffer unit 1
Arbitration to give priority to -1 to 1-n,
Alternatively, by performing arbitration so as to give priority to the relay buffer units 5-1 to 5-n, it is possible to reduce the buffer amount required for the buffer units to which the priority is given.

Further, input buffer units 1-1 to 1--1
n or the packet input unit 12 of the relay buffer units 5-1 to 5-n refers to the tag information added to the input packet, and sets the destination to the first output destination according to a predetermined output destination order. By processing as a cast packet, the same output destination is always selected for packets arriving continuously on the same connection and having the same branch destination pattern, so copying to all branch destinations while preserving the order relation Enable transfer.

The invention relating to each of the above methods is also applicable to the description relating to the apparatus. Further, the above description is also realized as a machine-readable medium in which a program for causing a computer to execute a corresponding procedure or means is recorded.

The present invention can further take the following aspects in connection with the description of the claims.

(1) A packet switching apparatus having a multicast function of switching a multicast packet having a plurality of switching destinations to all of its branch destinations, including a logical queue for temporarily storing packets arriving at an input port. The input is performed based on the input buffer unit and the contents of a table provided on the input side of the input buffer and storing tag information for specifying a plurality of output ports to be transmitted in accordance with the identifier of the input packet. A first header analysis unit for adding the tag information to the packet, a relay buffer unit including a logical queue for temporarily storing the input packet, and a relay buffer unit provided on the input side of the relay buffer unit and receiving the input packet. By referring to the tag information provided, a packet whose copy transfer has been completed to all branch destinations is identified. A second header analysis unit for discarding, a switch switching unit for switching a packet transmitted from one of the input buffer unit and the relay buffer unit to a predetermined output port, and permitting output to a certain output port. An arbiter unit for determining which input buffer unit or relay buffer unit is to be provided, and a splitter unit provided on the output side of the switch switching unit and copying a plurality of input packets to branch and output the packets. Packet switching device.

(2) The input buffer unit processes a unicast packet having one of a plurality of branch destinations as an output destination with reference to the tag information added to the input packet, The tag information is updated to indicate that it has been transmitted to the output destination, the tag information is updated and stored in a predetermined logical queue, and then transmitted to the predetermined output port via the switch exchange unit. (1) The packet switching device according to (1).

(3) The splitter unit copies a plurality of packets output from the switch switching unit, branches and outputs the plurality of packets, connects one output to an output port, and transfers the other output to the relay buffer unit. The packet switching device according to (1) or (2), wherein the packet switching device is configured to be connected.

(4) The relay buffer unit refers to the tag information added to the input packet and processes it as a unicast packet having any one of a plurality of branch destinations as an output destination. The tag information is updated to indicate that it has been transmitted to the output destination, the tag information is updated and stored in a predetermined logical queue, and then transmitted to the predetermined output port via the switch exchange unit. The packet switching device according to any one of (1) to (3).

(5) The switch switching unit includes 2 × N (N is a positive integer) input links and N output links, and switches a packet input from the input link to a target output link. The packet switching device according to any one of (1) to (4), comprising a switching unit for switching.

(6) The switch switching unit includes N (N is a positive integer) input links and N output links, and switches a packet input from the input link to a target output port. A switching unit, including 2 × N input links and N output links;
The packet switching device according to any one of (1) to (4), further comprising: a concentrator unit for concentrating packets input from the input links to N output links.

(7) The input buffer unit has an independent logical queue for each destination output port, and stores unicast packets having a single branch destination and multicast packets having a plurality of branch destinations without distinction. The packet switching device according to any one of (1) to (6), which is configured as described above.

(8) The input buffer unit according to any one of (1) to (6), wherein the input buffer unit is provided with the logical queue independent for each destination output port for unicast packets and multicast packets. The packet switching device according to any one of the above.

(9) The packet switching device according to any one of (1) to (8), wherein the relay buffer unit is configured to have an independent logical queue for each destination output port.

(10) The arbiter unit may perform arbitration so that output permission to the output port is preferentially given to the input buffer unit. Packet switching equipment.

(11) The arbiter unit may perform arbitration so that output permission to the output port is preferentially given to the relay buffer unit. Packet switching equipment.

(12) At least one of the input buffer unit and the relay buffer unit determines a predetermined output destination among the untransferred branch destinations with reference to the tag information added to the input packet. Process as a unicast packet destined to the first output destination according to the order,
The packet switching device according to any one of (1) to (11), wherein an output destination order is determined in advance for at least one of the input buffer unit and the relay buffer unit or for each multicast connection.

[0138]

As described above, according to the present invention, in a packet switching apparatus having a multicast function of switching a multicast packet having a plurality of switching destinations to all the branch destinations, a packet arriving at an input port is temporarily stored. The stored packet is switched to a target output port, the switched packet is output to the output port, the packet is loop-forwarded to the input side, and the packet is loop-backed to the input side. Accumulates packets and accommodates any multicast traffic pattern without interfering with unicast traffic by discarding packets that are loopbacked to the ingress when they are being switched to the intended switching destination It is possible There is an effect that.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a packet switching device according to one embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a first header analysis unit in FIG. 1;

FIG. 3 is a block diagram illustrating a configuration of a second header analysis unit in FIG. 1;

FIG. 4 is a block diagram illustrating a configuration of an input buffer unit of FIG. 1;

FIG. 5 is a block diagram showing another configuration example of the input buffer unit of FIG. 1;

FIG. 6 is a block diagram illustrating a configuration of a relay buffer unit in FIG. 1;

FIG. 7 is a block diagram illustrating a configuration of a splitter unit in FIG. 1;

FIG. 8 is a block diagram illustrating a configuration of a switch exchange unit in FIG. 1;

FIG. 9 is a block diagram illustrating another configuration example of the switch exchange unit in FIG. 1;

FIG. 10 is a block diagram showing another configuration example of the switch exchange unit in FIG. 1;

FIG. 11 is a state diagram illustrating a multicast process according to an embodiment of the present invention.

FIG. 12 is a state diagram illustrating a multicast process according to an embodiment of the present invention.

FIG. 13 is a state diagram illustrating a multicast process according to an embodiment of the present invention.

FIG. 14 is a state diagram illustrating a multicast process according to an embodiment of the present invention.

FIG. 15 is a state diagram illustrating a multicast process according to an embodiment of the present invention.

FIG. 16 is a state diagram illustrating a multicast process according to an embodiment of the present invention.

FIG. 17 is a state diagram illustrating a multicast process according to an embodiment of the present invention.

FIG. 18 is a state diagram illustrating a multicast process according to an embodiment of the present invention.

FIG. 19 is a flowchart illustrating a multicast process according to an embodiment of the present invention.

FIG. 20 is a flowchart illustrating a multicast process according to an embodiment of the present invention.

FIG. 21 is a diagram for explaining the operation of the arbiter unit of FIG. 1;

FIG. 22 is a diagram for explaining an operation of the arbiter unit of FIG. 1;

FIG. 23 is a block diagram showing a configuration of a conventional packet switching device.

FIG. 24 is a block diagram showing a configuration of an input buffer unit of a conventional packet switching device.

FIG. 25 is a state diagram showing an operation process in the conventional packet switching device.

FIG. 26 is a state diagram showing an operation process in the conventional packet switching device.

[Explanation of symbols]

 1, 1-1 to 1-4 Input buffer unit 2 Switch exchange unit 3 Arbiter unit 4 Control signal line 5, 5-1 to 5-4 Relay buffer unit 6, 6-1 to 6-4 Splitter unit 7, 7- 1-7-4 First Header Analysis Unit 8, 8-1-8-4 Second Header Analysis Unit 11-1-11-n Logical Queue 12 Packet Input Unit 13 Packet Output Unit 21 Switching Unit 22 Concentrator Unit 23 Intersection between transmission paths 24 Transmission path 25 Multiplexer 26 Demultiplexer 31-1 to 31-n Unicast logical queue 41-1 to 41-n Multicast logical queue 71 Flow information database 72 Header processing unit 81 Header processing unit 100, 100-1 to 100-4 Input port 101, 101-1 to 101-4 Output port 200, 200-1 to 200-8, 200- (n + 1) , 200- (n + 2) input link 201, 201-1 to 201-4 output link 202 multiplex link 300, 300-1 to 300-4 relay link

Claims (22)

[Claims] 1. A packet switching device having a multicast function for switching a multicast packet having a plurality of switching destinations to all of its branch destinations, wherein said storage device temporarily stores a packet arriving at an input port; Switch means for switching the packet stored in the storage means to a target output port, and a splitter for outputting the packet switched by the switch means to the output port and loop-back transferring the packet to the input side of the switch means Means, relay storage means provided on the input side of the switch means and storing the packet loop-back transferred by the splitter means, and the packet loop-forward transferred by the splitter means being transferred to all target switching destinations. The packet And a disposal means for discarding the
A packet switching device, wherein the switching means switches the packets respectively stored in the storage means and the relay storage means to a target output port. 2. An addition means provided on the input side of the storage means and for adding tag information for specifying an output destination corresponding to an identifier added to the input packet to the packet, the addition means comprising: Means for processing as a unicast packet destined for any one of a plurality of branch destinations based on tag information added to the packet by the adding means, and provided in the storage means, and Means for updating the tag information of the packet after processing as a unicast packet, wherein the discarding means refers to the tag information to determine whether or not the packet has been transferred to all of the intended switching destinations 2. The packet switching device according to claim 1, wherein: 3. The storage means includes a logical queue for temporarily storing packets arriving at the input port, and refers to the tag information added to the input packet to select a plurality of branch destinations. Processed as a unicast packet with one of them as an output destination, updated the tag information to indicate that it has been transmitted to that output destination, accumulated it in a predetermined logical queue, and then passed through the switch means 3. The packet switching device according to claim 2, wherein the packet switching device is configured to transmit the packet to a predetermined output port. 4. The logical queue is provided independently for each destination output port, and is configured to accumulate unicast packets having a single branch destination and multicast packets having a plurality of branch destinations without distinction. 4. The packet switching device according to claim 3, wherein: 5. The logical queue is provided for a unicast packet having a single branch destination and a multicast packet having a plurality of branch destinations, and is provided independently for each destination output port. Claim 3
The packet switching device according to the above. 6. The splitter means copies a plurality of packets output from the switch means, branches and outputs the plurality of packets, connects one of the branch outputs to the output port, and stores the other of the branch outputs in the relay storage. The packet switching device according to any one of claims 1 to 5, wherein the packet switching device is configured to be connected to means. 7. The relay storage unit includes a logical queue for temporarily storing packets loop-back transferred by the splitter unit, and refers to the tag information added to the input packet to store a plurality of unprocessed packets. After processing as a unicast packet destined for any one of the transfer branch destinations, and updating the tag information to indicate that it has been transmitted to the output destination and storing it in a predetermined logical queue, 7. The packet switching apparatus according to claim 1, wherein the packet is transmitted to a predetermined output port via the switch. 8. The packet switching device according to claim 7, wherein said logical queue is provided independently for each destination output port. 9. At least one of the storage unit and the relay storage unit refers to the tag information added to the input packet and determines a predetermined output destination order among a plurality of untransferred branch destinations. Is processed as a unicast packet addressed to the earliest output destination, and the output destination order is determined in advance for each of at least one of the storage means and the relay storage means and the multicast connection. The packet switching device according to any one of claims 2 to 8, wherein: 10. The switch means includes 2 × N (N is a positive integer) input links and N output links, and switches a packet input from the input link to a target output link. 10. The packet switching device according to claim 1, wherein said packet switching device comprises means. 11. The switch means includes N (N is a positive integer) input links and N output links, and switches a packet input from the input link to a target output port. Means including 2 × N input links and N output links, and means for centralizing packets input from the 2 × N input links to the N output links. 10. The packet switching device according to claim 1, wherein: 12. The switch means includes N (N is a positive integer) input links and N output links, and switches a packet input from the input link to a target output port. Means for centralizing packets input from said 2 × N input links to said N output links, said means comprising: 2 × N input links and N output links; 10. A multiplexing means for multiplexing a packet on a single multiplexed link and a separating means for separating a packet on one multiplexed link into a plurality of links.
The packet switching device according to any one of the above. 13. An apparatus according to claim 1, further comprising arbiter means for deciding which of said storage means and said relay storage means is given output permission to said output port. Packet switching equipment. 14. The packet switching apparatus according to claim 12, wherein said arbiter means performs arbitration so that output permission to said output port is given to said storage means preferentially. 15. The packet switching apparatus according to claim 12, wherein said arbiter means performs arbitration so that output permission to said output port is given to said relay storage means with priority. 16. A multicast control method for a packet switching device having a multicast function for switching a multicast packet having a plurality of switching destinations to all of its branch destinations, wherein the packet arriving at an input port is temporarily stored. Switching the stored packet to a target output port, outputting the switched packet to the output port, and loop-forwarding the packet to the input port, and looping to the input port. Storing multicast packets forwarded back, and discarding the packets loop-forwarded to the input port when the packets have been forwarded to all the intended switching destinations. Method. 17. A step of adding tag information for specifying an output destination corresponding to an identifier added to a packet arriving at the input port to the packet, and a plurality of tag information based on the tag information added to the packet. Discarding the packet, including processing the packet as a unicast packet destined to any one of the branch destinations, and updating the tag information of the packet after processing the packet as the unicast packet. 16. The multicast control method according to claim 15, wherein it is determined whether or not the packet is forwarded to all of the target switching destinations by referring to the tag information. 18. A unicast packet destined for any one of a plurality of branch destinations with reference to the tag information added to the packet arriving at the input port, and the output destination is 17. The multicast control method according to claim 16, wherein the tag information is updated to indicate that transmission has been completed, and then transmitted to a predetermined output port. 19. The step of loop-back transferring the packet to the input port side includes copying the switched packet into a plurality of packets, branching and outputting, outputting one of the branch outputs to the output port, and performing the branch output. 18. The multicast control method according to claim 15, wherein the other is transmitted to the input port side. 20. A unicast packet destined to one of a plurality of untransferred branch destinations with reference to the tag information added to a packet loop-back transferred to the input port side. 19. The multicast according to claim 15, wherein the tag information is updated so as to indicate that transmission has been performed to the output destination, and is transmitted to a predetermined output port. Control method. 21. Referring to the tag information added to an input packet, the lowest number of the plurality of branch destinations to which the output has not yet been output is started from a predetermined start port number. 20. The multicast control method according to claim 16, wherein the output port is processed as a unicast packet. 22. A recording medium recording a multicast control program for causing a packet switching apparatus having a multicast function for switching a multicast packet having a plurality of switching destinations to all branch destinations to perform multicast control. The multicast control program causes the packet switching device to temporarily store packets arriving at an input port, switch the stored packets to a target output port, output the switched packets to the output port, and Is loop-forwarded to the input port side, the input port side stores the loop-forwarded packet, and when the packet loop-forwarded to the input port side is being forwarded to all the intended switching destinations, A recording medium having recorded thereon a multicast control program for discarding packets.