JP2000315652A - Method for crystalizing semiconductor thin film and laser irradiation device - Google Patents

Method for crystalizing semiconductor thin film and laser irradiation device

Info

Publication number
JP2000315652A
JP2000315652A JP11123516A JP12351699A JP2000315652A JP 2000315652 A JP2000315652 A JP 2000315652A JP 11123516 A JP11123516 A JP 11123516A JP 12351699 A JP12351699 A JP 12351699A JP 2000315652 A JP2000315652 A JP 2000315652A
Authority
JP
Japan
Prior art keywords
thin film
divided
region
irradiation
semiconductor thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
JP11123516A
Other languages
Japanese (ja)
Inventor
Masahiro Minegishi
昌弘 峰岸
Hisao Hayashi
久雄 林
Masato Takatoku
真人 高徳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
ST Liquid Crystal Display Corp
Original Assignee
Sony Corp
ST Liquid Crystal Display Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp, ST Liquid Crystal Display Corp filed Critical Sony Corp
Priority to JP11123516A priority Critical patent/JP2000315652A/en
Publication of JP2000315652A publication Critical patent/JP2000315652A/en
Abandoned legal-status Critical Current

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  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PROBLEM TO BE SOLVED: To uniformize crystallinity in an overlapped part and a non-overalpped part, when irradiation areas of laser light are overlapped and a semiconductor thin film having a large area is crystalized. SOLUTION: In this crystalization method, the surface of a substrate 1 is divided along a dividing line DL into a first divided area D1 and a second divided area D2, while a laser light is shaped and an irradiation region R is adjusted so that the respective divided regions D1 and D2 are partly irradiated. The first divided region D1 is repeatedly irradiated by a laser light, while the irradiation region R is scanned parallel to the dividing line DL, and a semiconductor thin film 2 included in the first divided region D1 is crystallized. Likewise, a semiconductor thin film 2 included in the second divided region D2 is crystallized. In this case, the irradiation region R of the laser light emitted to the first divided area D1 and that emitted to the second divided region D2 are overlapped each other on their end parts. An overlapped part W is adjusted in a manner that its width WX parallel to the dividing DL may be 80% or less of a width VX of a non-overlapped part V. In addition, an intensity EW of laser light energy in the overlapped part is controlled to 95% or less of energy concentration EV in the non-overlapped part V.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は半導体薄膜の結晶化
方法及びこの方法に用いるレーザ照射装置に関する。
又、これらの方法及び装置を利用して作成される薄膜ト
ランジスタや表示装置に関する。
The present invention relates to a method for crystallizing a semiconductor thin film and a laser irradiation apparatus used for the method.
Further, the present invention relates to a thin film transistor and a display device manufactured by using these methods and apparatuses.

【0002】[0002]

【従来の技術】薄膜トランジスタの製造工程を低温プロ
セス化する方法の一環として、レーザ光を用いた結晶化
アニールが開発されている。これは、絶縁基板上に成膜
された非晶質シリコンや比較的粒径の小さな多結晶シリ
コンなど非単結晶性の半導体薄膜にレーザ光を照射して
局部的に加熱した後、その冷却過程で半導体薄膜を比較
的粒径の大きな多結晶に転換(結晶化)するものであ
る。この結晶化した半導体薄膜を活性層(チャネル領
域)として薄膜トランジスタを集積形成する。このよう
な結晶化アニールを採用することで薄膜半導体装置の低
温プロセス化が可能になり、耐熱性に優れた高価な石英
基板ではなく、安価なガラス基板が使えるようになる。
2. Description of the Related Art Crystallization annealing using laser light has been developed as a part of a method for lowering the temperature of a manufacturing process of a thin film transistor. This is done by irradiating laser light to a non-single-crystal semiconductor thin film such as amorphous silicon or relatively small-diameter polycrystalline silicon formed on an insulating substrate, heating the film locally, and then cooling it. This converts (crystallizes) the semiconductor thin film into polycrystal having a relatively large particle size. Using the crystallized semiconductor thin film as an active layer (channel region), a thin film transistor is integrated and formed. By adopting such crystallization annealing, a low-temperature process of a thin film semiconductor device can be performed, and an inexpensive glass substrate can be used instead of an expensive quartz substrate having excellent heat resistance.

【0003】結晶化アニールでは、一般に走査方向に沿
ってライン状のレーザ光を部分的に重複させながら間欠
的にパルス照射している。レーザ光をオーバラップさせ
ることにより半導体薄膜の結晶化が比較的均一に行なえ
る。ライン状のレーザ光(ラインビーム)を用いた結晶
化アニールを図14に模式的に示す。ガラス等からなる
絶縁基板1のY方向に沿ってライン状に整形されたレー
ザ光50を半導体薄膜が予め成膜された絶縁基板1の表
面側から照射する。このとき照射領域に対して相対的に
絶縁基板1をX方向に移動する。ここでは、エキシマレ
ーザ光源から放射されたラインビーム50を間欠的かつ
部分的にオーバラップしながら照射している。すなわ
ち、絶縁基板0はラインビーム50に対し相対的にX方
向にステージを介して走査される。ラインビーム50の
幅寸法より小さいピッチでステージをワンショット毎に
移動し、基板1の全体にラインビーム50が照射できる
ようにして結晶化アニールを行なう。
In crystallization annealing, generally, pulsed laser irradiation is performed intermittently while partially overlapping a line of laser light along the scanning direction. By overlapping the laser beams, crystallization of the semiconductor thin film can be performed relatively uniformly. FIG. 14 schematically shows crystallization annealing using a linear laser beam (line beam). A laser beam 50 shaped into a line along the Y direction of the insulating substrate 1 made of glass or the like is irradiated from the surface side of the insulating substrate 1 on which a semiconductor thin film has been formed in advance. At this time, the insulating substrate 1 is moved in the X direction relative to the irradiation area. Here, the line beam 50 emitted from the excimer laser light source is emitted intermittently and partially overlapping. That is, the insulating substrate 0 is scanned relative to the line beam 50 in the X direction via the stage. The stage is moved for each one shot at a pitch smaller than the width dimension of the line beam 50, and crystallization annealing is performed so that the line beam 50 can be applied to the entire substrate 1.

【0004】[0004]

【発明が解決しようとする課題】上述した結晶化アニー
ルに用いるラインビーム(長尺ビーム)の長軸(Y方
向)の長さは、ビーム整形を行なう為の光学系設計やそ
の光学系の調整難度などから現状は200乃至300m
mが限界である。依って、一走査工程(一照射工程)で
アニールできる領域は長尺ビームの長軸の長さで決まっ
てしまい、それ以上の面積を有する基板に対して結晶化
アニールを行なう場合には、長尺ビームを長軸方向(Y
方向)に重ね合わせる必要が出てくる。しかし、この様
な重ね合わせを行なうと、重ね合わせ部分のレーザ光強
度が強くなり過ぎ、結晶性が悪化するので、表示装置に
使用し得る性能の薄膜トランジスタを作成することがで
きない。従って、現状では、長軸寸法が200mmのラ
インビームを用いた場合、対角寸法が12.1インチ以
上のフラットパネル型表示装置を作成することができな
い。
The length of the long axis (Y direction) of the line beam (long beam) used for the above-mentioned crystallization annealing depends on the design of an optical system for shaping the beam and the adjustment of the optical system. 200-300m due to difficulty
m is the limit. Therefore, the region that can be annealed in one scanning step (one irradiation step) is determined by the length of the long axis of the long beam. In the long axis direction (Y
Direction). However, when such superposition is performed, the intensity of the laser beam at the superposed portion becomes too strong and the crystallinity is deteriorated, so that a thin film transistor having a performance usable for a display device cannot be produced. Therefore, at present, when a line beam having a major axis dimension of 200 mm is used, a flat panel display device having a diagonal dimension of 12.1 inches or more cannot be produced.

【0005】良好な表示装置を得る為には、基板全面に
亘って良好な薄膜トランジスタを集積形成することが重
要である。その為には、基板全面に亘って大粒径で且つ
結晶性が均一な多結晶半導体薄膜を作成することが必要
である。しかしながら、現状では前述した様に、大面積
の基板を結晶化アニールする為に、ラインビームを長軸
方向に重ね合わせ照射すると、その重ね合わせ部の結晶
性が悪化してしまい、薄膜トランジスタの性能劣化を引
き起こす。この状態で表示装置を作成すると、重ね合わ
せ部分が画像欠陥として現れてしまう。
In order to obtain a good display device, it is important to form a good thin film transistor over the entire surface of the substrate. For that purpose, it is necessary to form a polycrystalline semiconductor thin film having a large grain size and uniform crystallinity over the entire surface of the substrate. However, at present, as described above, when a large area substrate is subjected to crystallization annealing, when a line beam is overlapped and irradiated in the long axis direction, the crystallinity of the overlapped portion is deteriorated, and the performance of the thin film transistor is deteriorated. cause. If the display device is created in this state, the overlapped portion appears as an image defect.

【0006】[0006]

【課題を解決する為の手段】本発明は、上述した従来の
技術の課題を解決することを目的とし、レーザ光を半導
体薄膜に照射して結晶化アニールを行なう際、レーザ光
の照射領域の重ね合わせ部分の結晶性を悪化させること
なく、均一且つ大粒径の半導体薄膜を基板全面に亘って
得る為の方法及び装置を提供することにある。係る目的
を達成する為に以下の手段を講じた。即ち、予め基板に
成膜された半導体薄膜にレーザ光を照射して結晶化を行
なう為、基板の表面を領域分割して少なくとも第一及び
第二の分割領域を規定する一方、レーザ光を整形して少
なくとも各分割領域を部分的に照射できる様にレーザ光
の照射領域を調整する準備工程と、第一の分割領域に対
して一回以上レーザ光を照射して該第一の分割領域に含
まれる半導体薄膜を結晶化する第一照射工程と、第二の
分割領域に対して一回以上レーザ光を照射して該第二の
分割領域に含まれる半導体薄膜を結晶化する第二照射工
程とを含む半導体薄膜の結晶化方法において、第一の分
割領域に照射されたレーザ光の照射領域と第二の分割領
域に照射されたレーザ光の照射領域は互いに端部で重な
り合っており、照射領域内で重なりの生じる端部の少な
くとも片側におけるレーザ光のエネルギー密度が、重な
りの生じない部分のレーザ光のエネルギー密度に比べ9
5%以下に制御されていることを特徴とする。好ましく
は、前記準備工程はレーザ光の照射領域を所定の長軸に
沿った長尺形状に調整し、前記第一照射工程は第一の分
割領域に対して長軸と直交する短軸に沿って照射領域を
走査しながらレーザ光を繰り返し照射し、前記第二照射
工程は第二の分割領域に対して同じく短軸に沿って照射
領域を走査しながらレーザ光を繰り返し照射し、第一の
分割領域に照射されたレーザ光の照射領域と第二の分割
領域に照射されたレーザ光の照射領域は長尺形状の長軸
方向端部で重なり合っている。
SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems of the prior art, and when performing crystallization annealing by irradiating a semiconductor thin film with a laser beam, a laser beam irradiation region is formed. An object of the present invention is to provide a method and an apparatus for obtaining a uniform and large-diameter semiconductor thin film over the entire surface of a substrate without deteriorating the crystallinity of an overlapped portion. The following measures were taken to achieve this purpose. That is, in order to perform crystallization by irradiating a semiconductor thin film previously formed on a substrate with a laser beam, the surface of the substrate is divided into regions to define at least first and second divided regions, while shaping the laser beam. A preparation step of adjusting a laser light irradiation area so that at least each of the divided areas can be partially irradiated, and irradiating the first divided area with laser light at least once to the first divided area. A first irradiation step of crystallizing the semiconductor thin film included therein, and a second irradiation step of irradiating the second divided region with laser light at least once to crystallize the semiconductor thin film included in the second divided region In the method of crystallizing a semiconductor thin film including the above, the irradiation region of the laser beam irradiated to the first divided region and the irradiation region of the laser light irradiated to the second divided region overlap each other at an end, and Fewer edges with overlapping in the area Both the energy density of the laser beam at one side, compared with the energy density of the laser beam portions causing no overlapping 9
It is characterized by being controlled to 5% or less. Preferably, the preparing step adjusts the irradiation area of the laser beam into a long shape along a predetermined long axis, and the first irradiation step is performed along a short axis orthogonal to the long axis with respect to the first divided area. Repeatedly irradiating laser light while scanning the irradiation area, the second irradiation step repeatedly irradiates laser light while scanning the irradiation area along the short axis to the second divided area, The irradiation region of the laser beam irradiated on the divided region and the irradiation region of the laser beam irradiated on the second divided region are overlapped at the long-axis end portion of the elongated shape.

【0007】又、予め基板に成膜された半導体薄膜にレ
ーザ光を照射して結晶化を行なう為、基板の表面を分割
線に沿って区画し少なくとも第一及び第二の分割領域を
規定する一方、レーザ光を整形して少なくとも各分割領
域を部分的に照射できる様にレーザ光の照射領域を調整
する準備工程と、第一の分割領域に対して照射領域を該
分割線と平行な方向に走査しながら繰り返しレーザ光を
照射して該第一の分割領域に含まれる半導体薄膜を結晶
化する第一照射工程と、第二の分割領域に対して照射領
域を該分割線と平行な方向に走査しながら繰り返しレー
ザ光を照射して該第二の分割領域に含まれる半導体薄膜
を結晶化する第二照射工程とを含む半導体薄膜の結晶化
方法において、第一の分割領域に照射されたレーザ光の
照射領域と第二の分割領域に照射されたレーザ光の照射
領域は互いに端部で重なり合っており、照射領域内で重
なりが生じる端部の少なくとも片方は、該分割線と平行
な幅寸法が、重なりの生じない部分の幅寸法に比べ80
%以下に調整されていることを特徴とする。好ましく
は、前記準備工程はレーザ光の照射領域を該分割線に直
交する方向に沿った長尺形状に調整し、前記第一照射工
程は第一の分割領域に対して該分割線と平行な方向に沿
って照射領域を走査しながらレーザ光を繰り返し照射
し、前記第二照射工程は第二の分割領域に対して同じく
該分割線と平行な方向に沿って照射領域を走査しながら
レーザ光を繰り返し照射し、第一の分割領域に照射され
たレーザ光の照射領域と第二の分割領域に照射されたレ
ーザ光の照射領域は長尺形状の端部で重なり合ってい
る。
Further, in order to perform crystallization by irradiating a semiconductor thin film previously formed on the substrate with a laser beam, the surface of the substrate is partitioned along a dividing line to define at least first and second divided regions. On the other hand, a preparatory step of adjusting the laser light irradiation area so that at least each of the divided areas can be partially irradiated by shaping the laser light, and setting the irradiation area to the first divided area in a direction parallel to the division line A first irradiation step of repeatedly irradiating laser light while scanning to crystallize a semiconductor thin film included in the first divided region, and a direction in which the irradiated region is parallel to the divided line with respect to the second divided region. A second irradiation step of irradiating a laser beam repeatedly while scanning to crystallize the semiconductor thin film included in the second divided region, wherein the first divided region is irradiated with the first divided region. Laser light irradiation area and second The irradiation regions of the laser light applied to the split region overlap each other at the ends, and at least one of the ends where the overlap occurs in the irradiation region has a width dimension parallel to the dividing line, which is a portion where the overlap does not occur. 80 compared to width
% Or less. Preferably, the preparation step adjusts the irradiation area of the laser beam into a long shape along a direction orthogonal to the division line, and the first irradiation step is performed in parallel with the division line with respect to the first division area. The laser beam is repeatedly irradiated while scanning the irradiation area along the direction, and the second irradiation step is to scan the irradiation area along the direction parallel to the division line for the second division area. Are repeatedly irradiated, and the irradiation region of the laser beam irradiated to the first divided region and the irradiation region of the laser beam irradiated to the second divided region are overlapped at the end of the elongated shape.

【0008】又、予め基板に成膜された半導体薄膜にレ
ーザ光を照射して半導体薄膜の結晶化を行なう為、基板
の表面を領域分割して少なくとも第一及び第二の分割領
域が規定された時、レーザ光を整形して少なくとも各分
割領域を部分的に照射できる様にレーザ光の照射領域を
調整する手段と、第一の分割領域に対して一回以上レー
ザ光を照射して該第一の分割領域に含まれる半導体薄膜
を結晶化し、更に第二の分割領域に対して一回以上レー
ザ光を照射して該第二の分割領域に含まれる半導体薄膜
を結晶化する手段とを備えたレーザ照射装置おいて、第
一の分割領域に照射されたレーザ光の照射領域と第二の
分割領域に照射されたレーザ光の照射領域は互いに端部
で重なり合っており、照射領域内で重なりの生じる端部
の少なくとも片側におけるレーザ光のエネルギー密度
を、重なりの生じない部分のレーザ光のエネルギー密度
に比べ95%以下に制御する手段を有することを特徴と
する。
In order to crystallize the semiconductor thin film by irradiating the semiconductor thin film formed on the substrate in advance with a laser beam, at least first and second divided regions are defined by dividing the surface of the substrate into regions. Means for adjusting the laser light irradiation area so that the laser light can be shaped and at least partially irradiate each of the divided areas, and irradiating the laser light once or more to the first divided area. Means for crystallizing the semiconductor thin film included in the first divided region, and further irradiating the second divided region with laser light at least once to crystallize the semiconductor thin film included in the second divided region. In the provided laser irradiation device, the irradiation region of the laser light irradiated to the first divided region and the irradiation region of the laser light irradiated to the second divided region overlap each other at the end, and within the irradiation region At least one side of the overlapping end The energy density of the definitive laser beam, characterized in that it comprises means for controlling 95% or less compared with the energy density of the laser beam portions causing no overlapping.

【0009】又、予め基板に成膜された半導体薄膜にレ
ーザ光を照射して結晶化を行なう為、基板の表面を分割
線に沿って区画し少なくとも第一及び第二の分割領域が
規定された時、レーザ光を整形して少なくとも各分割領
域を部分的に照射できる様にレーザ光の照射領域を調整
する手段と、第一の分割領域に対して照射領域を該分割
線と平行な方向に走査しながら繰り返しレーザ光を照射
して該第一の分割領域に含まれる半導体薄膜を結晶化
し、更に第二の分割領域に対して照射領域を該分割線と
平行な方向に走査しながら繰り返しレーザ光を照射して
該第二の分割領域に含まれる半導体薄膜を結晶化する手
段とを備えたレーザ照射装置おいて、第一の分割領域に
照射されたレーザ光の照射領域と第二の分割領域に照射
されたレーザ光の照射領域は互いに端部で重なり合って
おり、照射領域内で重なりが生じる端部の少なくとも片
方は、該分割線と平行な幅寸法が、重なりの生じない部
分の幅寸法に比べ80%以下となるように調整する手段
を有することを特徴とする。
Further, in order to perform crystallization by irradiating a semiconductor thin film previously formed on a substrate with a laser beam, the surface of the substrate is divided along a dividing line to define at least first and second divided regions. Means for adjusting the irradiation area of the laser beam so that at least each of the divided areas can be partially irradiated by shaping the laser light, and setting the irradiation area with respect to the first divided area in a direction parallel to the division line. The semiconductor thin film included in the first divided region is crystallized by repeatedly irradiating a laser beam while scanning, and the irradiation region is repeatedly scanned with respect to the second divided region in a direction parallel to the dividing line. Means for irradiating a laser beam and crystallizing a semiconductor thin film included in the second divided region, wherein the irradiation region of the laser beam irradiated to the first divided region and the second Irradiation of laser light applied to the divided area The regions overlap each other at the ends, and at least one of the ends where the overlap occurs in the irradiation region is such that the width dimension parallel to the dividing line is 80% or less of the width dimension of the non-overlapping part. It is characterized by having a means for adjusting the distance.

【0010】又、半導体薄膜と、その一面に重ねられた
ゲート絶縁膜と、ゲート絶縁膜を介して半導体薄膜に重
ねられたゲート電極とを含む積層構成を有する薄膜トラ
ンジスタであって、前記半導体薄膜は、基板の上に非晶
質シリコン又は比較的粒径の小さな多結晶シリコンを形
成した後、レーザ光を照射して比較的粒径の大きな多結
晶シリコンに結晶化したものであり、基板の表面を領域
分割して少なくとも第一及び第二の分割領域を規定する
一方、レーザ光を整形して少なくとも各分割領域を部分
的に照射できる様にレーザ光の照射領域を調整した後、
第一の分割領域に対して一回以上レーザ光を照射して該
第一の分割領域に含まれる半導体薄膜を結晶化し、更に
第二の分割領域に対して一回以上レーザ光を照射して該
第二の分割領域に含まれる半導体薄膜を結晶化したもの
であり、第一の分割領域に照射されるレーザ光の照射領
域と第二の分割領域に照射されるレーザ光の照射領域を
互いに端部で重ね合わせた上で、照射領域内で重なりの
生じる端部の少なくとも片側におけるレーザ光のエネル
ギー密度を、重なりの生じない部分のレーザ光のエネル
ギー密度に比べ95%以下に制御して結晶化されたもの
である事を特徴とする。
A thin film transistor having a laminated structure including a semiconductor thin film, a gate insulating film overlaid on one surface thereof, and a gate electrode overlaid on the semiconductor thin film via the gate insulating film, wherein the semiconductor thin film is After forming amorphous silicon or polycrystalline silicon having a relatively small particle size on a substrate, the substrate is irradiated with a laser beam and crystallized into polycrystalline silicon having a relatively large particle size. After dividing the area and defining at least the first and second divided areas, after adjusting the irradiation area of the laser light so that the laser light can be shaped and at least each of the divided areas can be partially irradiated,
The semiconductor thin film included in the first divided region is irradiated with laser light at least once on the first divided region to crystallize, and further irradiated with the laser light at least once on the second divided region. The semiconductor thin film included in the second divided region is crystallized, and the irradiation region of the laser light irradiated to the first divided region and the irradiation region of the laser light irradiated to the second divided region are mutually separated. After overlapping at the end, the crystal is controlled by controlling the energy density of the laser beam on at least one side of the end where the overlap occurs in the irradiation area to 95% or less of the energy density of the laser light on the part where the overlap does not occur. It is characterized by the fact that

【0011】又、半導体薄膜と、その一面に重ねられた
ゲート絶縁膜と、ゲート絶縁膜を介して半導体薄膜に重
ねられたゲート電極とを含む積層構成を有する薄膜トラ
ンジスタであって、前記半導体薄膜は、基板の上に非晶
質シリコン又は比較的粒径の小さな多結晶シリコンを形
成した後、レーザ光を照射して比較的粒径の大きな多結
晶シリコンに結晶化したものであり、基板の表面を分割
線に沿って区画し少なくとも第一及び第二の分割領域を
規定する一方、レーザ光を整形して少なくとも各分割領
域を部分的に照射できる様にレーザ光の照射領域を調整
した後、第一の分割領域に対して照射領域を該分割線と
平行な方向に走査しながら繰り返しレーザ光を照射して
該第一の分割領域に含まれる半導体薄膜を結晶化し、更
に第二の分割領域に対して照射領域を該分割線と平行な
方向に走査しながら繰り返しレーザ光を照射して該第二
の分割領域に含まれる半導体薄膜を結晶化したものであ
り、第一の分割領域に照射されるレーザ光の照射領域と
第二の分割領域に照射されるレーザ光の照射領域を互い
に端部で重ね合わせた上で、照射領域内で重なりが生じ
る端部の少なくとも片方は、該分割線と平行な幅寸法
が、重なりの生じない部分の幅寸法に比べ80%以下と
なるように調整して結晶化されたものである事を特徴と
する。
A thin film transistor having a laminated structure including a semiconductor thin film, a gate insulating film overlaid on one surface thereof, and a gate electrode overlaid on the semiconductor thin film via the gate insulating film, wherein the semiconductor thin film is After forming amorphous silicon or polycrystalline silicon having a relatively small particle size on a substrate, the substrate is irradiated with a laser beam and crystallized into polycrystalline silicon having a relatively large particle size. While defining along the dividing line and defining at least the first and second divided areas, after adjusting the irradiation area of the laser light so as to be able to partially irradiate at least each divided area by shaping the laser light, A laser beam is repeatedly irradiated on the first divided region while scanning the irradiation region in a direction parallel to the division line to crystallize a semiconductor thin film included in the first divided region, and further a second divided region is formed. On the other hand, the semiconductor thin film included in the second divided region is crystallized by repeatedly irradiating laser light while scanning the irradiated region in a direction parallel to the division line, and is irradiated to the first division region. After the irradiation region of the laser beam and the irradiation region of the laser beam irradiated to the second divided region overlap each other at the ends, at least one of the ends where the overlapping occurs in the irradiation region is at least one of the division line. It is characterized in that it is crystallized by adjusting the parallel width dimension to be 80% or less of the width dimension of the portion where no overlap occurs.

【0012】本発明は、基本的に活性層として多結晶半
導体薄膜を用いた薄膜トランジスタを作成する際、減圧
化学気相成長法(LPCVD法)、プラズマCVD法や
スパッタ法などにより得られた非晶質半導体薄膜あるい
は比較的粒径の小さな多結晶半導体薄膜をレーザ光の照
射により比較的粒径の大きな多結晶半導体薄膜に転換す
る。非晶質半導体薄膜などにエキシマレーザ光を照射し
て結晶化する際、たとえば長尺ビームを用いてその照射
領域を短軸方向に走査する。長軸寸法以上の大面積を有
する基板に対して均一な結晶化アニールを行なう場合に
は、基板を領域分割し、各分割領域毎に長尺ビームの走
査工程を行なう。この時、互いに隣り合う分割領域の分
割線に沿って長尺ビームの長軸方向端部に重ね合わせ部
が生じる。本発明では、この重ね合わせ部における長尺
ビームの短軸方向幅寸法を非重ね合わせ部の幅寸法に比
べて80%以下に設定している。あるいは、重ね合わせ
部のエネルギー密度が非重ね合わせ部のエネルギー密度
の95%以下となる様に調整している。場合によっては
上記二つの条件を同時に満たす様にレーザ光を整形して
もよい。尚、重ね合わせ部のエネルギー密度を調整する
場合には、照射領域をオーバーラップさせながら走査す
る繰り返し照射方式に限ることなく、一括で各分割領域
を照射する方式にも適用可能である。又、上記説明では
長尺形状のレーザ光を用いているが、本発明はこれに限
られるものではなく、矩形のレーザ光にも適用可能であ
る。以上の様に重ね合わせ部のレーザ光強度と非重ね合
わせ部のレーザ光強度を相対的に調整することで、基板
全面に亘って均一な多結晶半導体薄膜を作成可能であ
り、高性能な薄膜トランジスタの活性層として充分に使
用できる均一な粒径を持つ多結晶半導体薄膜を大面積の
基板全面に亘って作成することができる。
According to the present invention, when a thin film transistor using a polycrystalline semiconductor thin film as an active layer is basically produced, an amorphous layer obtained by a low pressure chemical vapor deposition method (LPCVD method), a plasma CVD method, a sputtering method, or the like. A high quality semiconductor thin film or a polycrystalline semiconductor thin film having a relatively small grain size is converted into a polycrystalline semiconductor thin film having a relatively large grain size by irradiating a laser beam. When irradiating an amorphous semiconductor thin film or the like with an excimer laser beam for crystallization, for example, a long beam is used to scan the irradiation region in the short axis direction. When performing uniform crystallization annealing on a substrate having a large area not less than the major axis, the substrate is divided into regions, and a long beam scanning step is performed for each divided region. At this time, an overlapping portion is formed at the long-axis end of the long beam along the division line of the adjacent divided regions. In the present invention, the width of the long beam in the short axis direction at the overlapped portion is set to 80% or less of the width at the non-overlapping portion. Alternatively, the energy density of the overlapping portion is adjusted to be 95% or less of the energy density of the non-overlapping portion. In some cases, the laser beam may be shaped so as to satisfy the above two conditions simultaneously. When adjusting the energy density of the superimposed portion, the present invention is not limited to the repetitive irradiation method in which scanning is performed while overlapping the irradiation regions, but may be applied to a method in which each divided region is irradiated collectively. In the above description, a long laser beam is used. However, the present invention is not limited to this, and can be applied to a rectangular laser beam. As described above, by relatively adjusting the laser light intensity of the superposed portion and the laser light intensity of the non-superposed portion, a uniform polycrystalline semiconductor thin film can be formed over the entire surface of the substrate, and a high-performance thin film transistor A polycrystalline semiconductor thin film having a uniform particle size, which can be sufficiently used as an active layer, can be formed over the entire surface of a large-area substrate.

【0013】[0013]

【発明の実施の形態】以下図面を参照して本発明の実施
の形態を詳細に説明する。図1は、本発明に係る半導体
薄膜の結晶化方法の一例を表わした模式図である。予め
基板1に成膜された半導体薄膜2にレーザ光を照射して
結晶化を行なう為、基板のサイズに合わせた準備工程を
行なう。具体的には(a)に示す様に、基板1の表面を
分割線DLに沿って区画し少くとも第一分割領域D1及
び第二分割領域D2を規定する。尚、基板1のサイズが
更に大きい場合には第三分割領域、第四分割領域・・・
を設ける。一方、レーザ光を整形して少くとも各分割領
域Dを部分的に照射できる様にレーザ光の照射領域Rを
調整する。ここで第一照射工程を行ない、第一分割領域
D1に対して照射領域Rを分割線DLと平行な方向に走
査しながら繰り返しレーザ光を照射して、第一分割領域
D1に含まれる半導体薄膜2を結晶化する。この第一照
射工程で結晶化された半導体薄膜2の部分が(b)に模
式的に示されている。続いて第二照射工程を行ない、第
二分割領域D2に対して照射領域Rを分割線DLと平行
な方向に走査しながら繰り返しレーザ光を照射して第二
分割領域D2に含まれる半導体薄膜2を結晶化する。こ
の第二照射工程で結晶化された半導体薄膜2の部分が
(c)に模式的に示されている。ここで、第一分割領域
D1に照射されたレーザ光の照射領域Rと第二分割領域
D2に照射されたレーザ光の照射領域Rは互いに端部で
重なり合っている。(c)では、重なり部Wをハッチン
グで示してある。一方、ハッチングが付されていない部
分は非重なり部Vである。隣り合う分割領域D1,D2
に跨がる重なり部Wは照射領域Rの位置誤差を吸収する
為に設けられている。本発明の特徴事項として、(d)
に示す様に、照射領域R内で重なりが生じる端部の少く
とも片方は、分割線DLと平行な幅寸法WXが、重なり
の生じない部分の幅寸法VXに比べ80%以下に調整さ
れている。これにより、重なり部Wと非重なり部Vの間
のレーザ光強度を相対的に調節している。あるいは
(e)に示す様に、照射領域R内で重なりの生じる端部
の少くとも片側におけるレーザ光エネルギー密度EW
を、重なりの生じない部分のレーザ光エネルギー密度E
Vに比べ95%以下に制御してもよい。これでも、重な
り部Wと非重なり部Vとの間のレーザ光強度を相対的に
調節可能である。
Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a schematic diagram illustrating an example of a method for crystallizing a semiconductor thin film according to the present invention. In order to crystallize the semiconductor thin film 2 previously formed on the substrate 1 by irradiating the semiconductor thin film 2 with a laser beam, a preparation process according to the size of the substrate is performed. Specifically, as shown in (a), the surface of the substrate 1 is sectioned along the division line DL to define at least a first division region D1 and a second division region D2. If the size of the substrate 1 is even larger, the third divided area, the fourth divided area,...
Is provided. On the other hand, the laser light irradiation region R is adjusted so that the laser light is shaped and at least each of the divided regions D can be partially irradiated. Here, the first irradiation step is performed, and the first divided region D1 is repeatedly irradiated with laser light while scanning the irradiation region R in a direction parallel to the division line DL, so that the semiconductor thin film included in the first divided region D1 is irradiated. 2 is crystallized. The portion of the semiconductor thin film 2 crystallized in the first irradiation step is schematically shown in FIG. Subsequently, a second irradiation step is performed. The semiconductor thin film 2 included in the second divided region D2 is repeatedly irradiated with laser light while scanning the irradiated region R in a direction parallel to the division line DL with respect to the second divided region D2. Is crystallized. The portion of the semiconductor thin film 2 crystallized in the second irradiation step is schematically shown in FIG. Here, the irradiation region R of the laser beam irradiated on the first divided region D1 and the irradiation region R of the laser beam irradiated on the second divided region D2 overlap each other at the ends. In (c), the overlapping portion W is indicated by hatching. On the other hand, the portions not hatched are non-overlapping portions V. Neighboring divided areas D1, D2
Is provided to absorb the position error of the irradiation region R. As a feature of the present invention, (d)
As shown in (1), at least one of the ends where the overlap occurs in the irradiation region R is such that the width WX parallel to the dividing line DL is adjusted to 80% or less of the width VX of the portion where the overlap does not occur. I have. Thereby, the laser beam intensity between the overlapping portion W and the non-overlapping portion V is relatively adjusted. Alternatively, as shown in (e), the laser beam energy density EW on at least one side of the end where the overlap occurs in the irradiation region R.
Is the laser light energy density E of the portion where no overlap occurs.
V may be controlled to 95% or less. Even in this case, the laser beam intensity between the overlapping portion W and the non-overlapping portion V can be relatively adjusted.

【0014】図1に示した実施形態では、レーザ光の照
射領域Rを分割線DLに直交する方向(Y方向、長軸)
に沿った長尺形状に形成している。この場合、第一照射
工程では、(a)に示す様に第一分割領域D1に対して
分割線DLと平行な方向(X方向、短軸)に沿って照射
領域Rを走査しながらレーザ光を繰り返し照射してい
る。又第二照射工程では(b)に示す様に、第二分割領
域D2に対して同じく分割線DLと平行な方向に沿って
照射領域Rを走査しながらレーザ光を繰り返し照射(オ
ーバーラップ照射)している。この結果、(c)に示す
様に、第一分割領域D1に照射されたレーザ光の照射領
域Rと第二分割領域D2に照射されたレーザ光の照射領
域Rは長尺形状の端部で重なり合っていることになる。
尚、上述したオーバーラップ照射では、長尺ビームを短
軸方向(X方向)にオーバーラップさせる様に送りピッ
チを決めて走査している。短軸方向のビーム幅VXに対
してどの位オーバーラップを掛けるかを示すのがオーバ
ーラップ率OLであり、OL=(短軸ビーム幅−短軸送
りピッチ)/短軸ビーム幅×100%で表わされる。例
えば、OL=90%の場合、前の照射領域Rに対してそ
の次の照射領域Rは90%重なっており、照射を10回
繰り返すことで、照射領域Rはその短軸幅分だけ移動す
ることになる。
In the embodiment shown in FIG. 1, the irradiation region R of the laser beam is set in a direction perpendicular to the division line DL (Y direction, major axis).
Is formed in a long shape along. In this case, in the first irradiation step, as shown in (a), the laser light is scanned while scanning the irradiation area R along the direction (X direction, short axis) parallel to the division line DL with respect to the first division area D1. Is repeatedly irradiated. In the second irradiation step, as shown in (b), the second divided area D2 is repeatedly irradiated with laser light while scanning the irradiated area R along a direction parallel to the division line DL (overlap irradiation). are doing. As a result, as shown in (c), the irradiation region R of the laser light irradiated to the first divided region D1 and the irradiation region R of the laser light irradiated to the second divided region D2 are long ends. It will be overlapping.
In the overlap irradiation described above, scanning is performed with a feed pitch determined so that long beams overlap in the short axis direction (X direction). The overlap ratio OL indicates how much overlap is applied to the beam width VX in the short axis direction, and OL = (short axis beam width−short axis feed pitch) / short axis beam width × 100%. Is represented. For example, when OL = 90%, the next irradiation area R overlaps the previous irradiation area R by 90%, and the irradiation area R moves by the short axis width by repeating irradiation ten times. Will be.

【0015】図2は本発明に係るレーザ照射装置を示す
模式的なブロック図の一例である。図示する様に、本レ
ーザ照射装置は、レーザ発振器51にて発振したレーザ
光50をアッテネータ52を用いて適当なエネルギー強
度に調節する。勿論、アッテネータ52を使用せずレー
ザ発振器51の出射強度を変えることによって、適当な
エネルギー強度に調整してもよい。ホモジナイザなどを
含む光学系53により、レーザ光50は例えば長尺形状
に整形され、且つ均一化される。この時、重ね合わせ部
の短軸幅が最大短軸幅の80%以下となる様に整形す
る。あるいは、重ね合わせ部のエネルギー密度が非重ね
合わせ部のエネルギー密度の95%以下となる様に調整
してもよい。場合によっては、その両方を同時に満たす
様に整形してもよい。チャンバ54の中のXYステージ
55上に置かれた絶縁基板1にレーザ光50を照射す
る。尚、絶縁基板1の上には予め処理対象となる半導体
薄膜2が成膜されている。チャンバ54内は、窒素雰囲
気、大気雰囲気、その他のガス雰囲気、あるいはドライ
ポンプなどにより作られた真空雰囲気となっている。場
合によっては、チャンバ54を用いずXYステージ55
のみで大気雰囲気下結晶化アニールを行なってもよい。
絶縁基板1の上に例えば非晶質シリコンからなる半導体
薄膜2を適当な方法で成膜しておくと、レーザ光50の
照射により、非晶質シリコンは多結晶シリコンに転換さ
れる。
FIG. 2 is an example of a schematic block diagram showing a laser irradiation apparatus according to the present invention. As shown in the figure, the laser irradiation apparatus adjusts a laser beam 50 oscillated by a laser oscillator 51 to an appropriate energy intensity using an attenuator 52. Of course, the energy intensity may be adjusted to an appropriate one by changing the emission intensity of the laser oscillator 51 without using the attenuator 52. The laser light 50 is shaped into, for example, a long shape and made uniform by the optical system 53 including a homogenizer or the like. At this time, shaping is performed so that the short axis width of the overlapping portion is 80% or less of the maximum short axis width. Alternatively, the energy density of the overlapping portion may be adjusted to be 95% or less of the energy density of the non-overlapping portion. In some cases, it may be shaped so as to satisfy both of them at the same time. The insulating substrate 1 placed on the XY stage 55 in the chamber 54 is irradiated with the laser light 50. Note that a semiconductor thin film 2 to be processed is formed on the insulating substrate 1 in advance. The inside of the chamber 54 is a nitrogen atmosphere, an air atmosphere, another gas atmosphere, or a vacuum atmosphere created by a dry pump or the like. In some cases, the XY stage 55 may be used without using the chamber 54.
The crystallization annealing may be performed only in the air atmosphere.
When a semiconductor thin film 2 made of, for example, amorphous silicon is formed on the insulating substrate 1 by an appropriate method, the amorphous silicon is converted into polycrystalline silicon by irradiation with the laser beam 50.

【0016】ここで図3を参照して、長尺ビームの短軸
幅VXの測定方法を二通り説明する。第一の方法では、
図2に示したレーザ照射装置で絶縁基板1の直前に全反
射ミラーを置き、長尺ビームを切り出す。この長尺ビー
ムをCCDビームプロファイラーに取り込む。CCDビ
ームプロファイラーを長尺ビームの長軸方向にスキャン
することにより、全てのビームプロファイルを取り込む
ことができる。取り込まれたビームプロファイルは画像
処理を施すことにより短軸幅VXを測定することが可能
である。(a)にCCDビームプロファイラーで作成さ
れた長尺ビームのプロファイルを示す。ここで短軸幅V
Xは(a)のプロファイルをX−X面で切り取った際の
断面上で、(b)に示す様に半値幅で定義される。この
短軸幅VXはX−X切断面の位置によりある程度ばらつ
く。ここでは、ばらつきの範囲で最大の値を短軸幅VX
と定義している。第二の測定方法では、図2に示したレ
ーザ照射装置で実際に非晶質シリコンを局部的に多結晶
シリコンに転換し、両者の透過率の違いを利用して光学
顕微鏡などで観察し、(c)の様に実際の観察像から短
軸幅VXを測定する。これら二つの測定方法で求まった
短軸幅VXの絶対値は完全に一致することはないが、本
発明ではそれぞれの方法で測定された最大短軸幅からの
パーセンテージで重ね合わせ部における短軸幅WXの値
を規定しており、測定方法の違い自体は問題とならな
い。
Referring now to FIG. 3, two methods for measuring the short axis width VX of the long beam will be described. In the first method,
With the laser irradiation apparatus shown in FIG. 2, a total reflection mirror is placed just before the insulating substrate 1 to cut out a long beam. This long beam is taken into a CCD beam profiler. By scanning the CCD beam profiler in the long axis direction of the long beam, all beam profiles can be captured. The captured beam profile can be subjected to image processing to measure the short axis width VX. (A) shows a profile of a long beam created by a CCD beam profiler. Where the short axis width V
X is defined by a half width as shown in (b) on a cross section when the profile of (a) is cut along the XX plane. This short axis width VX varies to some extent depending on the position of the XX cut plane. Here, the maximum value in the range of variation is defined as the short axis width VX.
Is defined. In the second measurement method, the amorphous silicon is actually locally converted into polycrystalline silicon by the laser irradiation apparatus shown in FIG. 2, and observation is performed with an optical microscope or the like using the difference in transmittance between the two. As shown in (c), the short axis width VX is measured from the actual observation image. Although the absolute values of the minor axis width VX obtained by these two measurement methods do not completely match, the present invention uses the minor axis width in the overlapped portion as a percentage from the maximum minor axis width measured by each method. The value of WX is specified, and the difference in the measurement method itself does not matter.

【0017】尚、エネルギー密度の測定方法について
は、短軸幅測定用のCCDビームプロファイラーを取り
付けた位置に、エネルギーメーターを取り付けると、ビ
ームのエネルギーを直接測定可能である。CCDビーム
プロファイラーと同様に長軸方向に走査することによ
り、各々のビーム位置でのエネルギー密度を測定でき
る。
As for the method of measuring the energy density, if an energy meter is attached to the position where the CCD beam profiler for measuring the short axis width is attached, the energy of the beam can be directly measured. By scanning in the long axis direction similarly to the CCD beam profiler, the energy density at each beam position can be measured.

【0018】次に、図4、図5及び図6を参照して、重
ね合わせ部のエネルギー密度を非重ね合わせ部のエネル
ギー密度の95%以下に設定すると、重ね合わせ部の結
晶性が改善される理由を説明する。まず図4を参照し
て、オーバーラップ率OLが結晶性に与える影響を説明
する。図4のグラフは、横軸に照射エネルギー密度を取
り、縦軸に結晶性を取ってある。この結晶性はレーザア
ニールにより得られた結晶粒の均一性及びサイズを定量
化したものであり、グラフでは任意メモリで表わしてい
る。グラフ中C80はOL=80%でオーバーラップ照
射した時の結晶性を表わし、C90はOL=90%での
結晶性を表わし、C95はOL=95%における結晶性
を表わしている。OL=80%では、照射エネルギー密
度を380mJ/cm2 に設定することで最良の結晶性
が得られる。OL=90%では最適な照射エネルギー密
度は370mJ/cm2 程度となり、OL=95%で
は、最適照射エネルギー密度は360mJ/cm2 程度
である。この様に、オーバーラップ率OLを80%から
90%更に95%と上げることによって、最適照射エネ
ルギー密度は低下していく。逆に言うと、オーバーラッ
プ率を下げると、良好な結晶性を得る為に高い照射エネ
ルギー密度が必要となる。つまり、図4のグラフではオ
ーバーラップ率を下げると、最適照射エネルギー密度が
右側にシフトする。
Next, referring to FIGS. 4, 5 and 6, when the energy density of the overlapped portion is set to 95% or less of the energy density of the non-overlapping portion, the crystallinity of the overlapped portion is improved. Explain why. First, the influence of the overlap ratio OL on crystallinity will be described with reference to FIG. In the graph of FIG. 4, the irradiation energy density is plotted on the horizontal axis, and the crystallinity is plotted on the vertical axis. This crystallinity quantifies the uniformity and size of crystal grains obtained by laser annealing, and is represented by an arbitrary memory in the graph. In the graph, C80 represents the crystallinity when the overlap irradiation is performed at OL = 80%, C90 represents the crystallinity at OL = 90%, and C95 represents the crystallinity at OL = 95%. When OL = 80%, the best crystallinity can be obtained by setting the irradiation energy density to 380 mJ / cm 2 . When OL = 90%, the optimum irradiation energy density is about 370 mJ / cm 2 , and when OL = 95%, the optimum irradiation energy density is about 360 mJ / cm 2 . As described above, by increasing the overlap ratio OL from 80% to 90% and further to 95%, the optimum irradiation energy density decreases. Conversely, if the overlap ratio is reduced, a high irradiation energy density is required to obtain good crystallinity. That is, in the graph of FIG. 4, when the overlap ratio is reduced, the optimum irradiation energy density shifts to the right.

【0019】次に、重ね合わせ部の短軸幅を特に工夫し
てない従来の照射方法を用いた場合の重ね合わせ部と非
重ね合わせ部の結晶性の違いを図5のグラフに示す。グ
ラフ中CWが重ね合わせ部の結晶性を表わし、CVが非
重ね合わせ部の結晶性を表わしている。尚、このグラフ
で得られたデータはOL=95%とした場合の結晶性で
ある。従って、図4のC95と図5のCVは一致してお
り、最適な照射エネルギー密度が360mJ/cm2
ある。一方、OL=95%とした場合、重ね合わせ部C
Wにおける最適な照射エネルギー密度は350mJ/c
2 である。換言すると、重ね合わせにより最適照射エ
ネルギー密度は左側にシフトする。ここで、非重ね合わ
せ部の結晶性を重視して照射エネルギー密度を設定する
と、重ね合わせ部の結晶性は低下してしまう。これが、
従来重ね合わせ部の結晶性が劣化し画像欠陥を引き起こ
していた原因である。 そこで、本発明では、重ね合わ
せ部のエネルギー密度を非重ね合わせ部のエネルギー密
度の95%以下に下げた光学系を用いてレーザアニール
を行なっている。その結果としての重ね合わせ部と非重
ね合わせ部の結晶性の違いを図6に示しす。グラフから
明らかな様に、重ね合わせ部と非重ね合わせ部がほぼ同
じピークを示している。これは、エネルギー密度を下げ
ることによって結晶性を下げる要素(右にシフト)と、
重ね合わせることによって左にシフトする要素が丁度打
ち消し合ったことによるものと考えられる。換言する
と、重ね合わせ部では非重ね合わせ部に比べエネルギー
照射回数が二倍となるので、このままではエネルギーが
過剰になってしまう。そこで、本発明では重ね合わせ部
のエネルギー密度よりも非重ね合わせ部のエネルギー密
度を低くすることで、両者の間のバランスを取ってい
る。ところで、通常の照射条件は例えば350mJ/c
2 程度である。この時、その95%のエネルギーは約
330mJ/cm2 となる。つまり、重ね合わせ部と非
重ね合わせ部のエネルギー密度の違いは20mJ/cm
2 となる。もし、これ以下のエネルギー密度の差しかな
いと、本発明の効果を期待できなくなってしまう。
Next, the graph of FIG. 5 shows the difference in crystallinity between the superposed portion and the non-superposed portion when using the conventional irradiation method in which the short axis width of the superposed portion is not particularly devised. In the graph, CW represents the crystallinity of the overlapped portion, and CV represents the crystallinity of the non-overlapped portion. The data obtained in this graph is the crystallinity when OL = 95%. Therefore, C95 in FIG. 4 and CV in FIG. 5 match, and the optimum irradiation energy density is 360 mJ / cm 2 . On the other hand, when OL = 95%, the overlapping portion C
The optimal irradiation energy density in W is 350 mJ / c
m 2 . In other words, the superimposition shifts the optimum irradiation energy density to the left. Here, if the irradiation energy density is set with emphasis on the crystallinity of the non-overlapping portion, the crystallinity of the overlapping portion decreases. This is,
This is the cause of the deterioration of the crystallinity of the superposed portion and the occurrence of image defects. Therefore, in the present invention, laser annealing is performed using an optical system in which the energy density of the superposed portion is reduced to 95% or less of the energy density of the non-superposed portion. FIG. 6 shows the resulting difference in crystallinity between the superposed portion and the non-superposed portion. As is clear from the graph, the overlapped portion and the non-overlaid portion show almost the same peak. This is a factor that lowers the crystallinity by lowering the energy density (shift right),
This is probably due to the fact that the elements shifted to the left by the superposition have just canceled each other. In other words, the number of times of energy irradiation is twice as large in the superimposed portion as in the non-superimposed portion, so that the energy is excessive in this state. Therefore, in the present invention, the balance between the two is achieved by lowering the energy density of the non-overlapping portion than that of the overlapping portion. By the way, the normal irradiation condition is, for example, 350 mJ / c.
m 2 . At this time, 95% of the energy is about 330 mJ / cm 2 . That is, the difference in energy density between the superposed portion and the non-superposed portion is 20 mJ / cm.
It becomes 2 . If the energy density is lower than this, the effect of the present invention cannot be expected.

【0020】重ね合わせ部の短軸幅をその最大値の80
%以下に設定した場合における、重ね合わせ部と非重ね
合わせ部の結晶性の違いも、図6のグラフと同様に、重
ね合わせ部と非重ね合わせ部がほぼ同じピークを示す。
これは、重ね合わせることにより、左へシフトする要素
と、重ね合わせ部の短軸幅を短くしたことによってこの
部分のオーバーラップ率が実効的に低下し右にシフトす
る要素とが、丁度打ち消し合ったことによるものと考え
られる。ところで、通常の照射条件では短軸幅は500
μm程度で、95%のオーバーラップを掛ける。これは
25μmの送りピッチを意味する。この時、重ね合わせ
部の短軸幅をその最大値(ここでは500μm)の80
%とすると、400μmになる。この部分のオーバーラ
ップ率を計算すると約94%になる。つまり、重ね合わ
せ部の短軸幅はその最大値の80%以下にしないと、オ
ーバーラップ率に与える影響はほとんど無くなり、本発
明の効果は期待できなくなってしまう。尚、長尺ビーム
の場合、重ね合わせ部は長軸方向両端に現れる。本発明
では、この両端の短軸幅を最大値の80%以下に設定す
るか、あるいは両端部のエネルギー密度を95%以下に
設定している。しかし、片側の端部のみでも同様の効果
が期待できることは明らかである。
The width of the short axis of the overlapped portion is set to its maximum value of 80.
The difference in crystallinity between the superimposed portion and the non-overlapping portion when the ratio is set to not more than% also shows substantially the same peak in the superimposed portion and the non-overlapping portion as in the graph of FIG.
This is because the element that shifts to the left by overlapping and the element that shifts to the right due to the reduced overlap ratio of this part due to the shortened short axis width of the overlapping part just cancel each other out. This is probably due to By the way, under normal irradiation conditions, the short axis width is 500
Apply a 95% overlap at about μm. This means a feed pitch of 25 μm. At this time, the width of the short axis of the overlapping portion is set to the maximum value (here, 500 μm) of 80.
%, It is 400 μm. When the overlap ratio of this portion is calculated, it is about 94%. That is, unless the width of the short axis of the overlapped portion is set to 80% or less of the maximum value, the influence on the overlap ratio is almost eliminated, and the effect of the present invention cannot be expected. In the case of a long beam, overlapping portions appear at both ends in the long axis direction. In the present invention, the width of the short axis at both ends is set to 80% or less of the maximum value, or the energy density at both ends is set to 95% or less. However, it is clear that a similar effect can be expected only at one end.

【0021】図7は、長尺ビームの端部における短軸幅
を80%以下に調整する為の具体的な手段の一例を表わ
している。図2に示したレーザ照射装置においては、ホ
モジナイザなどの光学系53を用いて整形するが、それ
でも短軸プロファイルは(a)の様に、両側にある程度
のテールを引いている。端部においてこれ以上の急峻な
プロファイルが必要な場合は物理的なスリット535を
使う。これによる効果を(b)に示す。この様にスリッ
ト535を使うことで所望の短軸幅WXを得ることがで
きる。この様にして長尺ビームの少くとも片方の端部に
スリット535を適用することで、(c)に示す様に、
重ね合わせ部Wにおける短軸幅WXを非重ね合わせ部V
における最大短軸幅VXの80%以下とすることが可能
である。
FIG. 7 shows an example of specific means for adjusting the width of the short axis at the end of the long beam to 80% or less. In the laser irradiation apparatus shown in FIG. 2, shaping is performed using an optical system 53 such as a homogenizer, but the short axis profile still has some tails on both sides as shown in FIG. If a sharper profile is required at the end, a physical slit 535 is used. The effect of this is shown in FIG. By using the slit 535 in this manner, a desired short axis width WX can be obtained. By applying the slit 535 to at least one end of the long beam in this way, as shown in FIG.
The width WX of the short axis in the overlapping portion W is changed to the non-overlapping portion V.
Can be set to 80% or less of the maximum short axis width VX in the above.

【0022】図8は、長尺ビームの端部におけるエネル
ギー密度を95%以下に制御する為の具体的な手段の一
例を表わしている。図8は、図2に示したレーザ照射装
置のホモジナイザ等光学系53の一部を拡大図示したも
のである。ホモジナイザは第一のフライアイレンズ53
1、第二のフライアイレンズ532及び集光レンズ53
3を用いて、長尺ビームの均一化を図っている。ここで
第二のフライアイレンズ532を第一のフライアイレン
ズ531に対して矢印の様にずらすと、結像面における
重なりもずれ、結果として長軸方向の両端でエネルギー
密度の低いプロファイルが得られる。ずれ量を制御する
ことで、端部に対して最大値の95%のエネルギー密度
を持たせることが可能である。ホモジナイザやその他の
光学系の調整によっては、長軸方向両端部の内片側のみ
のエネルギー密度を95%以下とすることも可能であ
る。
FIG. 8 shows an example of specific means for controlling the energy density at the end of the long beam to 95% or less. FIG. 8 is an enlarged view of a part of an optical system 53 such as a homogenizer of the laser irradiation apparatus shown in FIG. The homogenizer is the first fly-eye lens 53
1. Second fly-eye lens 532 and condenser lens 53
3, the long beam is made uniform. Here, when the second fly-eye lens 532 is shifted with respect to the first fly-eye lens 531 as shown by an arrow, the overlap on the image plane also shifts, and as a result, a profile with low energy density is obtained at both ends in the major axis direction. Can be By controlling the amount of deviation, it is possible to give the end an energy density of 95% of the maximum value. Depending on the adjustment of the homogenizer and other optical systems, it is also possible to make the energy density of only one of the inner ends at both ends in the long axis direction 95% or less.

【0023】図9は、本発明に係る半導体薄膜の結晶化
方法の他の例を示す模式的な平面図である。本例では、
長尺状のレーザ光に代え、矩形の照射領域Rを有するレ
ーザ光を用いて、半導体薄膜の結晶化を行なっている。
本例でも、基板の表面を分割線DLに沿って区画し少く
とも第一分割領域D1及び第二分割領域D2を規定する
一方、レーザ光を矩形に整形して少くとも各分割領域D
1,D2を部分的に照射できる様にレーザ光の照射領域
Rを調整している。第一分割領域D1に照射されたレー
ザ光の照射領域Rと第二分割領域D2に照射されるレー
ザ光の照射領域は互いに端部で重なり合っており、重な
りの生じる端部のレーザ光のエネルギー密度が、重なり
の生じない部分のレーザ光のエネルギー密度に比べ95
%以下に制御されている。
FIG. 9 is a schematic plan view showing another example of the method for crystallizing a semiconductor thin film according to the present invention. In this example,
The semiconductor thin film is crystallized using a laser beam having a rectangular irradiation region R instead of a long laser beam.
Also in this example, while dividing the surface of the substrate along the division line DL to define at least the first division region D1 and the second division region D2, the laser beam is shaped into a rectangle and at least each division region D1 is formed.
The irradiation region R of the laser beam is adjusted so that the laser beams 1 and D2 can be partially irradiated. The irradiation region R of the laser beam irradiated on the first divided region D1 and the irradiation region of the laser beam irradiated on the second divided region D2 overlap each other at an end, and the energy density of the laser light at the end where the overlap occurs Is 95 times lower than the energy density of the laser light in the portion where no overlap occurs.
% Or less.

【0024】図10は、本発明に係る半導体薄膜の結晶
化方法の別の実施例を表わしている。本例では、基板1
はD1乃至D6まで6個の分割領域に区画されている。
一方、照射領域Rはほぼ各分割領域Dに対応した寸法を
有しており、先の例の様なオーバーラップ照射ではな
く、一括照射で個々の分割領域Dに含まれる半導体薄膜
を一度に結晶化できる。例えば、第一分割領域D1に対
してレーザ光を照射して第一分割領域D1に含まれる半
導体薄膜を結晶化する第一照射工程を行ない、次に第二
分割領域D2に対してレーザ光を一括照射して第二分割
領域D2に含まれる半導体薄膜を結晶化する第二照射工
程を行なう。第一分割領域D1に照射されたレーザ光の
照射領域Rと第二分割領域D2に照射されたレーザ光の
照射領域Rは互いに端部で重なり合っており、重なりの
生じる端部Wのレーザ光のエネルギー密度が重なりの生
じない中央部分Vのレーザ光のエネルギー密度に比べ9
5%以下に制御されている。
FIG. 10 shows another embodiment of the method for crystallizing a semiconductor thin film according to the present invention. In this example, the substrate 1
Are divided into six divided areas D1 to D6.
On the other hand, the irradiation region R has a size substantially corresponding to each of the divided regions D, and the semiconductor thin film included in each of the divided regions D is crystallized at once by the collective irradiation instead of the overlap irradiation as in the above example. Can be For example, a first irradiation step of irradiating the first divided region D1 with a laser beam to crystallize a semiconductor thin film included in the first divided region D1 is performed, and then applying a laser beam to the second divided region D2. A second irradiation step is performed to crystallize the semiconductor thin film included in the second divided region D2 by collective irradiation. The irradiation region R of the laser beam irradiated on the first divided region D1 and the irradiation region R of the laser beam irradiated on the second divided region D2 overlap each other at the ends, and the laser light of the end W where the overlap occurs is generated. The energy density is 9 times smaller than the energy density of the laser beam in the central portion V where no overlap occurs.
It is controlled to 5% or less.

【0025】図11は、本発明に係る薄膜トランジスタ
の製造方法の一例を示す工程図である。これは、ボトム
ゲート構造の薄膜トランジスタの製造方法を示す。まず
(a)に示すように、ガラス等からなる絶縁基板1の上
にAl,Ta,Mo,W,Cr,Cuまたはこれらの合
金を100乃至200nmの厚みで形成し、パタニング
してゲート電極5に加工する。
FIG. 11 is a process chart showing an example of a method for manufacturing a thin film transistor according to the present invention. This shows a method for manufacturing a thin film transistor having a bottom gate structure. First, as shown in (a), Al, Ta, Mo, W, Cr, Cu or an alloy thereof is formed on an insulating substrate 1 made of glass or the like to a thickness of 100 to 200 nm, and is patterned to form a gate electrode 5. Process into

【0026】次いで(b)に示すように、ゲート電極5
の上にゲート絶縁膜を形成する。本例では、ゲート絶縁
膜はゲート窒化膜3(SiNx )/ゲート酸化膜4(S
iO 2 )の二層構造を用いた。ゲート窒化膜3はSiH
4 ガスとNH3 ガスの混合物を原料気体として用い、プ
ラズマCVD法(PCVD法)で成膜した。尚、プラズ
マCVDに変えて常圧CVD、減圧CVDを用いてもよ
い。本実施例では、ゲート窒化膜3を50nmの厚みで
堆積した。ゲート窒化膜3の成膜に連続してゲート酸化
膜4を約200nmの厚みで成膜する。さらにゲート酸
化膜4の上に連続的に非晶質シリコンからなる半導体薄
膜2を約30乃至80nmの厚みで成膜した。二層構造
のゲート絶縁膜と非晶質半導体薄膜2は成膜チャンバの
真空系を破らず連続成膜した。以上の成膜でプラズマC
VD法を用いた場合には、400乃至450℃の温度で
窒素雰囲気中1時間程度加熱処理を行い、非晶質半導体
薄膜2に含有されていた水素を放出する。いわゆる脱水
素アニールを行なう。次いでレーザ光50を照射し、非
晶質半導体薄膜2を結晶化する。レーザ光50としては
エキシマレーザビームを用いることができる。いわゆる
レーザアニールは600℃以下のプロセス温度で半導体
薄膜を結晶化するための有力な手段である。本実施例で
は、パルス状に励起されたレーザ光50を非晶質半導体
薄膜2に照射して結晶化を行なう。具体的には、基板1
の表面を領域分割して少なくとも第一及び第二の分割領
域を規定する一方、レーザ光50を整形して少なくとも
各分割領域を部分的に照射できる様にレーザ光50の照
射領域を調整する準備工程と、第一の分割領域に対して
一回以上レーザ光50を照射して該第一の分割領域に含
まれる半導体薄膜2を結晶化する第一照射工程と、第二
の分割領域に対して一回以上レーザ光50を照射して該
第二の分割領域に含まれる半導体薄膜2を結晶化する第
二照射工程とを行なう。この際、第一の分割領域に照射
されたレーザ光50の照射領域と第二の分割領域に照射
されたレーザ光50の照射領域は互いに端部で重なり合
っており、照射領域内で重なりの生じる端部の少なくと
も片側におけるレーザ光50のエネルギー密度が、重な
りの生じない部分のレーザ光50のエネルギー密度に比
べ95%以下に制御されている。
Next, as shown in FIG.
A gate insulating film on the substrate. In this example, the gate insulation
The film is a gate nitride film 3 (SiNx) / Gate oxide film 4 (S
iO Two) Was used. The gate nitride film 3 is made of SiH
FourGas and NHThreeUse a gas mixture as the source gas
The film was formed by a plasma CVD method (PCVD method). In addition, Plas
Normal pressure CVD or reduced pressure CVD may be used instead of
No. In this embodiment, the gate nitride film 3 has a thickness of 50 nm.
Deposited. Gate oxidation is performed successively after the formation of the gate nitride film 3.
The film 4 is formed with a thickness of about 200 nm. Further gate acid
Semiconductor thin film made of amorphous silicon continuously on the oxide film 4
The film 2 was formed with a thickness of about 30 to 80 nm. Two-layer structure
Of the gate insulating film and the amorphous semiconductor thin film 2
A continuous film was formed without breaking the vacuum system. With the above film formation, plasma C
When the VD method is used, at a temperature of 400 to 450 ° C.
Heat treatment for about 1 hour in nitrogen atmosphere
The hydrogen contained in the thin film 2 is released. So-called dehydration
Elementary annealing is performed. Next, a laser beam 50 is irradiated,
The crystalline semiconductor thin film 2 is crystallized. As the laser beam 50
An excimer laser beam can be used. So-called
Laser annealing uses semiconductors at process temperatures below 600 ° C
It is a powerful means for crystallizing thin films. In this embodiment
Converts the pulsed laser beam 50 into an amorphous semiconductor
The thin film 2 is irradiated for crystallization. Specifically, the substrate 1
Divided into at least the first and second divided areas
While defining the area, the laser beam 50 is shaped and at least
Irradiation of laser beam 50 so that each divided area can be partially irradiated
Preparatory process to adjust the projection area and the first divided area
By irradiating the laser beam 50 at least once, the laser beam 50 is included in the first divided region.
A first irradiation step for crystallizing the semiconductor thin film 2
The laser beam 50 is irradiated at least once on the divided region of
The second step for crystallizing the semiconductor thin film 2 included in the second divided region
And performing two irradiation steps. At this time, the first divided area is irradiated
Irradiates the irradiated area of the laser beam 50 and the second divided area
The irradiated areas of the laser beam 50 overlap each other at the ends.
At least the end where the overlap occurs in the irradiation area
The energy density of the laser beam 50 on one side is
Compared to the energy density of the laser beam 50 in the area where
The total is controlled to 95% or less.

【0027】(c)に示すように、前工程で結晶化され
た多結晶半導体薄膜2の上に例えばプラズマCVD法で
SiO2 を約100nm乃至300nmの厚みで形成す
る。このSiO2 を所定の形状にパタニングしてストッ
パー膜16に加工する。この場合、裏面露光技術を用い
てゲート電極5と整合するようにストッパー膜16をパ
タニングしている。ストッパー膜16の直下に位置する
多結晶半導体薄膜2の部分はチャネル領域Chとして保
護される。続いて、ストッパー膜16をマスクとしてイ
オンドーピングにより不純物(たとえばP+イオン)を
半導体薄膜2に注入し、LDD領域を形成する。この時
のドーズ量は例えば6×1012乃至5×1013/cm2
である。さらにストッパー膜16及びその両側のLDD
領域を被覆するようにフォトレジストをパタニング形成
したあと、これをマスクとして不純物(たとえばP+イ
オン)を高濃度で注入し、ソース領域S及びドレイン領
域Dを形成する。不純物注入には、例えばイオンドーピ
ングを用いることができる。これは質量分離をかけるこ
となく電界加速で不純物を注入するものであり、本実施
例では1×1015/cm2 程度のドーズ量で不純物を注
入し、ソース領域S及びドレイン領域Dを形成した。
尚、図示しないが、Pチャネルの薄膜トランジスタを形
成する場合には、Nチャネル型薄膜トランジスタの領域
をフォトレジストで被覆したあと、不純物をP+イオン
からB+イオンに切換えドーズ量1×1015/cm2
度でイオンドーピングすればよい。
As shown in FIG. 2C, SiO 2 is formed on the polycrystalline semiconductor thin film 2 crystallized in the previous step to a thickness of about 100 nm to 300 nm by, for example, a plasma CVD method. This SiO 2 is patterned into a predetermined shape and processed into a stopper film 16. In this case, the stopper film 16 is patterned so as to be aligned with the gate electrode 5 using the back surface exposure technique. The portion of the polycrystalline semiconductor thin film 2 located immediately below the stopper film 16 is protected as a channel region Ch. Subsequently, impurities (for example, P + ions) are implanted into the semiconductor thin film 2 by ion doping using the stopper film 16 as a mask to form an LDD region. The dose at this time is, for example, 6 × 10 12 to 5 × 10 13 / cm 2.
It is. Further, the stopper film 16 and the LDD on both sides thereof
After patterning a photoresist so as to cover the region, impurities (for example, P + ions) are implanted at a high concentration using the photoresist as a mask to form a source region S and a drain region D. For example, ion doping can be used for the impurity implantation. This is to implant impurities by electric field acceleration without applying mass separation. In this embodiment, the impurities are implanted at a dose of about 1 × 10 15 / cm 2 to form the source region S and the drain region D. .
Although not shown, in the case of forming a P-channel thin film transistor, after the region of the N-channel thin film transistor is covered with a photoresist, the impurity is switched from P + ions to B + ions and the dose is about 1 × 10 15 / cm 2. Ion doping.

【0028】このあと、多結晶半導体薄膜2に注入され
た不純物を活性化する。尚ここでも、エキシマレーザ光
源を用いたレーザ活性化アニールが行なわれる。即ち、
エキシマレーザのパルスを走査しながらガラス基板1に
照射して、多結晶半導体薄膜2に注入されていた不純物
を活性化する。
Thereafter, the impurities implanted in the polycrystalline semiconductor thin film 2 are activated. Note that also here, laser activation annealing using an excimer laser light source is performed. That is,
The glass substrate 1 is irradiated with a pulse of an excimer laser while scanning, thereby activating the impurities implanted in the polycrystalline semiconductor thin film 2.

【0029】最後に(d)に示すように、SiO2 を約
200nmの厚みで成膜し、層間絶縁膜6とする。層間
絶縁膜6の形成後、SiNx をプラズマCVD法で約2
00乃至400nm成膜し、パシベーション膜(キャッ
プ膜)8とする。この段階で窒素ガス又はフォーミング
ガス中又は真空中雰囲気下で350℃程度の加熱処理を
1時間行い、層間絶縁膜6に含まれる水素原子を半導体
薄膜2中に拡散させる。この後、コンタクトホールを開
口し、Mo,Alなどを200乃至400nmの厚みで
スパッタした後、所定の形状にパタニングして配線電極
7に加工する。さらに、アクリル樹脂などからなる平坦
化層10を1μm程度の厚みで塗布したあと、コンタク
トホールを開口する。平坦化層10の上にITOやIX
O等からなる透明導電膜をスパッタした後、所定の形状
にパタニングして画素電極11に加工する。
Finally, as shown in FIG. 2D, a film of SiO 2 is formed to a thickness of about 200 nm to form an interlayer insulating film 6. After the formation of the interlayer insulating film 6, SiN x is applied for about 2
The passivation film (cap film) 8 is formed to a thickness of 00 to 400 nm. At this stage, heat treatment at about 350 ° C. is performed for one hour in an atmosphere of nitrogen gas, forming gas, or vacuum to diffuse hydrogen atoms contained in the interlayer insulating film 6 into the semiconductor thin film 2. Thereafter, a contact hole is opened, and Mo, Al, or the like is sputtered with a thickness of 200 to 400 nm, and then patterned into a predetermined shape to process the wiring electrode 7. Further, after a flattening layer 10 made of an acrylic resin or the like is applied with a thickness of about 1 μm, a contact hole is opened. ITO or IX on the flattening layer 10
After sputtering a transparent conductive film made of O or the like, it is patterned into a predetermined shape and processed into the pixel electrode 11.

【0030】図12を参照して、本発明に係る薄膜トラ
ンジスタの他の例を説明する。まず(a)に示す様に、
絶縁基板1の上にバッファ層となる二層の下地膜16
a,16bをプラズマCVD法により連続成膜する。一
層目の下地膜16aはSiNxからなり、その膜厚は1
00乃至200nmである。又、二層目の下地膜16b
はSiO2 からなり、その膜厚は同じく100nm乃至
200nmである。このSiO2 からなる下地膜16b
の上に減圧化学気相成長法(LP−CVD法)で多結晶
シリコンからなる半導体薄膜2を40乃至100nmの
厚みで成膜する。続いて、Si+イオンをイオンインプ
ランテーション装置などで電界加速して半導体薄膜2に
注入し、多結晶シリコンを非晶質化させる。尚、一旦多
結晶シリコンを成膜しこれを非晶質化する方法に代え
て、始めから絶縁基板1上に減圧化学気相成長法(LP
−CVD法)又はプラズマCVD法あるいはスパッタ法
などにより、非晶質シリコンからなる半導体薄膜2を堆
積させてもよい。
Referring to FIG. 12, another example of the thin film transistor according to the present invention will be described. First, as shown in (a),
Two-layer base film 16 serving as a buffer layer on insulating substrate 1
a and 16b are continuously formed by a plasma CVD method. The first underlayer 16a is made of SiN x and has a thickness of 1.
00 to 200 nm. Also, the second-layer underlayer 16b
Is made of SiO 2 , and its film thickness is also 100 nm to 200 nm. This base film 16b made of SiO 2
A semiconductor thin film 2 made of polycrystalline silicon is formed to a thickness of 40 to 100 nm by low pressure chemical vapor deposition (LP-CVD). Subsequently, Si + ions are injected into the semiconductor thin film 2 by accelerating the electric field with an ion implantation apparatus or the like, thereby amorphizing the polycrystalline silicon. Instead of forming a polycrystalline silicon film and amorphizing it, a low pressure chemical vapor deposition method (LP
The semiconductor thin film 2 made of amorphous silicon may be deposited by a (CVD method), a plasma CVD method, a sputtering method, or the like.

【0031】この後、図2に示したレーザ照射装置を用
いて、半導体薄膜2にレーザ光50を照射して結晶化を
行なう。具体的には、基板1の表面を分割線に沿って区
画し少なくとも第一及び第二の分割領域を規定する一
方、レーザ光50を整形して少なくとも各分割領域を部
分的に照射できる様にレーザ光50の照射領域を調整す
る準備工程と、第一の分割領域に対して照射領域を該分
割線と平行な方向に走査しながら繰り返しレーザ光50
を照射して該第一の分割領域に含まれる半導体薄膜2を
結晶化する第一照射工程と、第二の分割領域に対して照
射領域を該分割線と平行な方向に走査しながら繰り返し
レーザ光50を照射して該第二の分割領域に含まれる半
導体薄膜2を結晶化する第二照射工程とを行なう。この
際、第一の分割領域に照射されたレーザ光50の照射領
域と第二の分割領域に照射されたレーザ光50の照射領
域は互いに端部で重なり合っており、照射領域内で重な
りが生じる端部の少なくとも片方は、該分割線と平行な
幅寸法が、重なりの生じない部分の幅寸法に比べ80%
以下に調整されている。
Thereafter, the semiconductor thin film 2 is irradiated with a laser beam 50 by using the laser irradiation apparatus shown in FIG. 2 to perform crystallization. Specifically, the surface of the substrate 1 is sectioned along the dividing line to define at least the first and second divided regions, while shaping the laser beam 50 so that at least each of the divided regions can be partially irradiated. A preparatory step for adjusting the irradiation area of the laser beam 50; and a step of repeatedly scanning the irradiation area with respect to the first division area in a direction parallel to the division line.
A first irradiation step of irradiating the semiconductor thin film 2 included in the first divided region by irradiating the first divided region with a laser beam while scanning the irradiated region with respect to the second divided region in a direction parallel to the division line. A second irradiation step of irradiating light 50 to crystallize the semiconductor thin film 2 included in the second divided region. At this time, the irradiation region of the laser beam 50 irradiated to the first divided region and the irradiation region of the laser beam 50 irradiated to the second divided region overlap each other at an end portion, and overlap occurs in the irradiation region. At least one of the ends has a width dimension parallel to the dividing line of 80% as compared to the width dimension of the non-overlapping part.
It has been adjusted below.

【0032】続いて(b)に示す様に結晶粒が大粒径化
された多結晶シリコンからなる半導体薄膜2をアイラン
ド状にパタニングする。この上に、プラズマCVD法、
常圧CVD法、減圧CVD法、ECR−CVD法、スパ
ッタ法などでSiO2 を50乃至400nm成長させ、
ゲート絶縁膜4とする。ここで必要ならば、Vthイオ
ンインプランテーションを行ない、B+イオンを例えば
ドーズ量0.5×10 12乃至4×1012/cm2 程度で
半導体薄膜2に注入する。この場合の加速電圧は80K
eV程度である。尚、このVthイオンインプランテー
ションはゲート絶縁膜4の成膜前に行なってもよい。次
いでゲート絶縁膜4の上にAl,Ti,Mo,W,T
a,ドープト多結晶シリコンなど、あるいはこれらの合
金を200乃至800nmの厚みで成膜し、所定の形状
にパタニングしてゲート電極5に加工する。次いでP+
イオンを質量分離を用いたイオン注入法で半導体薄膜2
に注入し、LDD領域を設ける。このイオン注入はゲー
ト電極5をマスクとして絶縁基板1の全面に対して行な
う。ドーズ量は6×1012乃至5×1013/cm2 であ
る。尚、ゲート電極5の直下に位置するチャネル領域C
hは保護されており、Vthイオンインプランテーショ
ンで予め注入されたB+イオンがそのまま保持されてい
る。LDD領域に対するイオン注入後、ゲート電極5と
その周囲を被覆する様にレジストパタンを形成し、P+
イオンを質量非分離型のイオンシャワードーピング法で
高濃度に注入し、ソース領域S及びドレイン領域Dを形
成する。この場合のドーズ量は例えば1×1015/cm
2 程度である。尚、ソース領域S及びドレイン領域Dの
形成は質量分離型のイオン注入装置を用いてもよい。こ
の後、半導体薄膜2に注入されたドーパントの活性化処
理を行なう。この活性化処理はレーザアニールで行なう
ことができる。
Subsequently, as shown in FIG.
Semiconductor thin film 2 made of polycrystalline silicon
Pattern in the shape of a letter. On top of this, a plasma CVD method,
Atmospheric pressure CVD, Low pressure CVD, ECR-CVD, Spa
SiOTwo Is grown from 50 to 400 nm,
The gate insulating film 4 is used. If necessary here, Vth
And implant B + ions, for example.
Dose 0.5 × 10 12~ 4 × 1012/ CmTwo About
It is injected into the semiconductor thin film 2. The acceleration voltage in this case is 80K
It is about eV. In addition, this Vth ion implanter
The operation may be performed before forming the gate insulating film 4. Next
Al, Ti, Mo, W, T
a, doped polycrystalline silicon, etc., or a combination thereof
Gold is deposited to a thickness of 200 to 800 nm and has a predetermined shape.
To form a gate electrode 5. Then P +
Semiconductor thin film 2 by ion implantation using mass separation
To provide an LDD region. This ion implantation
Is performed on the entire surface of the insulating substrate 1 using the electrode 5 as a mask.
U. Dose amount is 6 × 1012~ 5 × 1013/ CmTwo In
You. The channel region C located immediately below the gate electrode 5
h is protected, Vth ion implantation
B + ions pre-implanted with
You. After ion implantation into the LDD region, the gate electrode 5
A resist pattern is formed to cover the periphery, and P +
Non-mass separation type ion shower doping method
High concentration implantation to form source region S and drain region D
To achieve. The dose in this case is, for example, 1 × 1015/ Cm
Two It is about. The source region S and the drain region D
For the formation, a mass separation type ion implantation apparatus may be used. This
After that, the activation process of the dopant injected into the semiconductor thin film 2 is performed.
Do the work. This activation process is performed by laser annealing.
be able to.

【0033】最後に(c)に示す様に、ゲート電極5を
被覆する様にPSGなどからなる層間絶縁膜6を成膜す
る。この層間絶縁膜6にコンタクトホールを開口した
後、Al−Siなどをスパッタリングで成膜し、所定の
形状にパタニングして配線電極7に加工する。この配線
電極7を被覆する様に、SiNx をプラズマCVD法で
約200乃至400nm堆積しパシベーション膜(キャ
ップ膜)8とする。この段階で窒素ガス中350℃の温
度下1時間程度アニールし、層間絶縁膜6に含有された
水素を半導体薄膜2に拡散させる。所謂水素化処理を行
ない薄膜トランジスタの特性を改善する。パシベーショ
ン膜8の上にアクリル樹脂などからなる平坦化層10を
約1μmの厚みで塗工後、これにコンタクトホールを開
口する。平坦化層10の上にITOやIXOなどからな
る透明導電膜をスパッタリングし、所定の形状にパタニ
ングして画素電極11に加工する。
Finally, as shown in (c), an interlayer insulating film 6 made of PSG or the like is formed so as to cover the gate electrode 5. After opening a contact hole in the interlayer insulating film 6, Al—Si or the like is formed by sputtering, patterned into a predetermined shape, and processed into a wiring electrode 7. A passivation film (cap film) 8 is formed by depositing SiN x to a thickness of about 200 to 400 nm by a plasma CVD method so as to cover the wiring electrode 7. At this stage, annealing is performed in a nitrogen gas at a temperature of 350 ° C. for about one hour to diffuse the hydrogen contained in the interlayer insulating film 6 into the semiconductor thin film 2. A so-called hydrogenation treatment is performed to improve the characteristics of the thin film transistor. After a flattening layer 10 made of acrylic resin or the like is applied on the passivation film 8 to a thickness of about 1 μm, a contact hole is opened in the flattening layer 10. A transparent conductive film made of ITO, IXO, or the like is sputtered on the flattening layer 10, patterned into a predetermined shape, and processed into the pixel electrode 11.

【0034】最後に図13を参照して本発明に従って製
造した薄膜トランジスタを用いたアクティブマトリクス
型表示装置の一例を説明する。図示するように、本表示
装置は一対の絶縁基板101,102と両者の間に保持
された電気光学物質103とを備えたパネル構造を有す
る。電気光学物質103としては、例えば液晶材料を用
いる。下側の絶縁基板101には画素アレイ部104と
駆動回路部とが集積形成されている。駆動回路部は垂直
スキャナ105と水平スキャナ106とに分かれてい
る。また、絶縁基板101の周辺部上端には外部接続用
の端子部107が形成されている。端子部107は配線
108を介して垂直スキャナ105及び水平スキャナ1
06に接続している。画素アレイ部104には行状のゲ
ート配線109と列状の信号配線110が形成されてい
る。両配線の交差部には画素電極111とこれを駆動す
る薄膜トランジスタ112が形成されている。薄膜トラ
ンジスタ112のゲート電極は対応するゲート配線10
9に接続され、ドレイン領域は対応する画素電極111
に接続され、ソース領域は対応する信号配線110に接
続している。ゲート配線109は垂直スキャナ105に
接続する一方、信号配線110は水平スキャナ106に
接続している。画素電極111をスイッチング駆動する
薄膜トランジスタ112及び垂直スキャナ105と水平
スキャナ106に含まれる薄膜トランジスタは、本発明
に従って作製されたものである。更には、垂直スキャナ
や水平スキャナに加え、ビデオドライバやタイミングジ
ェネレータも絶縁基板101内に集積形成することも可
能である。
Finally, an example of an active matrix type display device using thin film transistors manufactured according to the present invention will be described with reference to FIG. As shown, the display device has a panel structure including a pair of insulating substrates 101 and 102 and an electro-optical material 103 held between the two. As the electro-optical material 103, for example, a liquid crystal material is used. On the lower insulating substrate 101, a pixel array section 104 and a drive circuit section are integrally formed. The drive circuit is divided into a vertical scanner 105 and a horizontal scanner 106. Further, a terminal portion 107 for external connection is formed at an upper end of a peripheral portion of the insulating substrate 101. The terminal unit 107 is connected to the vertical scanner 105 and the horizontal scanner 1 via a wiring 108.
06. A row-shaped gate wiring 109 and a column-shaped signal wiring 110 are formed in the pixel array unit 104. A pixel electrode 111 and a thin film transistor 112 for driving the pixel electrode 111 are formed at the intersection of the two wires. The gate electrode of the thin film transistor 112 is
9 and the drain region is connected to the corresponding pixel electrode 111
, And the source region is connected to the corresponding signal wiring 110. The gate wiring 109 is connected to the vertical scanner 105, while the signal wiring 110 is connected to the horizontal scanner 106. The thin film transistor 112 for switchingly driving the pixel electrode 111 and the thin film transistors included in the vertical scanner 105 and the horizontal scanner 106 are manufactured according to the present invention. Further, in addition to the vertical scanner and the horizontal scanner, a video driver and a timing generator can also be integrated and formed in the insulating substrate 101.

【0035】[0035]

【発明の効果】以上説明したように、本発明によれば、
レーザ光を用いた半導体薄膜の結晶化方法において、重
なり部のレーザ光のエネルギー密度を非重なり部のレー
ザ光のエネルギー密度に比べ95%以下に制御するか、
あるいは重なり部の照射領域幅寸法を非重なり部照射領
域の幅寸法に比べ80%以下に制御することで、大面積
の基板全面に亘って均一な多結晶半導体薄膜が得られ
る。結晶化に用いるレーザ照射装置のレーザ光源もしく
は光学系の規模が小さくても、大面積の表示装置が作成
可能となり、その効果は非常に大きい。
As described above, according to the present invention,
In the method of crystallizing a semiconductor thin film using laser light, the energy density of the laser light in the overlapping portion is controlled to be 95% or less of the energy density of the laser light in the non-overlapping portion,
Alternatively, a uniform polycrystalline semiconductor thin film can be obtained over the entire surface of a large-area substrate by controlling the width of the irradiation region of the overlapping portion to be 80% or less of the width of the irradiation region of the non-overlapping portion. Even if the size of the laser light source or the optical system of the laser irradiation device used for crystallization is small, a display device having a large area can be manufactured, and the effect is very large.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る半導体薄膜の結晶化方法を示す模
式的な平面図である。
FIG. 1 is a schematic plan view showing a method for crystallizing a semiconductor thin film according to the present invention.

【図2】本発明に係るレーザ照射装置の全体構成を示す
ブロック図である。
FIG. 2 is a block diagram showing an overall configuration of a laser irradiation apparatus according to the present invention.

【図3】長尺ビームの短軸幅の定義を説明する為の模式
図である。
FIG. 3 is a schematic diagram for explaining a definition of a short axis width of a long beam.

【図4】レーザ光の照射エネルギー密度と結晶性との関
係を示すグラフである。
FIG. 4 is a graph showing a relationship between laser beam irradiation energy density and crystallinity.

【図5】レーザ光の照射エネルギー密度と結晶性との関
係を示すグラフである。
FIG. 5 is a graph showing the relationship between laser beam irradiation energy density and crystallinity.

【図6】レーザ光の照射エネルギー密度と結晶性との関
係を示すグラフである。
FIG. 6 is a graph showing a relationship between laser beam irradiation energy density and crystallinity.

【図7】本発明に係るレーザ照射装置の要部説明図であ
る。
FIG. 7 is an explanatory view of a main part of a laser irradiation apparatus according to the present invention.

【図8】本発明に係るレーザ照射装置の要部説明図であ
る。
FIG. 8 is an explanatory view of a main part of a laser irradiation apparatus according to the present invention.

【図9】本発明に係る半導体薄膜の結晶化方法の他の実
施例を示す平面図である。
FIG. 9 is a plan view showing another embodiment of the method for crystallizing a semiconductor thin film according to the present invention.

【図10】本発明に係る半導体薄膜の結晶化方法の別の
例を示す平面図である。
FIG. 10 is a plan view showing another example of the method for crystallizing a semiconductor thin film according to the present invention.

【図11】本発明に係る薄膜トランジスタを示す製造工
程図である。
FIG. 11 is a manufacturing process diagram showing a thin film transistor according to the present invention.

【図12】本発明に係る薄膜トランジスタを示す製造工
程図である。
FIG. 12 is a manufacturing process diagram showing a thin film transistor according to the present invention.

【図13】本発明に係る表示装置を示す模式的な斜視図
である。
FIG. 13 is a schematic perspective view showing a display device according to the present invention.

【図14】従来の半導体薄膜の結晶化方法を示す説明図
である。
FIG. 14 is an explanatory view showing a conventional method for crystallizing a semiconductor thin film.

【符号の説明】[Explanation of symbols]

1・・・絶縁基板、2・・・半導体薄膜、4・・・ゲー
ト酸化膜、5・・・ゲート電極、11・・・画素電極、
50・・・レーザ光、51・・・レーザ発振器、52・
・・アッテネータ、53・・・ホモジナイザ等光学系、
55・・・ステージ、DL・・・分割線、D1・・・第
一分割領域、D2・・・第二分割領域、R・・・照射領
域、W・・・重ね合わせ部、V・・・非重ね合わせ部
DESCRIPTION OF SYMBOLS 1 ... Insulating substrate, 2 ... Semiconductor thin film, 4 ... Gate oxide film, 5 ... Gate electrode, 11 ... Pixel electrode,
50: laser light, 51: laser oscillator, 52
..Attenuators, 53, optical systems such as homogenizers,
55: stage, DL: dividing line, D1: first dividing region, D2: second dividing region, R: irradiation region, W: overlapping portion, V ... Non-overlapping part

───────────────────────────────────────────────────── フロントページの続き (72)発明者 林 久雄 愛知県知多郡東浦町緒川上舟木50番地 エ スティ・エルシーディ株式会社内 (72)発明者 高徳 真人 東京都品川区北品川6丁目7番35号 ソニ ー株式会社内 Fターム(参考) 5F052 AA02 BA02 BA04 BA12 BB07 CA04 DA02 DB02 DB03 DB07 HA01 HA06 JA01 JA10 5F110 BB02 CC02 CC08 DD02 DD13 DD14 DD17 EE02 EE03 EE04 EE06 EE23 FF02 FF03 FF09 FF29 FF30 FF32 GG02 GG13 GG25 GG45 GG52 HJ04 HJ13 HJ23 HL03 HL04 HM15 NN02 NN12 NN23 NN27 NN35 PP03 PP05 PP06 PP35 QQ25  ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hisao Hayashi 50st, Estee Elsidi Co., Ltd. 50 Ogawakamifunaki, Higashiura-cho, Chita-gun, Aichi Prefecture No. 35 F-term in Sony Corporation (reference) GG52 HJ04 HJ13 HJ23 HL03 HL04 HM15 NN02 NN12 NN23 NN27 NN35 PP03 PP05 PP06 PP35 QQ25

Claims (10)

【特許請求の範囲】[Claims] 【請求項1】 予め基板に成膜された半導体薄膜にレー
ザ光を照射して結晶化を行なう為、 基板の表面を領域分割して少なくとも第一及び第二の分
割領域を規定する一方、レーザ光を整形して少なくとも
各分割領域を部分的に照射できる様にレーザ光の照射領
域を調整する準備工程と、 第一の分割領域に対して一回以上レーザ光を照射して該
第一の分割領域に含まれる半導体薄膜を結晶化する第一
照射工程と、 第二の分割領域に対して一回以上レーザ光を照射して該
第二の分割領域に含まれる半導体薄膜を結晶化する第二
照射工程とを含む半導体薄膜の結晶化方法において、 第一の分割領域に照射されたレーザ光の照射領域と第二
の分割領域に照射されたレーザ光の照射領域は互いに端
部で重なり合っており、 照射領域内で重なりの生じる端部の少なくとも片側にお
けるレーザ光のエネルギー密度が、重なりの生じない部
分のレーザ光のエネルギー密度に比べ95%以下に制御
されていることを特徴とする半導体薄膜の結晶化方法。
1. A semiconductor thin film previously formed on a substrate is irradiated with a laser beam for crystallization, and the surface of the substrate is divided into regions to define at least a first and a second divided region. A preparatory step of adjusting the irradiation area of the laser light so as to shape the light and at least partially irradiate each of the divided areas; and irradiating the first divided area with the laser light at least once to form the first A first irradiation step of crystallizing a semiconductor thin film included in the divided region; and a second irradiation step of irradiating the second divided region with laser light at least once to crystallize the semiconductor thin film included in the second divided region. In the method for crystallizing a semiconductor thin film including two irradiation steps, the irradiation region of the laser beam irradiated on the first divided region and the irradiation region of the laser light irradiated on the second divided region overlap each other at an end portion. Overlap in the irradiated area At least the energy density of the laser beam at one side, the crystallization method of a semiconductor thin film characterized in that it is controlled to 95% or less compared with the energy density of the laser beam portions causing no overlapping parts.
【請求項2】 前記準備工程はレーザ光の照射領域を所
定の長軸に沿った長尺形状に調整し、前記第一照射工程
は第一の分割領域に対して長軸と直交する短軸に沿って
照射領域を走査しながらレーザ光を繰り返し照射し、前
記第二照射工程は第二の分割領域に対して同じく短軸に
沿って照射領域を走査しながらレーザ光を繰り返し照射
し、第一の分割領域に照射されたレーザ光の照射領域と
第二の分割領域に照射されたレーザ光の照射領域は長尺
形状の長軸方向端部で重なり合っていることを特徴とす
る請求項1記載の半導体薄膜の結晶化方法。
2. The preparation step adjusts an irradiation area of the laser beam into a long shape along a predetermined long axis, and the first irradiation step performs a short axis orthogonal to the long axis on the first divided area. Repeatedly irradiating the laser light while scanning the irradiation area along, the second irradiation step repeatedly irradiates the laser light while scanning the irradiation area along the short axis to the second divided area as well, The irradiation region of the laser beam irradiated to the one divided region and the irradiation region of the laser beam irradiated to the second divided region are overlapped at the long-side end portion of the elongated shape. The crystallization method of a semiconductor thin film according to the above.
【請求項3】 予め基板に成膜された半導体薄膜にレー
ザ光を照射して結晶化を行なう為、 基板の表面を分割線に沿って区画し少なくとも第一及び
第二の分割領域を規定する一方、レーザ光を整形して少
なくとも各分割領域を部分的に照射できる様にレーザ光
の照射領域を調整する準備工程と、 第一の分割領域に対して照射領域を該分割線と平行な方
向に走査しながら繰り返しレーザ光を照射して該第一の
分割領域に含まれる半導体薄膜を結晶化する第一照射工
程と、 第二の分割領域に対して照射領域を該分割線と平行な方
向に走査しながら繰り返しレーザ光を照射して該第二の
分割領域に含まれる半導体薄膜を結晶化する第二照射工
程とを含む半導体薄膜の結晶化方法において、 第一の分割領域に照射されたレーザ光の照射領域と第二
の分割領域に照射されたレーザ光の照射領域は互いに端
部で重なり合っており、 照射領域内で重なりが生じる端部の少なくとも片方は、
該分割線と平行な幅寸法が、重なりの生じない部分の幅
寸法に比べ80%以下に調整されていることを特徴とす
る半導体薄膜の結晶化方法。
3. A semiconductor thin film previously formed on a substrate is irradiated with a laser beam to perform crystallization, so that the surface of the substrate is sectioned along a dividing line to define at least first and second divided regions. On the other hand, a preparation step of shaping the laser beam and adjusting the irradiation region of the laser beam so that at least each of the divided regions can be partially irradiated; A first irradiation step of repeatedly irradiating a laser beam while scanning to crystallize a semiconductor thin film included in the first divided region; and a direction in which the irradiated region is parallel to the divided line with respect to the second divided region. A second irradiation step of repeatedly irradiating a laser beam while scanning to crystallize a semiconductor thin film included in the second divided region, wherein the first divided region is irradiated with the first divided region. Laser light irradiation area and second Irradiation region of laser light applied to the split region are overlapped at the ends to each other, at least one end portion overlapping occurs in the irradiation region,
A method for crystallizing a semiconductor thin film, wherein a width dimension parallel to the dividing line is adjusted to 80% or less of a width dimension of a portion where no overlap occurs.
【請求項4】 前記準備工程はレーザ光の照射領域を該
分割線に直交する方向に沿った長尺形状に調整し、前記
第一照射工程は第一の分割領域に対して該分割線と平行
な方向に沿って照射領域を走査しながらレーザ光を繰り
返し照射し、前記第二照射工程は第二の分割領域に対し
て同じく該分割線と平行な方向に沿って照射領域を走査
しながらレーザ光を繰り返し照射し、第一の分割領域に
照射されたレーザ光の照射領域と第二の分割領域に照射
されたレーザ光の照射領域は長尺形状の端部で重なり合
っていることを特徴とする請求項3記載の半導体薄膜の
結晶化方法。
4. The preparation step adjusts an irradiation area of the laser beam into an elongated shape along a direction orthogonal to the division line, and the first irradiation step performs the first division area on the first division area with the division line. While repeatedly irradiating the laser beam while scanning the irradiation area along the parallel direction, the second irradiation step scans the irradiation area along the direction parallel to the division line for the second division area. Laser light is repeatedly irradiated, and the irradiation area of the laser light applied to the first divided area and the irradiation area of the laser light applied to the second divided area are overlapped at the end of the elongated shape. The method for crystallizing a semiconductor thin film according to claim 3, wherein
【請求項5】 予め基板に成膜された半導体薄膜にレー
ザ光を照射して半導体薄膜の結晶化を行なう為、基板の
表面を領域分割して少なくとも第一及び第二の分割領域
が規定された時、レーザ光を整形して少なくとも各分割
領域を部分的に照射できる様にレーザ光の照射領域を調
整する手段と、 第一の分割領域に対して一回以上レーザ光を照射して該
第一の分割領域に含まれる半導体薄膜を結晶化し、更に
第二の分割領域に対して一回以上レーザ光を照射して該
第二の分割領域に含まれる半導体薄膜を結晶化する手段
とを備えたレーザ照射装置おいて、 第一の分割領域に照射されたレーザ光の照射領域と第二
の分割領域に照射されたレーザ光の照射領域は互いに端
部で重なり合っており、照射領域内で重なりの生じる端
部の少なくとも片側におけるレーザ光のエネルギー密度
を、重なりの生じない部分のレーザ光のエネルギー密度
に比べ95%以下に制御する手段を有することを特徴と
するレーザ照射装置。
5. A semiconductor thin film previously formed on a substrate is irradiated with a laser beam to crystallize the semiconductor thin film. At least first and second divided regions are defined by dividing the surface of the substrate into regions. Means for adjusting the laser light irradiation area so that at least each of the divided areas can be partially irradiated by shaping the laser light, and irradiating the laser light once or more to the first divided area. Means for crystallizing the semiconductor thin film included in the first divided region, and further irradiating the second divided region with laser light at least once to crystallize the semiconductor thin film included in the second divided region. In the laser irradiation device provided, the irradiation region of the laser light irradiated to the first divided region and the irradiation region of the laser light irradiated to the second divided region overlap each other at the ends, and within the irradiation region On at least one side of the overlapping end The laser irradiation apparatus characterized in that it has an energy density of the laser beam, a means for controlling 95% or less compared with the laser beam energy density of the portion causing no overlapping kick.
【請求項6】 予め基板に成膜された半導体薄膜にレー
ザ光を照射して結晶化を行なう為、基板の表面を分割線
に沿って区画し少なくとも第一及び第二の分割領域が規
定された時、レーザ光を整形して少なくとも各分割領域
を部分的に照射できる様にレーザ光の照射領域を調整す
る手段と、 第一の分割領域に対して照射領域を該分割線と平行な方
向に走査しながら繰り返しレーザ光を照射して該第一の
分割領域に含まれる半導体薄膜を結晶化し、更に第二の
分割領域に対して照射領域を該分割線と平行な方向に走
査しながら繰り返しレーザ光を照射して該第二の分割領
域に含まれる半導体薄膜を結晶化する手段とを備えたレ
ーザ照射装置おいて、 第一の分割領域に照射されたレーザ光の照射領域と第二
の分割領域に照射されたレーザ光の照射領域は互いに端
部で重なり合っており、照射領域内で重なりが生じる端
部の少なくとも片方は、該分割線と平行な幅寸法が、重
なりの生じない部分の幅寸法に比べ80%以下となるよ
うに調整する手段を有することを特徴とするレーザ照射
装置。
6. A method for irradiating a semiconductor thin film previously formed on a substrate with a laser beam to perform crystallization, wherein a surface of the substrate is partitioned along a dividing line, and at least a first and a second divided region are defined. Means for adjusting the laser light irradiation area so that at least each of the divided areas can be partially irradiated by shaping the laser light, a direction in which the irradiation area is parallel to the division line with respect to the first divided area. The semiconductor thin film included in the first divided region is crystallized by repeatedly irradiating a laser beam while scanning, and the irradiation region is repeatedly scanned with respect to the second divided region in a direction parallel to the dividing line. Means for irradiating a laser beam and crystallizing a semiconductor thin film included in the second divided region, wherein the irradiation region of the laser beam irradiated to the first divided region and the second Irradiation of laser light applied to divided areas The regions overlap each other at the ends, and at least one of the ends where the overlap occurs in the irradiation area is such that the width dimension parallel to the dividing line is 80% or less of the width dimension of the non-overlapping part. A laser irradiation apparatus, characterized in that the laser irradiation apparatus has means for adjusting the distance.
【請求項7】 半導体薄膜と、その一面に重ねられたゲ
ート絶縁膜と、ゲート絶縁膜を介して半導体薄膜に重ね
られたゲート電極とを含む積層構成を有する薄膜トラン
ジスタであって、 前記半導体薄膜は、基板の上に非晶質シリコン又は比較
的粒径の小さな多結晶シリコンを形成した後、レーザ光
を照射して比較的粒径の大きな多結晶シリコンに結晶化
したものであり、 基板の表面を領域分割して少なくとも第一及び第二の分
割領域を規定する一方、レーザ光を整形して少なくとも
各分割領域を部分的に照射できる様にレーザ光の照射領
域を調整した後、第一の分割領域に対して一回以上レー
ザ光を照射して該第一の分割領域に含まれる半導体薄膜
を結晶化し、更に第二の分割領域に対して一回以上レー
ザ光を照射して該第二の分割領域に含まれる半導体薄膜
を結晶化したものであり、 第一の分割領域に照射されるレーザ光の照射領域と第二
の分割領域に照射されるレーザ光の照射領域を互いに端
部で重ね合わせた上で、照射領域内で重なりの生じる端
部の少なくとも片側におけるレーザ光のエネルギー密度
を、重なりの生じない部分のレーザ光のエネルギー密度
に比べ95%以下に制御して結晶化されたものである事
を特徴とする薄膜トランジスタ。
7. A thin film transistor having a stacked structure including a semiconductor thin film, a gate insulating film overlaid on one surface thereof, and a gate electrode overlaid on the semiconductor thin film via the gate insulating film, wherein the semiconductor thin film is Amorphous silicon or polycrystalline silicon having a relatively small particle size is formed on a substrate, and then irradiated with laser light to be crystallized into polycrystalline silicon having a relatively large particle size. After dividing the area to define at least the first and second divided areas, the laser light is shaped and the irradiation area of the laser light is adjusted so that at least each of the divided areas can be partially irradiated. Irradiating the divided region one or more times with laser light to crystallize the semiconductor thin film included in the first divided region, and further irradiating the second divided region one or more times with laser light to Included in the divided area The semiconductor thin film is crystallized, and the irradiation area of the laser beam applied to the first divided area and the irradiation area of the laser light applied to the second divided area are overlapped at the ends. And that the laser beam is crystallized by controlling the energy density of the laser beam on at least one side of the edge where the overlap occurs in the irradiation region to 95% or less of the energy density of the laser beam on the portion where the overlap does not occur. Characteristic thin film transistor.
【請求項8】 半導体薄膜と、その一面に重ねられたゲ
ート絶縁膜と、ゲート絶縁膜を介して半導体薄膜に重ね
られたゲート電極とを含む積層構成を有する薄膜トラン
ジスタであって、 前記半導体薄膜は、基板の上に非晶質シリコン又は比較
的粒径の小さな多結晶シリコンを形成した後、レーザ光
を照射して比較的粒径の大きな多結晶シリコンに結晶化
したものであり、 基板の表面を分割線に沿って区画し少なくとも第一及び
第二の分割領域を規定する一方、レーザ光を整形して少
なくとも各分割領域を部分的に照射できる様にレーザ光
の照射領域を調整した後、第一の分割領域に対して照射
領域を該分割線と平行な方向に走査しながら繰り返しレ
ーザ光を照射して該第一の分割領域に含まれる半導体薄
膜を結晶化し、更に第二の分割領域に対して照射領域を
該分割線と平行な方向に走査しながら繰り返しレーザ光
を照射して該第二の分割領域に含まれる半導体薄膜を結
晶化したものであり、 第一の分割領域に照射されるレーザ光の照射領域と第二
の分割領域に照射されるレーザ光の照射領域を互いに端
部で重ね合わせた上で、照射領域内で重なりが生じる端
部の少なくとも片方は、該分割線と平行な幅寸法が、重
なりの生じない部分の幅寸法に比べ80%以下となるよ
うに調整して結晶化されたものである事を特徴とする薄
膜トランジスタ。
8. A thin film transistor having a stacked structure including a semiconductor thin film, a gate insulating film overlaid on one surface thereof, and a gate electrode overlaid on the semiconductor thin film via the gate insulating film, wherein the semiconductor thin film is Amorphous silicon or polycrystalline silicon having a relatively small particle size is formed on a substrate, and then irradiated with laser light to be crystallized into polycrystalline silicon having a relatively large particle size. While defining along the dividing line and defining at least the first and second divided areas, after adjusting the irradiation area of the laser light so as to be able to partially irradiate at least each divided area by shaping the laser light, A laser beam is repeatedly irradiated on the first divided region while scanning the irradiation region in a direction parallel to the division line to crystallize a semiconductor thin film included in the first divided region, and further a second divided region is formed. To The semiconductor thin film included in the second divided region is crystallized by repeatedly irradiating a laser beam while scanning the irradiated region in a direction parallel to the division line, and is irradiated to the first division region. After the irradiation region of the laser beam and the irradiation region of the laser beam irradiated to the second divided region overlap each other at the ends, at least one of the ends where the overlapping occurs in the irradiation region is at least one of the division line. A thin film transistor characterized in that the parallel width dimension is adjusted to be 80% or less of the width dimension of a portion where no overlap occurs, and the thin film transistor is crystallized.
【請求項9】 所定の間隙を介して互いに接合した一対
の基板と、該間隙に保持された電気光学物質とを有し、
一方の基板には対向電極を形成し、他方の基板には画素
電極及びこれを駆動する薄膜トランジスタを形成し、該
薄膜トランジスタを、半導体薄膜とその一面にゲート絶
縁膜を介して重ねられたゲート電極とで形成した表示装
置であって、 前記半導体薄膜は、該他方の基板の上に非晶質シリコン
又は比較的粒径の小さな多結晶シリコンを形成した後、
レーザ光を照射して比較的粒径の大きな多結晶シリコン
に結晶化したものであり、 該他方の基板の表面を領域分割して少なくとも第一及び
第二の分割領域を規定する一方、レーザ光を整形して少
なくとも各分割領域を部分的に照射できる様にレーザ光
の照射領域を調整した後、第一の分割領域に対して一回
以上レーザ光を照射して該第一の分割領域に含まれる半
導体薄膜を結晶化し、更に第二の分割領域に対して一回
以上レーザ光を照射して該第二の分割領域に含まれる半
導体薄膜を結晶化したものであり、 第一の分割領域に照射されるレーザ光の照射領域と第二
の分割領域に照射されるレーザ光の照射領域を互いに端
部で重ね合わせた上で、照射領域内で重なりの生じる端
部の少なくとも片側におけるレーザ光のエネルギー密度
を、重なりの生じない部分のレーザ光のエネルギー密度
に比べ95%以下に制御して結晶化されたものであるこ
とを特徴とする表示装置。
9. A semiconductor device comprising: a pair of substrates joined to each other via a predetermined gap; and an electro-optical material held in the gap;
A counter electrode is formed on one substrate, a pixel electrode and a thin film transistor for driving the pixel electrode are formed on the other substrate, and the thin film transistor is formed with a semiconductor thin film and a gate electrode which is superposed on one surface thereof via a gate insulating film. In the display device formed by, in the semiconductor thin film, after forming amorphous silicon or polycrystalline silicon having a relatively small particle size on the other substrate,
A laser beam is irradiated to crystallize into polycrystalline silicon having a relatively large particle diameter. The surface of the other substrate is divided into regions to define at least the first and second divided regions, while the laser light After adjusting the irradiation region of the laser beam so that at least each of the divided regions can be partially irradiated, the first divided region is irradiated with the laser light at least once to the first divided region. A semiconductor thin film included in the second divided region is crystallized, and the semiconductor thin film included in the second divided region is crystallized by irradiating the second divided region with laser light at least once. The irradiation region of the laser beam irradiated to the laser beam and the irradiation region of the laser beam irradiated to the second divided region overlap each other at the ends, and then the laser light on at least one side of the end where the overlap occurs in the irradiation region Energy density Display device comprising control to those that have been crystallized with 95% compared with the energy density of the laser beam portion does not occur below.
【請求項10】 所定の間隙を介して互いに接合した一
対の基板と、該間隙に保持された電気光学物質とを有
し、一方の基板には対向電極を形成し、他方の基板には
画素電極及びこれを駆動する薄膜トランジスタを形成
し、該薄膜トランジスタを、半導体薄膜とその一面にゲ
ート絶縁膜を介して重ねられたゲート電極とで形成した
表示装置であって、 前記半導体薄膜は、該他方の基板の上に非晶質シリコン
又は比較的粒径の小さな多結晶シリコンを形成した後、
レーザ光を照射して比較的粒径の大きな多結晶シリコン
に結晶化したものであり、 該他方の基板の表面を分割線に沿って区画し少なくとも
第一及び第二の分割領域を規定する一方、レーザ光を整
形して少なくとも各分割領域を部分的に照射できる様に
レーザ光の照射領域を調整した後、第一の分割領域に対
して照射領域を該分割線と平行な方向に走査しながら繰
り返しレーザ光を照射して該第一の分割領域に含まれる
半導体薄膜を結晶化し、更に第二の分割領域に対して照
射領域を該分割線と平行な方向に走査しながら繰り返し
レーザ光を照射して該第二の分割領域に含まれる半導体
薄膜を結晶化したものであり、 第一の分割領域に照射されるレーザ光の照射領域と第二
の分割領域に照射されるレーザ光の照射領域を互いに端
部で重ね合わせた上で、照射領域内で重なりが生じる端
部の少なくとも片方は、該分割線と平行な幅寸法が、重
なりの生じない部分の幅寸法に比べ80%以下となるよ
うに調整して結晶化されたものであることを特徴とする
表示装置。
10. A semiconductor device comprising: a pair of substrates joined to each other with a predetermined gap therebetween; and an electro-optical material held in the gap. An opposing electrode is formed on one of the substrates, and a pixel is formed on the other substrate. An electrode and a thin film transistor for driving the electrode are formed, and the thin film transistor is a display device including a semiconductor thin film and a gate electrode stacked on one surface thereof with a gate insulating film interposed therebetween, wherein the semiconductor thin film is the other of the other. After forming amorphous silicon or polycrystalline silicon with a relatively small particle size on the substrate,
A laser beam is irradiated to crystallize the polycrystalline silicon having a relatively large particle size, and the surface of the other substrate is divided along a dividing line to define at least first and second divided regions. After shaping the laser beam and adjusting the irradiation region of the laser beam so that at least each of the divided regions can be partially irradiated, the irradiation region is scanned with respect to the first divided region in a direction parallel to the dividing line. While irradiating the laser light repeatedly, the semiconductor thin film included in the first divided region is crystallized, and further the laser light is repeatedly irradiated on the second divided region while scanning the irradiated region in a direction parallel to the dividing line. Irradiating the semiconductor thin film included in the second divided region with crystallization, and irradiating the laser light irradiated to the first divided region and the laser light irradiated to the second divided region Areas overlap each other at the edges In addition, at least one of the ends where the overlap occurs in the irradiation region is crystallized by adjusting the width dimension parallel to the dividing line to be 80% or less of the width dimension of the part where the overlap does not occur. A display device characterized in that:
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