JP2000277439A - Plasma cvd method for crystalline silicon thin-film and manufacture of silicon thin-film photoelectric conversion device - Google Patents

Plasma cvd method for crystalline silicon thin-film and manufacture of silicon thin-film photoelectric conversion device

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Publication number
JP2000277439A
JP2000277439A JP11081460A JP8146099A JP2000277439A JP 2000277439 A JP2000277439 A JP 2000277439A JP 11081460 A JP11081460 A JP 11081460A JP 8146099 A JP8146099 A JP 8146099A JP 2000277439 A JP2000277439 A JP 2000277439A
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JP
Japan
Prior art keywords
photoelectric conversion
film
silicon
electrode
gas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11081460A
Other languages
Japanese (ja)
Inventor
Kenji Yamamoto
憲治 山本
Hiroko Tawada
裕子 多和田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kanegafuchi Chemical Industry Co Ltd
Original Assignee
Kanegafuchi Chemical Industry Co Ltd
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Application filed by Kanegafuchi Chemical Industry Co Ltd filed Critical Kanegafuchi Chemical Industry Co Ltd
Priority to JP11081460A priority Critical patent/JP2000277439A/en
Publication of JP2000277439A publication Critical patent/JP2000277439A/en
Pending legal-status Critical Current

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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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  • Chemical Vapour Deposition (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To form a film of high-quality crystalline silicon photoelectric conversion layer at a high speed for improved throughput and performance, by calculating the residence period of reactive gas between electrodes from a specific relational expression between the pressure and volume of a reactive vessel and the flow rate of reactive gas for specification between them. SOLUTION: Related to the plasma CVD method, in a film-forming process, a residence period τ (sec) of reactive gas between first and second electrodes 3 and 5 is calculated from τ=(p.v)/Q where the pressure in a reactive vessel 1 is P (Torr), the flow rate of reactive gas is Q (Torr.cm3/sec), and the volume of the reactive vessel 1 is V (cm3). With τ and P set to be 1-10 sec and 5-20 Torr, respectively, Q and V are so selected as to satisfy the expression. Such a plasma CVD method having this relational expression allows a high-quality crystalline silicon thin-film to be film-formed at high speed on a substrate 8.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、シリコン薄膜のプ
ラズマCVD方法およびこのプラズマCVD方法により
結晶質シリコン系薄膜光電変換層を成膜する工程を含む
シリコン系薄膜光電変換装置の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a silicon-based thin film photoelectric conversion device, which includes a step of forming a crystalline silicon-based thin film photoelectric conversion layer by the plasma CVD method for a silicon thin film.

【0002】なお、本明細書において、「結晶質」と
「微結晶」の用語は、部分的に非晶質状態を含むものを
も意昧するものとする。
[0002] In the present specification, the terms "crystalline" and "microcrystal" are intended to include those partially including an amorphous state.

【0003】[0003]

【従来の技術】薄膜光電変換装置の代表的なものとして
非晶質シリコン系太陽電池が知られている。この太陽電
池に用いられる非晶質光電変換材料は、通常200℃前
後の低い成膜温度の下でプラズマCVD法によって形成
できるため、基板としてガラス、ステンレス、有機フィ
ルム等の安価なものを使用できる。その結果、非晶質光
電変換材料は、低コストの光電変換装置を製造するのた
めの有力材料として期待されている。また、非晶質シリ
コンは可視光領域での吸収係数が大きいため、500n
m以下の薄い膜厚の非晶質シリコンからなる光電変換層
を有する太陽電池において15mA/cm2以上の短絡
電流が実現されている。
2. Description of the Related Art An amorphous silicon solar cell is known as a typical thin film photoelectric conversion device. Since the amorphous photoelectric conversion material used for this solar cell can be formed by a plasma CVD method under a low film formation temperature of about 200 ° C., inexpensive materials such as glass, stainless steel, and organic films can be used as the substrate. . As a result, an amorphous photoelectric conversion material is expected as a leading material for manufacturing a low-cost photoelectric conversion device. Further, since amorphous silicon has a large absorption coefficient in the visible light region, 500 n
A short-circuit current of 15 mA / cm 2 or more has been realized in a solar cell having a photoelectric conversion layer made of amorphous silicon having a thin film thickness of not more than m.

【0004】しかしながら、非晶質シリコン系材料は長
期間の光照射を受けると、Stebler-Wronsky効果により
光電変換特性が低下するなどの問題を抱えており、さら
にその有効感度波長領域が800nm程度までである。
したがって、非晶質シリコン系材料を用いた光電変換装
置においては、その信頼性や高性能化には限界が見ら
れ、基板選択の自由度や低コストプロセスを利用し得る
という本来の利点が十分には生かされていない。
However, amorphous silicon-based materials suffer from problems such as deterioration of photoelectric conversion characteristics due to the Stebler-Wronsky effect when exposed to light for a long period of time. It is.
Therefore, in a photoelectric conversion device using an amorphous silicon-based material, its reliability and high performance are limited, and the inherent advantages of the freedom of substrate selection and the use of a low-cost process are sufficient. Has not been utilized.

【0005】このようなことから、近年、例えば多結晶
シリコンや微結晶シリコンのような結晶質シリコンを含
む薄膜を利用した光電変換装置の開発が精力的に行なわ
れている。これらの開発は、安価な基板上に低温プロセ
スで良質の結晶質シリコン薄膜を形成することによって
光電変換装置の低コスト化と高性能化を両立させるとい
う試みであり、太陽電池だけでなく光センサ等のさまざ
まな光電変換装置への応用が期待されている。
[0005] For these reasons, in recent years, photoelectric conversion devices using thin films containing crystalline silicon such as polycrystalline silicon and microcrystalline silicon have been vigorously developed. These developments attempt to achieve both low-cost and high-performance photoelectric conversion devices by forming high-quality crystalline silicon thin films on low-cost processes on inexpensive substrates. It is expected to be applied to various photoelectric conversion devices.

【0006】結晶質シリコン薄膜の形成方法としては、
例えばCVD法やスパッタリング法にて基飯上に直接堆
積させるか、同様のプロセスで一旦非晶質膜を堆積させ
た後に熱アニールやレーザアニールを行なうことによっ
て結晶化を図るなどの方法が知られている。いずれの方
法においても前述した安価な基板を用いるためには成膜
時の温度を550℃以下にする必要がある。
As a method of forming a crystalline silicon thin film,
For example, a method of directly depositing on a substrate by CVD or sputtering, or a method of crystallizing by once depositing an amorphous film by a similar process and then performing thermal annealing or laser annealing is known. ing. In any method, in order to use the inexpensive substrate described above, the temperature at the time of film formation needs to be 550 ° C. or less.

【0007】ところで、前記各成膜プロセスの中でも、
プラズマCVD法によって直接結晶質シリコン薄膜を堆
積させる手法は、プロセスの低温化や薄膜の大面積化が
最も容易であり、しかも比較的簡便なプロセスで高品質
な結晶質薄膜が得られるものと期待されている。
By the way, in each of the film forming processes,
The method of directly depositing a crystalline silicon thin film by the plasma CVD method is the easiest to lower the temperature of the process and increase the area of the thin film, and it is expected that a high-quality crystalline thin film can be obtained by a relatively simple process. Have been.

【0008】プラズマCVD法は、一般に排気管および
反応ガスの導入管を有する反応容器内に第1、第2の電
極を互いに対向して配置した構造のプラズマCVD装置
が用いられる。このようなCVD装置において、前記電
極のいずれか一方に成膜される基板を保持し、前記導入
管から所定の反応ガス(例えばシラン系ガスを含むガ
ス)を反応容器内に導入すると共に前記排気管を通して
排気して反応容器内を所定の真空度にした後、前記電極
間に所望の電力を供給してそれら電極間にプラズマを発
生させて前記反応ガスを分解することにより前記基板上
に所定の膜(例えばシリコン薄膜)を成膜する。
In the plasma CVD method, a plasma CVD apparatus having a structure in which first and second electrodes are arranged opposite to each other in a reaction vessel having an exhaust pipe and a reaction gas introduction pipe is generally used. In such a CVD apparatus, a substrate on which one of the electrodes is to be formed is held, a predetermined reaction gas (for example, a gas containing a silane-based gas) is introduced into the reaction vessel from the introduction pipe, and the gas is exhausted. After evacuation through a tube to make the inside of the reaction vessel a predetermined degree of vacuum, a desired electric power is supplied between the electrodes to generate plasma between the electrodes to decompose the reaction gas, thereby forming a predetermined gas on the substrate. (For example, a silicon thin film) is formed.

【0009】プラズマCVDの手法により多結晶シリコ
ン薄膜を形成する場合、結晶質を含む高品質シリコン薄
膜を予め基板上に形成した後、前記薄膜をシード層また
は結晶化制御層としてその上にプラズマCVD法により
成膜をすることによって、比較的低温で良質の多結晶シ
リコン薄膜を形成することが可能になる。
When a polycrystalline silicon thin film is formed by a plasma CVD method, a high-quality silicon thin film containing a crystalline material is formed on a substrate in advance, and then the thin film is used as a seed layer or a crystallization control layer. By forming a film by the method, a high-quality polycrystalline silicon thin film can be formed at a relatively low temperature.

【0010】一方、プラズマCVD法において反応容器
に水素でシラン系原料ガスを10倍以上希釈した反応ガ
スを導入すると共に、反応容器内圧力を10mTorr
〜1Torrの範囲に設定して成膜することによって、
微結晶シリコン薄膜が得られることはよく知られてお
り、200℃前後の温度でも容易に微結晶化されたシリ
コン薄膜を形成できる。
On the other hand, in a plasma CVD method, a reaction gas obtained by diluting a silane-based source gas by 10 times or more with hydrogen is introduced into a reaction vessel, and the pressure inside the reaction vessel is set to 10 mTorr.
By forming a film in the range of ~ 1 Torr,
It is well known that a microcrystalline silicon thin film can be obtained, and a microcrystalline silicon thin film can be easily formed even at a temperature of about 200 ° C.

【0011】例えば、Appl, Phys, Lett., Vol. 65, 19
94, p.860には微結晶シリコンのpin接合からなる光
電変換ユニットを含む光電変換装置が開示されている。
この光電変換ユニットは、プラズマCVD法により順次
積層されたp型半導体層、光電変換層であるi型半導体
層およびn型半導俸層からなり、これらの半導体層のす
べてが微結晶シリコンである。しかしながら、高品質の
結晶質シリコン膜、さらには高性能のシリコン系薄膜光
電変換装置を得るためには、従来の製法や条件の下では
その成膜速度が0.6μm/hrに満たないほど遅く、
非晶質シリコン膜の場合と同程度かもしくはそれ以下で
あるという問題があった。
For example, Appl, Phys, Lett., Vol. 65, 19
94, p. 860 discloses a photoelectric conversion device including a photoelectric conversion unit composed of a microcrystalline silicon pin junction.
This photoelectric conversion unit is composed of a p-type semiconductor layer, an i-type semiconductor layer serving as a photoelectric conversion layer, and an n-type semiconductive layer which are sequentially stacked by a plasma CVD method, and all of these semiconductor layers are microcrystalline silicon. . However, in order to obtain a high-quality crystalline silicon film and further a high-performance silicon-based thin film photoelectric conversion device, the film formation rate is so slow as to be less than 0.6 μm / hr under conventional manufacturing methods and conditions. ,
There is a problem that it is about the same as or less than that of the amorphous silicon film.

【0012】特開平4−137725号公報の比較例に
は、低温プラズマCVD法で比較的高い5Torrの圧
力条件の下でシリコン膜を形成することが記載されてい
る。しかしながら、このシリコン膜は、ガラス等の基板
上に直接堆積させたものであり、その膜の品質は低くて
光電変換装置へ応用できるものではない。また、一般に
プラズマCVD法の圧力条件を高くすれば、プラズマ反
応容器内にパウダー状の生成物やダストなどが大量に発
生する。このため、堆積中の膜表面にそれらのダスト等
が飛来して堆積膜中に取り込まれる危険性が高く、膜中
のピンホールの発生原因となる。この膜質の劣化を低減
するためには、反応容器内のクリーニングを頻繁に行な
わなければならなくなる。特に、550℃以下のような
低温条件で反応容器圧力を高くして成膜する場合には、
これらの問題が顕著となる。しかも、太陽電池のような
光電変換装置の製造においては、大面積の薄膜を堆積さ
せる必要があるので、製品歩留りの低下や成膜装置維持
管理ための労力およびコストの増大という問題を招く。
Japanese Patent Application Laid-Open No. 4-137725 discloses that a silicon film is formed by a low-temperature plasma CVD method under a relatively high pressure of 5 Torr. However, this silicon film is directly deposited on a substrate such as glass, and the quality of the film is low and cannot be applied to a photoelectric conversion device. In general, when the pressure conditions of the plasma CVD method are increased, a large amount of powdery products and dust are generated in the plasma reaction vessel. For this reason, there is a high risk that the dust or the like will fly to the surface of the film being deposited and be taken into the deposited film, which may cause pinholes in the film. In order to reduce the deterioration of the film quality, the inside of the reaction vessel must be frequently cleaned. In particular, when forming a film under a low temperature condition of 550 ° C. or less by increasing the pressure of the reaction vessel,
These problems become significant. In addition, in the manufacture of a photoelectric conversion device such as a solar cell, a large-area thin film needs to be deposited, which causes problems such as a reduction in product yield and an increase in labor and cost for maintaining and managing the film formation device.

【0013】したがって、薄膜光電変換装置に組み込ま
れる光電変換層をプラズマCVD法を用いて製造する場
合には、前述したように従来から通常は1Torr以下
の圧力条件が用いられている。
Therefore, when a photoelectric conversion layer to be incorporated in a thin film photoelectric conversion device is manufactured by a plasma CVD method, a pressure condition of usually 1 Torr or less has been conventionally used as described above.

【0014】[0014]

【発明が解決しようとする課題】以上、プラズマCVD
法による従来の成膜技術を多結晶シリコンまたは部分的
に非晶質相を含む微結晶シリコンのような薄膜、例えば
光電変換装置の製造における結晶質シリコン系光電変換
層、の形成に適用する場合には、その膜質を高品質化す
ることが困難であった。
As described above, plasma CVD
When a conventional film forming technique by the method is applied to the formation of a thin film such as polycrystalline silicon or microcrystalline silicon partially containing an amorphous phase, for example, a crystalline silicon-based photoelectric conversion layer in the manufacture of a photoelectric conversion device However, it was difficult to improve the quality of the film.

【0015】本発明は、被処理基板に高品位の結晶質シ
リコン薄膜を成膜することが可能なプラズマCVD方法
を提供することを目的とする。
It is an object of the present invention to provide a plasma CVD method capable of forming a high-quality crystalline silicon thin film on a substrate to be processed.

【0016】本発明は、結晶質シリコン系光電変換層を
有する光電変換ユニットを積層する際、前記プラズマC
VD方法により所定の条件の下で高品位の結晶質シリコ
ン系光電変換層を高速度で成膜してスループットの向上
と性能改善を達成したシリコン系薄膜光電変換装置の製
造方法を提供することを目的とする。
According to the present invention, when a photoelectric conversion unit having a crystalline silicon-based photoelectric conversion layer is laminated, the plasma C
An object of the present invention is to provide a method of manufacturing a silicon-based thin-film photoelectric conversion device in which a high-quality crystalline silicon-based photoelectric conversion layer is formed at a high speed under a predetermined condition by a VD method to achieve an improvement in throughput and an improvement in performance. Aim.

【0017】[0017]

【課題を解決するための手段】本発明に係わるプラズマ
CVD方法は、排気部材を有する反応容器と、この反応
容器内に配置され、被処理基板を保持する第1電極と、
前記反応容器内に前記第1電極に対向して配置され、前
記第1電極との対向面に反応ガスの吹き出し部を有する
中空状の第2電極と、この第2電極内に反応ガスを導入
するためのガス導入手段と、前記第2電極に電力を印加
するための電源とを具備したプラズマCVD装置を用
い、前記第1電極に被処理基板を保持し、前記排気部材
から前記反応容器内のガスを真空排気すると共に、シラ
ン系ガスと水素を含む反応ガスを前記ガス導入管から前
記中空状の第2電極の吹き出し部を通して前記被処理基
板に向けて吹き出し、前記電源から所望の電力を前記第
2電極に印加して前記電極間にプラズマを生成すること
により前記被処理基板表面に結晶質のシリコン薄膜を成
膜するに際し、前記反応容器内の圧力をP(Tor
r)、前記反応ガスの流量をQ(Torr・cm3/s
ec)、前記反応容器の容積をV(cm3)とすると、
前記電極間での反応ガスの滞留時間τ(sec)を、次
式 τ=(P・V)/Q …(1) から算出し、かつ前記τおよびPをそれぞれ1〜10s
ec、より好ましくは1〜8sec、5〜20Torr
に設定した時、前記QおよびVを前記式(1)を満たす
ように選定して成膜を行なうことを特徴とするものであ
る。
According to the present invention, there is provided a plasma CVD method comprising: a reaction vessel having an exhaust member; a first electrode disposed in the reaction vessel and holding a substrate to be processed;
A hollow second electrode disposed in the reaction vessel so as to face the first electrode and having a blowing portion for the reaction gas on a surface facing the first electrode; and introducing the reaction gas into the second electrode. Using a plasma CVD apparatus provided with a gas introduction unit for performing the process and a power supply for applying power to the second electrode, holding the substrate to be processed on the first electrode, And a reaction gas containing silane-based gas and hydrogen is blown out from the gas introduction tube toward the substrate to be processed through the blow-out portion of the hollow second electrode, and desired power is supplied from the power supply. When a crystalline silicon thin film is formed on the surface of the substrate to be processed by applying a plasma to the second electrode to generate plasma between the electrodes, the pressure in the reaction vessel is increased to P (Torr).
r), the flow rate of the reaction gas is set to Q (Torr · cm 3 / s).
ec), assuming that the volume of the reaction vessel is V (cm 3 ),
The residence time τ (sec) of the reaction gas between the electrodes is calculated from the following equation: τ = (PV) / Q (1), and the τ and P are respectively 1 to 10 s.
ec, more preferably 1 to 8 sec, 5 to 20 Torr
When Q is set, the film is formed by selecting Q and V so as to satisfy the expression (1).

【0018】本発明に係わるシリコン系薄膜光電変換装
置の製造方法は、基板上に形成された少なくとも1つの
光電変換ユニットを含み、この光電変換ユニットはプラ
ズマCVD法によって順次積層された一導電型半導体層
と、結晶質シリコン系薄膜光電変換層と、逆導電型半導
体層とを含むシリコン系薄膜光電変換装置を製造するに
際し、前記ユニットのうちの前記光電変換層は、前述し
たプラズマCVD方法において第1、第2の電極間の距
離が2.0m以下、反応ガスは主成分としてシラン系ガ
スと水素ガスを含み、前記反応容器内に導入される全反
応ガスに含まれるシラン系ガスに対する水素ガスの流量
比が30倍以上、プラズマ放電電力密度が20mW/c
2以上、の条件の下で成膜されることを特徴とするも
のである。
A method of manufacturing a silicon-based thin-film photoelectric conversion device according to the present invention includes at least one photoelectric conversion unit formed on a substrate, wherein the photoelectric conversion unit is a one-conductivity type semiconductor sequentially stacked by a plasma CVD method. Layer, a crystalline silicon-based thin-film photoelectric conversion layer, and when manufacturing a silicon-based thin-film photoelectric conversion device including a semiconductor layer of the opposite conductivity type, the photoelectric conversion layer of the unit is formed by the plasma CVD method described above. The distance between the first and second electrodes is 2.0 m or less, and the reaction gas contains a silane-based gas and a hydrogen gas as main components, and a hydrogen gas with respect to the silane-based gas contained in all the reaction gases introduced into the reaction vessel Is 30 times or more, and the plasma discharge power density is 20 mW / c.
The film is formed under the condition of m 2 or more.

【0019】[0019]

【発明の実施の形態】以下、本発明に係わるプラズマC
VD方法を図1に示すプラズマCVD装置を参照して詳
細に説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a plasma C according to the present invention will be described.
The VD method will be described in detail with reference to the plasma CVD apparatus shown in FIG.

【0020】図1は、本発明に係わるプラズマCVD装
置を示す概略図である。
FIG. 1 is a schematic view showing a plasma CVD apparatus according to the present invention.

【0021】矩形状の反応容器1は、対向する両側壁に
排気部材である排気管2,2がそれぞれ連結されてい
る。前記排気管2,2は、それら他端が図示しない例え
ばメカニカルブースターポンプおよびドライポンプのよ
うな真空装置に連結されている。基板を出し入れするた
めの図示しないバルブは、前記反応容器1の対向する側
壁に設けられている。
The rectangular reaction vessel 1 has exhaust pipes 2 and 2 as exhaust members connected to opposite side walls, respectively. The other ends of the exhaust pipes 2 and 2 are connected to a vacuum device (not shown) such as a mechanical booster pump and a dry pump. Valves (not shown) for taking in and out of the substrate are provided on opposite side walls of the reaction vessel 1.

【0022】矩形状の第1電極3は、前記反応容器1内
の下部側に支持軸4により支持されて配置されている。
前記第1電極3上部には、保持される基板を加熱するた
めの図示しないヒータが内蔵されている。前記第1電極
3は、例えばグランドに接続されている。
The rectangular first electrode 3 is disposed on the lower side of the reaction vessel 1 and supported by a support shaft 4.
Above the first electrode 3, a heater (not shown) for heating the held substrate is incorporated. The first electrode 3 is connected to, for example, the ground.

【0023】中空状の第2電極5は、前記反応容器1内
に前記第1電極3の下面と対向するように配置されてい
る。前記第1電極3と対向する前記第2電極5の面(対
向面)6には、反応ガスの吹き出し部である例えば多数
のガス吹き出し孔が開口されている。前記第2電極5
は、図示しない電源、例えば高周波電源に接続されてい
る。反応ガスの導入手段であるガス導入管7は、反応容
器1の外部から前記第2電極5の上部に連結されてい
る。
The hollow second electrode 5 is disposed in the reaction vessel 1 so as to face the lower surface of the first electrode 3. A surface (opposing surface) 6 of the second electrode 5 facing the first electrode 3 is provided with, for example, a large number of gas blowing holes serving as a reactive gas blowing portion. The second electrode 5
Is connected to a power supply (not shown), for example, a high-frequency power supply. A gas introduction pipe 7 serving as a reaction gas introduction means is connected to the upper portion of the second electrode 5 from outside the reaction vessel 1.

【0024】前述した図1に示すプラズマCVD装置に
よる本発明のプラズマCVD方法を説明する。
The plasma CVD method of the present invention using the plasma CVD apparatus shown in FIG. 1 will be described.

【0025】まず、図示しないバルブを通して基板8を
反応容器1内の第1電極3に保持させ、その第1電極3
に内蔵した図示しないヒータの発熱により前記基板8の
膜堆積部分をガラス等の安価な基板の使用が可能な例え
ば400℃以下に加熱する。シラン系ガス、水素を含む
反応ガスを導入管7を通して中空状の第2電極5内に導
入し、その対向面6の多数のガス吹き出し孔から反応ガ
スを第1電極3に保持された基板8に向けて吹き出すと
同時に、図示しない排気装置を駆動して前記反応容器1
内のガスを排気管2,2を通して排気して前記反応容器
1内を所定の真空度に保持する。反応容器1内の真空度
が安定した状態で、図示しない電源から前記第2電極5
に例えば高周波電力を印加することにより前記第1、第
2の電極3,5間の領域にプラズマ9を生成させる。プ
ラズマ9が生成されると、その中で反応ガスが分解され
てシリコン等が400℃以下に加熱された前記基板8表
面に堆積されてシリコン薄膜が成膜される。
First, the substrate 8 is held on the first electrode 3 in the reaction vessel 1 through a valve (not shown).
The film deposition portion of the substrate 8 is heated to, for example, 400 ° C. or less, at which an inexpensive substrate such as glass can be used by the heat generated by a heater (not shown) incorporated in the substrate. A reaction gas containing a silane-based gas and hydrogen is introduced into the hollow second electrode 5 through the introduction pipe 7, and the reaction gas is held on the first electrode 3 through a large number of gas blowing holes on the opposed surface 6. At the same time, the exhaust device (not shown) is driven to drive the reaction vessel 1
The inside gas is exhausted through the exhaust pipes 2 and 2 to maintain the inside of the reaction vessel 1 at a predetermined degree of vacuum. When the degree of vacuum in the reaction vessel 1 is stabilized, the second electrode 5 is supplied from a power source (not shown).
For example, by applying a high-frequency power to the plasma, a plasma 9 is generated in a region between the first and second electrodes 3 and 5. When the plasma 9 is generated, the reaction gas is decomposed therein, and silicon or the like is deposited on the surface of the substrate 8 heated to 400 ° C. or lower to form a silicon thin film.

【0026】前記シラン系ガスとしては、例えばモノシ
ラン、ジシラン等が好ましいが、これらに加えて四フッ
化ケイ素、四塩化ケイ素、ジクロルシラン等のハロゲン
化ケイ素ガスを用いてもよい。このようなシラン系ガス
に加えて水素、窒素、または希ガス等の不活性ガス、好
ましくはヘリウム、ネオン、アルゴン等を用いもよい。
As the silane-based gas, for example, monosilane, disilane and the like are preferable. In addition, silicon halide gas such as silicon tetrafluoride, silicon tetrachloride and dichlorosilane may be used. In addition to such a silane-based gas, an inert gas such as hydrogen, nitrogen, or a rare gas, preferably helium, neon, or argon may be used.

【0027】本発明に係わるプラズマCVD方法は、前
記成膜工程において前記反応容器1内の圧力をP(To
rr)、前記反応ガスの流量をQ(Torr・cm3
sec)、前記反応容器1の容積をV(cm3)とする
と、前記第1、第2の電極3,5間での反応ガスの滞留
時間τ(sec)を、次式 τ=(P・V)/Q …(1) から算出し、かつ前記τおよびPをそれぞれ1〜10s
ec、5〜20Torrに設定した時、前記QおよびV
を前記式(1)を満たすように選定する。このような関
係式を持つプラズマCVD方法により、前記基板8上に
高品位の結晶質シリコン薄膜を高速度で成膜することが
できる。
In the plasma CVD method according to the present invention, the pressure in the reaction vessel 1 is set to P (To
rr), the flow rate of the reaction gas is set to Q (Torr · cm 3 /
sec), assuming that the volume of the reaction vessel 1 is V (cm 3 ), the residence time τ (sec) of the reaction gas between the first and second electrodes 3 and 5 is represented by the following equation: τ = (P · V) / Q (1), and the τ and P are respectively 1 to 10 s
ec, 5 to 20 Torr, the above Q and V
Is selected so as to satisfy Expression (1). By the plasma CVD method having such a relational expression, a high-quality crystalline silicon thin film can be formed on the substrate 8 at a high speed.

【0028】本発明に係わるプラズマCVD方法に用い
られるプラズマCVD装置において、結晶質のシリコン
薄膜を再現性よく成膜する観点から、記第1、第2の電
極3,5の端部はそれぞれ前記反応容器1の内側面に近
接させることが好ましい。
In the plasma CVD apparatus used in the plasma CVD method according to the present invention, from the viewpoint of forming a crystalline silicon thin film with good reproducibility, the ends of the first and second electrodes 3 and 5 are respectively It is preferable to make the inner surface of the reaction vessel 1 approach.

【0029】前記滞留時間τを1sec未満にすると、
基板8上に成膜されたシリコン薄膜が非晶質になる恐れ
があるばかりか、成膜速度が大幅に低下し、さらにガス
の利用率も低下する恐れがある。一方、前記滞留時間τ
が10secを超えると、シリコン薄膜が非晶質になる
恐れがあるばかりか、パウダーやパーティクルが発生し
て高品位の結晶質シリコン薄膜を基板8上に成膜するこ
とが困難になる。より好ましい前記滞留時間τは、1〜
8secである。
When the residence time τ is less than 1 second,
Not only may the silicon thin film formed on the substrate 8 become amorphous, but also the film formation rate may be significantly reduced, and the gas utilization may be reduced. On the other hand, the residence time τ
Exceeds 10 seconds, the silicon thin film may become amorphous, and powder or particles may be generated, making it difficult to form a high-quality crystalline silicon thin film on the substrate 8. The more preferred residence time τ is 1 to
8 seconds.

【0030】前記反応容器1内の圧力を5Torr以上
の高い圧力にすることにより、前記基板表面に成膜され
る結晶質シリコン薄膜へのイオンダメージを低減するこ
とが可能になる。その結果、成膜速度を速めるために高
周波パワーを高く(例えばプラズマ放電電力密度が例え
ば20mW/cm2以上)したり、ガス流量を増加させ
ても、成膜中の薄膜表面へのイオンダメージを低減して
結晶質シリコン薄膜を高速度で成膜することが可能にな
る。また、高圧力にすることによって、結晶粒界や粒内
の欠陥が水素でパッシベーションされ易くなるため、そ
れらに起因する結晶質シリコン系薄膜への欠陥密度を減
少させることが可能になる。この際、前述した滞留時間
τが1≦τ≦10の関係を満足するような条件に規定す
ることが重要である。ただし、前記反応容器1内の圧力
が20Torrを超えると、前記第1,第2電極3,5
間に生成されるプラズマの均一性が損なわれて不安定に
なる恐れがある。
By setting the pressure in the reaction vessel 1 to a high pressure of 5 Torr or more, it becomes possible to reduce ion damage to the crystalline silicon thin film formed on the substrate surface. As a result, even if the high-frequency power is increased (for example, the plasma discharge power density is, for example, 20 mW / cm 2 or more) or the gas flow rate is increased in order to increase the film formation rate, ion damage to the thin film surface during film formation is prevented. This makes it possible to form a crystalline silicon thin film at a high speed. Further, by setting the pressure to a high pressure, the crystal grain boundaries and the defects in the grains are easily passivated by hydrogen, so that the defect density in the crystalline silicon-based thin film due to these can be reduced. At this time, it is important to define the conditions so that the residence time τ satisfies the relationship of 1 ≦ τ ≦ 10. However, if the pressure in the reaction vessel 1 exceeds 20 Torr, the first and second electrodes 3, 5
There is a possibility that the uniformity of the plasma generated during the process may be impaired and unstable.

【0031】なお、前記第2電極のガス吹き出し構造は
多数の孔を第1電極との対向面に設ける形態に限らず、
例えば第1電極との対向する第2電極の面を網状にして
もよい。
The gas blowing structure of the second electrode is not limited to the configuration in which a large number of holes are provided on the surface facing the first electrode.
For example, the surface of the second electrode facing the first electrode may have a net shape.

【0032】また、本発明に係わるプラズマCVD方法
に使用されるプラズマCVD装置は前述した図1に示す
構造に限定されない。例えば基板を保持する第1電極と
反応ガスを吹き出す第2電極とを反転して配置した構
造、周波数が150MHz以下の高周波からVHF帯、
マイクロ波帯を電源として用いた構造のプラズマCVD
装置を用いてもよい。
The plasma CVD apparatus used in the plasma CVD method according to the present invention is not limited to the structure shown in FIG. For example, a structure in which a first electrode for holding a substrate and a second electrode for blowing out a reaction gas are arranged in an inverted manner, a frequency from a high frequency of 150 MHz or less to a VHF band,
Plasma CVD using microwave band as power source
An apparatus may be used.

【0033】次に、本発明に係わるシリコン系薄膜光電
変換装置の製造方法を図2を参照して説明する。
Next, a method for manufacturing a silicon-based thin film photoelectric conversion device according to the present invention will be described with reference to FIG.

【0034】図2は、本発明の1つの実施形態により製
造されるシリコン系薄膜光電変換装置を模式的に示す斜
視図である。
FIG. 2 is a perspective view schematically showing a silicon-based thin-film photoelectric conversion device manufactured according to one embodiment of the present invention.

【0035】(第1工程)まず、基板101上に裏面電
極110を形成する。
(First Step) First, the back electrode 110 is formed on the substrate 101.

【0036】前記基板101としては、例えばステンレ
ス等の金属、有機フィルム、または低融点の安価なガラ
ス等を用いることができる。
As the substrate 101, for example, a metal such as stainless steel, an organic film, or an inexpensive glass having a low melting point can be used.

【0037】前記裏面電極110は、例えばTi,C
r,Al,Ag,Au,CuおよびPtから選択された
少なくとも1以上の金属またはこれらの合金からなる層
を含む金属薄膜102およびITO,SnO2,および
ZnOから選択された少なくとも1つ以上の酸化物から
なる層を合む透明導電性薄膜103をこの順序で積層す
ることにより形成される。ただし、金属薄膜102また
は透明導電性薄膜103のみで裏面電極110を構成し
てもよい。これらの薄膜102,103は、例えば蒸着
法やスパッタリング法によって形成される。
The back electrode 110 is made of, for example, Ti, C
a metal thin film 102 including a layer made of at least one metal selected from r, Al, Ag, Au, Cu and Pt, or an alloy thereof; and at least one oxidation selected from ITO, SnO 2 , and ZnO It is formed by laminating the transparent conductive thin films 103 which combine layers made of an object in this order. However, the back electrode 110 may be constituted only by the metal thin film 102 or the transparent conductive thin film 103. These thin films 102 and 103 are formed by, for example, an evaporation method or a sputtering method.

【0038】(第2工程)次いで、前記裏面電極110
上にプラズマCVD法によって一導電型半導体層10
4、結晶質シリコン系薄膜光電変換層105および逆導
電型半導体層106を順次積層することにより光電変換
ユニット111を形成する。この光電変換ユニット11
1は、1ユニットに限らず、複数のユニットを前記裏面
電極に形成してもよい。
(Second Step) Next, the back electrode 110
The one conductivity type semiconductor layer 10 is formed thereon by a plasma CVD method.
4. The photoelectric conversion unit 111 is formed by sequentially laminating the crystalline silicon-based thin film photoelectric conversion layer 105 and the opposite conductivity type semiconductor layer 106. This photoelectric conversion unit 11
1 is not limited to one unit, and a plurality of units may be formed on the back surface electrode.

【0039】前記一導電型半導体層104、結晶質シリ
コン系薄膜光電変換層105および逆導電型半導体層1
06について、以下に詳述する。
The one-conductivity-type semiconductor layer 104, the crystalline silicon-based thin-film photoelectric conversion layer 105, and the opposite-conductivity-type semiconductor layer 1
06 will be described in detail below.

【0040】1)一導電型半導体層104 この一導電型半導体層104は、例えば導電型決定不純
物原子であるリンが0.01原子%以上ドープされたn
型シリコン層、またはボロンが0.01原子%以上ドー
ブされたp型シリコン層などを用いることができる。た
だし、一導電型半導体層104に関するこれらの条件は
限定的なものではなく、不純物原子としては例えばp型
シリコン層においてはアルミニウム等でもよく、またシ
リコンカーバイドやシリコンゲルマニウムなどの合金材
料を用いてもよい。
1) One-Conductivity-Type Semiconductor Layer 104 This one-conductivity-type semiconductor layer 104 is formed of, for example, n doped with 0.01% by atom or more of phosphorus, which is a conductivity-type determining impurity atom.
A silicon layer or a p-type silicon layer in which boron is doped by 0.01 atomic% or more can be used. However, these conditions for the one-conductivity-type semiconductor layer 104 are not limited. For example, the impurity atoms may be aluminum or the like in a p-type silicon layer, or may be an alloy material such as silicon carbide or silicon germanium. Good.

【0041】一導電型シリコシ系薄膜104は、多結
晶、微結晶、または非晶質のいずれでもよく、その膜厚
は1〜100nmより好ましくは2〜30nmにするこ
とが望ましい。
The one-conductivity type silicon-based thin film 104 may be polycrystalline, microcrystalline or amorphous, and its thickness is preferably 1 to 100 nm, more preferably 2 to 30 nm.

【0042】2)結晶質シリコン系薄膜光電変換層10
5 この結晶質シリコン系薄膜光電変換層105は、例えば
前述した図1に示すプラズマCVD装置を用い、その反
応容器1内の第1電極3に予め一導電型の半導体層10
4が成膜された前記基板101を保持し、かつ第1、第
2の電極3,5間の距離が2.0m以下、反応ガスは主
成分としてシラン系ガスと水素ガスを含み、前記反応容
器内に導入される全反応ガスに含まれるシラン系ガスに
対する水素ガスの流量比が30倍以上、プラズマ放電電
力密度が20mW/cm2以上、の条件の下で、反応容
器1内の圧力をP(Torr)、シラン系ガスおよび水
素を含む反応ガスの流量をQ(Torr・cm3/se
c)、前記反応容器1の容積をV(cm3)とすると、
第1、第2の電極3,5間での反応ガスの滞留時間τ
(sec)を、τ=(P・V)/Q…(1)から算出
し、かつ前記τおよびPをそれぞれ1〜10sec、5
〜20Torrに設定した時、前記QおよびVを前記式
(1)を満たすように選定することにより成膜される。
2) Crystalline silicon-based thin film photoelectric conversion layer 10
5 The crystalline silicon-based thin-film photoelectric conversion layer 105 is formed, for example, by using the above-described plasma CVD apparatus shown in FIG.
4 holds the substrate 101 on which the film is formed, and the distance between the first and second electrodes 3 and 5 is 2.0 m or less, and the reaction gas contains a silane-based gas and a hydrogen gas as main components. Under the conditions that the flow ratio of hydrogen gas to silane-based gas contained in all the reaction gases introduced into the vessel is 30 times or more and the plasma discharge power density is 20 mW / cm 2 or more, the pressure in the reaction vessel 1 is increased. The flow rate of a reaction gas containing P (Torr), a silane-based gas, and hydrogen is changed to Q (Torr · cm 3 / sec).
c), when the volume of the reaction vessel 1 is V (cm 3 ),
Residence time τ of the reaction gas between the first and second electrodes 3 and 5
(Sec) is calculated from τ = (P · V) / Q (1), and the τ and P are respectively 1 to 10 sec, 5
When the pressure is set to 2020 Torr, the film is formed by selecting the Q and V so as to satisfy the expression (1).

【0043】前記成膜工程において、前記滞留時間τお
よび反応容器1内の圧力を規定したのは、前記プラズマ
CVD方法で説明したのと同様な理由によるものであ
る。
In the film forming step, the residence time τ and the pressure in the reaction vessel 1 are defined for the same reason as described in the plasma CVD method.

【0044】前記成膜工程において、前記第1電極3に
内蔵したヒータによる基板のシリコン堆積部の温度はガ
ラス等の安価な基板の使用を可能にする400℃以下と
することが好ましい。
In the film forming step, the temperature of the silicon deposition portion of the substrate by the heater built in the first electrode 3 is preferably set to 400 ° C. or less to enable use of an inexpensive substrate such as glass.

【0045】前記成膜工程において、全反応ガスに含ま
れるシラン系ガスに対する水素ガスの流量比を30倍以
上にすることによって、活性化された水素のエッチング
作用等によって、低品位で剥離し易い結晶質シリコンが
反応場である膜堆積部以外に領域に堆積されのを防ぐこ
とが可能になる。より好ましいシラン系ガスに対する水
素ガスの流量比は、50倍以上である。
In the film forming step, the flow rate ratio of the hydrogen gas to the silane-based gas contained in all the reaction gases is set to 30 times or more, so that the activated hydrogen is easily removed at a low quality by the etching action or the like. It is possible to prevent crystalline silicon from being deposited in a region other than the film deposition portion that is a reaction field. A more preferable flow rate ratio of the hydrogen gas to the silane-based gas is 50 times or more.

【0046】以上説明した本発明によれば、前述した条
件の下でのプラズマCVD方法により前記第1電極3上
に載置した基板9(101)の一導電型半導体に高品位
の結晶質シリコン系薄膜光電変換層を1μm/h以上の
堆積速度で成膜することができる。
According to the present invention described above, high-quality crystalline silicon is applied to one conductivity type semiconductor of the substrate 9 (101) mounted on the first electrode 3 by the plasma CVD method under the aforementioned conditions. The system thin film photoelectric conversion layer can be formed at a deposition rate of 1 μm / h or more.

【0047】すなわち、反応容器内に第1電極を配置す
ると共に、この第2電極と対向し、その対向面に多数の
ガス吹き出し口が開口された中空状の第2電極を配置し
た構造の従来のプラズマCVD装置において、前記第1
電極上に基板を載置し、前記第1、第2の電極間にプラ
ズマを生成する際、前記反応容器内の圧力を5Torr
以上の高い圧力にすると、前記基板表面に成膜される結
晶質シリコン薄膜へのイオンダメージを低減できるた
め、前述したように結晶質シリコン薄膜を高速度で成膜
することが可能になる。しかしながら、反応容器内の圧
力を5Torr以上の高い圧力にすると、前記電極間に
生成されるプラズマの均一性が損なわれて不安定にな
る。
That is, a conventional structure in which a first electrode is disposed in a reaction vessel, and a hollow second electrode having a large number of gas outlets on its opposite surface facing the second electrode. In the plasma CVD apparatus, the first
When a substrate is placed on an electrode and plasma is generated between the first and second electrodes, the pressure in the reaction vessel is reduced to 5 Torr.
When the pressure is set to the above high pressure, ion damage to the crystalline silicon thin film formed on the substrate surface can be reduced, so that the crystalline silicon thin film can be formed at a high speed as described above. However, when the pressure in the reaction vessel is set to a high pressure of 5 Torr or more, the uniformity of the plasma generated between the electrodes is lost, and the reaction becomes unstable.

【0048】このようなことから前記電極間の距離を
2.0cm、好ましくは1.5cm以下と短くすること
により、前記電極間に安定した均一なプラズマを生成す
ることが可能になる。
Thus, by reducing the distance between the electrodes to 2.0 cm, preferably 1.5 cm or less, stable and uniform plasma can be generated between the electrodes.

【0049】しかしながら、反応容器内の圧力および電
極間距離を規定したのみでは、必ずしも高品位の結晶質
シリコン薄膜を再現性よく成膜することが困難になる場
合がある。
However, it is sometimes difficult to form a high-quality crystalline silicon thin film with good reproducibility only by specifying the pressure in the reaction vessel and the distance between the electrodes.

【0050】このようなことから前述した滞留時間τお
よび反応容器内の圧力Pをそれぞれ1〜10sec、5
〜20Torrに設定した時、前記QおよびVを前記式
(1)を満たすように選定する,つまり適切な滞留時間
を与えることによって、高品位の膜形成に重要なガス分
解生成物が生じ、基板8(101)の一導電型半導体層
に高品位の結晶質シリコン系薄膜光電変換層を高ぃ成膜
速度で形成することができる。
From the above, the above-mentioned residence time τ and the pressure P in the reaction vessel are respectively set to 1 to 10 sec.
When the pressure is set to 2020 Torr, the above Q and V are selected so as to satisfy the above formula (1), that is, by giving an appropriate residence time, gas decomposition products important for forming a high-quality film are generated, and 8 (101), a high-quality crystalline silicon-based thin film photoelectric conversion layer can be formed at a high deposition rate on the one conductivity type semiconductor layer.

【0051】また、反応容器内の圧力を5Torr以上
の高い圧力にすると、一般的に反応容器の内面に低品位
で剥離し易い結晶質シリコン薄膜が堆積され、この薄膜
からのシリコン等の飛来により前記基板表面にシリコン
のパーティクルが付着して成膜された結晶質シリコン薄
膜の結晶性等を劣化させる恐れがある。
When the pressure in the reaction vessel is set to a high pressure of 5 Torr or more, a crystalline silicon thin film of low quality and easy to peel off is generally deposited on the inner surface of the reaction vessel. Silicon particles may adhere to the surface of the substrate and deteriorate the crystallinity and the like of the formed crystalline silicon thin film.

【0052】このような副次的反応に対し、前記反応容
器1内に導入される全反応ガスに含まれるシラン系ガス
に対する水素ガスの流量比を30倍以上、好ましくは5
0倍以上にすることによって、活性化された水素のエッ
チング作用等によって、前記反応容器1の内面に低品位
で剥離し易いシリコン等の薄膜が堆積されるのを防止で
きる。その結果、反応ガスの改質により、パーティクル
等の汚染を防止した高品位の結晶質シリコン系薄膜光電
変換層を成膜することができる。
For such a secondary reaction, the flow ratio of hydrogen gas to silane-based gas contained in all the reaction gases introduced into the reaction vessel 1 is 30 times or more, preferably 5 times or more.
By making it 0 times or more, it is possible to prevent the deposition of a thin film of silicon or the like that is low in quality and easily peeled off on the inner surface of the reaction vessel 1 due to the activated hydrogen etching action or the like. As a result, by reforming the reaction gas, a high-quality crystalline silicon-based thin-film photoelectric conversion layer that prevents contamination of particles and the like can be formed.

【0053】また、前述した成膜速度の向上によって、
膜成長初期における結晶核生成時間が短いために相対的
に核発生密度が減少し、大粒径で強く結晶配向した結晶
粒を有する結晶質シリコン系薄膜を形成することが可能
になる。
Also, by the improvement of the film forming speed described above,
Since the crystal nucleus generation time in the initial stage of film growth is short, the nucleus generation density is relatively reduced, and it is possible to form a crystalline silicon-based thin film having crystal grains having a large grain size and strong crystal orientation.

【0054】具体的には、結晶質シリコン系薄膜光電変
換層105はその中に含まれる結晶粒の多くが一導電型
半導体層(下地層)104から上方に柱状に延びて成長
される。これらの多くの結晶粒は膜面に平行に(11
0)の優先結晶配向面を有し、そのX線回折で求めた
(220)回折ピークに対する(111)回折ピークの
強度比は0.4以下、より好ましくは1/2以下である
ことが望ましい。
Specifically, the crystalline silicon-based thin-film photoelectric conversion layer 105 is grown so that many of the crystal grains contained therein extend upward from the one-conductivity-type semiconductor layer (base layer) 104 in a columnar manner. Many of these grains are parallel to the film plane (11
0), and the intensity ratio of the (111) diffraction peak to the (220) diffraction peak determined by X-ray diffraction is preferably 0.4 or less, more preferably 1/2 or less. .

【0055】さらに、前記成膜工程において前記基板の
シリコン堆積部(一導電型半導体層)の温度を100〜
400℃に設定することにより、0.1原子%以上で2
0原子%以下の水素を含む多結晶シリコンまたは体積結
晶化分率80%以上の微結晶シリコンからなる結晶質シ
リコン系薄膜光電変換層を形成することが可能になる。
Further, in the film forming step, the temperature of the silicon deposition portion (one conductivity type semiconductor layer) of the substrate is set to 100 to 100.
By setting the temperature at 400 ° C., 2
This makes it possible to form a crystalline silicon-based thin-film photoelectric conversion layer made of polycrystalline silicon containing 0 atomic% or less of hydrogen or microcrystalline silicon having a volume crystallization fraction of 80% or more.

【0056】なお、結晶質シリコン系薄膜光電変換層は
0.5〜10μmの厚さを有することが好ましい。
The crystalline silicon thin film photoelectric conversion layer preferably has a thickness of 0.5 to 10 μm.

【0057】また、下地層である1導電型層104の表
面形状が実質的に平面である場合でも、光電変換層10
5の形成後のその表面にはその膜厚よりも約1桁ほど小
さい間隔の微細な凹凸を有する表面テクスチャ構造が形
成される。
Further, even when the surface shape of the one conductivity type layer 104 as the underlayer is substantially flat, the photoelectric conversion layer 10
After the formation of 5, a surface texture structure having fine irregularities at intervals of about one digit smaller than the film thickness is formed on the surface.

【0058】3)逆導電型半導体層106 この逆導電型半導体層106としては、例えば導電型決
定不純物原子であるボロンが0.01原子%以上ドープ
されたp型シリコン薄膜、またはリンが0.01原子%
以上ドープされたn型シリコン薄膜などが用いられ得
る。ただし、逆導電型半導体層106についてのこれら
の条件は限定的なものではない。不純物原子としては、
例えばp型シリコンにおいてはアルミニウム等でもよ
く、またシリコンカーバイドやシリコンゲルマニウム等
の合金材料の膜を用いてもよい。この逆導電極シリコン
系薄膜106は、多結晶、微結晶または非晶質のいずれ
でもよく、その膜厚は3〜100nmの範囲内に設定さ
れ、より好ましくは5〜50nmの範囲内に設定され
る。
3) Reverse conductivity type semiconductor layer 106 As the reverse conductivity type semiconductor layer 106, for example, a p-type silicon thin film doped with 0.01% by atom or more of boron, which is a conductivity type determining impurity atom, or a phosphorous layer containing 0.1% or less of phosphorus. 01 atomic%
An n-type silicon thin film doped as described above may be used. However, these conditions for the opposite conductivity type semiconductor layer 106 are not limited. As impurity atoms,
For example, in the case of p-type silicon, aluminum or the like may be used, or a film of an alloy material such as silicon carbide or silicon germanium may be used. The reverse conductive silicon-based thin film 106 may be polycrystalline, microcrystalline, or amorphous, and has a thickness in the range of 3 to 100 nm, more preferably in the range of 5 to 50 nm. You.

【0059】(第3工程)次いで、前記光電変換ユニッ
ト111上に透明導電性酸化膜107、櫛形状の金属電
極108を順次形成することにより図2に示す構造の光
電変換装置を製造する。
(Third Step) Next, a transparent conductive oxide film 107 and a comb-shaped metal electrode 108 are sequentially formed on the photoelectric conversion unit 111 to manufacture a photoelectric conversion device having a structure shown in FIG.

【0060】前記透明導電性酸化膜107は、例えばI
TO,SnO2,ZnO等から選択された少なくとも1
以上の層から形成される。
The transparent conductive oxide film 107 is made of, for example, I
At least one selected from TO, SnO 2 , ZnO, etc.
It is formed from the above layers.

【0061】前記櫛形状の金属電極108(グリッド電
極)は、例えばAl,Ag,Au,Cu,Pt等から選
択された少なくとも1以上の金属またはこれらの合金の
層をパターニングすることにより形成される。これらの
金属もしくは合金の層は、例えばスパッタリング法また
は蒸着法によって成膜される。
The comb-shaped metal electrode 108 (grid electrode) is formed by patterning a layer of at least one metal selected from, for example, Al, Ag, Au, Cu, Pt, or an alloy thereof. . These metal or alloy layers are formed by, for example, a sputtering method or an evaporation method.

【0062】このような構造の光電変換装置において、
光109は前記透明導電性酸化膜107に入射されて光
電変換がなされ、前記裏面電極110の例えば金属薄膜
102および前記金属電極108の端子間から出力され
る。
In the photoelectric conversion device having such a structure,
The light 109 is incident on the transparent conductive oxide film 107 to be subjected to photoelectric conversion, and is output from the back electrode 110, for example, between the terminals of the metal thin film 102 and the metal electrode 108.

【0063】なお、図2ではシリコン系薄膜光電変換装
置の1つを例示しているだけであって、本発明は図2に
示すシリコン結晶質光電変換層を含む少なくとも1つの
結晶系薄膜光電変換ユニットに加えて、周知の方法で形
成される非晶質光電変換層を含む少なくとももう1つの
非晶質系薄膜光電変換ユニットをも合むタンデム型光電
変換装置にも適用することが可能である。
FIG. 2 illustrates only one of the silicon-based thin film photoelectric conversion devices, and the present invention relates to at least one crystalline thin film photoelectric conversion device including the silicon crystalline photoelectric conversion layer shown in FIG. In addition to the unit, the present invention can be applied to a tandem-type photoelectric conversion device including at least another amorphous-based thin film photoelectric conversion unit including an amorphous photoelectric conversion layer formed by a known method. .

【0064】以上述べた本発明によれば、シリコン系薄
膜光電変換装置の一連の製造工程のうちで、スループッ
トを向上させる結晶質シリコン系薄膜光電変換層を高品
位で、しかも高速度で成膜することできるため、シリコ
ン系薄膜光電変換装置の高性能化と低コスト化に大きく
貢献することができる。
According to the present invention described above, in a series of manufacturing steps of a silicon-based thin-film photoelectric conversion device, a crystalline silicon-based thin-film photoelectric conversion layer for improving throughput is formed with high quality and at a high speed. Therefore, it is possible to greatly contribute to higher performance and lower cost of the silicon-based thin film photoelectric conversion device.

【0065】[0065]

【実施例】以下、本発明に係わる好ましい実施例を参考
例と対比して詳細に説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments according to the present invention will be described in detail below in comparison with a reference example.

【0066】(参考例1)前述した図2の実施の形態に
類似して、参考例1としての結晶質シリコン薄膜太陽電
池を製造した。
Reference Example 1 A crystalline silicon thin-film solar cell as Reference Example 1 was manufactured in a manner similar to the embodiment of FIG.

【0067】まず、ガラス基板101上に裏面電極11
0として、厚さ300nmのAg膜102と厚さ100
nmのZnO膜103のそれぞれがスパッタリング法に
よって順次形成した。裏面電極110上に厚さ10nm
でリンドープされたn型微結晶シリコン層104、厚さ
3μmでノンドープの多結晶シリコン薄膜光電変換層1
05、および厚さ10nmでボロンドープされたp型微
結晶シリコン層106をそれぞれプラズマCVD法によ
り成膜し、nip光電変換ユニット111を形成した。
光電変換ユニット111上に前面電極107として、厚
さ80nmの透明導電性ITO膜をスパッタリング法に
て堆積し、その上に電流取出のための櫛形Ag電極10
8を蒸着法およびパターニング技術により形成した。
First, the back electrode 11 is formed on the glass substrate 101.
0, a 300 nm thick Ag film 102 and a 100
Each of the ZnO films 103 of nm was sequentially formed by a sputtering method. 10 nm thick on the back electrode 110
N-type microcrystalline silicon layer 104 doped with phosphorus, non-doped polycrystalline silicon thin film photoelectric conversion layer 1 having a thickness of 3 μm
05 and a 10-nm-thick boron-doped p-type microcrystalline silicon layer 106 were each formed by a plasma CVD method to form a nip photoelectric conversion unit 111.
A transparent conductive ITO film having a thickness of 80 nm is deposited as a front electrode 107 on the photoelectric conversion unit 111 by a sputtering method, and a comb-shaped Ag electrode 10 for extracting a current is formed thereon.
8 was formed by a vapor deposition method and a patterning technique.

【0068】前記n型微結晶シリコン層104は、RF
プラズマCVD法によって堆積した。このときに用いら
れた反応ガスの流量は、シランが5.0sccm、水素
が200sccm、ホスフィンが0.05sccmであ
った。また、反応容器内の圧力は1Torrにし、RF
パワー密度を30mW/cm2に設定した。
The n-type microcrystalline silicon layer 104 is made of RF
It was deposited by a plasma CVD method. The flow rates of the reaction gas used at this time were 5.0 sccm for silane, 200 sccm for hydrogen, and 0.05 sccm for phosphine. The pressure inside the reaction vessel was set to 1 Torr, and RF
The power density was set at 30 mW / cm 2 .

【0069】前記光電変換層105は、前述した図1に
示す反応容器1の第1電極3にリンドープのn型シリコ
ン層を成膜した後のガラス基板を保持させ、以下の条件
で第1、第2の電極3,5間の領域にプラズマを生成す
るRFプラズマCVD法により堆積した。
The photoelectric conversion layer 105 holds the glass substrate after the phosphorus-doped n-type silicon layer is formed on the first electrode 3 of the reaction vessel 1 shown in FIG. It was deposited by an RF plasma CVD method for generating plasma in a region between the second electrodes 3 and 5.

【0070】・反応容器の容積(V);47600cm
3、 ・反応容器1内の圧力(P);5.0Torr、 ・中空状の第2電極3の構造;第1電極3の対向面に直
径0.5mmで1cmの間隔でガス吹出し孔が開口され
ている、 ・第1、第2電極3,5間の距離;2cm、 ・第2電極5から吹き出される反応ガス;シランと水素
の流量比1:75、 ・第2電極5から吹き出される反応ガスの流量(Q);
30400SCCM、 ・前記(1)式から求められた第1、第2の電極3,5
間での反応ガスの滞留時間(τ);0.62sec、 ・第2電極5に印加される電力;13.56MHzの高
周波電力、 ・放電電力密度;150mW/cm2、 ・基板の下地層温度;200℃。
The volume of the reaction vessel (V): 47600 cm
3 , the pressure (P) in the reaction vessel 1; 5.0 Torr, the structure of the hollow second electrode 3; gas blowing holes are opened at an interval of 1 cm at a diameter of 0.5 mm on the opposing surface of the first electrode 3. A distance between the first and second electrodes 3 and 5; 2 cm; a reaction gas blown from the second electrode 5; a flow rate ratio of silane and hydrogen of 1:75; and a blown gas from the second electrode 5. Reaction gas flow rate (Q);
30400 SCCM, the first and second electrodes 3, 5 determined from the above equation (1)
Residence time (τ) of the reaction gas between the electrodes; 0.62 sec; power applied to the second electrode 5; high-frequency power of 13.56 MHz; discharge power density; 150 mW / cm 2 ; 200 ° C.

【0071】このような条件の下において、光電変換層
105の成膜速度は1.1μm/hであった。得られた
光電変換層105において、X線回折の(220)回折
ピークに対する(111)回折ピークの強度比は2/5
であり、水素含有量は0.4原子%であった。
Under these conditions, the film formation rate of the photoelectric conversion layer 105 was 1.1 μm / h. In the obtained photoelectric conversion layer 105, the intensity ratio of the (111) diffraction peak to the (220) diffraction peak of X-ray diffraction is 2/5.
And the hydrogen content was 0.4 atomic%.

【0072】前記p型微結晶シリコン層106のプラズ
マCVDにおいては、反応ガスの流量をシランが1.0
sccm、水素が500sccm、ジボランが0.01
sccmとした。また、反応容器内の圧力を1Torr
にし、RFパワー密度を150mW/cm2に設定し
た。
In the plasma CVD of the p-type microcrystalline silicon layer 106, the flow rate of the
sccm, hydrogen 500 sccm, diborane 0.01
sccm. Further, the pressure in the reaction vessel is set to 1 Torr.
And the RF power density was set to 150 mW / cm 2 .

【0073】このようにして得られた参考例1の太陽電
池において、図2に示す入射光109としてAM1.5
の光を100mW/cm2の光量で照射したときの出力
特性を調べた。その結果、開放端電圧が0.480V、
短絡電流密度が26mA/cm2、曲線因子が72%、
変換効率が8.99%であった。
In the solar cell of Reference Example 1 thus obtained, the incident light 109 shown in FIG.
Was irradiated at a light amount of 100 mW / cm 2 . As a result, the open-circuit voltage is 0.480V,
Short-circuit current density is 26 mA / cm 2 , fill factor is 72%,
The conversion efficiency was 8.99%.

【0074】(参考例2)光電変換層105のプラズマ
CVD条件を一部変更した以外、参考例1と同じ条件の
下で太陽電池を製造した。
Reference Example 2 A solar cell was manufactured under the same conditions as in Reference Example 1 except that the plasma CVD conditions for the photoelectric conversion layer 105 were partially changed.

【0075】すなわち、参考例2においては、反応ガス
の流量(Q)を600SCCMに変更し、反応ガスの滞
留時間(τ);31secとした。このように一部変更
した条件の下において、光電変換層105の成膜速度は
0.7μm/hであった。
That is, in Reference Example 2, the flow rate (Q) of the reaction gas was changed to 600 SCCM, and the residence time (τ) of the reaction gas was set to 31 sec. Under such partially changed conditions, the film formation rate of the photoelectric conversion layer 105 was 0.7 μm / h.

【0076】得られた光電変換層105において、X線
回折の(220)回折ピークに対する(111)回折ピ
ークの強度比は2/5であり、水素合有量は0.5原子
%であった。
In the obtained photoelectric conversion layer 105, the intensity ratio of the (111) diffraction peak to the (220) diffraction peak in X-ray diffraction was 2/5, and the hydrogen content was 0.5 atomic%. .

【0077】このような参考例2の太陽電池において、
図2に示す入射光109としてAM1.5の光を100
mW/cm2の光量で照射したときの出力特性を調べ
た。その結果、開放端電圧が0.47V、短絡電流密度
が27mA/cm2、曲線因子が72%、変換効率が
9.13%であった。
In the solar cell of Reference Example 2 described above,
As the incident light 109 shown in FIG.
Output characteristics when irradiated with a light amount of mW / cm 2 were examined. As a result, the open-circuit voltage was 0.47 V, the short-circuit current density was 27 mA / cm 2 , the fill factor was 72%, and the conversion efficiency was 9.13%.

【0078】(実施例1)光電変換層105のプラズマ
CVD条件を一部変更した以外、参考例1と同じ条件の
下で太陽電池を製造した。
Example 1 A solar cell was manufactured under the same conditions as in Reference Example 1 except that the plasma CVD conditions for the photoelectric conversion layer 105 were partially changed.

【0079】すなわち、実施例1においては反応ガスの
流量(Q)を15200SCCMに変更し、反応ガスの
滞留時間(τ);1.24secとし、かつ放電パワー
を150mW/cm2に増大させた。このように一部変
更した条件の下において、光電変換層105の成膜速度
は2μm/hで、参照例1とほぼ同等であることがわか
る。
That is, in Example 1, the flow rate (Q) of the reaction gas was changed to 15200 SCCM, the residence time (τ) of the reaction gas was set to 1.24 sec, and the discharge power was increased to 150 mW / cm 2 . Under such partially changed conditions, the film formation rate of the photoelectric conversion layer 105 is 2 μm / h, which is almost the same as that in Reference Example 1.

【0080】得られた光電変換層105において、X線
回折の(220)回折ピークに対する(111)回折ピ
ークの強度比は1/5であり、水素合有量は0.8原子
%であった。
In the obtained photoelectric conversion layer 105, the intensity ratio of the (111) diffraction peak to the (220) diffraction peak in X-ray diffraction was 1/5, and the hydrogen content was 0.8 atomic%. .

【0081】このような実施例1の太陽電池において、
図2に示す入射光109としてAM1.5の光を100
mW/cm2の光量で照射したときの出力特性を調べ
た。その結果、開放端電圧が0.53V、短絡電流密度
が26.5mA/cm2、曲線因子が76%、変換効率
が10.67%であった。このことから、実施例1の太
陽電池は、参考例2のものに比べて優れた光電変換特性
を有することがわかる。
In such a solar cell of Example 1,
As the incident light 109 shown in FIG.
Output characteristics when irradiated with a light amount of mW / cm 2 were examined. As a result, the open-circuit voltage was 0.53 V, the short-circuit current density was 26.5 mA / cm 2 , the fill factor was 76%, and the conversion efficiency was 10.67%. This indicates that the solar cell of Example 1 has better photoelectric conversion characteristics than that of Reference Example 2.

【0082】(実施例2)光電変換層105のプラズマ
CVD条件を一部変更した以外、参考例1と同じ条件の
下で太陽電池を製造した。
Example 2 A solar cell was manufactured under the same conditions as in Reference Example 1 except that the plasma CVD conditions for the photoelectric conversion layer 105 were partially changed.

【0083】すなわち、実施例2においては反応ガスの
流量(Q)を3800SCCMに変更し、反応ガスの滞
留時間(τ);4.96secとし、かつ放電パワーを
150mW/cm2に増大させた。このように一部変更
した条件の下において、光電変換層105の成膜速度は
1.8μm/hであった。
That is, in Example 2, the flow rate (Q) of the reaction gas was changed to 3800 SCCM, the residence time (τ) of the reaction gas was 4.96 sec, and the discharge power was increased to 150 mW / cm 2 . Under the partially changed conditions, the film formation rate of the photoelectric conversion layer 105 was 1.8 μm / h.

【0084】得られた光電変換層105において、X線
回折の(220)回折ピークに対する(111)回折ピ
ークの強度比は1/5であり、水素合有量は0.7原子
%であった。
In the obtained photoelectric conversion layer 105, the intensity ratio of the (111) diffraction peak to the (220) diffraction peak in X-ray diffraction was 1/5, and the hydrogen content was 0.7 atomic%. .

【0085】このような実施例1の太陽電池において、
図2に示す入射光109としてAM1.5の光を100
mW/cm2の光量で照射したときの出力特性を調べ
た。その結果、開放端電圧が0.52V、短絡電流密度
が27.0mA/cm2、曲線因子が76%、変換効率
が10.67%であった。このことから、実施例2の太
陽電池は、参考例2のものに比べて優れた光電変換特性
を有することがわかる。
In the solar cell of the first embodiment,
As the incident light 109 shown in FIG.
Output characteristics when irradiated with a light amount of mW / cm 2 were examined. As a result, the open-circuit voltage was 0.52 V, the short-circuit current density was 27.0 mA / cm 2 , the fill factor was 76%, and the conversion efficiency was 10.67%. This indicates that the solar cell of Example 2 has better photoelectric conversion characteristics than that of Reference Example 2.

【0086】[0086]

【発明の効果】以上詳述したように本発明によれば、被
処理基板に高品位の結晶質シリコン薄膜を成膜でき、太
陽電池の光電変換装置、液晶表示装置等の膜形成に有効
に適用することが可能なプラズマCVD方法を提供でき
る。
As described above in detail, according to the present invention, a high-quality crystalline silicon thin film can be formed on a substrate to be processed, which is effective for forming a film for a photoelectric conversion device of a solar cell, a liquid crystal display device and the like. A plasma CVD method that can be applied can be provided.

【0087】本発明は、結晶質シリコン系光電変換層を
有する光電変換ユニットを積層する際、プラズマCVD
方法により所定の条件の下で高品位の結晶質シリコン系
光電変換層を高速度で成膜して製造工程のスループット
の向上(低コスト化)および性能改善(高性能化)を達
成したシリコン系薄膜光電変換装置の製造方法を提供で
きる。
According to the present invention, when stacking a photoelectric conversion unit having a crystalline silicon-based photoelectric conversion layer,
A silicon-based photovoltaic layer of high quality is formed at a high speed under a predetermined condition by a method to improve the throughput (lower cost) and improve the performance (higher performance) of the manufacturing process. A method for manufacturing a thin film photoelectric conversion device can be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係わるプラズマCVD方法に用いられ
るプラズマCVD装置の一形態を示す概略図。
FIG. 1 is a schematic view showing one embodiment of a plasma CVD apparatus used for a plasma CVD method according to the present invention.

【図2】本発明の1つの実施の形態により製造されるシ
リコン系薄膜光電変換装置を模式的に示す斜視図。
FIG. 2 is a perspective view schematically showing a silicon-based thin-film photoelectric conversion device manufactured according to one embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1…反応容器、 2…排気管、 3…第1電極、 5…第2電極、 8,101…基板、 9…プラズマ、 102…Ag等の薄膜、 103…ZnO等の薄膜 104…一導電型半導体層、 105…結晶質シリコン系光電変換層、 106…逆導電型半導体層、 107…ITO等の透明導電膜、 110…裏面電極、 111…結晶質シリコン系光電変換ユニット。 DESCRIPTION OF SYMBOLS 1 ... Reaction container, 2 ... Exhaust pipe, 3 ... 1st electrode, 5 ... 2nd electrode, 8, 101 ... Substrate, 9 ... Plasma, 102 ... Thin film, such as Ag, 103 ... Thin film, such as ZnO 104 ... One conductivity type Semiconductor layer: 105: crystalline silicon-based photoelectric conversion layer; 106: reverse conductivity type semiconductor layer; 107: transparent conductive film such as ITO; 110: back electrode; 111: crystalline silicon-based photoelectric conversion unit.

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 4K030 AA06 AA17 BA29 BB01 BB03 BB04 FA01 JA05 JA10 JA11 JA16 KA14 KA17 LA16 5F045 AA08 AB03 AC01 AC02 AC03 AC05 AC15 AC16 AC17 AD05 AD06 AD07 AD08 AE21 AE23 AF07 AF10 BB08 BB09 BB15 BB16 CA13 DA52 EE13 EF05 EH04 EH05 EH14 EH19 5F051 AA03 AA04 CB12 DA04 DA07 FA03 FA04 FA06 FA14 FA18 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4K030 AA06 AA17 BA29 BB01 BB03 BB04 FA01 JA05 JA10 JA11 JA16 KA14 KA17 LA16 5F045 AA08 AB03 AC01 AC02 AC03 AC05 AC15 AC16 AC17 AD05 AD06 AD07 AD08 AE21 AE23 AF07 AF10 BB08 BB08 BB09 DA52 EE13 EF05 EH04 EH05 EH14 EH19 5F051 AA03 AA04 CB12 DA04 DA07 FA03 FA04 FA06 FA14 FA18

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 排気部材を有する反応容器と、この反応
容器内に配置され、被処理基板を保持する第1電極と、
前記反応容器内に前記第1電極に対向して配置され、前
記第1電極との対向面に反応ガスの吹き出し部を有する
中空状の第2電極と、この第2電極内に反応ガスを導入
するためのガス導入手段と、前記第2電極に電力を印加
するための電源とを具備したプラズマCVD装置を用
い、前記第1電極に被処理基板を保持し、前記排気部材
から前記反応容器内のガスを真空排気すると共に、シラ
ン系ガスと水素を含む反応ガスを前記ガス導入管から前
記中空状の第2電極の吹き出し部を通して前記被処理基
板に向けて吹き出し、前記電源から所望の電力を前記第
2電極に印加して前記電極間にプラズマを生成すること
により前記被処理基板表面に結晶質のシリコン薄膜を成
膜するに際し、 前記反応容器内の圧力をP(Torr)、前記反応ガス
の流量をQ(Torr・cm3/sec)、前記反応容
器の容積をV(cm3)とすると、前記電極間での反応
ガスの滞留時間τ(sec)を、次式 τ=(P・V)/Q …(1) から算出し、かつ前記τおよびPをそれぞれ1〜10s
ec、5〜20Torrに設定した時、前記QおよびV
を前記式(1)を満たすように選定して成膜を行なうこ
とを特徴とするシリコン薄膜のプラズマCVD方法。
1. A reaction vessel having an exhaust member, a first electrode disposed in the reaction vessel and holding a substrate to be processed,
A hollow second electrode disposed in the reaction vessel so as to face the first electrode and having a blowing portion for the reaction gas on a surface facing the first electrode; and introducing the reaction gas into the second electrode. Using a plasma CVD apparatus provided with a gas introduction unit for performing the process and a power supply for applying power to the second electrode, holding the substrate to be processed on the first electrode, And a reaction gas containing silane-based gas and hydrogen is blown out from the gas introduction tube toward the substrate to be processed through the blow-out portion of the hollow second electrode, and desired power is supplied from the power supply. When forming a crystalline silicon thin film on the surface of the substrate to be processed by applying plasma to the second electrode to generate plasma between the electrodes, the pressure in the reaction vessel is set to P (Torr), and the reaction gas is Flow of Assuming that the amount is Q (Torr · cm 3 / sec) and the volume of the reaction vessel is V (cm 3 ), the residence time τ (sec) of the reaction gas between the electrodes is expressed by the following equation: τ = (P · V ) / Q (1), and τ and P are respectively 1 to 10 s
ec, 5 to 20 Torr, the above Q and V
Is selected so as to satisfy the above formula (1), and the film is formed.
【請求項2】 前記第1、第2電極は、前記反応容器内
にそれら各電極の端部が前記反応容器の内側面に近接す
るように配置されることを特徴とする請求項1記載のプ
ラズマCVD方法。
2. The reaction vessel according to claim 1, wherein the first and second electrodes are arranged in the reaction vessel such that ends of the electrodes are close to an inner surface of the reaction vessel. Plasma CVD method.
【請求項3】 基板上に形成された少なくとも1つの光
電変換ユニットを含み、この光電変換ユニットはプラズ
マCVD法によって順次積層された一導電型半導体層
と、結晶質シリコン系薄膜光電変換層と、逆導電型半導
体層とを含むシリコン系薄膜光電変換装置を製造するに
際し、 前記ユニットのうちの前記光電変換層は、請求項1また
は2記載のプラズマCVD方法において第1、第2の電
極間の距離が2.0m以下、 反応ガスは主成分としてシラン系ガスと水素ガスを含
み、前記反応容器内に導入される全反応ガスに含まれる
シラン系ガスに対する水素ガスの流量比が30倍以上、 プラズマ放電電力密度が20mW/cm2以上、の条件
の下で成膜されることを特徴とするシリコン系薄膜光電
変換装置の製造方法。
3. A photoelectric conversion unit including at least one photoelectric conversion unit formed on a substrate, wherein the photoelectric conversion unit includes a one-conductivity-type semiconductor layer sequentially stacked by a plasma CVD method, a crystalline silicon-based thin-film photoelectric conversion layer, When manufacturing a silicon-based thin-film photoelectric conversion device including a semiconductor layer of the opposite conductivity type, the photoelectric conversion layer of the unit is disposed between the first and second electrodes in the plasma CVD method according to claim 1 or 2. The distance is 2.0 m or less, the reaction gas contains silane-based gas and hydrogen gas as main components, and the flow rate ratio of hydrogen gas to silane-based gas contained in all the reaction gases introduced into the reaction vessel is 30 times or more, A method for manufacturing a silicon-based thin-film photoelectric conversion device, wherein a film is formed under a condition that a plasma discharge power density is 20 mW / cm 2 or more.
【請求項4】 前記成膜工程において、前記基板のシリ
コン堆積部の温度を100〜400℃に設定することに
より、0.1原子%以上で20原子%以下の水素を含む
多結晶シリコンまたは体積結晶化分率80%以上の微結
晶シリコンからなる0.5〜10μmの厚さの光電変換
層膜を形成することを特徴とする請求項3記載のシリコ
ン系薄膜光電変換装置の製造方法。
4. In the film forming step, the temperature of a silicon deposition portion of the substrate is set at 100 to 400 ° C., so that polycrystalline silicon containing 0.1 to 20 atomic% of hydrogen or 4. The method for manufacturing a silicon-based thin-film photoelectric conversion device according to claim 3, wherein a photoelectric conversion layer film having a thickness of 0.5 to 10 [mu] m made of microcrystalline silicon having a crystallization fraction of 80% or more is formed.
【請求項5】 前記光電変換層は、その表面に平行に
(110)の優先結晶配向面を有し、そのX線回折にお
ける(220)回折ピークに対する(111)回折ピー
クの強度比が0.4以下であることを特徴とする請求項
3または4記載のシリコン系薄膜光電変換装置の製造方
法。
5. The photoelectric conversion layer has a (110) preferential crystal orientation plane parallel to its surface, and its X-ray diffraction has an intensity ratio of (111) diffraction peak to (220) diffraction peak of 0.1. 5. The method of manufacturing a silicon-based thin-film photoelectric conversion device according to claim 3, wherein the number is 4 or less.
【請求項6】 前記光電変換ユニットに加えて少なくと
も1つの非晶質シリコン系光電変換ユニットを積層する
ことによってタンデム型構造にすることを特徴とする請
求項3ないし5いずれか記載のシリコン系薄膜光電変換
装置の製造方法。
6. The silicon-based thin film according to claim 3, wherein a tandem structure is obtained by laminating at least one amorphous silicon-based photoelectric conversion unit in addition to the photoelectric conversion unit. A method for manufacturing a photoelectric conversion device.
JP11081460A 1999-03-25 1999-03-25 Plasma cvd method for crystalline silicon thin-film and manufacture of silicon thin-film photoelectric conversion device Pending JP2000277439A (en)

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US8187956B2 (en) 2007-12-03 2012-05-29 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing microcrystalline semiconductor film, thin film transistor having microcrystalline semiconductor film, and photoelectric conversion device having microcrystalline semiconductor film
US8008169B2 (en) 2007-12-28 2011-08-30 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing photoelectric conversion device
US8119468B2 (en) 2008-04-18 2012-02-21 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor and method for manufacturing the same
US8138032B2 (en) 2008-04-18 2012-03-20 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing thin film transistor having microcrystalline semiconductor film
US8525170B2 (en) 2008-04-18 2013-09-03 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor and manufacturing method thereof
US8053294B2 (en) 2008-04-21 2011-11-08 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of thin film transistor by controlling generation of crystal nuclei of microcrystalline semiconductor film
US7888167B2 (en) 2008-04-25 2011-02-15 Semiconductor Energy Laboratory Co., Ltd. Photoelectric conversion device and method for manufacturing the same
US7998801B2 (en) 2008-04-25 2011-08-16 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of thin film transistor having altered semiconductor layer
US8124972B2 (en) 2008-04-25 2012-02-28 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor
US8198629B2 (en) 2008-04-25 2012-06-12 Semiconductor Energy Laboratory Co., Ltd. Photoelectric conversion device and method for manufacturing the same
US8410354B2 (en) 2008-05-09 2013-04-02 Semiconductor Energy Laboratory Co., Ltd. Photoelectric conversion device and manufacturing method thereof
US8168973B2 (en) 2008-05-16 2012-05-01 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor
US8637866B2 (en) 2008-06-27 2014-01-28 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor
US8513664B2 (en) 2008-06-27 2013-08-20 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor, semiconductor device and electronic device
US8283667B2 (en) 2008-09-05 2012-10-09 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor
US8569120B2 (en) 2008-11-17 2013-10-29 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing thin film transistor
US8304775B2 (en) 2009-03-09 2012-11-06 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor
US8604481B2 (en) 2009-03-09 2013-12-10 Semiconductor Energy Co., Ltd. Thin film transistor
US9018109B2 (en) 2009-03-10 2015-04-28 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor including silicon nitride layer and manufacturing method thereof
US8546810B2 (en) 2009-05-28 2013-10-01 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor, display device, and electronic appliance
US8258025B2 (en) 2009-08-07 2012-09-04 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing microcrystalline semiconductor film and thin film transistor
US9177761B2 (en) 2009-08-25 2015-11-03 Semiconductor Energy Laboratory Co., Ltd. Plasma CVD apparatus, method for forming microcrystalline semiconductor film and method for manufacturing semiconductor device
US8486777B2 (en) 2009-10-23 2013-07-16 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing microcrystalline semiconductor and thin film transistor
US8114760B2 (en) 2009-10-23 2012-02-14 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing microcrystalline semiconductor and thin film transistor
US8829522B2 (en) 2009-12-21 2014-09-09 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor
US8575608B2 (en) 2009-12-21 2013-11-05 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor and manufacturing method thereof
US8598586B2 (en) 2009-12-21 2013-12-03 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor and manufacturing method thereof
US8343858B2 (en) 2010-03-02 2013-01-01 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing microcrystalline semiconductor film and method for manufacturing semiconductor device
JP2011205077A (en) * 2010-03-02 2011-10-13 Semiconductor Energy Lab Co Ltd Method of forming microcrystalline semiconductor film and method of manufacturing semiconductor device
US8884297B2 (en) 2010-05-14 2014-11-11 Semiconductor Energy Laboratory Co., Ltd. Microcrystalline silicon film, manufacturing method thereof, semiconductor device, and manufacturing method thereof
US8410486B2 (en) 2010-05-14 2013-04-02 Semiconductor Energy Labortory Co., Ltd. Method for manufacturing microcrystalline semiconductor film and method for manufacturing semiconductor device
CN102243992A (en) * 2010-05-14 2011-11-16 株式会社半导体能源研究所 Method for manufacturing microcrystalline semiconductor film and method for manufacturing semiconductor device
US8778745B2 (en) 2010-06-29 2014-07-15 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
US9443989B2 (en) 2010-07-02 2016-09-13 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor film, manufacturing method of semiconductor device, and manufacturing method of photoelectric conversion device
US9450139B2 (en) 2010-07-02 2016-09-20 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor film, manufacturing method of semiconductor device, and manufacturing method of photoelectric conversion device
US8916425B2 (en) 2010-07-26 2014-12-23 Semiconductor Energy Laboratory Co., Ltd. Method for forming microcrystalline semiconductor film and method for manufacturing semiconductor device
US8859404B2 (en) 2010-08-25 2014-10-14 Semiconductor Energy Laboratory Co., Ltd. Method for forming microcrystalline semiconductor film and method for manufacturing semiconductor device
US8704230B2 (en) 2010-08-26 2014-04-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US9230826B2 (en) 2010-08-26 2016-01-05 Semiconductor Energy Laboratory Co., Ltd. Etching method using mixed gas and method for manufacturing semiconductor device
US9257561B2 (en) 2010-08-26 2016-02-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US8624254B2 (en) 2010-09-14 2014-01-07 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor
US8338240B2 (en) 2010-10-01 2012-12-25 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing transistor
US8513046B2 (en) 2010-10-07 2013-08-20 Semiconductor Energy Laboratory Co., Ltd. Photoelectric conversion device and manufacturing method thereof
US8426295B2 (en) 2010-10-20 2013-04-23 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of microcrystalline silicon film and manufacturing method of semiconductor device
US8450158B2 (en) 2010-11-04 2013-05-28 Semiconductor Energy Laboratory Co., Ltd. Method for forming microcrystalline semiconductor film and method for manufacturing semiconductor device
US8895116B2 (en) 2010-11-04 2014-11-25 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of crystalline semiconductor film and manufacturing method of semiconductor device
US8815635B2 (en) 2010-11-05 2014-08-26 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of photoelectric conversion device
US8394685B2 (en) 2010-12-06 2013-03-12 Semiconductor Energy Laboratory Co., Ltd. Etching method and manufacturing method of thin film transistor
US9048327B2 (en) 2011-01-25 2015-06-02 Semiconductor Energy Laboratory Co., Ltd. Microcrystalline semiconductor film, method for manufacturing the same, and method for manufacturing semiconductor device
JP2012182447A (en) * 2011-02-11 2012-09-20 Semiconductor Energy Lab Co Ltd Semiconductor film manufacturing method and semiconductor device manufacturing method

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