JP2000270042A - Controllerless communication adapter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make an adapter greatly small-sized and low in power consumption by decreasing the number of components in the adapter by eliminating control by a CPU or firmware. SOLUTION: This controllerless communication adapter which controls communication equipment such as a telephone set through serial interfaces of two channels and interfaces with a host device through a serial interface of one channel is equipped with a T-ch control code detecting means 101 which detects a switch control code from the host device, an up serial control code detecting means 102, and up and down control serial/T-ch switch means 104 and 105 which actually switch the channels with the detected switch code so as to switch the serial interfaces of two channels. Further, the adapter is provided with means 106 and 107 which performs the synchronous/asynchronous conversion of up and down T-ch signals.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication adapter which controls a communication device such as a telephone with a two-channel serial interface and has a one-channel serial interface interface with a host device. Personal Digita
The present invention relates to a controller-less communication adapter without control by CPU / firmware suitable for a small power-saving type for mobile devices such as l Assistant.

[0002]

2. Description of the Related Art Conventionally, as a communication device such as a personal computer, a wired acoustic coupler or a modem (modem) has been used. In addition, with the spread of mobile phones and PHS, communication using wireless infrastructure has also been performed. For communication using mobile phones and PHS,
Although a communication adapter is used instead of a modem, the size of the communication adapter has been reduced due to the development of LSI technology. As a method of the communication adapter, a microcomputer and a memory are usually mounted in the communication adapter, control firmware is mounted in the memory, and data transmitted from a higher-level device that controls the communication adapter, communication of a telephone or the like. 2-channel serial data for controlling devices, and other communication device control signals (Wakeup signal, ADP
It is known that a microcomputer controls all control of connection signals and the like (for example, JP-A-09-30).
7602).

[0003]

As described above, the hardware configuration of the conventional independent communication adapter includes a microcomputer, various memories, a controller for serial control, and the like. As a result, the physical size of the communication adapter also increases, and the number of parts increases, so that the power consumption also increases. Accordingly, an object of the present invention is to solve such a conventional problem and to simplify the inside of the communication adapter by adopting a configuration having no firmware inside the communication adapter, thereby reducing the number of parts, miniaturizing and saving. It is an object of the present invention to provide a controllerless communication adapter that can be powered.

[0004]

In order to achieve the above object, a controllerless communication adapter according to the present invention comprises a control code detecting unit, an upstream transfer data / uplink communication device control data switching unit, a downstream transfer data / downlink communication device. It has a control data switching unit, an uplink data asynchronous / synchronous conversion unit, and a downlink data synchronous / asynchronous conversion unit, and these units are implemented in one LSI. That is, in the communication adapter, means having a detection function, a switching function, and a conversion function by hardware are all mounted without having a computer for processing firmware. For upstream data in the present invention, communication protocol processing and communication device control processing are performed in a higher-level device that controls the communication adapter, and the processed data is transferred to the communication adapter. The communication adapter receives this, detects the control code by each control code detecting means described above, and switches the data transfer channel by the upstream / downstream transfer data / communication device control data switching means based on the detected control code. The uplink data to be sent to the communication device other than the control code is transmitted to the communication device via the above-described uplink transfer data / uplink communication device control data switching means. At this time, the transfer data is converted into synchronous serial data by the above-mentioned uplink data asynchronous / synchronous conversion means, and then the data is transmitted.

[0005] Next, with respect to downlink data, data sent from a communication device is converted into asynchronous data by the above-mentioned downlink data synchronous / asynchronous conversion means only in the case of transfer data. After that, the data is transmitted to the device for controlling the communication adapter via the above-mentioned downlink transfer data / downlink communication device control data switching means. For communication device control signals other than serial data, the Wakeup signal, A
A communication device control signal such as a DP connection signal is generated. By the processing in the device for controlling the communication adapter and the operation of each means, the communication adapter can be realized without the processing of the microcomputer in the communication adapter. As a result, the power consumption and the size of the communication adapter can be reduced.

[0006]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 5 is a communication system diagram when the communication adapter of the present invention is applied to a PHS communication system. PHS (Personal Handyphone)
System) A communication system is a communication system in which an analog cordless telephone is digitized and used.
If you subscribe to a PHS public service system with a base station installed outdoors, you can use it in the same way as a mobile phone. By installing base stations in each room or corridor of an office building, it can be used as a system cordless telephone that allows calls anywhere in the building. As shown in FIG. 5, the PHS public service system includes a PS (Personal Sys).
The computer 11 is connected to the “tem: terminal telephone” 13 via the communication adapter 12. In this case, the computer 11 is a higher-level device that controls the communication adapter 12. The PS 13 can communicate with another mobile phone or the PS 15 via the PHS public service network 14 by radio 16 or 17. The public service network 14 includes facilities such as base stations and exchanges. In the present invention, except for the microcomputer for processing firmware from the communication adapter 12, all the communication adapters 12 are composed of only hardware, thereby simplifying the communication adapter 12, reducing the number of parts, and saving power. I am trying to do it.

The interface between the communication adapter 12 and the PS 13 is a two-channel (up and down) synchronous serial data 11 for actually transmitting and receiving data to and from the PS 13.
6, 118, PS13 hook switch ON, O
Communication lines for two-channel (uplink and downlink) control serial signals 117 and 119 for notifying FFs and the like and uplink and downlink control signals 115 and 114 such as an asynchronous Wakeup signal and an ADP connection signal to the PS 13 are connected. . The interface between the communication adapter 12 and the host device 11 is the serial data 10 transmitted from the host device 11.
9, an RTS signal 111 indicating completion of preparation from the host device 11 for adjusting and mitigating a difference in transmission / reception speed between the computer 11 and the PS 13, and when the RTS signal 111 is ON, the host device 11 Transmission start signal 112 which is turned ON by the
A communication line for the XD signal 110 and a downlink control signal DCD / RI 113 to be notified from the PS 13 to the host device 11 is connected.

FIG. 1 is a block diagram of a controller-less PHS adapter showing one embodiment of the present invention, and FIG.
FIG. 2 is a relationship diagram of each data of the PHS adapter in FIG. 1. First, the system configuration of the PHS adapter will be described with reference to FIG. As shown in FIG.
The adapter includes a T-ch control code detection block 101,
Uplink serial control code detection block 102, flow control block 103, uplink control serial / T-ch switching block 104, downlink control serial / T-ch switching block 105, uplink T-ch signal asynchronous to synchronous conversion block 106, downlink T-channel ch signal synchronous to asynchronous conversion block 1
07. Then, each of these blocks 101 to 1
07 is mounted in the LSI 108. In FIG. 1, serial data 109, 110, 116 to 119 are represented by solid lines.
The T-ch / control serial switching signal is indicated by a dotted line, and the PS control signals (Wakeup signal, etc.) 114 and 115 are indicated by dashed lines. A host device (computer) 11 is connected to the left side of the PHS adapter 12, and a PS 13 controlled by the computer 11 and the communication adapter 12 is connected to the right side. In addition, T-ch
Is a channel name assigned for the PHS mobile phone.

As shown in FIG. 1, serial data transmitted from the host device to the TXD signal line 109 is input to the flow control block 103. At this time, the higher-level device turns on the RTS signal 111 before transmission, and then indicates to the higher-level device that the flow control block 103 turns on the CTS signal 112 and is ready to transmit. The flow control block 103 has a function of adjusting a difference in transmission / reception speed between the computer and the PS. Therefore, data is transmitted only after performing the above procedure. The flow control block 103 that has received the data sends the data to the T-ch control code detection block 101 and the uplink serial control code detection block 102. Here, when detecting the control code of the control signal transmitted alternately with the serial data from the host device, the uplink serial control code detection block 102 changes the uplink control signal 115 according to the control code. T-ch control code detection block 101
Generates a switching signal upon receiving a serial switching control code (ADP control code),
4, 105 and 106 are notified that the switching of the transmission data has occurred (see the dotted line).

[0010] For data other than the control code, the data is directly transmitted to the next-stage upstream control serial / T-c.
h switching block 104. In the uplink control serial / T-ch switching block 104, the above-described T-ch
Based on the switching signal from the control code detection block 101, whether to transmit the received data to the next-stage uplink T-ch signal asynchronous-to-synchronous conversion block 106 or to transmit it to the PS as the uplink control serial signal 117 Judge and send to one. The upstream T-ch signal asynchronous-to-synchronous conversion block 106 converts the received data from an asynchronous serial signal to a synchronous serial signal, and then transmits the upstream T-c
The signal is sent to the PS as an h signal 116. The above is the flow of the upstream data transmitted from the host device.

Next, the downlink data transmitted from the PS will be described. First, the downlink T-ch data 118 is
After being converted into an asynchronous serial signal by the downlink T-ch signal synchronous → asynchronous conversion block 107, the downlink control serial signal 119 is sent to the downlink control serial / T-ch switching block 105 as it is because it is an asynchronous serial signal. This downlink control serial / T-ch switching block 10
5 transmits a signal from the downlink T-ch signal synchronous to asynchronous conversion block 107 or transmits a downlink control serial signal 119 based on the switching signal from the T-ch control code detection block 101 described above. And sends one of them to the flow control block 103.
After confirming that the RTS signal 111 is ON from the upper device, the flow control block 103 turns on the CTS signal 112 and sends out serial data to the RXD signal line 110 to the upper device. The downlink control signal 114 is not controlled by serial data, but is directly connected to the DCD / RI signal 113 and directly controlled by the host device.

In the above control, the upstream data and the control data of the PHS adapter are mixed, but the relationship between the data from the host device, each serial data to the PS, and the PS control signal is shown in FIG. The data flow will be described. When communication starts, the serial signal line from the host
The S control code 205 is sent. The PHS adapter receiving this code detects this in the upstream serial control code detection block 101 in FIG. 1 and performs PS control 211 on the PS using the PS control signal 202. Here, the PS control signal 211 refers to a Wakeup signal, an ADP connection signal, and the like. When the PS control ends, call control data 206 such as dial control is transmitted from the host device. The adapter that has received the call control data 206 recognizes that it is not a control code, and transmits the data as the call control data 212 to the PS control serial signal 203 as it is. When the call control based on the call control data 212 is completed, the mode shifts to the data communication mode. At this time, the higher-level device sends an ADP control code 207 for serial switching to notify the PHS adapter that the communication mode has been entered.

A PHS adapter is an ADP for serial switching.
When the control code 207 is received, it is detected by the upstream serial control code detection block 102 in FIG. 1, and the transmission destination of the subsequently transmitted data is switched from the PS control serial signal 203 to the PS upstream digital signal 204.
After the switching, the data transmitted from the host device is T-ch data 208, which is synchronously converted by the uplink T-ch signal asynchronous → synchronous conversion block 106 in FIG. Send out. When the data communication is completed, the host device performs ADP control code 209 to perform call control for terminating the data communication.
Is sent. When the PHS adapter receives this code,
This is detected by the T-ch control code detection block 101 in FIG.
Upstream digital signal 204 to PS control serial signal 20
Switch to 3. After that, the call control data 2
10 is transmitted, and the PHS adapter transmits this to the PS control serial signal 203 as the call control teledata 213. The above is the flow of uplink data control. The downlink data does not include a control code and includes a downlink T-ch 118 from the PS and a downlink control serial 119 from the PS.
Is switched by the downstream control serial / T-ch switching block 105, and is output as it is toward the host device.

In this embodiment, the host device sends the data actually sent to the PS and the control code for controlling the PHS adapter to the same serial signal line. The code mixing method will be described. A block for detecting a control code in the PHS adapter includes a T-ch control code detection block 101 and an uplink serial control code detection block 1
02. First, a control code detection method of the uplink serial control code detection block 101 will be described. FIG.
FIG. 2 is a detailed block diagram of an uplink serial control code detection block in FIG. The structure of the PHS call control serial data is transmitted in the form of header, type, data length, and detailed data. The PHS adapter uses this to make the PHS adapter control code transmit the same format as the PHS adapter control code. When the data sent from the host device is taken into the PHS adapter, the serial data 30 is passed through the flow control block.
8 is sent to the header detection circuit 302 in the upstream serial control code detection block 301. If the header is detected here, the next code is a code indicating the type, and this code is sent to the type detection circuit 303 at the next stage, and this circuit determines whether or not it is a control code of the PHS adapter.
If the control code is not determined as the PHS adapter control code, the data SKIP circuit 306 ignores the code corresponding to the number of bytes detected by the data length detection circuit 304 and detects the next header. If it is determined that the control code is the control code of the PHS adapter, the data length is detected, then the control code for the data length is detected by the data detection circuit 305, and the control signal generation circuit 307 generates the control signal based on the content. Etc. 30
9 is generated.

FIG. 4 is a detailed block diagram of the T-ch control code detection block in FIG. The control code detection method of the T-ch control code detection block 101 will be described with reference to FIG. As for the T-ch control code of the PHS, when data of a specific plurality of bytes is generated, this is used as a control code. For example, T-
In case of switching code from channel data to control serial, 1
When data of hexadecimal "FF" continues for 6 bytes, it is recognized as a switching control code. In this case, the actual T-
If 6-byte continuous data exists in the channel data,
It cannot be distinguished from control codes. For this reason, the host device inserts “00” data before the data of the sixth byte when 5 bytes continue in the T-ch data. When the data sent from the host device is taken into the PHS adapter, the data is sent to the upstream data 40 via the flow control block.
5 is sent to the T-ch control code detection circuit 401. In this circuit, first, the "FF" 5-byte continuous detection block 403 detects a 5-byte "FF" code, and if the next sixth byte is data of "00", the code "0"
The "0" deletion circuit 402 deletes the "00" data inserted by the higher-level device, and transmits the deleted data to the next upstream uplink serial / T-ch switching block (transmission signal 40).
7). If the sixth byte is "FF",
The “FF” sixth byte detection circuit 404 detects a switching code from T-ch data to control serial and outputs a switching signal 40
6 is generated. Also in this case, data other than the control code is sent to the next upstream control serial / T-ch switching block (transmission signal 407). Generated switching signal 40
6 is an uplink serial control code detection block 102, an uplink control serial / T-ch switching block 104, a downlink control serial / T-ch switching block 105, and an asynchronous T-ch signal asynchronous as shown by the dotted line in FIG. The data is sent to the synchronous conversion block 106.

[0016]

As described above, according to the present invention,
Since the communication adapter is not equipped with CPU / firmware and is not controlled by these, the number of components in the communication adapter is reduced, and the size and power consumption can be significantly reduced.

[Brief description of the drawings]

FIG. 1 shows a controller-less PHS showing an embodiment of the present invention.
It is a block diagram of an adapter.

FIG. 2 is a data flow diagram of a PHS adapter showing one embodiment of the present invention.

FIG. 3 is a detailed configuration diagram of an uplink serial control code detection block in FIG. 1;

FIG. 4 is a detailed configuration diagram of a T-ch control code detection block in FIG. 1;

FIG. 5 is a system diagram when the communication adapter of the present invention is applied to a PHS communication system.

[Explanation of symbols]

11: Computer (upper device), 12: Communication adapter, 13: PS, 14: PHS public system, 15: Other mobile phone or PS, 16, 17: Wireless line, 10
DESCRIPTION OF SYMBOLS 1 ... T-ch control code detection block, 103 ... flow control block, 102 ... uplink serial control code detection block, 104 ... uplink control serial / T-ch switching block, 105 ... downlink control serial / T-ch switching block, 106 ... Uplink T-ch signal asynchronous-to-synchronous conversion block, 107. Downlink T-ch signal synchronous-to-asynchronous conversion block, 108 LSI, 109 TXD signal, 110 R
XD signal, 111 ... RTS signal, 112 ... CTS signal,
113 DCD / RI signal, 114 downlink control signal, 1
15 ... Uplink control signal, 116 ... Uplink T-ch signal, 11
7 ... Up control serial signal, 118 ... Down T-ch signal, 119 ... Down control serial signal, 201 ... Serial signal from host device, 202 ... PS control signal, 203 ...
PS control serial signal, 204 PS upstream digital signal, 205 PS control code, 206 call control data 1, 207 PHS adapter control code 1, 208 T
-Ch data, 209 ... PHS adapter control code 2,
210 ... call control data 2, 211 ... PS control, 212 ...
Call control 1, 213: Call control 2, 214: T-ch data, 301: Uplink serial control code detection block, 3
02: header detection circuit, 303: type detection circuit, 304
… Data length detection circuit, 305… data detection circuit, 306
... Data SKIP circuit, 307 ... Control signal generation circuit, 3
08: signal from the flow control block, 309: uplink control signal, etc., 401: T-ch control code detection block,
402 ... "00" deletion circuit, 403 ... "FF" 5 byte continuous detection circuit, 404 ... "FF" 6th byte detection circuit,
Reference numeral 405 denotes an upstream data signal, 406 denotes a T-ch / serial switching signal, and 407 denotes a transmission signal to the upstream control serial / T-ch switching block.

Claims (4)

[Claims] An interface for controlling a communication device has a two-channel configuration of asynchronous serial data for controlling the communication device and synchronous serial data transferred at the time of communication. A communication adapter having an asynchronous serial one-channel interface, a first control code detecting means for detecting a switching control code of a two-channel serial interface from serial data sent from the host device; A second control code detecting means for detecting a control code for controlling the communication device from the first control code detecting means, and an uplink and a downlink for actually switching channels by the switching control code detected by the first control code detecting means. A controllerless communication adapter comprising channel switching means. . 2. The communication adapter according to claim 1, wherein a communication protocol process and a communication device control process are performed in a host device that controls the communication adapter without including a computer that processes firmware. Claim 1
The controllerless communication adapter according to 1. 3. The first control code detecting means detects specific data in serial data sent from a higher-level device as a switching control code and, based on the contents of the data, transmits data subsequent to the data to the communication control code. The controllerless communication adapter according to claim 1, wherein a signal for switching to which of the two interface channels on the device side is transmitted is transmitted. 4. The second control code detecting means detects specific data in serial data sent from a host device, and generates a communication device control signal other than the serial data based on the content of the data. The controllerless communication adapter according to claim 1, wherein the control signal is transmitted.