JP2000261346A - High frequency ic - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make a high frequency IC small-sized and light in weight, to save power consumption and also to suppress the mixing and radiation of an unnecessary signal by unnecessitating an externally mounted filter between frequency converting parts and reducing the number of parts in a high frequency IC having two stage frequency converting parts. SOLUTION: This high frequency IC has two stage frequency converting parts, a lower filter 16 is built in inside an IC between a frequency converting part 14 on a 1st stage and frequency converting parts 17 and 18 on a 2nd stage, the parts 17 and 18 on the 2nd stage form a quadrature down conversion mixer, a bandpass filter 19 is built in inside the IC after the parts 17 and 18 on the 2nd stage, and an I signal and a Q signal are outputted as a digital signal. As the filter 19, an asymmetric polyphase filter is used.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a high-frequency IC, and more particularly to an RF front-end IC for converting a high-frequency signal of several hundred megahertz to several gigahertz into a low-frequency signal of about several megahertz called a baseband signal. It is.

[0002]

2. Description of the Related Art Conventionally, a high-frequency signal for down-converting a high-frequency signal into a baseband signal by two-stage frequency conversion is conventionally used.
In C, a high-order bandpass filter having a steep selection characteristic is externally provided between the first-stage frequency converter and the second-stage frequency converter. In addition, a low-pass filter or a band-pass filter is provided externally or built in the IC after the second-stage frequency converter.

[0003]

In a conventional high-frequency IC, a band-pass filter between a first-stage frequency converter and a second-stage frequency converter is externally mounted. However, the number of parts has increased, which has hindered downsizing and weight reduction. Further, in order to exchange signals between the high-frequency IC and an external filter, it is necessary to provide a driver inside the IC, and there is a problem that power consumption increases. Further, there is a problem that an unnecessary signal is picked up outside the IC or an unnecessary signal is radiated.

Therefore, it is desired to incorporate a band-pass filter between the first-stage frequency converter and the second-stage frequency converter into a high-frequency IC, but a higher-order band-pass filter having a steep selection characteristic is desired. It was difficult to incorporate this into an IC.

The present invention has been made in view of the above points, and in a high-frequency IC having a two-stage frequency converter, an external filter between the frequency converters is not required.
It is an object of the present invention to reduce the number of parts to reduce the size, weight, and power consumption, and to suppress mixing and radiation of unnecessary signals.

[0006]

According to the high frequency IC of the present invention, in order to solve the above-mentioned problems, as shown in FIG. 1, a high frequency IC having a two-stage frequency conversion section,
First-stage frequency converter 14 and second-stage frequency converter 1
A low-order low-pass filter 16 is built in the IC between 7 and 18, and the second-stage frequency converters 17 and 18 form a quadrature down-conversion mixer. It outputs an I signal and a Q signal. More preferably, the band pass filter 19 and the A / A
The D converters 22 and 23 are built in the IC, and output the I signal and the Q signal as digital signals.

Here, the low-pass filter 1 between the first-stage frequency converter 14 and the second-stage frequency converters 17 and 18 is used.
6 simply attenuates a signal that is down-converted to a second intermediate frequency signal f _IF2 by a third harmonic of the second local oscillation frequency signal f _LO2 used in the second-stage frequency converters 17 and 18. Since this is preferably a low-order filter, it can be built in an IC.

[0008]

FIG. 1 shows the configuration of a high-frequency IC for receiving GPS signals according to an embodiment of the present invention. A portion surrounded by a dotted line is a high-frequency IC. GPS antenna 1
The frequency f _gps of the GPS signal received by 1 is input to a high frequency IC via a band pass filter (BPF) 12. The GPS signal input to the high-frequency IC is amplified by a low noise amplifier (LNA) 13 and input to a first-stage frequency converter 14. The oscillation frequency of the voltage controlled oscillator (VCO) 24 is input to the first-stage frequency converter 14 as a first local oscillation frequency signal f _LO1 . The first-stage frequency converter 14 down-converts the frequency f _gps of the GPS signal into a first intermediate frequency signal f _IF1 and outputs the first intermediate frequency signal f _IF1 . The output of the frequency conversion unit 14 is input to a low-pass filter (LPF) 16 via a buffer amplifier 15. The output of the low-pass filter 16 is input to the second-stage frequency converters 17 and 18, and is down-converted to the second intermediate frequency signal _fIF2 . The second-stage frequency converters 17 and 18 use the second local oscillation frequency signals f _LO2 having different phases by 90 degrees to use the second intermediate frequency signal f _{IF2 of the in-} phase component (I signal) and the quadrature component (Q signal). Is created so that a mirror signal can be suppressed by a circuit at a subsequent stage. The pair of second intermediate frequency signals f _IF2 is
The unnecessary components are removed by the buffer amplifiers 20 and 21.
And in-phase component (I signal) via A / D converters 22 and 23
And a quadrature component (Q signal).

The first and second local oscillation frequency signals f _LO1 and f _LO2 are created by a phase locked loop (PLL). That is, the oscillation output of the crystal oscillator 27 is input to the phase comparator 28, and the voltage control oscillator (VCO)
24 is output to a first frequency divider 25 and a second frequency divider 26.
Is compared with a signal obtained by dividing the frequency by N × M, and a voltage-controlled oscillator (VCO)
The feedback control of the oscillation frequency of 24 is performed. Then, the oscillation output of the voltage controlled oscillator (VCO) 24 is used as the first local oscillation frequency signal f _LO1, and this is _divided by the first frequency divider 25 into 1 / N.
Of the second local oscillation frequency signal f _LO2
And Further, the second local oscillation frequency signal f _{L O2} divides the second frequency divider 26 to a frequency of 1 / M, to match the frequency of the crystal oscillator 27.

The operation of this embodiment will be described below with reference to FIGS. In each figure, the horizontal axis represents frequency, and the vertical axis represents signal strength. However, the reason why the frequency is divided into a positive region and a negative region across 0 Hz is that a trigonometric function is represented by a complex function.

First, FIG. 2 shows a function performed by a bandpass filter 12 disposed between a GPS antenna 11 and a high-frequency IC. FIG. 2A shows a bandpass filter 1.
2B shows a signal output from the band-pass filter 12, and FIG. The characteristics required of the band-pass filter 12 are as follows:
To suppress the mirror signal generated in the above. In the figure, signals 1 to 3 are unnecessary signals, and signals 2 and 3 are suppressed by the band pass filter 12.

Next, FIG. 3 shows a function performed by the frequency converter 14 in the first stage. FIG. 3A shows the frequency converter 1.
4 is a signal input to the frequency converter 4, and FIG. 3B is a signal output from the frequency converter 14. In the figure, f _LO1 is a first local oscillation frequency signal, and the GPS signal is mixed with this signal f _LO1 to produce a first intermediate frequency signal f _IF1.
Downconverted to At this time, the unnecessary signal 3 is also converted to the same frequency as that of the GPS signal. However, since the unnecessary signal 3 is sufficiently suppressed by the band-pass filter 12, the interference from the unnecessary signal 3 is greatly reduced.

Next, FIG. 4 shows a second-stage frequency converter 17,
18 shows the functions performed. FIG. 4A shows a signal input to the frequency conversion units 17 and 18, and FIG. 4B shows a signal output from the frequency conversion units 17 and 18. In the figure,
f _LO2 is a second local oscillation frequency signal;
By frequency mixing with _LO2 , the GPS signal is downconverted to a second intermediate frequency signal _fIF2 . At this time, the second local oscillation frequency f _LO2 is selected so that the unnecessary signal 1 has a negative frequency in the complex function expression and the required GPS signal has a positive frequency in the complex function expression.

Next, FIG. 5 shows a function performed by the band-pass filter 19. FIG. 5A shows a signal input to the bandpass filter 19, and FIG. 5B shows a signal output from the bandpass filter 19. The band-pass filter 19 is an asymmetric polyphase filter having a characteristic of passing a positive frequency represented by a plurality of functions and blocking a passage of a negative frequency represented by a complex function. As shown in FIG. Due to this characteristic, the unnecessary signal 1 is sufficiently attenuated with respect to the GPS signal.

FIG. 6 shows the operation when only the I signal of claim 6 is output. FIG. 6A shows the I signal and the Q signal.
FIG. 6B shows a case where only the I signal is output when a signal is output. At baseband, the I signal is again
-If there is a function of performing Q demodulation, the high-frequency IC does not necessarily have to have a function of outputting a Q signal,
In such a case, if only the I signal is output, the configuration of the output unit of the IC can be simplified.

The gist of the present invention is that a low-order low-pass filter is built in the IC between the first-stage frequency converter and the second-stage frequency converter. The bandpass filter provided after the frequency conversion unit may be provided outside the IC. Further, this bandpass filter is not limited to a complex bandpass filter, and a real bandpass filter may be used. As an example, FIG. 8 shows bandpass characteristics when two real bandpass filters are used as the bandpass filter 19 provided after the second-stage frequency converter. In this case, the bandpass characteristic of the complex function expression for positive frequencies and the bandpass characteristic of the complex function expression for negative frequencies are symmetric. However, in this case, this IC
It is necessary to suppress unnecessary mirror signals outside of the above.

FIG. 9 is a principal block diagram for explaining various embodiments of the present invention. The configuration up to the second-stage frequency converters 17 and 18 is the same as that in FIG. In the drawing, a vertical broken line indicates a boundary between the inside and the outside of the IC.
The right side of the broken line is outside the IC, and the left side of the broken line is inside the IC. In the embodiment, a filter corresponding to the band-pass filter 19 is realized by a digital filter inside the IC, and the positional relationship between the A / D converter and the band-pass filter is replaced with the configuration of FIG. . In the embodiment, a filter corresponding to the band-pass filter 19 is realized outside the IC by a digital filter, and the analog band-pass filter 19 inside the IC is omitted from the configuration of FIG. The configuration is such that a pass filter is externally attached. In the embodiment, the output of the quadrature down-conversion mixer is output in analog form, and an A / D converter and a digital band-pass filter are externally provided outside the IC. In the first to third embodiments, a low-pass filter as an anti-aliasing filter is required before the A / D converter.

In the embodiment shown in FIG. 9, a digital band-pass filter (BPF) is used as the mirror signal removing means. However, this may be replaced by a digital complex mixer as shown in FIG. good. In this case, the output of each A / D converter is mixed with a digital sine wave I and a cosine wave Q, and the output is added and subtracted, as shown in FIG. And a required signal is converted to a positive low frequency (baseband signal) represented by a complex function and passed through a low-pass filter (LPF) having characteristics as indicated by a broken line in FIG. Thus, only necessary signals are extracted. FIG.
The frequency fc indicated by the arrow in (a) is the frequency to be mixed by the complex mixer of FIG.

[0019]

According to the first to seventh aspects of the present invention, the filter disposed between the two frequency converters does not need to be an external component, and can be built in the IC, so that the number of components can be reduced. As a result, there is an effect that a reduction in size and weight and a reduction in power consumption can be realized, and mixing and radiation of unnecessary signals can be suppressed. According to the invention of claim 6, when the function of extracting the quadrature component Q signal from the in-phase component I signal exists in the baseband, the configuration of the output unit of the high-frequency IC can be simplified and the chip area can be reduced. Thus, power consumption can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a GPS signal receiving high-frequency IC as one embodiment of the present invention.

FIG. 2 is an explanatory diagram for explaining a function of a bandpass filter between an antenna and a high-frequency IC of the circuit of FIG. 1;

FIG. 3 is an explanatory diagram for explaining a function of a first-stage frequency conversion unit of the circuit in FIG. 1;

FIG. 4 is an explanatory diagram for explaining a function of a second-stage frequency converter of the circuit of FIG. 1;

FIG. 5 is an explanatory diagram for explaining a function of a filter according to claim 4;

FIG. 6 is an explanatory diagram of an output signal according to claim 6;

FIG. 7 is a frequency characteristic diagram of the filter according to claim 4;

FIG. 8 is a frequency characteristic diagram of the filter according to claim 5;

FIG. 9 is an explanatory diagram for explaining various embodiments of the present invention.

FIG. 10 is a main part block diagram of an embodiment using the complex mixer of claim 7;

FIG. 11 is an explanatory diagram for explaining a function of a complex mixer according to claim 7;

[Explanation of symbols]

 14 First-stage frequency converter 16 Low-pass filter 17 Second-stage frequency converter (in-phase component) 18 Second-stage frequency converter (quadrature component) 19 Band-pass filter

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5J062 CC07 DD14 GG02 5K004 AA04 EA10 EH01 5K020 AA08 DD13 DD15 DD21 EE01 FF04 GG04 HH11 HH13

Claims (7)

[Claims] 1. A high frequency I having a two-stage frequency converter.
C, a low-order low-pass filter is built in the IC between the first-stage frequency converter and the second-stage frequency converter, and the second-stage frequency converter forms a quadrature down-conversion mixer. And outputting an I signal and a Q signal from the second-stage frequency converter.
C. 2. The high-frequency IC according to claim 1, further comprising a band-pass filter inside or outside the IC after the second-stage frequency converter. 3. The high-frequency IC according to claim 2, further comprising an A / D converter inside or outside the IC before or after the bandpass filter. 4. The high-frequency IC according to claim 1, wherein the band-pass filter is an asymmetric polyphase filter. 5. The band-pass filter has two real filters.
2. The device according to claim 1, wherein the device comprises a bandpass filter.
Or the high-frequency IC according to 2 or 3. 6. The high frequency IC according to claim 1, wherein only the I signal or the Q signal is output. 7. The high-frequency IC according to claim 1, further comprising a complex mixer inside or outside the IC after the second-stage frequency converter.