JP2000194864A - Pattern defect classification device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To automatically discriminate whether a defect is a short (short- circuit), open (disconnection) or the defect of contamination deposition (dust) in the case that the defect is present on a pattern formed on an inspected body surface. SOLUTION: This defect classification device is provided with an inspected body pattern extracted image storage device CM1c for storing an inspected body pattern extracted image which is the image for which only a pattern actually formed by an element for forming the area of a prescribed pattern is extracted from the inspected body image of a prescribed range including a defective part, a model pattern extracted image storage device CM2c for storing a model pattern extracted image which is the image for which only the prescribed pattern area is extracted from a model image corresponding to the image part of the inspected body surface for which the inspected body pattern extracted image is prepared and extracted, and an automatic pattern defect discrimination means C3 for automatically discriminating the kind of the pattern defect of the inspected body pattern defective part based on the inspected body pattern extracted image and the model pattern extracted image.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pattern defect classifying apparatus for inspecting defects on a surface of a wafer to be inspected such as a silicon wafer having a predetermined pattern or a surface of a mask in a process of manufacturing an LSI or the like. The present invention relates to a pattern defect classifying apparatus capable of automatically determining what kind of abnormality in a surface of a wafer to be inspected causes a defect in the predetermined pattern.

[0002]

2. Description of the Related Art As the LSI is highly integrated,
SEM (scanning electron microscope) has come to be used for defect inspection in the LSI manufacturing process. Also, SE
The types of defects have been classified based on the electron microscope image taken by M, and various analyzes have been attempted using the classification results.

The following technology (J0) is used as a conventional defect inspection apparatus.
1) is known. (J01) Japanese Patent Application Laid-Open No. 10-135288 discloses a technique for inspecting a defect on a surface of a wafer to be inspected, classifying the defect according to the shape, size, and the like of the defect. A defect classification apparatus is described which stores information such as the shape, size, and position of a defect and a SEM image (scanning electron microscope image) of the defect in a database.

[0004]

[Problem to be Solved by the Invention] (Problem of (J01)) However, the prior art (J01) does not describe a technique for automatically determining the type of pattern defect. In the process of manufacturing an LSI or the like, a defect inspection is performed on the surface of a silicon wafer on which a wiring pattern or the like is formed. If it can be determined, it is considered that the cause of the occurrence of the defect in the wiring pattern can be easily clarified and the occurrence of the defect can be easily prevented. Whether the defect of the wiring pattern is open (open circuit) or short circuit (short circuit) is determined by detecting the actual pattern (pattern shape actually formed) of the wiring pattern, By comparing with a predetermined pattern (determined pattern shape), it becomes possible to automatically determine. Therefore, in order to automatically determine whether the defect of the wiring pattern is open (disconnection) or short-circuit (short-circuit), the actual pattern of the wiring pattern (the actually formed pattern shape)
You need to know.

[0005] In view of the above-mentioned circumstances, the present invention is directed to the following contents (O01) to (O04). (O01) When there is a defect on the surface of a test object having a predetermined pattern formed on the surface, it is possible to automatically determine whether or not the defect is a defect that causes a short circuit of the predetermined pattern. thing. (O02) When there is a defect on the surface of a test object having a predetermined pattern formed on the surface, it is possible to automatically determine whether the defect is a defect that causes the predetermined pattern to open (disconnect). thing. (O03) To automatically determine whether the type of pattern defect in the defect area is a defect (dust) due to foreign matter attachment. (O04) In the case where there is a defect on the surface of the test object on which the predetermined pattern is formed on the surface, the pattern on which the element for forming the predetermined pattern is actually formed on the surface of the test object on which the defect exists. (Ie, the actual pattern).

[0006]

Next, a description will be given of the present invention which has solved the above-mentioned problems. In the description of the present invention, reference numerals in parentheses added after constituent elements of the present invention denote constituent elements of the present invention. Reference numerals of corresponding components of the embodiment described later. The reason why the present invention is described in association with the reference numerals of the components of the embodiments described later is to facilitate understanding of the present invention, and not to limit the scope of the present invention to the embodiments.

According to the present invention, there is provided a pattern defect classifying apparatus according to the present invention, which has the following requirements. (A01) An element for forming a predetermined pattern is actually formed. An inspection object image storage device (CM1a) for storing an inspection object image including an image of a defect area found in a previously performed inspection on the inspection object surface; An inspection object defect information storage device (CM1b) storing inspection object defect information including a position and an element for forming an area of the predetermined pattern from an inspection object image in a predetermined range including the defect area are actually formed. An inspection object information storage device (CM1c) having an inspection object pattern extraction image storage device (CM1c) for storing an inspection object pattern extraction image capable of specifying the outer shape of the image from which only the pattern is extracted
1), (A02) a model pattern extracted image capable of specifying the outer shape of an image in which only the predetermined pattern region is extracted from a model image corresponding to an image portion of the surface of the inspected object from which the extracted image of the inspected object pattern is created and extracted (A03) Automatically determine the type of pattern defect in the defect area on the surface of the inspection object based on the extracted image of the inspection object pattern and the extracted image of the model pattern. Automatic pattern defect discriminating means (C3) for discriminating.

[0008] The "model image" corresponds to the "test object".
Means an image used for comparison with the above-mentioned "image portion on the surface of the inspection object" for the purpose of defect inspection. For example, when the “inspected object” is one chip on the inspected wafer, the following image can be used as the “model image”. (1) An image of a chip which has the same shape as the chip to be inspected and which has been previously inspected and found to be free from defects. (2) In the case of inspecting any one of a plurality of chips formed on a wafer, an image of a chip adjacent to the inspected chip. In any of the cases (1) and (2), if there is a portion different from the model image in the image portion of the surface of the inspection object, the portion can be regarded as a defect and the pattern defect classification can be performed.

"Examined object pattern extracted image" stored in the inspected object pattern extracted image storage device (CM1c).
Means the extracted image itself or data capable of specifying the outer shape of the extracted image. The “model pattern extracted image” stored in the model pattern extracted image storage device (CM2c) means the extracted image itself or data capable of specifying the outer shape of the extracted image.

In the pattern defect classifying apparatus of the present invention, a wafer, a chip on the wafer, a mask for exposure, or the like can be used as the object to be inspected. In addition, an image captured by an optical microscope, an SEM (scanning electron microscope), or the like can be used as the inspection object image and the model image. For example, when the object to be inspected is a wafer to be inspected and an image taken by the SEM is used as an image of the object to be inspected or a model image, the image of the object to be inspected is a SEM image of the wafer to be inspected, and the image memory of the object to be inspected ( CM1a) is an inspection wafer SEM image storage device. The model image is a model wafer SEM image, and is stored in a model image storage device (CM
2a) is a model wafer SEM image storage device. Also,
The pattern defect classification device can be configured by a control computer such as an optical microscope or an SEM, a network connection computer connected to the control computer via a network, and the like.

When the pattern defect classifying apparatus is constituted by the control computer, the pattern defect classifying apparatus can have a function of creating the inspection object image or the model image. In that case, the defect pattern classification device can be configured to have the following means. (1) Inspection object image creation means (means for creating an inspection object image including an image of a defect area found in an inspection performed on the surface of the inspection object in advance) (C0a). (2) Inspection wafer defect information creation means (performs detailed inspection of the defect area and stores the detailed inspection result (defect position, shape, size, defect ID number, etc. in a predetermined area including the defect area)) Means for storing in the device) (C0b). (3) Model image creation means (means for creating an image of a defect-free model surface on which the same predetermined pattern as the object to be inspected is formed) (C0c). When the pattern defect classification device is configured by the network connection computer (a computer for defect information classification and storage such as a DIFS server), the pattern defect classification device performs the above (1),
Since the function of (2) cannot be provided, it is possible to have a means for receiving and storing the image of the subject and the model image via a network.

The functions of the following means (4) to (6) are as follows:
Regardless of whether the pattern defect classifying device is configured by the network connection computer or the control computer, the pattern defect classifying device can be provided. (4) Inspection object pattern extraction image creating means (specifying the outer shape of an image in which only the pattern actually formed by the elements forming the area of the predetermined pattern is extracted from the inspection object image in a predetermined range including the defect area) Means for creating a possible inspected object pattern extracted image) (C1a). (5) Model pattern extracted image creating means (a model capable of specifying the outer shape of an image in which only the predetermined pattern area is extracted from a model image corresponding to an image portion of the surface of the inspected object from which the inspected object pattern extracted image is created and extracted) Means for creating a pattern extraction image) (C2b). (6) Defect area extracted image creating means (means for creating a defective area extracted image that specifies the outer shape of an image in which only a defective area is extracted from the inspection object image) (C1b). For example, when the pattern defect classifying device is configured by the network-connected computer, the pattern defect classifying device omits the functions of the means (3) to (5) and, instead, replaces the functions of the means (3) to (5). It is possible to provide a means for receiving and storing the inspection object pattern extraction image, the model pattern extraction image, and the defect area extraction image created by the computer having the function (5).

(Operation of the present invention) In the pattern defect classifying apparatus of the present invention having the above configuration, the inspection wafer information storage device (CM1) includes the inspection object image storage device (CM1a) and the inspection object defect information storage. It has a device (CM1b) and an inspection object pattern extraction image storage device (CM1c). The inspection object image storage device (CM1a) is an inspection object image which is an image obtained by imaging the surface of the inspection object on which elements to form a predetermined pattern are actually formed with a scanning electron microscope or an optical microscope. The inspection object image including the surface defect area found in the inspection performed in advance is stored. The inspection object defect information storage device (CM1b) stores inspection object defect information including a position of a defect area on the inspection object surface. The inspected object pattern extraction image storage device (CM1c) specifies an outer shape of an image obtained by extracting only a pattern actually formed by an element forming the area of the predetermined pattern from an inspected object image in a predetermined range including the defect area. The extracted pattern of the object to be inspected is stored.

The model pattern extraction image storage device (CM2c) of the model information storage device (CM2) is configured to extract the inspection object pattern extraction image from the model image corresponding to the image portion of the surface of the inspection object from which the predetermined pattern area is extracted. A model pattern extracted image from which only the outer shape of the extracted image can be specified is stored. It should be noted that the inspection object pattern extraction image and the model pattern extraction image are separated by another device (optical microscope for inspecting the inspection object or SEM (scanning electron microscope)).
Etc.) can be received and stored on the network, or can be created and stored by the pattern defect classifier itself. The pattern defect automatic determination means (C3) automatically determines the type of pattern defect in a defect area on the surface of the inspection object based on the inspection object pattern extraction image and the model pattern extraction image.

[0015]

(Embodiment 1) Embodiment 1 of the pattern defect classification apparatus of the present invention is characterized in that the present invention satisfies the following requirement (A04). A model image storage device (CM) that stores an image of a defect-free model surface on which a predetermined pattern identical to the body is formed.
Model information storage device (CM2) having 2a),

(Operation of the First Embodiment) In the first embodiment of the pattern defect classification apparatus of the present invention having the above-described configuration, the model information storage device (CM2) has a model image storage device (CM2a). Model image storage device (CM2a)
Stores an image of a defect-free model surface on which the same predetermined pattern as the inspection object is formed. From the model image, it is possible to create a model pattern extraction image capable of specifying the outer shape of the image in which only the predetermined pattern region is extracted, and the created model pattern extraction image is the model pattern extraction image Storage device (CM2c)
It is possible to memorize it.

(Embodiment 2) Embodiment 1 of the pattern defect classification apparatus of the present invention is that the present invention or Embodiment 1 of the present invention has the following requirements (A05) and (A06). (A05) An object to be inspected which can specify the outer shape of an image obtained by extracting only a pattern actually formed by an element forming the area of the predetermined pattern from an image of the object to be inspected in a predetermined range including the defect area. Inspection object pattern extraction image creation means (C1a) for creating a pattern extraction image,
(A06) Creating a model pattern extracted image from which only the predetermined pattern region is extracted from a model image corresponding to an image portion of the surface of the inspected object from which the extracted image of the inspected object pattern is extracted is created. Model pattern extraction image creation means (C2b).

(Operation of the Second Embodiment) In the second embodiment of the pattern defect classification apparatus of the present invention having the above-described configuration, the inspection object pattern extracted image creating means (C1a) includes a predetermined area including the defect area. Then, an extracted pattern of the object to be inspected is created from which only the pattern actually formed by the elements forming the area of the predetermined pattern is extracted from the image of the object to be inspected. The model pattern extraction image creating means (C2b) can specify the outer shape of an image in which only the predetermined pattern area is extracted from a model image corresponding to an image portion of the surface of the object from which the object pattern extraction image has been created and extracted. Create a model pattern extracted image. Note that the created inspection object pattern extraction image and model pattern extraction image are stored in the inspection object pattern extraction image storage device (CM1c) and the model pattern extraction image storage device (C
M2c).

(Embodiment 3) Embodiment 3 of the pattern defect classification apparatus of the present invention is characterized in that the following requirement (A07) is provided in the present invention or Embodiment 1 or 2 of the present invention. (A07) A defect region extraction image storage device (CM1) for storing a defect region extraction image for specifying the outer shape of an image in which only a defect region is extracted from the inspection object image
the test object information storage device (CM1) having d);

(Operation of the Third Embodiment) In the third embodiment of the pattern defect classifying apparatus according to the present invention having the above-described configuration, the inspection object information storage device (CM1) stores a defect area from the inspection object image. It has a defect area extraction image storage device (CM1d) for storing a defect area extraction image for specifying the outer shape of the image from which only the extraction is performed. By using the defect area extraction image stored in the defect area extraction image storage device (CM1d), it is determined whether or not the type of the pattern defect in the defect area is a defect (dust) due to foreign matter adhesion which is open (disconnection). And so on can be determined.

(Embodiment 4) Embodiment 4 of the pattern defect classification apparatus of the present invention is characterized in that the following requirement (A08) is provided in the present invention or in Embodiment 1 or 3 of the present invention. (A08) There is provided a pattern short automatic discrimination means (C3a) for discriminating whether or not the defective area is a pattern short (short circuit) based on the inspection object pattern extracted image and the model pattern extracted image. The pattern defect automatic discrimination means (C3).

(Operation of the Fourth Embodiment) In the fourth embodiment of the pattern defect classifying apparatus of the present invention having the above-mentioned configuration, the automatic pattern shorting discriminating means (C3a) of the automatic pattern defect discriminating means (C3) includes: It is determined whether or not the defect area is a short circuit of the pattern based on the inspection object pattern extraction image and the model pattern extraction image.

(Embodiment 5) Embodiment 5 of the pattern defect classification apparatus of the present invention is characterized in that the following requirements (A09) are satisfied in Embodiment 3 or 4 of the present invention. A09) Automatic pattern open determination for determining whether or not the type of pattern defect in the defect area is open (disconnection) based on the inspection object pattern extraction image, the model pattern extraction image, and the defect area extraction image Said pattern defect automatic determination means (C3) having means (C3b).

(Operation of Embodiment 5) In Embodiment 5 of the pattern defect classification apparatus of the present invention having the above-mentioned configuration, the pattern open automatic discriminating means (C3b) of the pattern defect automatic discriminating means (C3) includes: It is determined whether or not the type of pattern defect in the defect area is open (disconnection) based on the inspection object pattern extraction image, the model pattern extraction image, and the defect area extraction image.

(Embodiment 6) Embodiment 6 of the pattern defect classifying apparatus of the present invention is characterized in that the following requirement (A010) is provided in any of Embodiments 3 to 5 of the present invention. (A010) Based on the inspected object pattern extracted image, the model pattern extracted image, and the defect region extracted image, it is determined whether or not the type of pattern defect in the defect region is a defect (dust) to which foreign matter adheres. The pattern defect automatic discriminating means (C3) having a discriminating dust discriminating means (C3c).

(Operation of the Sixth Embodiment) In the sixth embodiment of the pattern defect classification apparatus of the present invention having the above-described configuration, the dust discriminating means (C3c) of the pattern defect automatic discriminating means (C3) includes Based on the inspection object pattern extraction image, the model pattern extraction image, and the defect region extraction image, it is determined whether or not the type of the pattern defect in the defect region is a defect (dust) with foreign matter attached.

(Embodiment 7) The embodiment 7 of the pattern defect classification apparatus of the present invention is the same as that of the present invention or any of Embodiments 1 to 6 of the present invention, except that the following requirement (A) is satisfied.
(A011) Pattern extraction for distinguishing an element forming the area of the predetermined pattern on the inspection object image or the model image from an element forming another area. Pattern extraction data storage device (CM2b) for storing application data.

(Operation of the Seventh Embodiment) In the seventh embodiment of the pattern defect classification device of the present invention having the above configuration, the data storage device for pattern extraction (CM2b) includes Pattern extraction data for distinguishing elements forming a pattern area from elements forming another area is stored. Therefore, by using the pattern extraction data stored in the pattern extraction data storage device (CM2b), the inspection object pattern extracted image creating means (C1a) can convert the inspection object image from the inspection object image. The pattern extraction image can be easily extracted and created, and the model pattern extraction image creation means (C2b) can easily extract and create the model pattern extraction image from the model image.

The inspected object pattern extracted image creating means (C1a) or model pattern extracted image creating means (C2b) for creating the extracted image can employ any of the following two means. . (1) A means for directly extracting an area having the same pattern extraction data. (2) Means for extracting an area that is not extracted as a result by extracting an area where the data for pattern extraction is not the same.

(Eighth Embodiment) An eighth embodiment of a pattern defect classification apparatus according to the present invention is characterized in that the following requirement (A012) is provided in the seventh embodiment of the present invention (A012). The pattern extraction data storage device (CM2b) that stores, as the pattern extraction data, image characteristics of the region of the predetermined pattern on the inspection object image or the model image. As features of the image, luminance, texture, edge (differential signal), luminance gradient, and the like can be adopted.

(Effect of the Eighth Embodiment) In the eighth embodiment of the pattern defect classification apparatus of the present invention having the above-described configuration, the pattern extraction data storage device (CM2b) stores the inspection object image or the model image. The feature of the image in the area of the predetermined pattern is stored as the pattern extraction data. Therefore, by using the pattern extraction data (data indicating the characteristics of an image, luminance, texture, etc.) stored in the pattern extraction data storage device (CM2b), the inspection object pattern extracted image creating means (C1
a) extracting a pattern of an object to be inspected, in which a region having the same luminance characteristic is extracted from an image of the object to be inspected in a predetermined range including the defect area, and the outline of the image obtained by extracting only the actual pattern is extracted; Create an image. Further, the model pattern extraction image creating means (C2b) extracts an area having the same luminance characteristic from a model image corresponding to a predetermined range including the defect area, and extracts only the actual pattern. Create a model pattern extraction image that can specify the

[0032]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a specific example (embodiment) of the pattern defect classifying apparatus of the present invention will be described with reference to the drawings, but the present invention is not limited to the following embodiments. (Embodiment 1) FIG. 1 is an overall explanatory diagram of Embodiment 1 of a pattern defect classification apparatus of the present invention. In FIG. 1, SEM (Sc
anning Electoron Microscope (scanning electron microscope), optical foreign matter inspection device 1, optical defect inspection device 2, optical review device, DIFS (Defe
ct Image Filing System) server and CIM (Comp
uter Integrated Manufacturing, a host computer for controlling manufacturing equipment, etc.
et) connected by N. The SEMC, which is a control device of the SEM, includes a computer having a CPU, a ROM, a RAM, an I / O, and the like. A display DS, a memory Me, a keyboard K, and the like are connected to the SEMC. In FIG. 1, the foreign matter inspection device 1, the defect inspection device 2, the DIFS server 4, and the like are also configured by a computer to which a display D, a memory Me, a keyboard K, and the like are connected, and a program stored in a memory of the computer. Are configured to perform various processes. The optical foreign matter inspection device 1 and the optical defect inspection device 2 are commercially available devices, and are used as the preliminary inspection devices (1, 2) in the first embodiment.

The function of each of the optical inspection devices 1 and 2 is as follows. (1) Foreign substance inspection apparatus 1: The foreign substance inspection apparatus 1 automatically detects foreign substances (dust, etc.) on a wafer to be inspected without a pattern and functions to file the position and size of the foreign substances (function of organizing and storing the foreign substances). ) And a function of transmitting the filed result, that is, preliminary inspection information, to the DIFS server 4. (2) Defect Inspection Apparatus 2: The defect inspection apparatus 2 automatically detects a foreign substance or a pattern defect on a wafer to be inspected with or without a pattern, and files the standing and size of the defect. It has a function of transmitting the result, that is, the preliminary inspection information, to the DIFS server 4.

(3) Optical reviewing device 3: The optical reviewing device 3 is constituted by an optical microscope. A device for observing defects
It has a function of transmitting an image of a wafer to be inspected taken by an optical microscope to the DIFS server 4 as preliminary inspection information. In addition, the results of the review can be classified, and the classification results can be transmitted to the DIFS server 4 as preliminary inspection information.

The preliminary inspection information file includes, in addition to a product number, a lot, a wafer ID to be inspected, a process, a manufacturing apparatus, a date, etc., the number of foreign substances and defects, a position on the wafer to be inspected, a classification code, and a size. Are stored. The preliminary inspection information stored in the preliminary inspection information file can be displayed, for example, as shown in FIG. FIG. 2 is a view showing a display example of preliminary inspection information, FIG. 2A is a view showing the outer shape of a wafer to be inspected as a wafer to be inspected and the position of a foreign matter or defect on the wafer to be inspected, and FIG. It is a figure which shows number # 0, # 1, ..., and information, such as a position, a magnitude | size, in tabular form.

From the preliminary inspection information, it is possible to grasp the state of occurrence and tendency of defects in the manufacturing process of the wafer to be inspected. For this reason, in the yield management system, a preliminary inspection information file such as a foreign matter information file or a defect information file is indispensable. The preliminary inspection information files (foreign matter information file and defect information file) obtained by the preliminary inspection devices (1, 2) are stored in the computer attached to the foreign matter inspection device 1 or the defect inspection device 2 or the DIFS server 4, respectively. Is done.

(4) DIFS server 4: The DIFS server 4 has a function of classifying and storing the preliminary inspection information transmitted from the preliminary inspection device (1, 2), and a defect image and defect transmitted from the SEM. SEM inspection information (including an inspection result, an X-ray analysis result by an EDS mounted on the SEM, etc.) such as various kinds of information regarding the defect and classification information of the defect. The DIFS server 4 has a function of transmitting requested data in response to a data request signal from another device. By managing the preliminary inspection information in the DIFS server 4, it is not necessary to store the preliminary inspection information for each inspection device, and the preliminary inspection information management (backup, rearrangement, deletion, etc.) is facilitated, and the SEM requires the inspection information. It is possible to easily extract the preliminary inspection information by searching the DIFS database (inspection wafer information database) without searching for the individual inspection apparatus.

(5) SEM: SEM (Scanning Electoron Maicroscope, scanning electron microscope) as the detailed inspection apparatus of the first embodiment is an SEM main body, SEMC (SEM Contr.
oler, SEM controller).
The SEMC is connected to the network N, and has a function of transmitting and receiving information to / from the foreign matter inspection device 1, the defect inspection device 2, the DIFS server 4, and the CIM connected to the network N. The SEMC is a SEM
Has a display D1 for displaying an image taken by the camera. The SEM includes EDS (Energy Dispersive X-
ray Spectrometer, energy dispersive X-ray spectrometer). The EDS is a device that detects characteristic X-rays generated from a sample and performs qualitative and quantitative analysis of elements contained in a minute region.

When performing a detailed defect inspection on a wafer to be inspected such as a wafer to be inspected, the SEM performs preliminary inspection information on the inspected wafer to be inspected (the inspection is performed by the particle inspection apparatus 1 and the defect inspection apparatus 2). The obtained information is read from the DIFS server 4, each foreign substance or defect is selected, the stage is moved to a position described in the preliminary inspection information, and observation is performed. By managing the preliminary inspection information in the DIFS server 4, when inspecting the wafer to be inspected for which the preliminary inspection information has been created by the SEM, the preliminary inspection information necessary for the SEM inspection can be read from the DIFS server. Therefore, for example, only by inputting a device name, a lot number, or a cassette ID of a wafer cassette set in advance, it is possible to automatically read preliminary inspection information required for the SEM. After automatic defect classification is performed by the SEMC, the imported image (defect image) and the classification information along with the defect information are transmitted to a DIFS (Defect Image Filing System).
The data is transferred to the server 4 through the network N. The transferred information is stored and managed in the DIFS server 4.

(Structure of SEM) FIG. 3 is an overall explanatory view of an SEM (scanning electron microscope) and an SEMC (SEM controller) used in one embodiment of the pattern defect inspection and classification system of the present invention. Figure 4 shows the SEM and SE
It is the whole perspective view of MC. 3 and 4, the SEM
The (scanning electron microscope) is supported by the upper wall 7 of the outer wall 6 forming the vacuum sample chamber A. An XY stage ST is supported on the bottom wall 8 of the outer wall 6 in the vacuum sample chamber A. The XY stage ST has a Y movement table STy, an X movement table STx, and a rotation table STr. A sample (wafer) W shown in FIG.
Is supported. An operating member housing chamber B that houses an XY stage control mechanism, a vacuum pump, and the like is disposed on the right wall portion 9 of the outer wall 6. On the right side of the operating member storage chamber B, a SEM
C (SEM controller) is arranged. SEMC
Is a UI (user interface) having an electron microscope image display D1 and an optical image display D2 of an optical image pickup device built in the SEM, a power switch, an automatic visual field adjustment button, a shooting button (see FIG. 6), and the like.
It has.

In FIG. 4, a sample exchange chamber E and a cassette storage chamber F are disposed outside a rear wall (-X side wall) 10 of the outer wall 6 formed by the vacuum sample chamber A. The vacuum sample chamber A, the sample exchange chamber E, and the cassette storage chamber F
Are connected to a vacuum pump (not shown),
A vacuum is applied at a predetermined timing. Between the vacuum sample chamber A and the sample exchange chamber E and between the sample exchange chamber E and the cassette storage chamber F, a communication port and a gate valve (not shown) for airtightly shutting off or communicating the communication port, respectively. ) Is provided. Then, the wafer (sample) W is transferred between the wafer cassette K in the cassette storage chamber A and the sample stage ST in the vacuum sample chamber A by the sample transfer device 11 arranged in the sample exchange chamber E. SEM is DI
An inspection can be performed based on the preliminary inspection information read from the FS server 4. In FIG. 6, the SEMC includes the EDS (Energy Dispersive X-raySpeech).
ctrometer, energy dispersive X-ray spectrometer). As shown in FIG. 6, the EDS is connected to the SEMC, is operated by a control signal of the SEMC, and a detection signal is input to the SEMC.

Since the defect number and defect position on the wafer to be inspected are known in advance as shown in FIG. 2A, the SEM determines the defect number # in the preliminary inspection information shown in FIG. 2B.
A predetermined area SEM image including a defect corresponding to 0, # 1,... Is captured and stored. Such a function of the SEM is conventionally known (reference example: Japanese Patent Application Laid-Open No. 10-135288).

FIG. 5 is an explanatory view of a conventional defect inspection function of the SEM. FIG. 5A is a diagram showing a defect position and a chip position (position of an IC chip) on a wafer to be inspected, and FIG. Location and a predetermined area including the defect (SEM
FIG. 5C is a view showing an SEM image of a predetermined area including a defect in FIG. 5B, and FIG. 5D is a chip having the same pattern as the chip shown in FIG. 5B and having no defect. And FIG. 5 of the sample chip
FIG. 5 is a diagram showing the same region as the predetermined region including the defect shown in FIG.
E is a diagram showing an SEM image of a predetermined region in FIG. 5D. The position of the chip (IC chip) on the wafer to be inspected is known as shown in FIG. 5A. Further, as shown in FIG. 5A, the reference x, y coordinates of each chip (for the defect of # 1, x
For defects 0, y0, # 1, x1, y1) are known. Therefore, the position of the defect with the defect number # 0 relative to the reference coordinates x0 and y0 of the chip number 0 can be calculated.

As shown in FIG. 5B, the SEM image of the predetermined area including the defect with the defect number # 0 is an image having a wiring pattern as shown in FIG. 5C, for example. This SEM image includes a chip number and the reference position (x
SEMC corresponding to the coordinate position with the origin at (0, y0)
Alternatively, it is stored in the DIFS server 4. Similarly, the SEM image of a predetermined area including the defect of defect numbers # 1, # 2,...
Stored in the FS server 4.

FIG. 5D is a view showing a chip (model chip) having no defect. In this model chip, an SEM image of the entire area is obtained as a model wafer SEM image.
The image is captured in advance and stored in the SEMC and DIFS server 4. Therefore, SEMC or DIFS server 4
5B from the model wafer SEM image stored in FIG.
SEM image (model image) of an area having no defect corresponding to a predetermined area including the defect of defect number # 0 can be read. FIG. 5E shows a model wafer SEM image corresponding to a predetermined area including the defect with the defect number # 0, and FIG. 5E is an image of only a predetermined pattern and has no defect.

(Explanation of Control Unit of First Embodiment) FIG.
FIG. 4 is a block diagram of C original functions and functions realized by a program according to the first embodiment of the pattern defect classification apparatus of the present invention. In FIG. 6, the SEMC is an I / O that performs input / output of signals with the outside and adjustment of input / output signal levels.
(Input / output interface), ROM (read only memory) storing programs and data for performing necessary processing, RAM (random access memory) for temporarily storing necessary data, and storage in the ROM RAM from downloaded program or hard disk
CPU that performs processing according to the program loaded in the CPU
(Central processing unit), and a computer having a storage device such as a clock oscillator and a hard disk, and various functions can be realized by executing a program stored in the hard disk. That is, the programs of the SEMC and the pattern defect classification device have the following functions.

C0: Means Originally Provided by SEMC The SEMC of the first embodiment originally has inspected wafer SEM image creating means C0a, inspected wafer defect information creating means C0b, and model wafer SEM image creating means C0c. C0a: Inspection wafer SEM image creation means The inspection wafer SEM image creation means C0a determines the xy coordinate position of the defect of the inspection wafer detected by the preliminary inspection apparatus (1, 2) on the preliminary inspection apparatus by the SEM coordinate position. The defect area on the inspected wafer is moved to the inspection position of the SEM, and the inspected wafer SEM image (inspection object image)
Is created (imaged). C0b: Inspection wafer defect information creation means (inspection object defect information creation means) Inspection wafer defect information creation means C0b performs a detailed inspection of the defect area, and performs a detailed inspection result (in a predetermined area including the defect area, Defect position, shape, size, defect ID number, etc.)
Is stored in the storage device. C0c: Model wafer SEM image creating means The model wafer SEM image creating means C0c scans one IC chip on the defect-free model wafer surface on which the same predetermined pattern as that of the wafer to be inspected is formed, and the one IC chip A model wafer SEM image, which is the SEM image of the minute, is created.

C1, CM1, C2, CM2, C3: (Function of Program of Pattern Defect Classification Apparatus) The program of the pattern defect classification apparatus according to the first embodiment includes a wafer information generation unit C1 for inspection and a wafer information storage apparatus CM1 for inspection. , Model wafer information creation means C2, model wafer information storage device CM2, and pattern defect automatic determination means C3
have. C1: Inspection Wafer Information Creation Means Inspection wafer information creation means C1 includes an inspection wafer pattern extraction image creation means C1a and a defect area image (AD
FCT) extraction means C1b and the like.

C1a: Inspection wafer pattern extraction image creation means (inspection object pattern extraction image creation means) Based on the extraction data, an inspection wafer pattern extraction image that specifies the outer shape of an image obtained by extracting the actual pattern actually formed by the elements forming the predetermined pattern area is created. C1b: Defect area image extraction means (ADFCT extraction means) The defect area image extraction means C1b
It has a function of extracting a defective area extraction image that specifies the outer shape of the image in which only the defect area is extracted.

CM1: Inspection Wafer Information Storage Device (Inspection Wafer Information Storage Device) The inspection wafer information storage device CM1 is used to check the inspection result of the defect of the inspection wafer by the inspection wafer information creating means C1 and the preliminary inspection. A device for storing defect information (positional information, size information, etc.) of a wafer to be inspected detected by the devices (1, 2), including a wafer to be inspected SEM image memory (image memory to be inspected) CM1a, a wafer to be inspected Information storage device CM
1b, an inspection wafer pattern extraction image (inspection object pattern extraction image) storage device CM1c, an ADFCT storage device (defect region extraction image storage device) CM1d, and the like. CM1a: Inspection wafer SEM image storage device (inspection object image storage device) In the inspection wafer SEM image storage device CM1a, the surface of the inspection wafer on which elements to form a predetermined pattern are actually formed is scanned by a scanning electron microscope. The inspected wafer SEM image, which is an image of the inspected wafer SEM that includes a defect area on the surface of the inspected wafer in which a defect is found in a previously performed inspection, is stored.

CM1b: Inspection wafer defect information storage device The inspection wafer defect information storage device CM1b stores inspection wafer defect information including the position, shape and size of the defect area on the inspection wafer surface. CM1c: Inspection wafer pattern extraction image storage device (inspection object pattern extraction image storage device) Inspection wafer pattern extraction image storage device CM1c is an area of the predetermined pattern from the inspection wafer SEM image in a predetermined range including the defect area. The extracted wafer pattern extraction image that specifies the outer shape of the image in which only the pattern actually formed by the elements forming the pattern is stored. CM1d: ADFCT storage device (defect region extraction image storage device) The ADFCT storage device CM1d is an ADFC which is a defect region extraction image extracted by the ADFCT extraction means C1a.
Store T.

C2: Model Wafer Information Creation Unit The model wafer information creation unit C2 has a pattern extraction data creation unit C2a and a model pattern extraction image creation unit C2b. C2a: Pattern Extraction Data Creation Unit The pattern extraction data creation unit C2a extracts a pattern for distinguishing an element forming the predetermined pattern area on the model wafer SEM image from an element forming another area. Create data for use. As the pattern extraction data, the texture of the predetermined pattern on the SEM image is adopted. The pattern extraction data created by the pattern extraction data creation device C2a is also used when creating an inspection wafer pattern extraction image from the inspection wafer SEM image. C2b: Model pattern extraction image creation means The model pattern extraction image creation means C2b extracts a model pattern from the model wafer SEM image by extracting only the predetermined pattern area from the inspection wafer pattern extraction data. Create an image.
In addition, instead of the pattern detection by the texture,
It is possible to adopt a pattern matching method or the like using luminance, edge (differential signal), luminance gradient, correlation, and the like.

CM2: Model Wafer Information Storage Device The model wafer information storage device CM2 is a device for storing information created by the model wafer information creation means C2, and includes a model wafer SEM image storage device CM2a, a pattern extraction data storage device. CM2b and a model pattern extraction image storage device CM2c. CM2a: Model Wafer SEM Image Storage Device (Model Image Storage Device) The model wafer SEM image storage device CM2a picks up an image of a defect-free model wafer surface on which the same predetermined pattern as that of the inspection target wafer is formed by using a scanning electron microscope. A model wafer SEM image corresponding to the image is stored.

CM2b: Pattern Extraction Data Storage Device The pattern extraction data storage device CM2b distinguishes elements forming the predetermined pattern area on the model wafer SEM image from elements forming other areas. Is stored. In the first embodiment, the pattern extraction data (data specifying the texture) created by the pattern extraction data creation device C2a is stored. CM2c: Model pattern extraction image storage device The model pattern extraction image storage device CM2c is an image obtained by extracting only the predetermined pattern area from a model image corresponding to an image portion of the surface of the wafer to be inspected in which the inspection wafer pattern extraction image is created and extracted. A model pattern extracted image capable of specifying the outer shape is stored. In the first embodiment, the model pattern extracted image created by the model pattern extracted image creating means C2b is stored.

C3: Automatic pattern defect discriminating means Automatic pattern defect discriminating means C3 automatically determines the type of pattern defect in the defect area based on the inspected wafer pattern extraction image, the model pattern extraction image, and the defect area extraction image. It has a function of automatically determining a pattern short, and has a pattern short automatic determining means C3a, a pattern open automatic determining means C3b, and a dust determining means C3c. C3a: Pattern short automatic discrimination means The pattern short automatic discrimination means C3a discriminates whether or not the defect area is a pattern short (short circuit) based on the inspected wafer pattern extracted image and the model pattern extracted image. .

C3b: Automatic pattern open discriminating means The automatic pattern open discriminating means C3b determines whether or not the defective area is a pattern open (disconnection) based on the extracted wafer pattern inspection image and the model wafer SEM image. Is determined. C3c: Dust discriminating means The dust discriminating means C3c determines whether the defect area is dust (the type of pattern defect is a foreign matter-attached defect) based on the inspected wafer pattern extraction image, the model pattern extraction image, and the defect area extraction image. It is determined whether or not there is.

(Operation of the First Embodiment) FIG. 7 is a diagram showing a main routine of a pattern defect automatic classification process of the pattern defect classification apparatus according to one embodiment of the present invention. FIG. 8 is a diagram showing an example of a display screen displayed on the display during the execution of the automatic pattern defect classification processing. FIG. 8A shows an initial screen, and FIG. 8B shows model wafer information corresponding to an ID number input on the initial screen. It is a figure showing a display screen in case there is no. The process shown in FIG. 7 is started when the automatic pattern defect classification process is selected on the operation mode selection screen displayed when the power of the pattern defect classification device is turned on.

When the operator selects the pattern defect automatic classification processing in a state where the wafer W to be inspected is set on the sample stage, an initial screen (FIG. 7) of the pattern defect automatic classification processing in ST1 (step ST1) of FIG. 8A)
Is displayed. In ST2, it is determined whether or not an ID number has been input from the keyboard. If there is an input in ST2, the input ID number is stored in ST3, and the process proceeds to ST4. In ST4, the input display number is displayed on the screen being displayed (initial screen). After the end of ST4, or in the case of NO (N) in ST2, the process proceeds to ST5. ST5
Then, it is determined whether or not the return key has been input.
If no (N), the process returns to ST2, and if yes (Y), the process proceeds to ST6. In ST6, it is determined whether or not there is information on the model wafer corresponding to the input ID number. If no (N), proceed to ST7, yes (Y)
In the case of, the process moves to ST8. On the screen displayed in ST7,
After additionally displaying that there is no model wafer information corresponding to the input ID number (see FIG. 8B), the process returns to ST2.

In ST8, it is determined whether or not there is a defect to be subjected to pattern defect classification processing. In the first embodiment, the AD
A defect in which an FCT (defect area extraction image) is stored is a defect to be subjected to pattern defect classification processing. Therefore, if there is a defect in which the ADFCT (defect area extraction image) is stored, the determination is yes (Y). If yes (Y), the process moves to ST9. In ST9, a predetermined region of an SEM image including a defect to be subjected to pattern classification processing (an SEM image including ADFCT, that is, an image of an inspection object) is determined as an extraction region. Next, in ST10, the model wafer SE
An extraction process of a pattern in an M image extraction region (model image extraction region) is performed. The process of ST10 is a process of extracting a pattern image in the extraction region, the number of pattern regions, the position of the center of gravity of each pattern, the area, and the like, and adding and extracting an index. This subroutine of ST10 is shown in FIG. 9 and will be described later in detail. Next, in ST11, extraction processing of a predetermined pattern in the extraction area (defect image extraction area) of the inspection wafer SEM image is performed. The extraction process in ST11 performs the same process as in ST10. This subroutine of ST11 is shown in FIG. 11, and will be described later in detail.

In step ST12, the defect image is classified based on the image information of the model wafer extracted in step ST10, the image information of the inspected wafer extracted in step ST11, and the ADFCT (defect area extraction image). Do. The subroutine of this classification process is described in ST31 of FIGS.
This will be described in steps ST59. Next, the classification result is registered in the database in ST13. Next, the process returns to ST8. In the case of No (N) in ST8, it means that there is no other defect to be classified into pattern defects, and the inspection of the wafer to be inspected ends, and the process returns to ST1.

FIG. 9 is a flowchart of the pattern extraction processing in the model image extraction area, that is, the subroutine of ST10. 10 is an explanatory diagram of the processing performed in the flowchart of FIG. 9, FIG. 10A is a diagram illustrating an image having a predetermined texture in the model image extraction region, that is, a model pattern region image, and FIG. 10C is a diagram showing one model pattern region, FIG. 10C is a diagram showing another one of the extracted plurality of model pattern regions, and FIG. 10D is a diagram showing another one of the extracted plurality of model pattern regions. FIG. 10E is a diagram showing one model pattern area of FIG.
FIG. 10F is a diagram showing an example of labeling performed on the model pattern region of FIG. 10B, FIG. 10F is a diagram showing an example of labeling performed on the model pattern region of FIG. 10C, and FIG.
It is a figure showing the example of labeling performed to a model pattern field of 0D. In ST16 of FIG. 9, the model wafer S
An extraction process (tracking process) of a predetermined pattern in the extraction region of the EM image is performed. The subroutine of this extraction processing will be described in and after ST61 in FIG. In this ST16, FIGS.
The model pattern area shown in 0D is extracted.

Next, in ST17, labeling is performed on each model pattern area (see FIGS. 10B to 10D) obtained in ST16. That is, MNUM (the number of model pattern areas) = 3 is stored in the image of FIG. 10A, and the images of FIGS.
[0], MPI [1] and MPI [2]. Next, in ST18, pattern area information MPAT (area index, barycentric position of each area, area) corresponding to FIGS. 10B to 10D is calculated and stored. That is, the region index corresponding to the image MPI [0] in FIG. 10B, the image MPI [1] in FIG. 10C, and the image MPI [2] in FIG. MPAT [0], MPA
T [1] and MPAT [2] are stored. After ST18, the process moves to ST11.

FIG. 11 is a flowchart of the pattern extraction processing in the defect image extraction area, that is, the subroutine of ST11 in FIG. FIG. 12 is an explanatory diagram of the processing performed in the flowchart of FIG. 11, FIG. 12A is a diagram showing an image having a predetermined texture in the defect image extraction region, that is, a defect pattern region image, and FIG. 12C and FIG. 12D are diagrams each showing another one of the plurality of extracted defect pattern extraction regions, and FIG. 12E is a diagram showing the defect pattern shown in FIG. 12B. FIGS. 12F and 12G are diagrams showing examples of labeling performed on the pattern region, and FIGS. 12F and 12G are diagrams showing examples of labeling performed on the defect pattern regions of FIGS. 12C and 12D. ST in FIG.
In step 21, an extraction process (tracking process) of a predetermined pattern in the extraction region of the inspection wafer SEM image is performed. The subroutine of this extraction processing will be described in and after ST61 in FIG. In this ST21, in FIG.
Three defect pattern area images DP shown in FIGS. 2B to 12D
I [0] to DPI [2] are extracted.

Next, in ST22, labeling is performed on each of the defect pattern regions (see FIGS. 12B to 12D) obtained in ST21. That is, while DNUM (the number of model pattern areas) = 3 is stored for the image of FIG. 12A, the images of FIG. 12B to FIG.
It is stored as PI [2]. Next, in ST23, FIG.
2B, the pattern area information DPAT (area index, barycentric position of each area, area) in the extracted image of the inspected wafer pattern corresponding to FIG. 12C is calculated and stored. That is, the images DPI [0] to DPI of FIGS.
The region index corresponding to [2], the position of the center of gravity of each region, and the area are stored as pattern region information DPAT [0] to DPAT [2] in the extracted image of the inspected wafer pattern. After ST23, the process moves to ST12.

FIG. 13 is a diagram showing a subroutine of the defect classification process in ST12 of FIG. FIG. 14 is a diagram showing a continuation flow of FIG. In the defect classification processing of FIGS. 13 and 14, the types of defects in the defect images are determined and classified based on the image information of the model wafer and the wafer to be inspected extracted in ST10 and ST11 of FIG. FIG.
In ST31 of 3, di, ri, shortcheck, dustcheck
To the next initial value. di (pattern area index in defect image) = 0 ri (classification result index) = 0 shortcheck (pattern short flag) = 0 dustcheck (dust flag) = 0

Next, in step ST32, a pattern short determination process is performed. The process of ST32 is performed by DPI [di] ([di] =
[0], [1],... (See defect pattern area images in FIG. 12B to FIG. 12D), determine whether the defect is a pattern short, other than the pattern short, or normal, and determine the result as a shortresult (pattern short). (Result storage variable). The subroutine of this ST32 is shown in FIG.
And the detailed processing will be described later.

Next, in ST33, it is determined whether or not shortresult = pattern short. ST if yes (Y)
Move to 34, and if no (N), move to ST36. In ST34, result (classification result index) [ri] = pattern short. Initially, ri = 0 as shown in ST31.
Therefore, the classification result index result [0] = pattern short. Also, shortcheck (pattern short flag) = "1". Next, in ST35, ri = ri
+1. Therefore, for example, in the subsequent processing, if it is determined that dust is present for a defect for which pattern defect classification is currently performed, a classification result index of [ri] = [1] = dust is assigned. That is, in the case of this example, two classification result indexes (result [0] =
Pattern short, result [1] = dust) will be given.

Next, in ST36, di = di + 1 is set.
That is, since di = 0 at the beginning, DPI [di] = D
The pattern short of ST32 is determined for the pattern of PI [0] (see FIG. 12B), and then DPI [di] = D
The pattern short determination in ST32 is performed on the pattern of PI [1] (see FIG. 12C). Then ST
At 37, it is determined whether or not di> DPNUM (the number of model pattern areas). If no (N), the process returns to ST32. If yes (Y), the process moves to the next ST38. ST
Regarding the processing of 31 to ST37, after the description of the entire flowchart including the description of the subroutine of ST32, ST
The description will be made again in connection with the processing of the 32 subroutines.

In ST38, dust determination processing is performed.
The process in ST38 is performed by DPI [di] (di = 0, 1,...,
12B to 12D), the defect is determined to be D1 (dust or pattern), D2 (dust or open), or D3 (dust or shape abnormality), and the determination is made. This is a process of storing the result in dustresult (a storage variable for the dust judgment result). This ST38
This subroutine is shown in FIG. 21, and the detailed processing will be described later.

Next, in ST39, it is determined whether or not the dustresult (see FIG. 21) includes the result D3. If no (N), the operation moves on to ST45, and if yes (Y), the operation moves on to ST40. In ST40, shape abnormality determination processing is performed. This ST
The processing of 40 is performed by DPI [di] (di = 0, 1,..., FIG.
B, refer to the defect pattern area image in FIG. 12C) to determine whether the defect is a pattern shape abnormality or a pattern shape abnormality, and store the determination result in a defectresult (pattern shape abnormality determination result storage variable). The subroutine of this ST40 is shown in FIG. 24, and the detailed processing will be described later.

Next, in ST41, it is determined whether or not defectresult = abnormal pattern shape. ST if yes (Y)
Move to 42. In ST42, result (classification result index) [ri] = pattern shape abnormality. If NO (N) in ST41, the process moves to ST43. Resu in ST43
lt (classification result index) [ri] = dust and dustcheck (dust flag) = “1”. After ST42 and ST43, the process proceeds to ST44. In ST44, ri = ri + 1 is set. Next, the process proceeds to ST45.

In ST45, dustresult (see FIG. 21)
Judge whether or not the result includes the result D2. If no (N), the operation moves on to ST51, and if yes (Y), the operation moves on to ST46. S
At T46, a pattern open determination process is performed. This S
The process of T46 is performed by DPI [di] (di = 0, 1,..., FIG.
B, refer to the defect pattern area image in FIG. 12C) to determine whether the defect is pattern open or not, and store the determination result in openresult (open determination result storage variable). This subroutine of ST46 is shown in FIG. 25, and the detailed processing will be described later.

Next, in ST47, it is determined whether or not openresult (open determination result storage variable) = open. If yes (Y), the process moves to ST48. Result in ST48
(Classification result index) [ri] = pattern open. If no (N) in ST47, the process moves to ST49. Result (classification result index) in ST49
[ri] = dust and dustcheck (dust flag) = “1”. After ST48 and ST49, ST50
Move on to In ST50, ri = ri + 1 is set. Then ST
Move to 51.

In ST51, dustresult (see FIG. 21)
Judge whether or not the result D1 is included. If no (N), the process returns to ST13 (see FIG. 7), and if yes (Y), the process returns to ST13.
Move on to 52. In ST52, a pattern determination process is performed. In the process of ST52, it is determined whether or not the defect of DPI [di] (di = 0, 1,..., See the defect pattern area images in FIGS. 12B and 12C) is a pattern or a non-pattern. This is a process of storing in the pattern determination result storage variable). The subroutine of this ST52 is shown in FIG.
And a detailed description of the processing will be described later.

Next, in ST53, it is determined whether or not patternresult (pattern determination result storage variable) = pattern. If yes (Y), the process moves to ST54. Short in ST54
It is determined whether or not tcheck (pattern short flag) = “1”. If yes (Y), the process moves to ST55. In ST55, it is determined whether or not the defect pattern area image overlaps the pattern short area. If the determination is yes (Y), the process proceeds to ST13 (see FIG. 7). If the answer is NO (N) in ST54 and ST55, the process proceeds to ST56.

In ST56, the result (classification result index) [ri] is set to "pattern fragment". Next, ST57
After setting ri = ri + 1, the process proceeds to ST13 (see FIG. 7). In the case of No (N) in ST53, S
Move on to T58. In ST58, it is determined whether or not dustcheck = "1". If yes (Y), the operation moves on to ST13 (see FIG. 7), and if no (N), the operation moves on to ST59. In ST59, result (classification result index) [ri] = dust and dustcheck = 1. Next, the process proceeds to ST57.

FIG. 15 is a diagram showing a subroutine of the pattern tracking process in ST16 in FIG. 9 and ST21 in FIG. In ST61 of FIG. 15, pattern data of a predetermined pattern (a pattern to be detected, for example, a line (electrode) pattern) of the model wafer is read. Note that the texture data is used in the first embodiment as the pattern data, but data indicating other image characteristics (brightness, contrast, differential value, and the like) can be used. Next, in ST62, a target image (SEM image corresponding to the inspection portion of the model wafer or the inspection target wafer) is read.

Next, in ST63, x1 = 0 and y1 = 0. Note that x1 and y1 are the coordinates of the starting point when the next process of ST64 is started. Next, a search process for a pattern tracking start point is performed in ST64. The process of ST64 is a process of determining the value of the tracking start point (x1, y1) of one of a plurality of pattern regions in the inspection region of the model wafer or the inspection target wafer.
The subroutine of ST64 is shown in FIG. 16, and will be described later in detail.

After ST64, the process moves to ST65. In ST65, the target image has a pixel value START (a value written in ST79 described later, which is a value obtained by adding +1 to 255 of the pixel value (0 to 255) in the first embodiment, and START = “256”). It is determined whether or not. If yes (Y), the process moves to ST66. In ST66, a connection point search process is performed. This ST
The process of 66 is the tracking start point (x
This is a process for searching for a connection point of (1, y1). This subroutine of ST66 is shown in FIG. 17, and a detailed description will be given later. If the answer is NO (N) in ST65, the process returns to ST17 or ST21.

FIG. 16 shows the subroutine of ST64. In ST71 of FIG. 16, the following values are entered in the x-coordinate and the y-coordinate of the point where the search starts. x = x1 y = y1 Since x1 = 0 and y1 = 0 were entered in ST63, x = x1
x1 = 0 and y = y1 = 0. Next, in ST72, an image area of the matching size (MX * MY), that is, x to
A matching calculation is performed to determine whether or not the tone (density tone) of the region portion of (x + MX) and y to (y + MY) matches the pattern data. The following values are adopted as the sizes of the MX and MY, for example. MX = 20 pixels MY = 20 pixels

In the first embodiment, the matching calculation is performed based on whether or not the textures match. As an example of performing the matching calculation, the calculation can be performed as follows using the cross-correlation. FIG. 30 is an explanatory diagram of a matching method when matching is performed using the cross-correlation between the partial image Aij of the model image A and the partial image Bij of the image B to be inspected, and FIG. 30B is a diagram showing a partial image Aij, FIG. 30B is a diagram showing a partial image Bij of the inspected wafer image B, and FIG. 30C is a diagram showing the partial images Aij and B.
It is a diagram showing that matching of ij is performed for each of the small regions Aij (l, m) and Bij (l, m). The cross-correlation coefficient Cij with the partial images Aij (L, M) and Bij (L, M) is calculated by using the values of the luminances Aij (l, m) and Bij (l, m) of the small area as follows: ).

[0082]

(Equation 1)

Aij (L, M) and Bij (L, M)
Is high, the Cij of equation (1) is close to 1.00, and if the similarity is low, it is close to zero. Therefore, Bij
To find the part that best matches Aij from within
Is changed in the range of W and H to obtain i and j that maximize Cij. The similarity is determined by the maximum value of Cij. When the similarity is equal to or larger than the threshold value, it is assumed that matching (texture coincidence) is performed.

Next, in ST73, the matching size (M
It is determined whether or not the texture of the image area of (X * MY) matches the pattern data. If no (N), the operation moves on to ST75, and if yes (Y), the operation moves on to ST74. In ST74, the pixel value of (x, y) is PATTERN (= “− 2”).
It is determined whether or not. If yes (Y), the process moves to ST75.
In ST75, x = x + Δx. Next, in ST76, it is determined whether or not x> xmax. If no (N), the process returns to ST72; if yes (Y), the process proceeds to ST77.
In ST77, the following values are entered for x and y. x = 0 y = y + Δy Next, in ST78, it is determined whether or not y> ymax. If no (N), the process returns to ST72; if yes (Y), the process moves to ST65 (see FIG. 15). In the first embodiment, Δx = Δy = the width of the pattern image (that is, the width of the wiring when the pattern image is a wiring pattern).

In the case of No (N) in ST74, S
Move on to T79. In ST79, STAR is added to the matching part of the target image.
T (pixel value at which tracking is started) is written, and this is set as a tracking start point (see FIG. 18A). As the START (pixel value at which tracking starts), (the maximum gradation value of the target image + 1) can be adopted. For example, if the pattern data is
If the number of gradations is 255, START = “25
6 ". Next, in ST80, the current value of (x, y) is inserted into (x1, y1). Next, the process proceeds to ST65. As described above, if the answer is YES (Y) in ST65, the process proceeds to ST66.

FIG. 17 is a detailed explanatory diagram of the connection point searching process in the above ST66 (see FIG. 15). FIG. 17A is a diagram showing a subroutine of ST66, and FIG. 17B is an explanatory diagram of ST95. FIG. 18 is an explanatory diagram of the pattern extraction processing, and FIG.
FIG. 18B is an explanatory diagram of a process at the start of the pattern extraction process of the first pattern, FIG. 18B is an explanatory diagram of a state at the end of the first pattern extraction process, and FIG. 18C is a diagram of the process at the end of the first pattern extraction process. FIG. 18D is an explanatory diagram of a process at the start of the second pattern extraction process, FIG. 18E is an explanatory diagram of a state at the end of the second pattern extraction process, and FIG.
FIG. 18G is an explanatory diagram of the process at the end of the second pattern extraction process, FIG. 18G is an explanatory diagram of the process at the start of the pattern extraction process of the third pattern, and FIG. It is an explanatory view of a process. In ST91 of FIG. 17A, the coordinates at which the pixel value is START (see FIG. 18A) are set as the search points. Next, in ST92, the pixel value of the current search point is
Replaced with NE (for example, DONE = “− 1”), and it is determined that the search has been completed. Next, in ST93, the SE near the search point of the target image is set.
Matching (calculation for comparison) is performed between the M image and the pattern extraction data in the same manner as in ST72.

Next, in ST94, it is determined whether or not matching has been performed. If yes (Y), the process moves to ST95. ST95
Write the pixel value START to the matching part of the target image in
Set a new search start point. As shown in FIG. 17B,
If there is a branch point in the pattern image, the pixel values START are written by the number of branches at the branch point.

In the case of NO (N) in ST94, S
Move to T96. In ST96, in the entire target image area,
Check whether the search start point still exists. Next, in ST97, it is determined whether or not the pixel value START exists. If yes (Y), the process returns to ST91. If no (N), the process moves to ST98. In ST98, in the target image, a pixel value DONE (= “− 1”) indicating that search has been completed
(Refer to FIG. 18B) Pixel values PATTER indicating the pattern
N (for example, PATTERN = “− 2”) (see FIG. 18C). Next, the process returns to ST65 (FIG. 15). Each time the processing of ST64 to ST66 is repeated, the processing shown in FIGS. 18A to 18C is repeated for each pattern to finally extract the pattern illustrated in FIG. 18H. In addition,
In the first embodiment shown in FIG. 18, the case where Δx = Δy = the width of the pattern image (that is, the width of the wiring when the pattern image is a wiring pattern) is illustrated, but Δx = Δy = the pattern The width can be set to の of the width of the image, or Δx and Δy can be different values.

FIG. 19 shows a subroutine of the pattern short determination process in ST32 (see FIG. 13). 20 is an explanatory diagram of an example of a result determined in the subroutine of FIG. 19, FIG. 20A is a diagram showing an MPI (model pattern region image), FIG. 20B is a diagram showing a DPI (inspection wafer pattern region image), For 20C, DPI [0] is shortresult
FIG. 20D shows an example in which (pattern short result storage variable) = “pattern short”, and DPI [1] is shorttr in FIG. 20D.
A diagram showing an example in which esult = “other than pattern short”,
FIG. 20E is a diagram illustrating an example in which DPI [2] becomes shortresult = “normal”.

In ST101 of FIG. 19, DPI [n] (n
= 0, 1, ...), gth (centroid distance threshold)
It is determined whether or not the center of gravity of MPI [0 to MPNUM] exists at the distance of. If no (N), the process moves to ST103, and if yes (Y), the process moves to ST102. In ST102, it is determined whether or not a plurality exists. ST10 if yes (Y)
Move to 3. In ST103, DPI [n] determines whether or not DPI [n] exists at a position to bridge with a plurality of MPIs. This determination is made based on whether or not there is a portion overlapping DPI [n] and MPI. If yes (Y), the process moves to ST104. ST104 shortresult (pattern short result storage variable)
= “Pattern short” (see FIG. 20C) as ST33
(See FIG. 13).

In the case of No (N) in ST102, there is only one center of gravity. In this case, the process moves to ST105. In ST105, DPI [n] and MPI determine whether or not pattern matching is performed. This determination is made based on whether or not the difference between the area of each pattern region, the difference between the maximum value and the minimum value of the x coordinate, and the difference between the maximum value and the minimum value of the y coordinate are within threshold values. If no (N) in ST105 and ST103, the process moves to ST106. S
Shortresult = “other than pattern short” in T106
The process proceeds to ST33 (see FIG. 13) as (see FIG. 20D). If yes (Y) in ST105, the pattern is not short-circuited.
The process proceeds to ST33 as normal (see FIG. 20E).

FIG. 21 is a subroutine of the dust determination process in the aforementioned ST38 (see FIG. 13). FIG.
FIG. 22 is an explanatory diagram of a result example determined in the subroutine of FIG.
FIG. 22A is a diagram showing an example in which ADFCT (defect area extraction image) is dustresult (dust determination result) = D1, and FIG.
FIG. 22C is a diagram showing an example in which DFCT is dustresult (dust determination result) = D2, and FIG.
FIG. 22D shows an example in which ADFCT is a dustr.
FIG. 22E shows an example in which esult = D3, and FIG.
FIG. 9 is a diagram illustrating an example where dustresult = D3 & D1. Also,
FIG. 23 is an explanatory diagram of an example of a result determined in the subroutine of FIG. 21. In the case where MPI is in the case of FIG.
Is likely to appear in the case of FIG. 20B.
FIG. 23A shows a defect pattern area image DP.
An example in which a part of I [0] (see FIG. 20B) (part of the image of the extracted wafer pattern to be inspected) is detected as an ADFCT, and FIG. FIG. 11 is a diagram illustrating an example in which (a part of an image to be inspected wafer pattern extracted) is detected as ADFCT.

In ST111 of FIG. 21, the positional relationship between ADFCT (defect area extraction area) and MPI [n] is calculated. Next, in ST112, it is determined whether or not the ADFCT exists at a position overlapping with MPI [n]. If no (N), the process moves to ST113. Dustresult = D in ST113
1 (see FIGS. 22A, 23A and 23B).
The process moves to T39 (see FIG. 13). In the case of YES (Y) in ST112, the process proceeds to ST114. ADF in ST114
The CT determines whether the MPI [n] area is divided.
If yes (Y), the process moves to ST115. In ST115, it is determined whether ADFCT exists only in the MPI area. If yes (Y), the dustres in ST116
ult = D2 (see FIG. 22B), and the routine goes to ST39 (see FIG. 13).

In the case of NO (N) in ST115, the process proceeds to ST117. In ST117, dustresult = D2 & D1
The process proceeds to ST39 (see FIG. 13) as (see FIG. 22C). If the answer is NO (N) in ST114, the process moves to ST118. In ST118, ADFCT performs MPI [n] (n =
(0, 1,...) It is determined whether or not it exists only in the area. If yes (Y), the process moves to ST119. Du in ST119
The process proceeds to ST39 (see FIG. 13) as stresult = D3 (see FIG. 22D). In the case of No (N) in ST118, the process moves to ST120. In ST120, dustresult = D3 &
ST1 (see FIG. 13) as D1 (see FIG. 22E)
Move on to

FIG. 24 is a subroutine of the pattern shape abnormality judging process in ST40 of FIG. ST12 in FIG.
In step 1, texture matching is performed between the D3 area (see FIGS. 22D and 22E) and the background area in the model image.
Next, in ST122, it is determined whether or not the textures match. If yes (Y), the process moves to ST123. ST123
In step ST41 (defectresult (storage variable of pattern shape abnormality determination result) = “pattern shape abnormality” in FIG.
Go to 3). If the answer is NO (N) in ST122, the process moves to ST124. In ST124, defectresult =
In ST41 (FIG. 1)
Go to 3). (1) According to ST41 to ST43 in FIG. (1-1) The defect result = “abnormal pattern shape” in the above ST123 results in dust determination result result [ri] = “abnormal pattern shape”. (1-2) The defectresult = “pattern shape is not abnormal” in ST124 indicates that the dust determination result result [ri] =
It becomes "dust".

FIG. 25 is a subroutine of the pattern open determination process in ST46 of FIG. ST13 in FIG.
In step 1, texture matching is performed between the D2 area (see FIGS. 22B and 22C) and the background area in the model image. Next, in ST132, it is determined whether or not the textures match. If yes (Y), the process moves to ST133. In ST133, openresult = “pattern open” and the ST
It moves to 47 (refer to FIG. 14). In the case of No (N) in ST132, the process proceeds to ST134. Openre in ST134
sult = “not open” in step ST47 (FIG. 14)
See). (2) According to ST47 to ST49 in FIG. (2-1) The openresult = “pattern open” in the above-mentioned ST133 results in a dust determination result result [ri] = “pattern open”. (2-2) The openresult = “not open” in ST134 results in a dust determination result result [ri] = “dust”.

FIG. 26 is a subroutine of the pattern judgment processing in ST52 of FIG. The processing shown in FIG. 26 is based on the ADFCT (defect area extraction image) dust determination (FIG. 1).
3 in the subroutine of ST38 (see FIG. 21).
1 (dust or pattern) (FIG. 22A,
23A and 23B). ST in FIG. 26
At 141, texture matching is performed between the D1 area (see FIGS. 22A to 22C) and the background area in the model image. Next, in ST142, it is determined whether or not the textures match. If yes (Y), the process moves to ST143. In ST143, patternresult (pattern judgment result storage variable) =
The process proceeds to ST53 (see FIG. 14) as a “pattern”.
If the answer is NO (N) in ST142, the process moves to ST144.

In ST144, patternresult = “not a pattern”, and the routine goes to ST53 (see FIG. 14). (3) According to ST53 to ST59 in FIG. (3-1) patternresult of ST143 = “pattern”
In the case of, the answer is yes (Y) in ST53, and the following judgment is made. In the case of FIG. 12A, FIGS. 12C and 12D show the shortcheck as shown in FIGS. 20D and 20E.
= 1 (shortcheck = 0). FIG. 12B
Is shortcheck = 1, as shown in FIG. 20C. shor
If tcheck = 1 (see FIG. 20C) (if Y in ST54) and the defective pattern area image (see FIG. 23A) overlaps with the pattern short area (see FIG. 20C), the result [ ri] = pattern short is set, and the result remains as it is. FIG. 20C and FIG.
As shown in FIG. 3B, when they do not overlap (in the case of NO (N) in ST55), a pattern defect exists not on the original pattern nor on the short-circuited pattern, so that the dust determination result result [ri] = "Pattern fragments"
Becomes (3-2) The patternresult = “not a pattern” in ST144 is N in ST53 (that is, does not match the pattern), and if dustcheck is not “1” in ST58 (if the pattern is not short-circuited), Judgment result result [ri] = "dust". Dustcheck at ST58
If "1", result [ri] = dust has already been set, so the routine returns.

(Re-explanation of FIGS. 13 and 14) FIG. 12A
In the pattern short determination processing of ST32 in FIG. 13 described above, since di = 0 (see ST31) at first in ST101 of FIG. 19, DPI [d
i] = DPI [0] (see FIG. 12B), as shown in FIG. 20C, shortresult = pattern short (see ST104)
Becomes Therefore, the result is initially YES (ST) in ST33. Therefore, shortresul in ST34
t [ri] = short pattern (ri = 0). Then S
In T35 and ST36, ri = 1 and di = 1, and the DPN
Since UM = 3, the result is NO (N) in ST37 and the process returns to ST32. In this case, since the process of ST101 in FIG. 19 is [di] = [1], DPI [1] is performed for FIG. 12C. FIG. 12C shows ST106 as shown in FIG.
, Shortresult = other than pattern short.
In this case, no (N) is obtained in ST33, and di =
It becomes 2. At this time, the answer is no (N) in ST37,
Return to T32. At this time, in ST32, the processing in FIG. 19 is performed on the DPI [2] (see FIG. 12D), and as shown in FIG. 20E, DPI [2] becomes normal in ST107. In this case, no (N) is obtained in ST33, and di = 3 in ST36. Then, in the step ST37, the determination is yes (Y), and the process proceeds to the step ST38.

According to the first embodiment, when there is a defect on the surface of a test object having a predetermined pattern formed on the surface, whether the defect is a fragment of the pattern or a defect (dust) due to foreign matter attachment. Whether or not it is possible can be automatically determined.

Although the embodiments of the present invention have been described in detail, the present invention is not limited to the first embodiment, and various modifications may be made within the scope of the present invention described in the appended claims. It is possible to make changes. (H01) In the defect classification processing of FIGS. 13 and 14, the pattern short determination processing is performed prior to the dust determination processing and the pattern open processing. The order of the processing can be changed. is there.

(H02) Instead of the flowcharts in FIGS. 24, 25 and 26, the flowcharts shown in FIGS. 27, 28 and 29 can be used. FIG.
FIG. 25 is a diagram showing a modified example of the flowchart of FIG. 24. FIG. 28 is a diagram showing a modified example of the flowchart of FIG. FIG. 29 is a diagram showing a modified example of the flowchart of FIG. In FIGS. 24 to 26, the D1, D2, and D3 regions are texture-matched with the pattern region and the background region.
Before executing the processes of FIGS. 24 to 26, FIG.
ST121a, ST121b of FIG. 7, ST131a, ST131 of FIG.
b, The processing of ST141a and ST141b of FIG. 29 is executed.
That is, in the modification examples shown in FIGS. 27 to 29, a dust image database (a database storing dust types and textures corresponding to the dust types) is provided.
In 1a to ST141b, the image database of the dust is compared with D1, D2, and D3 (texture matching or the like). If a match is found, the process proceeds to ST124, ST134, ST144, and if no match is found, ST121, ST131, S
Processes from T141. By performing the process of comparing with the dust database in this way, the material of the dust can be specified, and the classification accuracy can be improved.

(H03) A pattern extraction data creating apparatus for creating pattern extraction data for distinguishing elements forming the predetermined pattern area on the model wafer SEM image from elements forming other areas. Instead of C2a, it is possible to use a pattern extraction data creation device that creates pattern extraction data from the SEM image of the inspected wafer. (H04) After the defects are classified according to the main classification, it is possible to perform more detailed classification for each classification. Rough classification by the method of the present invention and then detailed classification improve the classification accuracy, rather than performing detailed classification on all objects. (H05) The model image can be created not by an actual SEM but by a computer.

[0104]

(E01) In the case where there is a defect on the surface of the test object on which the predetermined pattern is formed on the surface, the element on which the predetermined pattern is to be formed is actually formed on the surface of the test object where the defect exists. The formed pattern (that is, the actual pattern) can be extracted. (E02) When there is a defect on the surface of the inspection object having the predetermined pattern formed on the surface, it is possible to automatically determine whether the defect is a defect that causes a short circuit (short circuit) of the predetermined pattern. . (E03) When there is a defect on the surface of the inspection object having the predetermined pattern formed on the surface, it is possible to automatically determine whether the defect is a defect that causes the predetermined pattern to open (disconnect). . (E04) Loss or expansion of pattern (ie, abnormal shape)
Can be automatically determined. (E05) According to the present invention, when there are, for example, 100 defects subjected to pattern defect classification processing on one inspected object, the number of detected pattern opens and the number of patterns detected when inspecting the 100 defects By knowing the outline of the number of detected shorts, it is possible to use measures for preventing the occurrence of defects.

[Brief description of the drawings]

FIG. 1 is an overall explanatory diagram of Embodiment 1 of a pattern defect classification device of the present invention.

FIG. 2 is a diagram showing a display example of preliminary inspection information, FIG. 2A is a diagram showing the external shape of a wafer to be inspected, which is a wafer to be inspected, and the position of a foreign substance or defect on the wafer to be inspected, and FIG. It is a figure which shows the foreign substance number or defect number # 0, # 1, ..., and information, such as a position, a size, in a table form.

FIG. 3 is an overall explanatory diagram of an SEM (scanning electron microscope) and an SEMC (SEM controller) used in an embodiment of the pattern defect inspection and classification system of the present invention.

FIG. 4 is an overall perspective view of the SEM and SEMC.

FIG. 5 is an explanatory diagram of a conventional defect inspection function of the SEM. FIG. 5A is a diagram showing a defect position and a chip position (IC chip position) on a wafer to be inspected, and FIG. 5C is a diagram showing a predetermined area including the defect (a region for capturing an SEM image), FIG. 5C is a diagram showing an SEM image of the predetermined region including the defect in FIG. 5B, and FIG.
5B of a sample chip having the same pattern as the chip shown in FIG.
FIG. 5E shows the same region as the predetermined region including the defect shown in FIG.
FIG. 5D is a diagram showing an SEM image of a predetermined region in FIG. 5D.

FIG. 6 is a block diagram of the original functions of the SEMC and the functions realized by the program of the pattern defect classifying apparatus according to the first embodiment of the present invention.

FIG. 7 is a diagram showing a main routine of a pattern defect automatic classification process of the pattern defect classification device according to one embodiment of the present invention.

FIG. 8 is a view showing an example of a display screen displayed on the display during execution of the pattern defect automatic classification processing. FIG. 8A shows an initial screen, and FIG. FIG. 7 is a diagram showing a display screen when there is no model wafer information to be displayed.

FIG. 9 is a flowchart of a pattern extraction process in a model image extraction area, that is, a subroutine of ST10.

10 is an explanatory diagram of the processing performed in the flowchart of FIG. 9; FIG. 10A is a diagram showing an image having a predetermined texture in a model image extraction region, that is, a model pattern region image; FIG. FIG. 1 is a diagram showing one model pattern area among model pattern areas;
0C is a diagram showing another one of the extracted plurality of model pattern regions, FIG. 10D is a diagram showing still another one of the extracted plurality of model pattern regions, and FIG. 10E. Is FIG. 10B
FIG. 10F is a diagram showing an example of labeling performed on the model pattern region of FIG. 10C, and FIG. 10G is a diagram showing an example of labeling performed on the model pattern region of FIG.
It is a figure showing the example of labeling performed to the model pattern field of D.

FIG. 11 is a flowchart of a pattern extraction process in an extracted wafer pattern to-be-inspected image, that is, a subroutine of ST11 in FIG. 7;

12 is an explanatory diagram of the processing performed in the flowchart of FIG. 11; FIG. 12A is a diagram showing an image having a predetermined texture in the inspection target wafer pattern extraction image, that is, a defect pattern region image; FIG. FIG. 12C and FIG. 12D show one defect pattern area of the plurality of defect pattern extraction areas, and FIG. 12E shows another defect pattern area of the extracted plurality of defect pattern extraction areas. FIG. 12F is a diagram showing an example of labeling performed on the defect pattern area in FIG.
FIG. 12G is a diagram showing an example of labeling performed on the defect pattern area shown in FIGS. 12C and 12D.

FIG. 13 is a diagram showing a subroutine of a defect classification process in ST12 of FIG. 7;

FIG. 14 is a view showing a continuation flow of FIG. 13;

FIG. 15 is a diagram showing a subroutine of the pattern tracking process in ST16 of FIG. 9 and ST21 of FIG. 11;

FIG. 16 shows a subroutine of ST64.

17 is a detailed explanatory diagram of the connection point searching process in ST66 (see FIG. 15). FIG. 17A is a diagram showing a subroutine of ST66, and FIG. 17B is an explanatory diagram of ST95.

FIG. 18 is an explanatory diagram of a pattern extraction process;
FIG. 18A is an explanatory diagram of the process at the start of the pattern extraction process of the first pattern, FIG. 18B is an explanatory diagram of the state at the end of the first pattern extraction process, and FIG. 18C is the end of the first pattern extraction process. 18D is an explanatory diagram of the process at the start of the pattern extraction process of the second pattern, FIG. 18E is an explanatory diagram of the state at the end of the second pattern extraction process, and FIG. FIG. 18G is an explanatory diagram of a process at the end of the third pattern extraction process, FIG. 18G is an explanatory diagram of a process at the start of the pattern extraction process of the third pattern, and FIG. 18H is a diagram of the process at the end of the third pattern extraction process. FIG.

FIG. 19 is a subroutine of a pattern short determination process in ST32 (see FIG. 13).

20 is an explanatory diagram of an example of a result determined in the subroutine of FIG. 19. FIG. 20A is a diagram showing an MPI (model pattern region image), and FIG. 20B is a diagram showing a DPI (a wafer pattern region image to be inspected). FIG. 20C shows the DPI
[0] is shortresult (pattern short result storage variable)
FIG. 20D shows an example in which DPI [1] is shortresult = “other than pattern short”.
FIG. 20E shows an example in which DPI [2] is shortresul.
FIG. 9 is a diagram illustrating an example in which t = “normal”;

FIG. 21 is a subroutine of the dust determination process in ST38 (see FIG. 13).

FIG. 22 is an explanatory diagram of an example of a result determined in the subroutine of FIG. 21. FIG.
FIG. 22B is a diagram showing an example where result (dust determination result) = D1; FIG.
FIG. 22C is a diagram showing an example in which D2 is D2.
ult = D2 & D1, FIG. 22D shows ADFC
FIG. 22E shows an example in which T is dustresult = D3, and FIG.
FIG. 9 is a diagram illustrating an example in which DFCT is dustresult = D3 & D1.

23 is an explanatory diagram of an example of a result determined in the subroutine of FIG. 21. FIG. 23 is an explanatory diagram of ADFCT which is likely to appear when MPI is in FIG. 20A and DPI is in FIG. 20B. FIG. 23A shows an example in which a part of the defect pattern area image DPI [0] (see FIG. 20B) (a part of the extracted wafer pattern extraction image) is detected as ADFCT, and FIG. 23B shows a defect pattern area image DPI [1]. ]
FIG. 20B is a diagram showing an example in which a part of the inspection target wafer pattern extraction image (see FIG. 20B) is detected as an ADFCT.

FIG. 24 is a subroutine of a pattern shape abnormality determination process in ST40 of FIG. 13;

FIG. 25 is a subroutine of a pattern open determination process in ST46 of FIG. 14;

FIG. 26 is a subroutine of a pattern determination process in ST52 of FIG. 14;

FIG. 27 is a diagram showing a modified example of the flowchart of FIG. 24.

FIG. 28 is a diagram showing a modified example of the flowchart of FIG. 25.

FIG. 29 is a diagram showing a modified example of the flowchart of FIG. 26.

FIG. 30 is an explanatory diagram of a matching method when matching is performed using a cross-correlation between a partial image Aij of the model image A and a partial image Bij of the image to be inspected B corresponding to each other, and FIG. FIG. 30B shows a partial image Aij in the image A, and FIG.
FIG. 30C is a diagram showing that the matching of the partial images Aij and Bij is performed for each of the small regions Aij (l, m) and Bij (l, m).

[Explanation of symbols]

C0 ... (means inherent to SEMC), C0a ... means for creating a wafer SEM image to be inspected, C0b ... means for creating defect information on a wafer to be inspected (meaning means for creating defect information to be inspected), C0c ... means for creating a model wafer SEM image, Inspection wafer information creation means, C1a: Inspection wafer pattern extraction image creation means (inspection object pattern extraction image creation means), C1b: ADFCT extraction means (defect area extraction image extraction means), C2: Model wafer information creation means, C2a: pattern extraction data creation device, C2b: model pattern extraction image creation means, C3: pattern defect automatic determination means, C3a: pattern short automatic determination means, C3b: pattern open automatic determination means, C3c: dust determination means, CM1 ... Inspection wafer information storage device, CM1a… Inspection wafer SEM image storage device (inspection object image storage device) CM1b: Inspection wafer defect information storage device; CM1c: Inspection wafer pattern extraction image storage device (inspection object pattern extraction image storage device); CM1d: ADFCT storage device (defect region extraction image storage device); CM2: Model wafer information Storage device, CM2a: Model wafer SEM image storage device (model image storage device), CM2b: Data storage device for pattern extraction, CM2c: Model pattern extraction image storage device.

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Hirotoshi Kodama 2-34-7 Akebonocho, Tachikawa-shi, Tokyo F-term in Nippon Electronics System Technology Co., Ltd. (reference) 2F065 AA49 BB02 CC18 DD19 AA10 AB18 AH01 AH02 AH05 2G051 AA51 AA56 AB01 AB02 DA07 EA14 EB01 EB02 EC01 ED07 ED14 ED23 FA10 4M106 AA01 AA02 AA09 BA20 CA39 CA41 DB05 DB21 DJ14 DJ21 DJ23 5B057 AA03 DA03 DC17 DC02 DC09 DC36

Claims (9)

[Claims] 1. A pattern defect classification apparatus having the following requirements (A01) to (A03): (A01) a pattern defect classifying apparatus for a surface of an inspection object on which an element for forming a predetermined pattern is actually formed; A test object image storage device for storing a test object image including an image of a defect region found in an inspection performed in advance, and test object defect information including a position of the defect region on the surface of the test object. An inspected object defect information storage device and an inspected object image that can specify an outer shape of an image obtained by extracting only a pattern actually formed by an element forming the area of the predetermined pattern from an inspected object image in a predetermined range including the defect area. An inspection object information storage device having an inspection object pattern extraction image storage device for storing an inspection object pattern extraction image, and (A02) corresponding to the image portion of the inspection object surface from which the inspection object pattern extraction image is created and extracted Mo A model pattern extraction image storage device for storing a model pattern extraction image capable of specifying the outer shape of an image obtained by extracting only the predetermined pattern region from the image, (A03) the inspection object pattern extraction image, the model pattern extraction image, Pattern defect automatic determination means for automatically determining the type of pattern defect in the defect area on the surface of the inspection object based on 2. The pattern defect classification apparatus according to claim 1, wherein the apparatus further comprises the following requirement (A04).
4) A model information storage device having a model image storage device for storing an image of a defect-free model surface on which the same predetermined pattern as the inspection object is formed. 3. The pattern defect classification apparatus according to claim 1, wherein the following requirements (A05) and (A06) are provided: (A05) an image of the inspection object in a predetermined range including the defect area. A subject pattern extracted image creating means for creating a subject pattern extracted image capable of specifying the outer shape of an image obtained by extracting only the pattern actually formed by the elements forming the area of the predetermined pattern from (A06) A model pattern extraction image for creating a model pattern extraction image capable of specifying the outer shape of an image in which only the predetermined pattern area is extracted from a model image corresponding to an image portion of the surface of the inspection object from which the extraction pattern extraction image is created Creation means. 4. The pattern defect classifying apparatus according to claim 1, wherein the apparatus satisfies the following requirement (A07): (A07) An image in which only a defect area is extracted from the image of the inspection object. The inspection object information storage device, further comprising: a defect region extraction image storage device that stores a defect region extraction image specifying the outer shape of the inspection object. 5. The pattern defect classification device according to claim 1, wherein the following requirement (A08) is satisfied: (A08) The pattern-extracted image of the inspection object pattern and the model-pattern extracted image. The pattern defect automatic discrimination means having a pattern short automatic discrimination means for discriminating whether or not the defect area is a short circuit (short circuit) of the pattern based on the following. 6. The pattern defect classifying apparatus according to claim 4, wherein the following requirements (A09) are satisfied: (A09) The inspection object pattern extracted image, the model pattern extracted image, and the defect. The pattern defect automatic discrimination means having a pattern open automatic discrimination means for discriminating whether or not the type of the pattern defect in the defect area is open (disconnection) based on the area extraction image. 7. The pattern defect classification apparatus according to claim 4, wherein the following requirements (A010) are satisfied: (A010) The image of the object pattern extracted and the model pattern extracted. The pattern defect automatic discrimination means having a dust discrimination means for discriminating whether or not the type of the pattern defect in the defect area is a defect (dust) due to foreign matter based on the defect area extracted image. 8. The pattern defect classification apparatus according to claim 1, further comprising the following requirement (A011): (A011) The predetermined pattern on the inspection object image or the model image. A pattern extraction data storage device for storing pattern extraction data for distinguishing elements forming one area from elements forming another area. 9. The pattern defect classification device according to claim 8, wherein the following requirement (A012) is provided.
012) The pattern extraction data storage device that stores, as the pattern extraction data, an image feature of the area of the predetermined pattern on the inspection object image or the model image.