JP2000163268A - Computer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a computer capable of normally starting a system when it is started next time even if BIOS data rewriting fails. SOLUTION: A CPU C can access a storing part M, etc., through processing according to BIOS data stored in a FlashRom 1 when it is started. The FlashRom 1 stores the BIOS data with which basic setting processing of an input-output device of a computer is performed when the computer is started. An NVRAM 2 is a readable and writable nonvolatile memory and stores information showing effective BIOS data in the FlashRom 1. An address conversion controlling part 3 converts it into an address showing the storage area of the BIOS data in the FlashRom 1 based on information stored in the NVRAM 2. The information stored in the NVRAM 2 consists of a Valid flag 21 showing with which BIOS data it is started and an Update flag 22 showing whether or not BIOS data rewriting is normally finished.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a computer which prepares a plurality of programs necessary for starting up a computer system in a storage unit, selects a program which can start up the system normally, and uses the program to start up the system. It is concerned.

[0002]

2. Description of the Related Art Conventionally, a BI required for starting a computer is used.
OS (Basic Input / Output Sys)
When renewing the term (system) by upgrading the system, if a maintenance contract is made, the person in charge of the maintenance contract rewrites the BIOS. If the maintenance contract is not made, the user himself rewrites the BIOS. I have.

[0003]

SUMMARY OF THE INVENTION However, BIO
In order to rewrite the S data, it is necessary to obtain an upgraded BIOS and start a BIOS data rewriting tool (rewriting program).

For this reason, B in a conventional computer
There is a problem that the rewriting of the data in the IOS fails without a certain knowledge of the computer operation. In other words, there is a case where the power of the computer is erroneously turned off while the BIOS data is being rewritten or the BIOS data in the FlashRom is erased by the rewriting tool, and then the data cannot be normally written to the FlashRom.

[0005] If rewriting of the BIOS fails, the computer cannot be started normally at the next startup. That is, the computer starts FlashRom
The system reads out the BIOS data in the (flash memory) and starts the system based on this data.
If this data is lost or destroyed, the system cannot be started normally.

The present invention has been made in view of such a background, and an object of the present invention is to provide a computer which can normally start the system at the next start even if rewriting of BIOS data fails. .

[0007]

According to the first aspect of the present invention,
In the computer, a CPU that outputs a plurality of control signals to control the system of the computer, a first storage unit having a plurality of areas for storing BIOS data for starting the system, and stores boot information of the BIOS data. A second storage unit; and a selection unit that selects an area in which BIOS data for starting the computer is stored, based on the control signal and the start information.

According to a second aspect of the present invention, in the computer according to the first aspect, the boot information includes a rewrite flag indicating whether or not the BIOS rewrite has been completed normally.
And an area flag indicating an area in which BIOS data used for startup set in advance is stored.

According to a third aspect of the present invention, in the computer according to the first or second aspect, the BIOS data has a boot program to be executed when the CPU is booted up by the system, and the boot program is a valid BIOS data. Is determined, the area is selected by the selection means, BIOS data is read, and an operation of activating the system is indicated.

[0010]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a computer according to an embodiment of the present invention. In this figure, C is a CPU, which controls the operation of the entire computer according to a program written in a storage unit M. Further, the CPU C performs a process according to the BIOS data stored in the FlashRom 1 at the time of startup,
Access to the storage unit M and the like becomes possible.

FlashRom1 is a flash memory that is readable and writable and retains its contents even when the power is turned off.
BIOS data for performing basic setting processing of the input / output device of the computer when the computer is started is stored. FlashRom1 is composed of two BIOS with the same capacity.
It is divided into two blocks for storing data: a BIOS data block 10 (upper address) and a BIOS data block 11 (lower address). Here, the BIOS data D is stored in the BIOS data block 10.
1 is stored in the BIOS data block 11.
S data D1 is stored.

The BIOS data block 10 is composed of a boot block 100 and a core block 101.
0 and the core data D1c stored in the core block 101. The boot data D1b is stored in the CPU C
Contains the initialization program that is loaded first. The core data D1c is a core part of the BIOS data,
That is, the initial setting data of the peripheral device such as the storage unit M is included.

Similarly, it is composed of a BIOS data block 11, a boot block 110, and a core block 111.
And the core data D2c stored in the core block 111. The boot data D2b includes an initialization program that is first read by the CPU C at the time of startup.
The core data D2c includes a core portion of the BIOS data, that is, initialization data of a peripheral device such as the storage unit M. Note that the boot data D1b and the boot data D2b are exactly the same data.

The NVRAM 2 is a non-volatile memory that is readable and writable and retains its contents even when the power is turned off.
1 stores information indicating valid BIOS data. That is, the NVRAM 2 has a Valid flag 21 and an Update flag 22 for storing information indicating BIOS data.

Here, the Valid flag 21 indicates that the CPU C
The BIOS data D of the BIOS data block 10
When the system has been started up at “1”, “0” is written and the BIOS data D of the BIOS data block 11 is written.
If the system has been started up at 2, "1" is written.

In the Update flag 22, "1" is written into the BIOS data block 10 or the BIOS data block 11 by the CPU / C in the case of the BIOS data rewrite mode, and other normal data is written. In this case, "0" is written. That is, when “0” is written in the Update flag 22, the BIO
This indicates that the rewriting of the S data has been completed normally.

As described above, in the normal case, the NVRAM 3 is used as an area for storing other maintenance data in the server, but in the present embodiment, the NVRAM 2 is
A flag indicating the rewriting state of the OS, and a CPU
BIO for storing BIOS data booted by C
Used for a flag indicating an S data block.

Reference numeral 3 denotes an address conversion control unit, which is an NVRAM 2
Is converted to an address indicating the storage area of the BIOS data of FlashRom1 based on the information stored in the. CPU ・
C, storage unit M, NVRAM 2 and address conversion control unit 3
They are interconnected by address / data lines L.

Next, referring to FIG.
Will be described in detail. FIG. 2 is a block diagram showing a configuration of the address conversion control unit 3 in FIG. The address conversion unit 31 converts the address of FlashRom1 into an upper side (address switching signal AD = "1") and a lower side (address switching signal AD = "0") by an address switching signal AD controlled by the address control unit 32. I do.

The address control unit 32 has a readable and writable St.
An EXOR gate 322 performs an exclusive OR operation of the value of the atus register 321 and the value of the control signal SD for writing FlashRom1. Here, the Status register 321 stores the boot data D1b initialization program incorporated in the boot block 100 or the boot data D2b embedded in the boot block 110.
When running one of the initialization programs in
The state of the d flag 21 is stored.

The EXOR gate 322 performs an exclusive logical operation on the value stored in the Status register 321 and the control signal SD for writing the FlashRom1 which is “0” when writing the FlashRom1 and “1” when reading the FlashRom1, This calculation result is output as an address switching signal AD. That is, the address switching signal is set to Stat for reading FlashRom1.
The value of the us register 321 is obtained by inverting the value of the status register 321 when writing FlashRom1.

Next, an example of the operation of the embodiment will be described with reference to FIGS. 1, 2 and 3. FIG. 3 is a flowchart for explaining the operation of the computer in FIG. For example, an operation example of one embodiment will be described for a case in which the BIOS data D1 stored in the BIOS data block 10 (upper address) of FlashRom1 is booted and the BIOS data D2 of the BIOS data block 11 is rewritten. .

In step S 1, when the user turns on the power of the computer, the CPU / C reads the BIOS data D 1 from the boot block unit 100. next,
In step S2, the CPU C starts up the system according to the initialization program of the boot block 10 in the BIOS data D1.

Next, in step S3, the CPU C
According to the initial setting program, whether "0" is written in the Update flag 22, that is, the previous BI
It is checked whether the rewriting of the OS data has been completed normally. For example, when detecting that “0” has not been written, that is, that “1” has been written, the CPU / C advances the process to step S4.

Next, in step S4, the CPU C
Inverts the value stored in the Valid flag 21 (“0” → “1”), and writes “0” in the Update flag 22. Then, the CPU / C advances the process to step S5. On the other hand, in step S3, the CPU C
When detecting that "0" is written, the process proceeds to step S5 without changing the Update flag 22.

Next, in step S5, the CPU C
Writes the value of the Valid flag 21 into the Status register 321. When the Update flag 22 is 0, the valid
The flag 21 and the update flag 22 are not changed.
The value of the flag 21 is written to the status register 321. Then, CPU / C advances the process to step S6.

Next, in step S6, the CPU C
Starts the system based on the BIOS data D1. That is, in the operation example of this embodiment, in the following description, it is assumed that the value of the Status register 321 is determined to be “0” by the check in step S3.

Then, the CPU / C sets the status register 3
The exclusive OR of the value stored in 21 and the value of the write control signal SD of FlashRom1 is calculated. At this time,
Since FlashRom1 is in the read state at boot time, Flas
The write (write) control signal SD of hRom1 is always “1”.

Thus, the result of the exclusive OR operation is:
"0" stored in Status register 321 and ROM
The write control signal SD changes from “1” to “1”. That is, the address switching signal AD becomes “1” and C
PU · C is the BIOS data block 10 of FlashRom1
Is booted from the BIOS data D1 stored in the. Then, the CPU C executes the process in step S
Proceed to 7.

Next, in step S7, for example, it is assumed that the user rewrites the BIOS data D2 stored in the BIOS data block 11. at first,
The CPU C generates a new BIOS according to the BIOS data D1.
Boot FD storing OS data and rewriting tools
Boot from a boot medium such as a
The BIOS data rewriting is started.

The rewriting tool has a NVRAM 2 flag changing function and a BIOS rewriting function. Then, the CPU / C inverts the Valid flag 21 (“0” → “1”) by the flag changing function of the rewriting tool, and at the same time, changes the Update flag 22 to “1”. After this change, the CPU C advances the process to step S8.

Next, in step S7, the CPU C
Sets the write control signal SD of FlashRom1 to "0" for rewriting the BIOS data. Because of this, Status
The address switching signal AD which is the exclusive OR of the value “1” written in the register 321 and the value “0” of the ROM write control signal is “0”. This allows the CPU
C rewrites the BIOS data D2 stored in the BIOS data block 11 (lower address) of FlashRom1. Then, the CPU C executes the process in step S
Proceed to 9.

Next, at step S9, the CPU C
Is the BIOS stored in the BIOS data block 11.
It is determined whether the rewriting of the OS data D2 has been completed normally. For example, the CPU C performs the BIOS data D2
In the determination of whether or not the rewriting has been completed normally, it is determined that the rewriting has been performed normally based on the information of the rewriting tool. Thereby, CPU / C advances the process to step S10.

Next, in step S10, the CPU
C writes “0” to the Update flag 22 by the flag change function of the rewriting tool. And the CPU C
The process proceeds to step S11.

Next, at step S11, the CPU
C ends the process of rewriting the BIOS data D2.
As a result, since the value of the Valid flag 21 is “1” and the value of the Update flag 22 is “0”, the CPU / C uses the BIOS data D2 of the newly rewritten BIOS data in the next System startup.

On the other hand, in the determination as to whether or not the rewriting has been performed normally in step S9, the CPU / C uses the rewriting state check information of the rewriting tool, etc.
If it is determined that the BIOS data D2 in the BIOS data block 11 has not been correctly rewritten, the process proceeds to step S12.

Next, in step S12, the CPU
C resets the system because the BIOS data D2 is not correctly rewritten. Then, the user reboots again and performs the rewriting process of the BIOS data D2 again.

It is also assumed that the computer is shut down during rewriting of the BIOS data D2 due to a sudden power-off or the like. As described above, when the rewriting of the BIOS data is not completed normally, the value of the Update flag 22 has not been rewritten to “0”.

Accordingly, at the time of booting, the CPU C performs the operation according to the initialization program included in the boot data D2b.
The value of the lid flag 21 is inverted (“1” → “0”), and the system can be started from another BIOS data block 10. Thus, there is no obstacle that the system cannot be started.

As described above, the computer according to the present embodiment includes the BIOS data block 10 containing the BIOS data D1 in the FlashRom1, and the BIOS data D2.
Two BIOS of the BIOS data block 11 containing
Since the BIOS data is rewritten in a BIOS data block having a block different from the BIOS data block that started the system, even if the rewriting of the BIOS data fails, the BIOS data that is not rewritten when the system is started next time Since the boot is performed using the BIOS data of the block, it is possible to prevent the system from starting up due to failure in rewriting the BIOS data.

Also, the computer according to the present embodiment
Valid boot data D1b and boot data D2b in the boot block 100 and the boot block 110, respectively.
And the boot data D1b and the boot data D2b
Includes a program for determining a valid BIOS data block, so that it is possible to provide a simple recovery in the event of a failure in rewriting the BIOS data, and to easily cope with a failure of the BIOS data and improve maintainability. It is possible.

Although one embodiment of the present invention has been described in detail with reference to the drawings, the specific configuration is not limited to this embodiment, and a design change or the like may be made without departing from the gist of the present invention. The present invention is also included in the present invention.

[0043]

[Effect of the Invention] Since the FlashRom has two blocks containing BIOS data and the system rewrites a block different from the block where the system started, even if the rewrite fails, the system will start up the next time the system is started. I can't be without it.

Since the boot block includes a program for determining a valid BIOS data block, by providing a simple recovery method, even in the event of a failure, the response is facilitated and the maintainability is improved.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a computer according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a detailed configuration of an address translation control unit 3 in the computer shown in FIG.

FIG. 3 is a flowchart for explaining the operation of the computer shown in FIG. 1;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 FlashRom 2 NVRAM 3 Address conversion control part 10, 11 BIOS data block 21 Valid flag 22 Update flag 31 Address conversion part 32 Address control part 100, 110 Boot block 101, 111 Core block 321 Status register 322 EXOR gate C CPU L Address / Data line M Storage unit

Claims (3)

[Claims] A CPU for outputting a plurality of control signals to control a system of a computer; a first storage unit having a plurality of areas for storing BIOS data for activating a system; A computer comprising: a second storage unit for storing; and a selection unit for selecting an area in which BIOS data for starting the computer is stored, based on the control signal and the start information. 2. The boot information includes a rewrite flag indicating whether or not BIOS rewrite has been completed normally, and an area flag indicating an area in which BIOS data to be used for a predetermined start is stored. The computer according to claim 1, wherein: 3. The BIOS data has a boot program executed when the CPU is booted up by the system. The boot program determines the area in which valid BIOS data is stored, and selects the area by the selection means. 3. The computer according to claim 1, wherein the computer reads out the BIOS data by selecting it and starts the system.