JP2000151593A - Data exchange switch - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance a transfer efficiency in the case of transferring a multi- cast. SOLUTION: An input side accommodation sections 1-1-1-n make a multi-cast transfer request that combines a unit-cast transfer request or a transfer request to plurality of output side accommodation sections. A switch control section 3 controls section of output side accommodation section 2-1-2-n being a transfer destination for any transfer request for each same transfer request and outputs a switch control signal CL and outputs a transfer permission signal L1 to the input side accommodation section of a transfer source. A selector switch section 4 based on the switch control signal CL connects with the input side accommodation section and the output side accommodation section one to one or connects with one input side accommodation section and plurality of the output side accommodation sections at the same time.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data exchange switch for transferring data of an arbitrary length inputted to an input side accommodating section to a predetermined output side accommodating section based on destination information.

[0002]

2. Description of the Related Art In general, a plurality of input-side receiving sections (input ports) and a plurality of output-side receiving sections (output ports) are provided.
A data exchange switch that exchanges and outputs arbitrary-length data input to a predetermined input-side accommodation unit to a predetermined output-side accommodation unit,
The configuration is as shown in FIG. In FIG.
(A) is a block diagram showing a conventional data exchange switch,
(B) is a block diagram showing an input side accommodation unit.

Each of the input-side receiving sections 61-1 to 61-n indicates a memory 71 for temporarily holding data of an arbitrary length inputted from the outside and a storage position on the memory 71 for transfer data. A queue control unit 72 having a queue for storing a buffer pointer and a data length; a transfer request signal RE according to the buffer pointer and the data length stored in the queue of the queue control unit 72; An input control unit 73 that instructs the data transfer unit 74 to start data transfer in response thereto, and a data transfer unit 74 that reads data in the memory 71 and outputs the data to the selector switch unit 64 as transfer data DI. With such a configuration, each of the input-side receiving units 61-1 to 61-n is configured to output the output-side receiving units 62-1 to 62-n in response to arrival of data to be transferred.
Output a transfer request signal RE for any one of the above.

[0006] As shown in FIG. 9, the switch control unit 63 activates a port selection unit based on idle / busy information indicating whether or not the output-side housing units 62-1 to 62-n are in a receivable state. Controller 91 for generating an enable signal E for output, and a port selector 9 for generating a transfer permission signal LI, which is provided corresponding to the output side accommodating units 62-1 to 62-n.
2-1 to 92-n, and output-side housing portions 62-1 to 62-n
, And signal generation units 93-1 to 93-n that generate the switch control signal CL.

[0005] The switch control unit 63 determines which of the transfer request signals RE output from the input-side receiving units 61-1 to 61-n, the output-side receiving unit serving as the transfer destination should be switched for each same transfer request. Each of the transfer requests, and outputs a switch control signal CL for instructing connection between the input-side receiving unit serving as the transfer source and the output-side receiving unit serving as the transfer destination. And outputs a transfer permission signal LI. The selector switch unit 64 connects the input-side housing unit and the output-side housing unit on a one-to-one basis based on the switch control signal CL from the switch control unit 63.

The input-side receiving units 61-1 to 61-n sequentially output the corresponding transfer data DI to the selector switch unit 64 in response to the notification of the transfer permission signal LI. This allows
Transfer data D output from the input-side receiving unit that is the request source
I is transferred via the selector switch unit 64 to a predetermined output side storage unit requested as a data transfer destination, and is output to the outside via this output side storage unit.

As described above, in the data exchange switch of FIG. 8, the input side accommodating section and the output side accommodating section are connected one-to-one by the selector switch section 64, and each input side accommodating section is connected to an arbitrary output side accommodating section. When there are a plurality of transfer requests and the transfer requests conflict with each other, a transfer request from only one input side accommodating unit is selected, and a transfer permission is given to the selected input side accommodating unit. By switching the selector switch unit 64, a data exchange function is realized.

By the way, in a frame flowing through a normal network, there is a multicast (broadcast) frame to be transferred to a plurality of output side accommodating units. In the data exchange switch shown in FIG. 8, in the input-side accommodating units 61-1 to 61-n, transfer requests are individually output for each of a plurality of transfer destinations designated as transfer destinations of the multicast frame, and By repeating the transfer every time you get permission to transfer,
Implement multicast transfer.

[0009]

As described above, in the conventional data exchange switch, transfer requests are individually output to a plurality of transfer destinations designated as transfer destinations of a multicast frame, even if transfer is possible simultaneously. To do
There is a problem that transfer efficiency is reduced. Also, during the processing of the multicast frame, if one or more of the transfer permissions from the plurality of output-side accommodating units designated as the transfer destinations cannot be obtained, the input is continued until the transfer permission is obtained. In order to meet at the side storage unit,
There is a problem that transfer efficiency is reduced. The present invention
An object of the present invention is to provide a data exchange switch in which transfer efficiency does not decrease during multicast transfer.

[0010]

According to a first aspect of the present invention, there is provided an information processing apparatus having a plurality of input-side receiving sections and an output-side receiving section, and storing data of an arbitrary length input to the input-side receiving section. In a data exchange switch for transferring data to a predetermined output side storage unit based on the transfer destination information, a unicast transfer request to one output side storage unit or transfer to a plurality of output side storage units is performed for data to be transferred. A plurality of requests are made to perform a multicast transfer request by batching the requests, output corresponding data in accordance with the transfer permission for each transfer request, and make a transfer request to another output side accommodating unit when the transfer permission is not obtained. Input-side receiving sections (1-1 to 1-n),
Of the transfer requests output from each input-side accommodating unit, one of the transfer requests is selected for each transfer request that requests the same destination, and one input-side accommodating unit serving as a transfer source and a transfer destination are selected. A switch control unit (3) for outputting a switch control signal instructing connection to one or more output-side receiving units and outputting a transfer permission to the input-side receiving unit of the transfer source; Based on a switch control signal from the unit, the input-side housing unit and the output-side housing unit are connected one-to-one, or one input-side housing unit and a plurality of output-side housing units are simultaneously connected and transferred. A selector switch unit (4) for transferring data output from the input-side storage unit of the transfer source to the output-side storage unit of the transfer destination in response to the permission. In this way, each input-side accommodating unit can make a unicast transfer request or a multicast transfer request that collectively transfers requests to a plurality of output-side accommodating units for data to be transferred. The switch control unit selects one of the transfer requests for each of the transfer requests that request the same transfer destination, and selects one input-side receiving unit serving as a transfer source and one or more output-side receiving units serving as transfer destinations. It outputs a switch control signal for instructing connection with the switch, and outputs a transfer permission to the input side accommodating unit of the transfer source. The selector switch unit connects the input-side accommodation unit and the output-side accommodation unit on a one-to-one basis, or simultaneously connects one input-side accommodation unit and a plurality of output-side accommodation units based on a switch control signal. . In this way, by outputting the transfer requests collectively for a plurality of transfer destinations specified as the transfer destinations of the multicast frame, the multicast frame can be transferred simultaneously to the plurality of transfer destinations, thereby improving transfer efficiency. be able to. If transfer permission is not obtained for a multicast transfer request, the multicast transfer request is canceled and a unicast transfer request is output. If transfer permission is not obtained for a unicast transfer request, In this method, the unicast transfer request is canceled and another multicast transfer request or unicast transfer request is output, so that transfer efficiency can be improved.

According to a second aspect of the present invention, the input-side accommodating section includes a memory for holding data to be transferred, a buffer pointer and a data length of unicast transfer data addressed to each output-side accommodating section. , A first queue provided for each output-side accommodating section, a second queue for storing a buffer pointer and data length of data for multicast transfer, and a buffer stored in the first and second queues. If a unicast transfer request or a multicast transfer request is made according to the pointer and the data length, and transfer permission is not obtained, another output side accommodating according to other data stored in the first and second queues. And a data transfer unit that outputs corresponding data to the selector switch unit according to a transfer permission for each transfer request. Is shall. Further, as set forth in claim 3, the input-side accommodating unit includes a broadcast bit indicating whether or not the transfer is a multicast transfer and an output-side accommodating unit indicating to which output-side accommodating unit the transfer request is made. A multicast transfer request or a unicast transfer request is made by a transfer request signal composed of each bit. Thus, by providing a broadcast bit in the transfer request signal,
When selecting a transfer request from each input-side accommodating section, it is possible to recognize which input-side accommodating section has issued a multicast transfer request.

Further, as set forth in claim 4, the switch control section outputs a timing signal indicating a multicast processing period in which a multicast transfer request can be accepted or a unicast processing period in which a unicast transfer request can be accepted. The input side accommodating unit issues a multicast transfer request or a unicast transfer request according to the timing signal. As described above, the switch control unit outputs the timing signal, thereby notifying each input-side accommodating unit of a timing at which a multicast transfer request or a unicast transfer request can be accepted, and transmitting the transfer request from the input-side accommodating unit. Operation can be controlled. Further, as set forth in claim 5, the switch control section preferentially processes either a multicast transfer request or a unicast transfer request by outputting the timing signal. Further, as set forth in claim 6, the switch control section arbitrarily processes a multicast transfer request or a unicast transfer request by outputting the timing signal. As described above, the switch control unit arbitrarily processes the multicast transfer request or the unicast transfer request, so that the multicast transfer or the unicast transfer can be selected at random, and the transfer efficiency can be improved.

[0013]

Next, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1A is a block diagram of a data exchange switch according to an embodiment of the present invention.
FIG. 1B is a block diagram of an input side accommodating unit in the data exchange switch, and FIG. 2 is a block diagram of a switch control unit in the data exchange switch. Each input side accommodation section 1-1 to 1-n
Performs a unicast transfer request to one output-side accommodating unit or a multicast transfer request in which transfer requests to a plurality of output-side accommodating units are batched according to arrival of data to be transferred.

The switch control unit 3 is provided with each input side accommodation unit 1-.
Out of the transfer request signals RE output from 1 to 1-n, the output-side accommodating unit serving as the transfer destination selects one of the transfer requests for each same transfer request, and one input-side accommodating unit serving as the transfer source is selected. It outputs a switch control signal CL for instructing connection between the unit and one or a plurality of output-side receiving units serving as transfer destinations, and outputs a transfer permission signal LI to the input-side receiving unit serving as a transfer source.

The selector switch unit 4 connects the input side accommodating unit and the output side accommodating unit on a one-to-one basis based on a switch control signal CL from the switch control unit 3, or
One input-side housing and a plurality of output-side housings are simultaneously connected.

The input side receiving units 1-1 to 1-n sequentially output the corresponding transfer data DI to the selector switch unit 4 in response to the notification of the transfer permission signal LI. As a result, the transfer data DI output from the input-side accommodating unit that is the request source is
The data is transferred to a predetermined output side storage unit requested as a data transfer destination via the selector switch unit 4, and is output to the outside via the output side storage unit.

Each of the input-side accommodating units 1-1 to 1-n includes a memory 11 for temporarily storing data of an arbitrary length input from the outside, and a unicast transfer data addressed to each output-side accommodating unit. A queue control unit 12 including a first queue provided for each output-side storage unit for storing a buffer pointer and a data length, and a second queue for storing a buffer pointer and data length of data for multicast transfer; The input control unit 13 outputs a transfer request signal RE according to the data stored in the queue of the queue control unit 12, and instructs the data transfer unit 14 to start data transfer according to the transfer permission signal LI.
And a data transfer unit 14 that reads data from the memory 11 and outputs the data to the selector switch unit 4 as transfer data DI.
It is composed of

Further, each of the output side housing sections 2-1 to 2-n is
The data receiving unit 21 receives the data DO output from the selector switch unit 4 and a memory 22 that temporarily holds the data received by the data receiving unit 21 until the data is read from the outside.

Next, the switch control unit 3 generates a timing signal T indicating a multicast processing period in which a multicast transfer request can be accepted or a unicast processing period in which a unicast transfer request can be accepted. A multicast input port designating signal MIP for designating a port, a multicast enable signal ME for activating a port selector described later during multicast transfer, and a unicast enable signal for activating the port selector during unicast transfer. Controller unit 31 for generating UE, output side accommodation unit 2
Transfer permission signal LI provided corresponding to -1 to 2-n
Signal generation units 33-1 to 33-n that generate switch control signals CL, provided in correspondence to the port selection units 32-1 to 32-n that generate the switch signals and the output side storage units 2-1 to 2-n. n
It is composed of

In FIG. 2, RE-1 to RE-n
Are transfer request signals RE output from the input-side receiving units 1-1 to 1-n, respectively, and LI-1 to LI-n are transfer requests corresponding to the output-side receiving units 2-1 to 2-n, respectively. A permission signal LI, and CL-1 to CL-n are switch control signals C corresponding to the output side accommodation units 2-1 to 2-n, respectively.
L.

In the transfer request signal RE, for example, "1-1 to 2-1" indicates a transfer request from the input-side accommodating unit 1-1 to the output-side accommodating unit 2-1. In, for example, "1-1 to 2-1" is
This indicates that the transfer is permitted in response to a transfer request from the input side accommodation unit 1-1 to the output side accommodation unit 2-1.

FIG. 3 is a block diagram showing the internal configuration of the controller section 31. The controller unit 31 includes a timing signal T, an enable signal E for activating a bitmap selection unit and a multicast selection processing unit described later.
M, a main controller 52 for generating an enable signal EU for activating the unicast selection processor, a bitmap selector 53 for generating a multicast enable signal ME, and a multicast input port designation signal MI.
It comprises a multicast selection processing section 54 for generating P and a unicast selection processing section 55 for generating a unicast enable signal UE.

Next, the operation of the data exchange switch according to the present embodiment will be described. FIGS. 4 and 5 are timing charts for explaining the operation of the data exchange switch. The memory 11 in each of the input side storage units 1-1 to 1-n temporarily stores data input from the outside. The queue control unit 12 has a queue for making a transfer request for each data stored in the memory 11.

As shown in FIG. 6, this queue stores a buffer pointer and a data length indicating the storage position on the memory 11 of the transfer data addressed to each of the output side storage units 2-1 to 2-n. A first queue 15-1 to 15-n provided for each of the output side accommodating units 2-1 to 2-n, a buffer pointer and a data indicating a storage position on the memory 11 of transfer data for multicast transfer. Queue 1 for storing the length
6

For example, among the data stored in the memory 11, the buffer pointer and the data length of the transfer data for unicast transfer addressed to the output side accommodating unit 2-1 are determined based on the transfer destination information of the data. The buffer pointer and the data length of the transfer data for the multicast transfer are stored in the queue 16 based on the transfer destination information. Note that buffer queues and data lengths are stored in the queues 15-1 to 15-n and 16 in the order of arrival of frame data, and are extracted in that order. Therefore, each of the queues 15-1 to 15-15
The sum of the number of buffer pointers or the number of data lengths stored in -n, 16 matches the number of frame data stored on the memory.

Then, the queue control unit 12 controls each queue 1
Queue status QS indicating whether a buffer pointer and a data length are stored in 5-1 to 15-n, 16 for each queue, and a memory for transfer data stored in queues 15-1 to 15-n, 16 It outputs the untransferred buffer pointer YBP indicating the storage start position on the data 11, the data length, the queue number QN, and the multicast transfer destination information MDI which is the transfer destination information of the first frame of the data stored in the queue 16.

Further, the queue control unit 12 sends the transferred buffer pointer BP, the queue number Q
When N (a number indicating one of the queues 15-1 to 15-n, 16) is input, the input buffer pointer and the corresponding data length are vacated in the queue designated by the queue number QN. Used as a buffer to receive subsequent frames.

Next, the input control unit 13
The transfer request signal RE is generated based on the queue status QS and the multicast transfer destination information MDI output from the switch control unit 2 and the timing signal T output from the switch control unit 3. As shown in FIG. 7, the transfer request signal RE includes an M / C bit (broadcast bit) indicating whether or not the transfer is a multicast transfer, and an output-side storage unit indicating to which output-side storage unit the transfer request is made. This signal is composed of bits 1 to n for each of the units 2-1 to 2-n.

Here, the timing signal T output from the switch control section 3 will be described. In the present embodiment, the operation cycle of the data exchange switch includes a multicast processing period in which a multicast transfer request can be accepted and a unicast processing period in which a unicast transfer request can be accepted. A transfer request is received in a time-division manner corresponding to each unit or each input side accommodating unit.

At this time, one processing cycle time-divided includes an arbitration period in which the switch control unit 3 receives a transfer request and a timing in which each input-side receiving unit 1-1 to 1-n cancels the transfer request. And a cancellation period.

The timing signal T indicates whether it is a multicast processing period or a unicast processing period, indicates which output accommodating section or input side accommodating section is the timing, and furthermore, is an arbitration period. This signal indicates whether the current period is during the cancel period. Note that, during the unicast processing period, the timing signal T is transmitted to a selectable transfer destination (output side storage units 2-1 to 2-
n) is specified in a time-division manner, and in the multicast processing period, selectable transfer sources (input-side accommodation units 1-1 to 1--1) are selected.
n) is designated by time division.

For example, in the timing signal T shown in FIG. 4, "MC-n" indicates a timing at which a multicast transfer request from the input side accommodating unit 1-n is accepted, and "n" indicates an output side accommodating unit. 2-n indicates a timing to accept a unicast transfer request. Also, "arbitration" indicates that the arbitration period,
“Cancel” indicates a cancellation period.

When the timing signal T as described above indicates, for example, "2" and the queue status QS indicates that the buffer pointer and the data length are stored in the queue 15-2 for unicast transfer, Control unit 1
3 is M of the transfer request signal RE, as shown in FIG.
The / C bit is set to “0”. Further, the input control unit 1
Reference numeral 3 denotes one bit corresponding to the output-side accommodation unit of the transfer destination (here, the output-side accommodation unit 2-2 according to the queue 15-2).
2 is recognized as the transfer destination) is “1”.

When the timing signal T is, for example, "MC-
1 ", indicating that the queue control unit 12 in the input side accommodation unit 1-1
If the queue status QS outputted from the input side indicates that the buffer pointer and the data length are stored in the queue 16, the input control unit 13 in the input side accommodation unit 1-1
Sets the M / C bit to “1” as shown in FIG. Further, the input control unit 13 sets a plurality of bits corresponding to the output side accommodating unit of the transfer destination to “1” according to the multicast transfer destination information MDI.

The input control unit 13 recognizes that the data transfer has been permitted based on the transfer permission signal LI and the timing signal T output from the switch control unit 3, and recognizes the transfer destination (indicated by the transfer permission signal LI). The queue number QN corresponding to the output side accommodating unit is output to the data transfer unit 14.

The data transfer unit 14 receives the untransferred buffer pointer YBP and the data length from the queue control unit 12, and holds the data for each queue number QN. When the queue number QN is output from the input control unit 13, the data transfer unit 14 generates a memory address MA corresponding to the data length from the previously stored untransferred buffer pointer YBP corresponding to the queue number QN. By doing so, the memory 11
, The data DI to be transferred is read out and transferred.

Next, the controller unit 31 in the switch control unit 3 includes the transfer request signals RE-1 to RE-n output from the input-side receiving units 1-1 to 1-n and the port selection units 32. Based on the transmission port statuses PS-1 to PS-n output from -1 to 32-n, the multicast enable signals ME-1 to ME-n, the multicast input port designation signals MIP-1 to MIP-n, and the unicast It outputs enable signals UE-1 to UE-n.

In the multicast processing period described above,
The controller 31 includes transfer request signals RE-1 to RE-.
The output-side storage units 2-1 and 2-2 of the transfer destination specified by n
-N is the transmission port status PS
Judgment is made based on -1 to PS-n.

Then, the controller unit 31 sets the multicast enable signals ME-1 to ME-n corresponding to the output-side accommodating units determined to be receivable to the activation level, and sets the transfer request signals RE-1 to RE-n. Input port designating signal MI which designates, as a transfer source, an input-side accommodating unit that has output one of the plurality of multicast transfer requests output from the plurality of multicast transfer requests.
P-1 to MIP-n are output.

Similarly, during the unicast processing period,
The controller 31 includes transfer request signals RE-1 to RE-.
The output-side storage units 2-1 and 2-2 of the transfer destination specified by n
The transmission port status PS-1 determines whether or not -n is receivable.
Judgment is made based on ~ PS-n. Then, the controller unit 31 sets the unicast enable signals UE-1 to UE-n corresponding to the output-side accommodating units determined to be receivable to the activation level.

The port selection units 32-1 to 32-n provided corresponding to the output side storage units 2-1 to 2-n are output from the input side storage units 1-1 to 1-n. Among the transfer request signals RE-1 to RE-n, transfer request signals RE-x1 to RE-xn indicating a transfer request to the corresponding output side accommodating unit are input. For example, in the port selection unit 32-1, the output-side storage unit 2-1 is set as a transfer destination, and each of the input-side storage units 1-1 to 1-1
A transfer request signal RE-x1 having -n as a transfer source is input. The M / C bit is not input.

Each of the port selectors 32-1 to 32-n performs a transfer request to the corresponding output side accommodating unit when the unicast enable signal UE-1 to UE-n is at the activation level. Select one from Subsequently, the port selection units 32-1 to 32-n output the transfer permission signal LI-
1 to LI-n, the transfer permission signal for permitting the transfer request from the selected input side accommodating section to the corresponding output side accommodating section is set to the active level. For example, the port selection unit 32-
When the transfer request from the input-side accommodating unit 1-1 to the output-side accommodating unit 2-1 is selected, the signal 1 sets the signal "1-1 to 2-1" in the transfer permission signal LI-1 to the active level. .

Each of the port selection units 32-1 to 32-n
Are the multicast enable signals ME-1 to ME-n
At the time of the multicast transfer at the activation level, a transfer request is selected in accordance with the multicast input port designation signals MIP-1 to MIP-n.

For example, when the multicast input port designation signals MIP-1 to MIP-n designate the input side accommodation section 1-2, the port selection sections 32-1 to 32-n send the input side accommodation section 1- 2 selects a transfer request to the corresponding output side accommodating unit. Subsequently, the port selection units 32-1 to 32-32
n sets, to the active level, a transfer permission signal among the transfer permission signals LI-1 to LI-n that permits a transfer request from the selected input-side receiving section to the corresponding output-side receiving section.

Then, each of the port selectors 32-1 to 32-32
n indicates transmission port statuses PS-1 to PS-n indicating that when a transfer request is selected and a transfer permission signal is activated, the corresponding output side accommodating unit is in a reception disabled state.
Is output. As a result, the output side accommodating unit corresponding to the port selecting unit that has output the transfer permission is excluded in the selection of the next transfer request.

Next, the signal generation units 33-1 to 33-n provided corresponding to the output side storage units 2-1 to 2-n include:
Transfer permission signals LI-1 to LI-n are input from corresponding port selection units 32-1 to 32-n. Each signal generator 3
3-1 to 33-n correspond to the transfer permission signals LI-1 to LI.
-N, the switch control signals CL-1 to CL
-N is generated.

For example, the transfer permission signals LI-1 to LI-n
When the transfer permission signal for permitting the transfer request from the input-side accommodating unit 1-2 to the corresponding output-side accommodating unit is at the active level, the signal generation units 33-1 to 33-n operate the input-side accommodating unit. It generates switch control signals CL-1 to CL-n for connecting 1-2 to the corresponding output side accommodating section.

Next, the controller section 31 will be described in more detail. The gate circuit 51 in the controller unit 31 performs a logical product of signals corresponding to the same output side accommodating unit between the transfer request signals RE-1 to RE-n and the transmission port statuses PS-1 to PS-n. Take.

As a result, of the transfer request signals RE-1 to RE-n that have passed through the gate circuit 51, only the transfer request signals for which the output destination accommodating sections 2-1 to 2-n of the transfer destinations are in a receivable state. It becomes the active level, which means that it is determined whether or not the output-side receiving units 2-1 to 2-n of the transfer destinations are in the receivable state.

Next, the main control unit 52 generates a timing signal T, an enable signal EM for activating the bitmap selection unit 53 and the multicast selection processing unit 54 during the multicast processing period, and a control signal during the unicast processing period. An enable signal EU for activating the unicast selection processing unit 55 is generated.

When the enable signal EM is at the activation level, the bitmap selection section 53 is in a receivable state (the transfer request signal is at an active level) and a transfer destination based on the transfer request signal passed through the gate circuit 51. The multicast enable signals ME-1 to ME-n corresponding to the output-side accommodation sections 2-1 to 2-n designated as "1" are set to the activation level.

When the enable signal EM is at the activation level, the multicast selection processing section 54 performs the following based on the M / C bits of the transfer request signals RE-1 to RE-n.
It recognizes which input side accommodating unit has issued the multicast transfer request. Then, the multicast selection processing unit 5
4 selects one from a plurality of multicast transfer requests based on the transfer request signal based on the transfer request signal passed through the gate circuit 51, and sets the input side accommodating unit that outputs the selected multicast transfer request as a transfer source. Multicast input port designation signals MIP-1 to MIP-
Output n.

When the enable signal EU is at the activation level, the unicast selection processing unit 55
The unicast enable signal ME corresponding to the output side accommodating units 2-1 to 2-n in the receivable state (the transfer request signal is at the active level) and designated as the transfer destination based on the transfer request signal passed through -1 to ME-n are set to the activation level.

When the multicast enable signal is at the activation level, the unicast selection processing section 55 does not activate the unicast enable signal for the output side accommodating section corresponding to this signal.

Next, the operation at the time of multicast transfer is shown in FIG.
This will be described with reference to FIG. In FIG. 4, CK is a reference clock distributed to each circuit inside the data exchange switch. When the timing signal T is “Mc-1”, that is, at the timing of receiving the multicast transfer request from the input side accommodation unit 1-1, the input side accommodation unit 1-1
As shown in FIG. 4, during the arbitration period, the output-side housing section 2-
A transfer request signal RE-1 indicating a multicast transfer request to 2, 2-n is output.

If the output-side accommodating units 2-2 and 2-n are in a receivable state, the bitmap selecting unit 53 in the controller unit 31 provides a multicast enable corresponding to the output-side accommodating units 2-2 and 2-n. The signals ME-2 and ME-n are set to the activation level. The multicast selection processing unit 54 selects one from a plurality of multicast transfer requests by the transfer request signals RE-1 to RE-n and outputs the multicast input port designation signals MIP-1 to MIP-n (here, Since the multicast transfer request from the input side accommodation unit 1-1 is selected, the input side accommodation unit 1-1 is designated).

Multicast input port designation signal MIP
-1 to MIP-n designate the input side accommodating unit 1-1, the multicast enable signals ME-2, ME-
port selection units 32-2, 32-n activated by n
Of the transfer permission signals LI-2 and LI-n, the transfer permission signals for permitting the transfer request from the input side receiving section 1-1 to the corresponding output side receiving sections 2-2 and 2-n are set to the active level ( In FIG. 4, "H" is set.

Subsequently, the signal generation section 33-2 encodes the transfer permission signal LI-2, and switches the switch control signal CL- for connecting the input side accommodation section 1-1 and the output side accommodation section 2-2.
2, and the signal generation unit 33-n similarly generates a switch control signal CL-n that connects the input-side accommodation unit 1-1 and the output-side accommodation unit 2-n. As a result, the selector switch unit 4 includes the input side storage unit 1-1 and the output side storage unit 2-
2, 2-n.

In this way, the transfer data DI output from the input side storage unit 1-1 is transferred as transfer data DO-2 and DO-n via the selector switch unit 4 to the output side storage unit 2-.
2, 2-n. Then, at time T5,
In response to the end of the transfer of the transfer data DI, the input-side receiving section 1-
The output of the transfer request signal RE-1 from 1 is stopped, and the output of the transfer permission signal and the switch control signal is stopped at time T6 one clock later.

Next, the operation when the multicast transfer is not permitted will be described with reference to FIG. When the timing signal T is “Mc-n”, that is, the input-side accommodation unit 1-n
When it is time to receive a multicast transfer request from, the input-side accommodating unit 1-n transfers the multicast transfer request to the output-side accommodating units 2-2 and 2-n during the arbitration period as shown in FIG. The request signal RE-n is output.

Since no transfer permission has been obtained from the switch control unit 3 in response to this multicast transfer request, the input-side accommodation unit 1-n sends this request during the cancellation period (time T2n-1 to T2n). Cancel and output a new unicast transfer request at the next timing (timing at which a transfer request to a desired output-side accommodating unit can be accepted).

For example, when the timing signal T is "1", that is, when it is time to receive a unicast transfer request to the output-side accommodating section 2-1, the input-side accommodating section 1-n
Outputs a transfer request signal RE-1 indicating a transfer request to the output side accommodation unit 2-1 during the arbitration period. The unicast selection processing unit 55 in the controller unit 31 outputs the output-side accommodation unit 2- if the output-side accommodation unit 2-1 is in a receivable state.
The unicast enable signal UE-1 corresponding to 1 is set to the activation level.

When the unicast enable signal UE-1 becomes the activation level, the port selection unit 32-1 selects one of the transfer requests to the output side accommodation unit 2-1 (here, Then, the transfer request from the input side accommodation unit 1-n is selected). Then, the port selection unit 32-1 sets the transfer permission signal of the transfer permission signal LI-1 that permits the transfer request from the input-side receiving unit 1-n to the corresponding output-side receiving unit 2-1 to the active level ( "H").

Subsequently, the signal generation section 33-1 encodes the transfer permission signal LI-1 and encodes the transfer permission signal LI-1 into the input side accommodating section 1-n.
Control signal C for connecting the output side housing unit 2-1 to the
Generate L-1. Thereby, the selector switch unit 4
Connects the input side accommodation unit 1-n and the output side accommodation unit 2-1. In this way, the transfer data DI output from the input-side receiving unit 1-n is output to the output-side receiving unit 2-1 as the transfer data DO-1 via the selector switch unit 4.

Thereafter, at time T2n + 5, the output of the transfer request signal RE-n from the input side accommodating unit 1-n is stopped in response to the end of the transfer of the transfer data DI, and accordingly, at time T2n + 6 one clock later. Then, the output of the transfer permission signal and the switch control signal is stopped.

As described above, each of the input-side housings 1-1 to 1-1
-N can cancel the multicast transfer request and output a unicast transfer request when no transfer permission is obtained during the multicast processing period. However, if at least one transfer permission is obtained during the multicast processing period, the multicast transfer request cannot be canceled.

Similarly, each of the input side receiving sections 1-1 to 1-n
In the unicast processing period, if transfer permission for a desired transfer destination cannot be obtained, the unicast transfer request can be canceled and another multicast transfer request or a unicast transfer request can be output. However, if transfer permission is obtained during the unicast processing period, the unicast transfer request cannot be canceled.

The main control unit 52 in the controller unit 31 provided in the switch control unit 3 sets the multicast processing period earlier than the unicast processing period, and preferentially processes the multicast transfer request. However, the timing signal T may be generated such that the unicast transfer request is processed preferentially before the unicast processing period.

The main control unit 52 of the present embodiment
Although the order of the multicast processing period and the unicast processing period is fixedly set, and in each period, the timing for receiving the transfer request for each output-side accommodation unit or each input-side accommodation unit is fixedly assigned. The timing signal T may be generated such that these are arbitrarily processed. Thereby, transfer efficiency can be improved.

[0070]

According to the present invention, as described in claim 1, each input-side accommodating unit collectively transmits a unicast transfer request or a transfer request to a plurality of output-side accommodating units for data to be transferred. Multicast transfer request can be made. The switch control unit selects one of the transfer requests for each of the transfer destinations requesting the same transfer destination, outputs a switch control signal, and outputs a transfer permission to the input side accommodating unit of the transfer source. The selector switch unit connects the input-side accommodation unit and the output-side accommodation unit on a one-to-one basis, or simultaneously connects one input-side accommodation unit and a plurality of output-side accommodation units based on a switch control signal. . In this way, by outputting a transfer request collectively to a plurality of transfer destinations designated as the transfer destinations of the multicast frame, the multicast frame can be transferred to the plurality of transfer destinations at the same time. Efficiency can be improved. Further, when the transfer permission is not obtained, a transfer request to another output side accommodating section is made, so that the input side accommodating section waits when the transfer permission is not obtained as in the conventional case. And the transfer efficiency can be further improved.

[Brief description of the drawings]

FIG. 1 is a block diagram of a data exchange switch and an input-side accommodation unit in the data exchange switch according to an embodiment of the present invention.

FIG. 2 is a block diagram of a switch control unit in the data exchange switch of FIG.

FIG. 3 is a block diagram showing an internal configuration of a controller in the switch controller of FIG. 2;

FIG. 4 is a timing chart for explaining the operation of the data exchange switch of FIG. 1;

FIG. 5 is a timing chart for explaining the operation of the data exchange switch of FIG. 1;

FIG. 6 is a diagram showing a queue provided in a queue control unit in the input-side accommodation unit of FIG. 1;

FIG. 7 is a diagram showing a format of a transfer request signal.

FIG. 8 is a block diagram of a conventional data exchange switch and an input side accommodating unit in the data exchange switch.

FIG. 9 is a block diagram of a switch control unit in the data exchange switch of FIG. 8;

[Explanation of symbols]

1-1 to 1-n input-side accommodation section, 2-1 to 2-n ... output-side accommodation section, 3 ... switch control section, 4 ... selector switch section, 11 ... memory, 12 ... queue control section, 13 ... Input control unit, 14: Data transfer unit, 15-1 to 15-n, 16
... Cue, 21 ... Data receiving unit, 22 ... Memory, 31 ...
Controller part, 32-1 to 32-n ... port selection part,
33-1 to 33-n: signal generator, 51: gate circuit,
52: Main control unit, 53: Bitmap selection unit, 54
... Multicast selection processing unit, 55 ... Unicast selection processing unit.

Claims (6)

[Claims] 1. An information processing apparatus comprising: a plurality of input-side receiving sections and an output-side receiving section;
In the data exchange switch for transferring data to a predetermined output side storage unit based on the transfer destination information, a request for unicast transfer to one output side storage unit or a transfer request to a plurality of output side storage units for data to be transferred. Perform a batch multicast transfer request, output corresponding data according to the transfer permission for each transfer request, and make a transfer request to another output side accommodating unit when transfer permission is not obtained. An input side accommodating unit, and one of the transfer requests output from each of the input side accommodating units, for each transfer request having the same requested destination, one of the transfer requests is selected, and one input side serving as a transfer source is selected. A switch control signal for instructing connection between the storage unit and one or more output-side storage units serving as transfer destinations is output, and transfer permission is issued to the input-side storage unit of the transfer source. A switch control unit for connecting the input-side receiving unit and the output-side receiving unit on a one-to-one basis or a single input-side receiving unit and a plurality of output-side receiving units based on a switch control signal from the switch controlling unit. And a selector switch for simultaneously connecting the storage unit and the data output from the input-side storage unit of the transfer source to the output-side storage unit of the transfer destination according to the transfer permission. switch. 2. The data exchange switch according to claim 1, wherein the input-side accommodating unit includes a memory for holding data to be transferred, a buffer pointer for unicast transfer data addressed to each output-side accommodating unit, and data. A first queue provided for each output side storage unit for storing the length, a second queue for storing a buffer pointer and data length of the data for multicast transfer, and a first queue stored for the first and second queues. A unicast transfer request or a multicast transfer request is made according to the buffer pointer and the data length, and if transfer permission is not obtained, another output side is set according to other data stored in the first and second queues. An input control unit that issues a transfer request to the storage unit; and a data unit that outputs corresponding data to the selector switch unit according to the transfer permission for each transfer request. Data exchange switch, characterized in that it comprises a data transfer unit. 3. The data exchange switch according to claim 1, wherein the input side accommodating unit indicates a broadcast bit indicating whether or not the transfer is a multicast transfer and an output side accommodating unit to which the transfer request is directed. A data exchange switch for performing a multicast transfer request or a unicast transfer request by a transfer request signal including a bit for each output side accommodating unit. 4. The data exchange switch according to claim 1, wherein the switch control unit outputs a timing signal indicating a multicast processing period in which a multicast transfer request can be accepted or a unicast processing period in which a unicast transfer request can be accepted. The data exchange switch, wherein the input side accommodation unit issues a multicast transfer request or a unicast transfer request according to the timing signal. 5. The data exchange switch according to claim 4, wherein the switch control unit preferentially processes either a multicast transfer request or a unicast transfer request by outputting the timing signal. Data exchange switch. 6. The data exchange switch according to claim 4, wherein the switch control unit arbitrarily processes a multicast transfer request or a unicast transfer request by outputting the timing signal.