JP2000138615A - Method for capturing synchronization and device therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To increase synchronization processing rates, to decrease the amount of hardware and to reduce power consumption by simplifying the synchronization capturing processing. SOLUTION: On the basis of slot timing in a data frame, data of one frame are received. A correlation device calculates a correlation value between one symbol at the head of each slot and a search code by using the search code generated by a code generator. This correlation processing is applied to the search codes 1-17 of each of slots 1-3. The correlation values for the three slots are integrated as to the corresponding search codes of each group using a search code arrangement table. This integration process is repeated for integration head slots 1-16 and for 32 search code groups. Then the search code group numbers and the head of the frame are detected from the search code arrangement and the maximum value of the integration results.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a synchronization acquisition device and a synchronization acquisition method in CDMA mobile communication.

[0002]

2. Description of the Related Art Code Division Multiple Access (CDMA) is used as a multiple access system for the next generation mobile communication system.
Is being developed. In this CDMA cellular system, it is necessary to perform a cell search for the task of establishing initial synchronization when the mobile station is powered on, or for cell switching (handover) due to movement.

[0003] A comma-free method has been used as a method for acquiring synchronization at the time of this cell search. The comma-free method is to spread information using a code called comma-free arranged with a certain regularity within one frame,
This is a method of identifying a frame synchronization and spreading code using the regularity. Hereinafter, this comma-free synchronization acquisition method will be described with reference to FIGS.

The synchronization acquisition method in CDMA has three stages of slot timing detection, frame timing detection, and spreading code identification.

[0005] Slot timing detection Normally, in CDMA, a first channel is used as a synchronization channel.
A synchronization channel and a second synchronization channel are provided. Here, the slot timing is detected using the first synchronization channel. In the signal of the first synchronization channel, one specific symbol in one slot is spread only with a search code common to all base stations. The slot timing is detected using this search code. The search code is one of three spreading codes used in CDMA, and the other two are called a scrambling code and a spreading code.

More specifically, the detection of the slot timing is performed in a process as shown in FIG. In ST1,
The data for one slot in the frame of the received data is fetched. In ST2, a correlation value between data for one symbol and a common spreading code is calculated. S
At T3, the phase of the common search code is shifted. In ST4, it is determined whether or not the correlation processing has been completed for one frame. If one frame has not been completed, the process returns to ST2 to perform the correlation process. If the correlation processing has been completed for one frame in ST4, the slot timing is detected by detecting the peak of the correlation value of the correlation processing for the one frame in ST5.

Here, frame timing detection (search code group identification) Here, frame timing detection and search code group identification are performed using the second synchronization channel. Second
In the synchronization channel, the first symbol of all slots in one frame is spread with a search code. As shown in FIG. 13, there are 32 groups of search codes to be assigned to each slot. A search code group is identified by using this search code, and thereafter, a frame timing is detected from one identified search code group.

More specifically, the detection of the slot timing is performed in a process as shown in FIG. In ST11, one frame of data is fetched based on the slot timing in the data frame. In ST14,
Correlation processing is performed between the first symbol of each slot and the search code to calculate a correlation value. This correlation process is performed for search codes 1 to 17, and further for each search code for slots 1 to 16.
Therefore, the correlation processing of ST14 is performed by using search codes 1-1.
It repeats for seven slots and repeats for 16 slots (ST12 to ST16). These correlation values are stored.

Next, in ST19, correlation values for 16 slots for the corresponding search code are integrated for each group according to the search code arrangement table of FIG. Then, the process of ST19 is performed by integrating the leading slot 1 of the integration.
Repeat for up to 16 search code groups 32
This is repeated for each unit (ST17 to ST21). Then
From the search code arrangement in FIG. 13 and the maximum value of the integration result, the circcode group and the frame head are detected (ST2).
2).

Here, one scrambling code is identified from the 16 scrambling code candidates determined from the search code group identified in the above. Specifically, scrambling code identification is performed in the step shown in FIG.

In ST32, a correlation value between data for four symbols and a scrambling code is calculated according to the identified frame timing. This process is repeated for 16 scrambling codes belonging to the identified search code group (ST31 to ST33).
Next, in ST34, the one having the largest correlation value among the correlation results is identified as a scrambling code.

[0012]

However, in the above synchronous acquisition method, the number of correlations is 16 × 17 = 272.
, And the number of additions is 32 × 16 × 15 = 7680, and there is a problem that the amount of processing required in the processing becomes very large. This increase in the processing amount is likely to cause an increase in not only the processing time but also the hardware amount and further the power consumption.

SUMMARY OF THE INVENTION The present invention has been made in view of the above, and an object of the present invention is to provide a synchronization acquisition apparatus and a synchronization acquisition method which require a small amount of processing at the time of cell search.

[0014]

In order to solve the above-mentioned problems, the present inventor has reduced the number of times of correlation processing using the following characteristics. That is, the 32 types of search code groups are composed of 17 search codes, and the arrangement of the search codes is derived from the (M, N) Reed-Solomon code. M in parentheses (M, N) indicates a cyclic code length, and N is a value obtained by subtracting the minimum Hamming distance from the cyclic code length and adding one.

Here, the minimum Hamming distance (M-N + 1)
Means that when any two different search code groups are compared with other cyclic codes, at least (M−
The (N + 1) slot is different from the search code arrangement of other groups.

In other words, when the above characteristics are changed, any two different
When comparing any consecutive N slots of a type of search code group, the search code for at least one slot is different from the others. Therefore, the identification of the search code group and the frame timing can be performed based on the information of the N slots.

That is, the gist of the present invention is that the correlation processing for M slots is performed on each search code in the conventional processing. On the other hand, using the above characteristics, only N slots (M> N) are used. That is, a search code group is identified by the correlation processing.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A synchronization acquisition apparatus according to a first aspect of the present invention includes means for detecting slot timing using a first spreading code common to a communication partner, and means for detecting frame timing. In the second spreading code group, the second spreading code group has a smaller number of slots than the number of repeating slots.
And a means for identifying a third spreading code belonging to the second spreading code group.

According to this configuration, since the identification of the second spreading code group and the detection of the frame timing are performed in less slots than the repeating slot unit of the second spreading code group, the number of correlations and the number of additions are reduced. be able to. As a result, the required memory capacity can be reduced.

In the synchronization acquisition apparatus according to a second aspect of the present invention, in the first aspect, the means for identifying the second spreading code group and detecting the frame timing is fetched according to the detected slot timing. Means for performing a correlation process between the data and the second spreading code; means for integrating the result of the correlation process according to a predetermined second spreading code arrangement table; Means for identifying a group and determining frame timing.

The predetermined second spreading code arrangement table is such that when comparing the number of slots in any two different types of search code groups, which is smaller than the number of consecutive consecutive repetition slots, the search code for at least one slot is Different from others. Therefore, the search code group can be identified and the frame timing can be determined based on the information of the slot. As a result, the number of correlations and the number of additions can be reduced. As a result, the required memory capacity can be reduced.

A synchronization acquisition apparatus according to a third aspect of the present invention, in the second aspect, employs a configuration including means for averaging a plurality of correlation processing results.

According to this configuration, since the correlation range is narrow,
The averaging of the correlation value per unit time can be performed more, and the ability to absorb the error generated by the fading phenomenon of the propagation path can be increased.

According to the fourth aspect of the present invention, according to the second aspect, the synchronization acquisition apparatus includes: means for selecting a predetermined number of large integration results; and selecting the most probable integration result from the selected integration results. And a determining means.

According to this configuration, a plurality of likely search code groups and a plurality of frame heads are selected, and the most probable one is selected from them, so that frame timing can be detected more accurately in synchronization acquisition.

According to a fifth aspect of the present invention, there is provided a communication terminal device including the synchronization acquisition device according to any one of the first to fourth aspects. Further, a base station apparatus according to a sixth aspect of the present invention performs wireless communication with the communication terminal apparatus of the fifth aspect.

[0027] A synchronization acquisition method according to a seventh aspect of the present invention comprises the steps of: detecting a slot timing using a first spreading code common to a communication partner; and a second spreading method for detecting frame timing. Identifying the second spreading code group and detecting the frame timing with a smaller number of slots than the repetition slot unit of the code group; and identifying a third spreading code belonging to the second spreading code group. Is provided.

According to this method, since the identification of the second spreading code group and the detection of the frame timing are performed with a smaller number of slots than the repetition slot unit of the second spreading code group, the number of correlations and the number of additions are reduced. can do. As a result, the required memory capacity can be reduced.

[0029] In the synchronization acquisition method according to an eighth aspect of the present invention, in the seventh aspect, the step of identifying the second spreading code group and detecting the frame timing is performed in accordance with the detected slot timing. Performing a correlation process between the data and the second spreading code, integrating the result of the correlation process according to a predetermined second spreading code arrangement table, and calculating the second spreading code from the integration result. Determining group identification and frame timing.

The predetermined second spreading code arrangement table is such that when comparing any continuous and repeated slots of any two different types of search code groups, each of which has at least one slot, the search code for at least one slot is different. And different. Therefore, the search code group can be identified and the frame timing can be determined based on the information of the slot. As a result, the number of correlations and the number of additions can be reduced. As a result, the required memory capacity can be reduced.

A synchronization acquisition method according to a ninth aspect of the present invention, in the eighth aspect, includes a step of averaging a plurality of correlation processing results.

According to this method, since the correlation range is narrow,
The averaging of the correlation value per unit time can be performed more, and the ability to absorb the error generated by the fading phenomenon of the propagation path can be increased.

In the synchronization acquisition method according to a tenth aspect of the present invention, in the eighth aspect, in the eighth aspect, a step of selecting a predetermined number from those having a large integration result, and determining a most probable integration result from the selected integration result. And a step.

According to this method, a plurality of probable search code groups and a plurality of frame heads are selected, and the most probable one is selected from them, so that frame timing can be detected more accurately in synchronization acquisition.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. (Embodiment 1) FIG. 1 is a block diagram showing a schematic configuration of a wireless communication system including a synchronization acquisition apparatus according to an embodiment of the present invention. On the base station side, the control unit 101
Controls the error correction encoding / decoding unit 102 to perform error correction encoding and error correction decoding of transmission data. The signal subjected to the error correction coding processing is
A normal wireless transmission process is performed by the transmission unit 103 and transmitted from the antenna 105.

On the terminal side provided with the synchronization acquisition apparatus according to the present invention, the signal received from antenna 106 is sent to modulation / demodulation processing section 107 and synchronization processing section 109, where modulation processing and synchronization processing are respectively performed. That is, while synchronization acquisition and synchronization holding are performed by the synchronization processing unit 109,
Modulation / demodulation processing unit 107 and error correction / speech codec unit 1
At 08, the signal is converted to voice and output from the microphone / speaker 111. When transmitting audio, use a microphone /
The speech input from the speaker 111 is speech-encoded by the error correction / speech codec unit 108, and the modulation / demodulation processing unit 10
7 and transmitted from the antenna 106.

The synchronization processing section 109 has the configuration shown in FIG. The memory 201 accumulates data for N (N is a positive integer) symbols (N = 3 in FIG. 2) and transfers the data to N correlators 203. The code generator 202 generates a search code and sends it to each correlator 203. The N correlators 203 are provided, and perform a correlation process between the symbol data stored in the memory 201 and the search code generated by the code generator 202. The number of times to calculate the correlation value is N × 17.

The averaging section 204 averages the correlation values obtained by the correlator 202, respectively. The memory 205 accumulates the averaged correlation values and sends the correlation values to the integration / maximum value detection unit 207 based on the information sent from the memory 206 storing the search code arrangement table. The integration / maximum value detector 207 adds the correlation values accumulated in the memory 205 for N slots, and sends the maximum value to the group / frame head detector 208. The number of additions is 32 × 16 × (N−
1). The group / frame head detection unit 208
The search code group and the head of the frame are detected by referring to the search code arrangement table in the memory 206 using the maximum value of the integrated value.

A method for acquiring a synchronization in the synchronization acquisition apparatus having the above configuration will be described with reference to FIGS. Here, the number of scrambling codes (M) is 16, and
The number of target slots (N) is set to three. This synchronization acquisition method is characterized in that the number of slot loops is reduced, the number of slots for performing integration processing is reduced, and comparison processing is performed.

First, the slot timing is detected as the first stage. Specifically, the detection of the slot timing is performed in a process as shown in FIG. In ST302, data for one slot in the received data frame is fetched. In ST303, a correlation value between data for one symbol and a common search code is calculated. ST
At 304, the phase of the common spreading code is shifted. In ST305, it is determined whether or not the correlation processing has been completed for one frame. If one frame has not been completed, the process returns to ST303 to perform a correlation process.

The processing of ST302 to ST304 is defined as P1 (P
1 is a positive integer of 2 or more) times, and the processing results of P1 times are averaged (ST301 to ST306). And ST
If the correlation processing has been completed for one frame in 305, ST
At 306, the slot timing is detected by detecting the peak of the correlation value of the correlation processing for one frame.

Next, the second stage, frame timing detection (search code group identification) will be described.
The arrangement of search codes applied to each slot is as follows:
As shown in FIG. 13, there are a total of 32 groups.

More specifically, the detection of the slot timing is performed in a process as shown in FIG. In ST402, one frame of data is fetched based on the slot timing in the data frame. The fetched data is stored in the memory 201 shown in FIG. ST4
At 05, the correlator 203 uses the search code generated by the code generator 202 to set the first one of each slot.
A correlation process is performed between the symbol and the search code to calculate a correlation value. This correlation processing is performed using search codes 1 to 17
The search is performed for slots 1 to 3 for each search code. Therefore, ST405
Is repeated for 1 to 17 search codes and repeated for 3 slots (ST403 to ST403).
407). The processing of ST402 to ST407 is described as P2 (P2
Is performed two or more positive integers) times, and the processing results of P2 times are averaged (ST401 to ST408). These averaged correlation values are stored.

Next, in ST411, according to the search code arrangement table of FIG. 13, the correlation values for three slots for the corresponding search code are integrated for each group. Then, the processing of ST411 is repeated for 1 to 16 integration head slots, and the search code group 3
It repeats for two pieces (ST409-ST413). Next, a search code group and a frame head are detected from the search code arrangement and the maximum value of the integration result in FIG. 13 (ST414).

The step of detecting the circcode group and the head of the frame is specifically performed according to the steps shown in FIG. In this step, the maximum integrated value is 3
This is a step of detecting in which group and which slot the search code number for the slot belongs in the search code arrangement table shown in FIG.

In ST503, according to the search code arrangement table of FIG. 13, each search code group is compared with the number corresponding to three slots of the corresponding search code, and the numbers are collated. In ST504, it is determined whether or not the numbers of all three slots match. If the numbers of all three slots match, the search code group and the head of the frame have been identified (ST50).
7). If the numbers of all three slots do not match, the head of the three slots of the search code to be compared is shifted with respect to slots 1 to 16 for further comparison. This process is performed for search code groups 1 to 32 (ST501 to ST506), and the search code group and the head of the frame are detected.

Next, a scrambling code identification is performed as a third step. 1 out of 16 scrambling code candidates determined from the identified search code group
Identify two scrambling codes. In particular,
The scrambling code identification is performed in the step shown in FIG.

In ST603, a correlation value between data for four symbols and a scrambling code is calculated according to the identified frame timing. Note that the number of symbols to be calculated is not limited to four, but may be another number. This process is repeated for 16 scrambling codes belonging to the identified search code group (ST602 to ST604). Next, in ST605, the correlation result having the largest correlation value is identified as a scrambling code.

In this way, a scrambling code can be identified, and a cell search can be performed. According to the synchronization acquisition method, the number of correlations is 3 × 17 = 51, and the number of additions is 32 × 16 × 2 = 1.
024. Therefore, the correlation processing amount is reduced by 81.25% compared with the conventional comma-free method, and is 86.67.
The% addition processing amount is reduced. This will reduce the required memory capacity by 81.75%.

That is, in the synchronization acquisition method according to the present embodiment, although some comparison processing is added, the number of correlation value calculations and the number of integration processing are reduced by 80% or more as compared with the conventional method, resulting in a surprisingly high speed. Can be achieved.

In the synchronization acquisition method according to the present embodiment, the averaging process is performed in the first to third stages.
In this synchronization acquisition method, the averaging process can be performed in a short time because the range of the correlation process is narrow. That is, if the averaging process is performed by the conventional comma-free method, it takes 16 slots to perform the averaging once. In this synchronous acquisition method, the range of the correlation process is assumed to be 4 slots. In this case, four averaging processes can be performed in 16 slots. As a result, according to this synchronization acquisition method,
The number of times of averaging can be appropriately determined, and the error absorbing ability can be enhanced.

(Embodiment 2) In this embodiment, a plurality of probable correlation values are selected for several slots of the corresponding search code, that is, a plurality of probable ones are selected, and the most probable one is selected from the plurality. The case of selection will be described with reference to FIG. In the present embodiment, the first and third stages of synchronization acquisition are the same as those in the first embodiment, and a description thereof will be omitted. Here, the number of target slots (N) is 3 + S.

In the second stage of synchronization acquisition, ST702
Then, the correlator 203 performs a correlation process between the first symbol of each slot and the search code using the search code generated by the code generator 202, and calculates a correlation value. This correlation process is performed for search codes 1 to 17, and further for each search code for slots 1 to 3. Therefore, the correlation process of ST702 is repeated for 1 to 17 search codes, and is repeated for 3 + S slots. The processing of ST702 is performed P times (P is a positive integer of 2 or more), and the processing results of P times are averaged (ST701 to ST703). These correlation values are stored.

Next, in ST707, correlation values for the integration operation range 3 + M slots for the corresponding search code are integrated for each group according to the search code arrangement table of FIG. This integration is performed for 0 to SM slots. Then, this processing is performed by integrating
The search is repeated for 16 search codes, and is repeated for 32 search code groups (ST704 to ST710).

Specifically, the processing is performed as shown in FIG. The example of FIG. 8 illustrates a case where M = 0, S = 2, and SM = 2. For group 1, in the case of the integration leading slot 0, the integration is performed up to the slot whose integration leading slot is 0, 1, 2 (SM).
In addition, in the case of the integration leading slot 1 for group 1, integration is performed by shifting the preceding slot by one slot until the integration leading slot in the slot is 0, 1, 2 (SM). This process is performed for the integration leading slots 1 to 16 and groups 1 to 32.

Next, in ST711, N candidates which can be the maximum value among the integration results are selected from those having higher integration values. In ST712, a search code group number and a frame head are calculated for each of the N candidates according to the flowchart shown in FIG.

In ST713, it is determined whether or not there is a predetermined number L or more of the search code group numbers and the frame heads that match each other. Then, if the number of coincidences is equal to or more than a predetermined number L, the search code group number and the head of the frame are determined to be most likely, and the search code group and the head of the frame are determined (ST715). If the number of coincidences is less than the predetermined number L, it is determined whether the number of M and the number of S are the same (ST7).
14).

If the number of M and the number of S are the same, the number of S is increased (ST717), and the correlation operation is performed only on the additional slot. That is, the processes from ST 710 are performed only for the additional slots. On the other hand, if the number of M and the number of S are not the same, the number of M is increased (ST71).
6) Perform an integral operation with the number of M changed. That is, the process from ST704 is performed with the number of M changed.

According to the above method, a plurality of probable search code groups and a plurality of frame heads are selected, and the most probable one is selected from among them, so that frame timing detection can be performed more accurately in the second stage of synchronization acquisition. Can be.

(Embodiment 3) In the present embodiment, a plurality of probable correlation values are selected for several slots for the corresponding search code, that is, a plurality of probable ones are selected, and the most probable one is selected from among them. Another example of the selection will be described with reference to FIG. In the present embodiment, the first and third stages of synchronization acquisition are the same as those in the first embodiment, and a description thereof will be omitted. Here, the number of target slots (N) is 3 + S.

Steps ST901 to ST912 are the same as steps ST701 to ST712 in FIG. 7, and a description thereof will be omitted.

In ST913, it is determined whether or not the obtained search code group numbers are equal to or more than a predetermined number L1. If the number of coincidences is equal to or more than the predetermined number L1, it is further determined whether or not the number of coincidences at the head of the frame is equal to or more than the predetermined number L2 (ST).
914). Then, when there is a predetermined number L2 or more that match each other, it is determined that the search code group number and the head of the frame are most likely, and the search code group and the head of the frame are determined (ST916).

If the number of search code groups that match each other is less than the predetermined number L1, the number of matches with each other at the beginning of the frame is the predetermined number L2.
If the number is less than the number, it is determined whether the number of M and the number of S are the same (ST915).

If the number of M and the number of S are the same, the number of S is increased (ST918), and the correlation operation is performed only for the additional slot. That is, the processes from ST 910 are performed only for the additional slots. On the other hand, if the number of M and the number of S are not the same, the number of M is increased (ST91).
7) Integral calculation is performed with the number of M changed. That is, the process from ST904 is performed with the number of M changed.

According to the above-mentioned method, a plurality of probable search code groups and a plurality of frame heads are selected, and the most probable one is selected from among them, so that frame timing detection can be performed more accurately in the second stage of synchronization acquisition. Can be.

The synchronization acquisition device of the present invention can be applied to a communication terminal device such as a mobile station device or a base station device in a CDMA wireless communication system.

The present invention is not limited to the first to third embodiments, but can be implemented with various modifications. For example, the present invention can also be applied to a case where high-speed Hadamard transform is used in the correlation value calculation processing in the frame timing detection processing of synchronization acquisition.

In the above embodiment, in the second stage of synchronization acquisition, the number of slots for performing the correlation operation is 5 (S
= 2), and the number of search code slots to be compared is 3 (M =
0), the present invention can be applied to a case where the number of slots for performing the correlation operation is other than 5 and the number of slots of the search code to be compared is other than 3. In this case, when the number of slots is reduced, the amount of calculation is reduced, but the error rate increases. Therefore, it is preferable to perform averaging as appropriate.

[0069]

As described above, the synchronization acquisition apparatus of the present invention reduces the number of slot loops during synchronization acquisition,
Since the number of slots for performing the integration process is reduced, the amount of processing for synchronization acquisition can be reduced, and the processing time for synchronization acquisition can be significantly reduced. Further, in the synchronization acquisition device of the present invention, the amount of hardware of the synchronization processing unit can be reduced to significantly reduce the circuit scale, and the size and power consumption can be reduced, the use time can be increased, and the power consumption can be further reduced. realizable.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a wireless communication system using a synchronization acquisition device according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a synchronization acquisition device according to the embodiment.

FIG. 3 is a flowchart for explaining the operation of the first stage of the synchronization acquisition method according to the embodiment;

FIG. 4 is a flowchart for explaining an operation of a second stage of the synchronization acquisition method according to the embodiment;

FIG. 5 is a flowchart for explaining a part of the operation of the second stage of the synchronization acquisition method according to the embodiment;

FIG. 6 is a flowchart for explaining the operation of the third stage of the synchronization acquisition method according to the embodiment;

FIG. 7 is a flowchart for explaining the operation of the second stage of the synchronization acquisition method according to the second embodiment of the present invention;

FIG. 8 is a diagram for explaining a second-stage process of the synchronization acquisition method according to the embodiment;

FIG. 9 is a flowchart for explaining the operation of the second stage of the synchronization acquisition method according to the third embodiment of the present invention.

FIG. 10 is a flowchart for explaining the operation of the first stage of the conventional synchronization acquisition method.

FIG. 11 is a flowchart for explaining the operation of the second stage of the conventional synchronization acquisition method.

FIG. 12 is a flowchart for explaining the operation of the third stage of the conventional synchronization acquisition method.

FIG. 13 is a diagram showing a search code group arrangement table.

[Explanation of symbols]

 201, 205, 206 Memory 202 Code Generator 203 Correlator 204 Averaging Unit 207 Integration / Maximum Value Detection Unit 208 Group / Frame Head Detection Unit

Claims (10)

[Claims] Means for detecting slot timing using a first spreading code common to a communication partner;
Means for identifying the second spreading code group and detecting the frame timing with a smaller number of slots than the repetition slot unit of the second spreading code group for detecting frame timing; 3. A synchronization acquisition device, comprising: means for identifying the third spreading code. Means for identifying a second spreading code group and detecting a frame timing, wherein the means for identifying the second fetched code according to the detected slot timing and the second
Means for performing a correlation process with the spread code of the second spread code, means for integrating the result of the correlation process according to a predetermined second spread code arrangement table, and identification and identification of the second spread code group from the integration result. 2. The synchronization acquisition device according to claim 1, further comprising: means for determining a frame timing. 3. The synchronization acquisition device according to claim 2, further comprising means for averaging a plurality of correlation processing results. 4. The synchronization acquisition according to claim 2, further comprising: means for selecting a predetermined number of the integration results having a large integration result; and means for determining a most probable integration result from the selected integration results. apparatus. 5. A communication terminal device comprising the synchronization acquisition device according to claim 1. Description: 6. A base station apparatus for performing wireless communication with the communication terminal apparatus according to claim 5. 7. detecting slot timing using a first spreading code common to a communication partner;
Identifying the second spreading code group and detecting the frame timing with a smaller number of slots than the repetition slot unit of the second spreading code group for detecting frame timing; 3. A method for acquiring a synchronization code, comprising the steps of: 8. The step of identifying the second spreading code group and detecting the frame timing includes the steps of:
Performing a correlation process with the spread code, and integrating the result of the correlation process in accordance with a predetermined second spread code arrangement table. The method according to claim 7, further comprising: determining a frame timing. 9. The method according to claim 8, further comprising the step of averaging a plurality of correlation processing results. 10. The synchronization acquisition according to claim 8, further comprising the steps of: selecting a predetermined number of integration results having a large integration result; and determining the most probable integration result from the selected integration results. Method.