JP2000138610A - Fm multiplex broadcast receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an FM multiplex broadcast receiver that can display required program contents with high reliability. SOLUTION: The FM multiplex broadcast receiver 1 is provided with a front end 12, an intermediate frequency / FM detection circuit 14, a filter circuit 18, an LMSK demodulation circuit 20, and an error correction detection circuit 24, all to receive an FM multiplex broadcast and to obtain data packets in which the error is corrected. The receiver 1 is also provided with a CPU 30, a data storage RAM 32, a display RAM 34, and a display section 36, all to produce data concerning programs and to display the contents of the programs. The data storage RAM 32 has a standby data storage area in addition to a general data storage area used for a general reception operation. Specific broadcast program data are received by using this standby data storage area when the display of a program that is not yet received is instructed after the entire general data storage area is occupied. Subsequently, the display is changed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an FM multiplex broadcast receiver for performing display and the like for extracting multiplex data included in FM broadcast.

[0002]

2. Description of the Related Art In FM multiplex broadcasting using the DARC (Data Radio Channel) system, characters and graphics are converted into digital data and encoded, and a multiplexed signal having a subcarrier frequency of 76 kHz is frequency-multiplexed into a stereo baseband signal. Later, FM modulation is performed. The user can use this FM multiplex broadcast as FM
By receiving the information using the multiplex broadcast receiver, information on a required program can be obtained.

In this FM multiplex broadcast, data having the same content is transmitted at regular intervals. For example, assuming that the interval at which the FM multiplex broadcast is transmitted is 15 minutes, a text broadcast or the like having the same content is delivered at a cycle of 15 minutes, and the content is updated at an appropriate timing.

A receiver capable of receiving such FM multiplex broadcasts performs a process of extracting program data multiplexed into FM broadcasts corresponding to the current reception frequency, and sequentially extracts the extracted multiplexed data. The contents are stored in a memory and the contents of the program data are displayed according to an instruction from a user.

[0005]

The above-mentioned conventional FM multiplex broadcast receiver, when the capacity of the memory for storing the program data is smaller than the amount of the program data to be received, will cause some of the program data to be transmitted. There was a problem that the program could not be received and the program desired by the user could not be received. For example, when the receiving frequency of the FM broadcast is switched, reception of the program data multiplexed on the switched FM broadcast is started. Generally, FM multiplex broadcasting includes a large number of program data corresponding to news, weather forecast, and the like.
These program data are stored in the memory in the order of reception.
Then, when the free space of the memory is exhausted, the operation of storing the program data in the memory is not performed thereafter, but the operation of displaying only the program data stored in the memory in response to the instruction from the user is performed. Therefore, if the program data that the user wants to watch is included in the unreceived program data at the time when the free space in the memory is exhausted, the program data cannot be received and extracted,
The content of this program could not be displayed.

Further, there is an FM multiplex broadcasting receiver in which when the free space of the memory is exhausted, the entire contents of the memory are erased, and then the program data is received again.
Since the contents were erased each time the memory capacity was exhausted in this way, if a program that could be displayed with almost no waiting time before erasure was tried to be displayed again after erasure, it took a long time to display it. Is required, which is not preferable because of a sense of incongruity.

[0007] The present invention has been made in view of the above points, and an object of the present invention is to provide an FM multiplex broadcast receiver capable of reliably displaying necessary program contents.

[0008]

In order to solve the above-mentioned problems, in the FM multiplex broadcast receiver of the present invention, the first storage area is used separately from the first storage area used for a normal reception operation. A second storage area used when there is no more free area is provided in the program data storage means.
When there is no more free space in the storage area and no more program data can be stored, the specific program data for which the display instruction has been issued is stored in the second storage area and a predetermined display operation is performed. Therefore, even if the capacity of the program data storage means is small, it is possible to reliably display the program contents desired by the user.

In particular, when there is an empty area in the first storage area, the program data received by the program data receiving means is stored in the first storage area, and the first storage area has no empty area. Later, if program data not stored in the first storage area is designated by the program data designating means, the program data receiving means waits until the designated program data is received by the program data receiving means. By performing the operation of storing data in the second storage area by the program data storage control means, it becomes possible to perform standby reception of a specific program only when there is no free space in the first storage area. Since the storage state of the program data stored in the first storage area can be maintained,
The received program data can be immediately read and displayed, and the same operability as when displaying the received program data in the conventional FM multiplex broadcast receiver can be ensured.

[0010] When the program data is stored in the second storage area, the program data is stored in the second storage area by overwriting the same area, thereby storing the program data desired by the user. The display of the contents can always be performed reliably.

[0011] Also, it is desirable to display a predetermined message indicating that the program data is waiting to be received during standby reception of program data using the second storage area. The time required for the standby program data to be actually received is not fixed, and the program contents are not displayed until then. However, the user can receive the FM multiplex broadcast reception by seeing this message. The operating state of the machine can be easily checked.

It is preferable that the second storage area has a capacity corresponding to page data of at least one screen. If at least one screen of program contents can be displayed, all program contents can be displayed by repeating standby reception. Also, it is not preferable to secure an excessively large capacity for the second storage area because the capacity of the first storage area used for performing a normal reception operation is reduced.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An FM multiplex broadcast receiver according to an embodiment will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention.
It is a figure showing the composition of M multiplex broadcast receiver. F shown in FIG.
The M multiplex broadcast receiver 1 includes a front end (F / E) 12, an intermediate frequency amplification / FM detection circuit (IF) for extracting stereo sound from an FM broadcast signal received by an antenna 10.
/ DET) 14, a noise canceller / stereo demodulation circuit (NC / MPX) 16, and a filter circuit 18 for separating and demodulating the FM multiplex broadcast data contained in the received FM broadcast signal, a LMSK (Level controlled Minimizer)
um Shift Keying) A demodulation circuit 20, a synchronization circuit 22, and an error detection and correction circuit 24 are provided. By performing various processes on the separated FM multiplex broadcast data, various information such as characters and graphics is displayed on the display unit 36. CPU3 to display
0, a data storage RAM 32, and a display RAM 34. Further, the FM multiplex broadcast receiver 1 includes an operation unit 40 having various operation keys for a user to perform an operation. For example, a “page forward” key and a “page back” key for switching the display between a plurality of pages of the same program, a “back up” key for returning from the lower layer screen to the upper layer screen, and at least “1” ”To“ 6 ”numeric keys.

The front end 12 includes an antenna tuning circuit, a high-frequency amplifier circuit, a local oscillator circuit, a mixing circuit, and the like. The front end 12 performs high-frequency amplification on an FM broadcast signal input from the antenna 10 and performs predetermined frequency conversion. I do. For example, when an FM broadcast signal of a desired frequency to be received is input to the front end 12, 10.7 MH
z is converted to an intermediate frequency signal. The intermediate frequency amplification / FM detection circuit 14 amplifies the intermediate frequency signal output from the front end 12, performs a tuning operation, and performs FM detection on the tuning result. Further, the noise canceller / stereo demodulation circuit 16 removes a noise component included in the FM stereo composite signal after the FM detection output from the intermediate frequency amplification / FM detection circuit 14 and then removes the L component and the R component of the stereo sound. To separate.

The filter circuit 18 separates a multiplex signal contained in the signal after the FM detection. As shown in FIG. 3, the signal after the FM detection includes an FM multiplex broadcast signal of about 76 kHz, and the filter circuit 18 extracts only the FM multiplex broadcast signal. The LMSK demodulation circuit 20 performs delay detection on the LMSK modulated signal, which is a multiplex signal output from the filter circuit 18, to reproduce a bit clock and demodulate a bit data string. The synchronization circuit 22 detects block synchronization and frame synchronization with respect to the bit data string output from the LMSK demodulation circuit 20, and the error detection / correction circuit 24 calculates the bit data string synchronized with the bit data string. CRC (Cyclic Redun
Error detection by dancy check) is performed, and if there is an error, the error is corrected. For example, error correction is (2
72, 190) This is performed by a product code using a shortened difference set cyclic code in both vertical and horizontal directions, and error correction is performed with high probability.

The CPU 30 extracts group data and program data based on data (data packets) output from the error detection and correction circuit 24. The extracted program data is stored in the data storage RAM 32. The display RAM 34 stores bit data corresponding to a display image, and the stored contents are displayed on the display unit 36.

FIG. 2 is a diagram showing a storage area of the data storage RAM 32. As shown in FIG.
The AM 32 includes a normal data storage area 320 for storing program data in the order received, regardless of whether or not the user has performed an operation.
A standby data storage area 321 used for storing program data when a user issues a display instruction for unreceived program data after the free area is exhausted in the normal data storage area 320. Have been. If there is a free space in the normal data storage area 320, the received program data is stored in the normal data storage area 320 in the order of reception, so that the same display operation as that of the conventional FM multiplex broadcast receiver becomes possible. . The standby data storage area 321 has a capacity capable of storing program data corresponding to a display screen of one page or several pages.

The front end 12, the intermediate frequency amplification / FM detection circuit 14, the filter circuit 18, the LMSK demodulation circuit 20, the error detection and correction circuit 24 and the CPU 30 serve as program data receiving means, and the operation section 40 serves as program data designating means. , The CPU 30 serves as the program data storage control means, the data storage RAM 32 serves as the program data storage means, and the CPU 3
0, the display RAM 34, and the display unit 36 correspond to program data display means. RAM for data storage
32 normal data storage areas 320 are used as the first storage area,
The standby data storage area 321 corresponds to the second storage area.

Next, the hierarchical structure of FM multiplex broadcasting using the DARC system will be described. The hierarchical structure of the DARC to be processed by the FM multiplex broadcast receiver 1 includes a layer 1 for a transmission path, a layer 2 for error correction, a layer 3 for a data packet, a layer 4 for a data group, a program 4 Is included in the hierarchy 5.

The layer 1 of the transmission line corresponds to the signal after FM detection (baseband signal) output from the intermediate frequency amplification / FM detection circuit 14 described above. As shown in FIG. 3, the signal after FM detection has an FM of about 76 kHz.
A multiplex broadcast signal is included. Only the FM multiplex broadcast signal is separated by the filter circuit 18 and passed through the LMSK demodulation circuit 20 to obtain FM multiplex broadcast data corresponding to the FM multiplex broadcast signal.

Layer 2 for error correction shows a frame structure for performing error detection and error correction. FIG.
3 is a diagram showing a frame structure corresponding to layer 2. FIG. As shown in the figure, the FM multiplex broadcast data output from the LMSK demodulation circuit 20 is composed of a total of 272 blocks per frame, of which 190 blocks are blocks containing data packets, and the remaining 82 blocks are parity packets. It is a block containing. These 82 blocks are distributed among blocks including data packets.

Each block including a data packet is a 16-bit block identification code BIC (Block Iden).
tify Code), a data packet consisting of 176 bits of data, a 14-bit CRC code, and an 82-bit parity (horizontal code) for error detection and correction. Further, the block including the parity packet includes a 16-bit block identification code BIC, a 190-bit parity (vertical code) packet, and an 82-bit error correction parity (horizontal code).

The identification code of the first 13 blocks including the data packet is BIC1, and the identification code of the next 123 blocks including the data packet is BIIC.
C3, the identification code of the next 13 blocks including the data block is BIC2, and the identification code of the last 123 blocks including the data block is BIIC.
C3. The identification code of each block including the parity packet is BIC4.

The synchronization circuit 22 has a block identification code BIC.
Is detected for each block to achieve block synchronization, and BIC1 is placed next to the block identification code BIC4.
Is detected, frame synchronization is obtained every 272 blocks. Therefore, when the number of times the block identification code cannot be detected in such an order occurs at a predetermined rate, block synchronization is lost, and when frame synchronization is not achieved at a predetermined rate, frame synchronization is lost.

Also, since a block containing a data packet contains a CRC code and each block contained in one frame contains a parity (horizontal code) for error detection and correction. By using the parity, it is possible to perform a correction process after the error detection and correction circuit 24 detects an error. Error detection and correction circuit 2
4 outputs only data packets included in each block after error correction is performed in this manner.

Layer 3 shows the structure of a data packet, the details of which are shown in FIG. As shown in the figure, each data packet is configured to include a 32-bit prefix and a 144-bit data block.
The prefix at the beginning is added to identify a data block as information content, and the service identification S
I, decoding identification flag, information end flag, update flag, data group number, and data packet number. The service identification SI of the first four bits is used for identifying a program.

Layer 4 shows the structure of a data group formed by collecting a plurality of data blocks included in the above-described data packet. As shown in FIG. 6, the data group includes a start code SOH, a data group link code DGL, a data group size, data group data, a length adjustment NULL, an end code, and a CRC. In this data group, data blocks having the same service identification SI, the same data group number, and the same update flag in the data packet of the layer 3 are the data blocks in which the information end flag is set in order from the data packet number “0”. It is arranged up to. One data group corresponds to one page of data displayed on the display unit 36.

Level 5 shows the structure of program data formed by collecting a plurality of data group data included in the above-mentioned data groups. As shown in FIG. 7, the program data is composed of a plurality of data groups.
The first data group is used as program management data, and the subsequent data group is used as page data. The program management data includes information related to the entire program such as a program number and the total number of program pages, and each page data includes information of each page displayed on the display unit 36. Each of the program management data and the page data has a common structure, and has a data header including an information separation code RS, a data header parameter, and data header data, and a data unit group following the data header.

FIG. 8 is a diagram showing an example of data header data (program data header data) included in the data header of the program management data. As shown in the figure, the program data header data includes a program number assigned to each program in a range of 0 to 255, the total number of program pages excluding program management data, and various information such as a presentation function. It is. Note that this presentation function is a batch program that can be displayed when this program receives all page data, or a non-batch program that can display the corresponding page when even one page is received. Is included.

FIG. 9 shows data header data (page data header data) included in the data header of page data.
It is a figure showing an example of. As shown in the figure, the page data header data includes the above-mentioned program number and various information such as a page number in each program.

As shown in FIG. 10, each data unit constituting the data unit group is an information separating code U.
S, a data unit parameter, a data unit size, a data unit link flag code DUL, and data unit data. The data unit parameter indicates the content of the data unit data.

FIG. 11 is a diagram showing a specific example of the data unit parameter. For example, considering page data corresponding to each page included in a level 1 service capable of displaying a body of 15 characters × 2 lines and a header line, this page data includes a data unit parameter 20H (H is a hexadecimal number). ) And a header sentence data unit of the data unit parameter 24H.

FIG. 12 is a diagram showing details of data unit data included in the selection control data unit. In the figure, the “key-in number” is the FM multiplex broadcast receiver 1
Corresponding to the number input by operating the operation unit 40 of
For example, it is any of 0 to 6, A, B, and C. here,
A corresponds to the case where the displayed page is moved next in the same hierarchy, B corresponds to the case where the displayed page is moved forward in the same hierarchy, and C corresponds to the case where the displayed page is returned to the upper hierarchy. "Destination page number" designates the page number of the next page for which the display is switched in accordance with the key-in number. "Destination program number"
Specifies the program number of the next page to switch the display according to the key-in number. "Destination service identification number"
The service identification SI of the next page whose display is to be switched according to the key-in number is specified.

The destination page designation mode "NPS" indicates a mode for designating a destination page. For example, "0
"0" indicates the same service identification SI and the page number in the program number as the destination with the corresponding "destination page number".
“01” designates a program number within the same service identification by a corresponding “destination program number”, and indicates a destination page number by a corresponding “destination page number”. “10” designates a destination program by a corresponding “destination program number” and a destination service identification by a “destination service identification number”, and indicates a destination page number by a corresponding “destination page number”.

Next, the F of the embodiment shown in FIG.
The operation of the M multiplex broadcast receiver 1 will be described. FIG. 13 is a flowchart showing an operation procedure when the program data received by the FM multiplex broadcast receiver 1 of the present embodiment is stored in the data storage RAM 32. The operation of receiving the program data and storing it in the data storage RAM 32 The procedure is shown.

At the time of FM multiplex broadcast reception, the data of each block shown in FIG. 4 is output from the LMSK demodulation circuit 20, and the block identification code B of the first 16 bits of each block is output.
Frame synchronization and block synchronization are achieved by the synchronization circuit 22 based on the IC. Then, the error detection and correction circuit 24
As a result, error detection based on the CRC added to the data packet and, when an error is detected, error correction based on the parity are performed. Thus, the error-corrected data packet corresponding to the layer 3 is output from the error detection and correction circuit 24 and input to the CPU 30.

When a data packet output from the error detection and correction circuit 24 is input, the CPU 30 assigns the same data group number based on a service identification SI, an update flag, and the like included in a prefix of the sequentially input data packet. A data group (program management data or page data) corresponding to the hierarchy 4 is created by collecting the data blocks having the same program number included in the data header of each data group, and a program corresponding to the hierarchy 5 is collected. Create and acquire program data (step 100).

Next, the CPU 30 determines whether or not the same program data as the acquired program data is stored in the normal data storage area 320 of the data storage RAM 32 (step 101). If so, the stored content is updated (step 102). In addition,
The same data as the acquired program data is stored in the RAM 3 for data storage.
The case where the contents of the program data are stored in the normal data storage area 320 includes the case where the contents of the program data are exactly the same and the case where the contents of the same program are updated with time. May be omitted, the process of updating the program data stored in the data storage RAM 32 may be omitted.

If the same program data as the acquired program data is not stored in the normal data storage area 320 of the data storage RAM 32, the CPU 30 next empties the normal data storage area 320 of the data storage RAM 32. It is determined whether or not there is an area (step 103), and if there is an empty area, newly acquired program data is stored in this empty area (step 104). On the other hand, when there is no free space in the data storage RAM 32, the CPU 30
It is determined whether a standby request for program data is set (step 105). If the standby request is not set, newly acquired program data is discarded without being stored in the data storage RAM 32, and The data storage operation ends. Here, the standby request for program data is
This is set when the user issues an instruction to display unreceived program data after the free space in the normal data storage area 320 of the data storage RAM 32 has been exhausted. The corresponding program number and page number are set.

If a standby request is set in a state where there is no free space in the normal data area of the data storage RAM 32, the CPU 30 then sets the program number and page number set in response to the standby request. By comparing the program number and page number of the program data acquired in the above-described step 100, it is determined whether the program corresponding to the standby request matches the program for which the new program data has been acquired (step 100). 106). If they do not match, the CPU 30 discards the newly acquired program data without storing it in the data storage RAM 32 and ends the program data storage operation. If they match, the CPU 30 stores the newly acquired program data in the standby data storage area 321 of the data storage RAM 32 (step 107).

FIG. 14 is a diagram showing an operation procedure for displaying program data stored in the data storage RAM 32 in the FM multiplex broadcast receiver 1 of the present embodiment. An operation procedure of program content display performed in parallel with the operation of storing program data is shown.

The CPU 30 monitors whether or not an instruction to switch the display screen has been issued (step 200). If the instruction has been issued, the corresponding page data of the switching destination is stored in the normal data in the data storage RAM 32. Storage area 320
Is determined (step 20).
1). For example, the user operates the “page feed” of the operation unit 40.
When a key, a “page back” key, or a numeric key corresponding to each option included in the display screen of the program in progress of response is pressed, the CPU 30 determines that an instruction to switch the display screen has been made. In general, a continuous page number is assigned to each page of a program whose display is sequentially switched by a “page forward” key or a “page back” key, and a program number and a page number of a page being displayed are assigned. The program number (same as the currently displayed page) and the page number of the page to be displayed next are extracted from the page header shown in FIG. Can be specified.
Alternatively, in the case of a response progress program, information on a page to be displayed next when a numeric key corresponding to each option included in the current display screen is pressed is included in the selection control data shown in FIG. By reading the destination page number or the like with the pressed numeric key as the key-in number, the program number and page number of the next page to be displayed can be specified. Based on the program number and page number of the page data of the switching destination specified in this way, the normal data storage area 3 of the data storage RAM 32
It is determined whether the corresponding page data is stored in 20.

The page data at the switching destination is the data storage RA.
If it is stored in M32, then the CPU 30
This page data is read from the data storage RAM 32 (step 206), and the contents of the body data unit of the page data are written into the display RAM 34, thereby switching the display contents of the display unit 36 (step 20).
7).

When the page data of the switching destination is not stored in the data storage RAM 32 (step 201).
If a negative determination is made in step 3), then the CPU 3
0 is the normal data storage area 3 of the data storage RAM 32
It is determined whether or not there is an empty area in step 20 (step 20).
2). If there is a free area, the above-described step 2
Returning to 00, the monitoring operation of the display switching instruction is repeated.
At this time, after displaying a message such as “data is being received” on the display unit 36, the process may return to step 200.

If the switching destination page data is not stored in the data storage RAM 32 and there is no free area in the normal data storage area 320 (if a negative determination is made in step 202), CPU 30
Sets a standby request (step 203), and displays a message such as "receiving standby" on the display unit 36 (step 204).

Next, the CPU 30 determines whether or not the page data for which the standby request has been set has been stored in the standby data storage area 321 of the data storage RAM 32 (step 205). If not received, step 20
4, the display of a message such as "waiting for reception" is repeated. In step 107 shown in FIG. 13, the specific page data for which the standby request is set is stored in the standby data storage area 3 of the data storage RAM 32.
Then, the CPU 30 reads out the page data from the data storage RAM 32 (step 2).
06), the display content of the display unit 36 is switched by writing the content of the body data unit of the page data into the display RAM 34 (step 207).

As described above, the FM multiplex broadcast receiver 1 according to the present embodiment has the data storage RA in the normal reception operation.
The received data is stored in the normal data storage area 320 of the M32 in the order of reception, and a display of an unreceived program by the user is performed in a state where the free space is no longer available in the normal data storage area 320 and no more received data can be stored. When the instruction is issued, the standby reception of the program data using the standby data storage area 321 of the data storage RAM 32 is performed. Therefore, even in a case where all the received data cannot be stored due to the small capacity of the data storage RAM 32, necessary program contents can be reliably displayed according to the display instruction of the user. Further, the received data is stored in the normal data storage area 320 of the data storage RAM 32 in the order of reception, and a display switching operation without a waiting time using these stored received data is possible.
The same operability as a conventional FM multiplex broadcast receiver can be realized.

[0049]

As described above, according to the present invention, apart from the first storage area used for the normal reception operation, the first storage area used when there is no more free area is used. The second storage area is provided in the program data storage means, and even if the first storage area has no free space and no more program data can be stored, the specific program for which the display instruction is given is given. Since the data is stored in the second storage area and a predetermined display operation is performed, it is possible to reliably display the program content desired by the user.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a configuration of an FM multiplex broadcast receiver according to an embodiment.

FIG. 2 is a diagram showing a storage area of a data storage RAM.

FIG. 3 is a diagram showing a transmission path signal of layer 1;

FIG. 4 is a diagram showing a frame structure corresponding to layer 2;

FIG. 5 is a diagram showing a structure of a data packet of layer 3;

FIG. 6 is a diagram showing a structure of a data group of layer 4;

FIG. 7 is a diagram showing a structure of program data of a hierarchy 5;

FIG. 8 is a diagram showing an example of data header data included in a data header of program management data.

FIG. 9 is a diagram illustrating an example of data header data included in a data header of page data.

FIG. 10 is a diagram showing the contents of each data unit constituting the data unit.

FIG. 11 is a diagram illustrating a specific example of a data unit parameter included in each data unit.

FIG. 12 is a diagram showing details of data unit data included in the selection control unit.

FIG. 13 is a flowchart showing an operation procedure when the program data received by the FM multiplex broadcast receiver of the embodiment is stored in a data storage RAM.

FIG. 14 is a diagram showing an operation procedure when displaying the program data stored in the data storage RAM in the FM multiplex broadcast receiver of the embodiment.

[Explanation of symbols]

Reference Signs List 1 FM multiplex broadcast receiver 12 Front end (F / E) 14 Intermediate frequency amplification / FM detection circuit (IF / DET) 16 Noise canceller / stereo demodulation circuit (NC / M
PX) 18 filter circuit 20 LMSK demodulation circuit 22 synchronization circuit 24 error detection and correction circuit 30 CPU 32 data storage RAM 34 display RAM 36 display unit 40 operation unit

Claims (5)

[Claims] 1. Program data receiving means for receiving FM multiplex broadcast program data, program data specifying means for specifying specific program data to be displayed, and program data receiving means for receiving program data received by the program data receiving means. The first storage area to be stored in the order of reception and the program data not stored in the first storage area in a state where the free area included in the first storage area has been exhausted are designated by the program data designation means. A program data storage means having a second storage area which is sometimes used as a reception area for the program data; and storing the program data received by the program data reception means in the first and second storage areas. Program data storage control means for storing the program data in any one of them, and a program data table for displaying the contents of the program data stored in the first and second storage areas FM multiplex broadcast receiver, characterized in that it comprises a means. 2. The program data storage control means according to claim 1, wherein the program data storage control means stores the program data received by the program data reception means in the first storage area when the first storage area has a free area. Store,
When the program data not stored in the first storage area is specified by the program data specifying means after the free space in the first storage area is exhausted, the specified program data is stored in the program data. An FM multiplex broadcast receiver, wherein the FM multiplex broadcast receiver waits for reception by a receiving unit and stores the data in the second storage area. 3. The program data storage control unit according to claim 1, wherein the program data storage control means stores the program data in the first storage area in a free area, and stores the program data in the second storage area. An FM multiplex broadcast receiver, wherein storage is performed by overwriting the same area when program data is already stored. 4. The program data designated in any one of claims 1 to 3, wherein program data not stored in said first storage area is specified in a state where no free area is contained in said first storage area. When designated by the means, the program data display means indicates that the program data is waiting to be received until the program data is received by the program data receiving means and stored in the second storage area. An FM multiplex broadcast receiver for displaying a predetermined message. 5. The program according to claim 1, wherein the second storage area has at least one screen page in units of page data required when screen display is performed by the program data display means. An FM multiplex broadcast receiver having a capacity corresponding to data.