JP2000099354A - Device and method for replacing process for multiprocessor system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a process replacing device capable of allocating a process that should be newly executed to an optimum processor which does not have so many cache errors without lowering the accuracy of replacement processing and the speed of processing time and its replacing method in a multiprocessor system. SOLUTION: As for this process replacement event, a new process number is registered with a new process number register 10, as for the information of a process number 21 in which past process information is stored, a coincidence condition is defined as the number 105 of registered coincidence detection by a registration detection circuit 11, and a dispatching control circuit 12 sends an instruction that a process is allocated to an optimum processor according to the information of the number 105 of registered coincidence detection and the number 103 of registered coincidence detection from another processor B2.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus and a method for exchanging processes in a multiprocessor system.

2. Description of the Related Art Conventionally, in a multiprocessor system, a process of replacing a process in a certain event has been assigned to each processor based on information indicating the priority of the process or the available processing capacity of the process of each processor. As a result, when a new process to be executed is assigned to each processor, the cache information of the process executed in the past was not correctly assigned to the remaining processor. As a result, many cache misses occurred when the process was executed. For the purpose of solving such a problem in the conventional process replacement control, Japanese Patent Application Laid-Open No. Hei 8-305 is disclosed.
No. 62 discloses a control system for allocating processes so as to reduce the occurrence of cache misses in a multiprocessor system. In this process replacement control technique, each processor stores the number of blocks that the process in a certain event secures in the cache of each processor in the shared memory. Then, the cache miss is reduced by allocating the process in a certain event to the processor in which the stored information of the number of blocks is the largest for the process in the event.

[0003]

However, Japanese Patent Application Laid-open No.
The multiprocessor system disclosed in Japanese Patent No. 30562 has the following problems. When a processor executes a process, the process is temporarily stored in a cache memory in the processor, but if the process is immediately connected to an I / O event or the like, the number of registered data remaining in the cache decreases. Therefore, when registering block information as past process information, it is conceivable that part of the process content is missing and does not remain in the registered block information, and a cache miss occurs. Sometimes. Also, when executing a new process, information on the number of blocks of the process to be secured in the cache is registered in the shared memory as intimacy management information, and based on that information, the new process is assigned to the processor with the largest number of blocks. Can be As described above, in order to store the process block information in the shared memory and perform the process allocation process,
It is necessary to access the shared memory, and the access increases the processing time. Also, by securing process block information in shared memory,
The memory capacity required for the application must be reduced, and the advantage of reducing cache misses is lost.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has an object to provide an apparatus and a method for exchanging processes in a multiprocessor system, which can reduce a cache miss rate by allocating to an optimal processor. The purpose is to provide.

[0005]

[Means for Solving the Problems] To solve the above problems,
According to a first aspect of the present invention, there is provided a process replacement device for a multiprocessor system, in a multiprocessor system including a plurality of processors, a registration unit for storing information on a process when the processor has operated in the past, and the registration unit. A registration number detecting means for comparing the process information obtained from the above with information of a process to be newly executed, and comparing the registration number obtained by the registration number detecting means with a registered number of processes to be newly executed. And dispatch means for allocating to the most processors. A registration unit that stores process information of a process that the processor has operated in the past, and a registration number detection unit that detects the number of matching conditions with process information to be newly executed,
By allocating a process to be newly executed to the processor that has detected the most matching conditions from among the plurality of processors, the cache miss rate can be reduced.

Further, the second invention of the present application is characterized in that information in which a plurality of entries of translation information from a logical address to a physical address of the registration means of the first invention of the present application are stored in an address translation buffer is registered. And By registering the translation information including the logical address and the physical address of the process that the processor has operated in the past in the address translation buffer, the omission of the process information that occurs when the process is immediately connected to an I / O event or the like is eliminated. ,
It is possible to store information on the past execution of the process and reduce the cache miss rate. In addition, since it is not necessary to access the shared memory to compare past information, the processing speed of the process can be increased.

The third invention of the present application provides information on a process to be newly executed by the registration number detecting means of the first invention of the present application or the second invention of the present application, and the information stored by the registration means. The process information is compared with the process information in the address translation buffer, and the number of coincidences with the information of the process to be newly executed is output as the registration coincidence detection number.
By outputting the number of matches between the information of the newly executed process and the stored process information as the number of registered match detections, the process to be newly executed can be optimally processed by a quantitative comparison means having a simple configuration. Can be assigned to

In the fourth invention of the present application, the dispatching means of the first invention of the present application, the second invention of the present application, or the third invention of the present application is characterized in that: Is assigned to the processor with the highest number. The registration coincidence detection number output from each processor by the registration number detection means is output from each processor to the dispatch control circuit, sends an instruction to the processor with the highest registration coincidence detection number, is assigned to the optimal processor, and is assigned to the cache. The process with the highest hit rate can be executed.

In the fifth invention of the present application, the registered means of the dispatch means of the first invention of the application, the second invention of the present application, the third invention of the present application, or the fourth invention of the present application have the same number of registered coincidences. In this case, the process is assigned to a processor according to the comparison of the priority of the process and the availability of the processing capacity of the processor. When the number of registered matches that match the process information is equal to any of the processors in the multiprocessor system, the priority of the process and the availability of the processing capacity of the process are given to the processor in the same manner as before. Allocation can be performed and processing can be performed without adding a new circuit.

The method of replacing a process in a multiprocessor system constituted by a plurality of processors according to the sixth invention of the present application provides information on a process when each processor has operated in the past and information on a process to be newly executed. The process is compared with the information, and a process to be newly executed is allocated to a processor having the largest number of registered matches detected by the information. Further, when the number of registered matches detected in the seventh invention of the present application is equal to that of another processor, a process to be newly executed is given to the processor by comparing the priorities of the processes and the available processing capacity of the processor. It is characterized by assigning. As described above, the sixth invention and the seventh invention of the present application correspond to the first invention to the first invention of the present application.
A cache miss can be reduced by the same method as the device similar to the fifth invention of the present application.

[0011] In a multiprocessor system comprising a plurality of processors according to an eighth aspect of the present invention, a newly executed process is provided on a computer-readable recording medium recording a program for controlling process replacement. A computer which records a program of a process replacement procedure of a multiprocessor system, wherein a program to be newly executed is compared with process information at the time of operation in the past, and a process to be newly executed is assigned to a processor having the largest number of detected registration matches. It is a readable storage medium. As described above, according to the eighth invention of the present application, the program of the procedure for replacing the process of the multiprocessor system can allocate the process to the optimum processor by the process replacement program in the same manner as in the sixth invention of the present application.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an apparatus and method for exchanging processes of a multiprocessor system according to the present invention will be described below with reference to FIGS. FIG. 1 is a block diagram of a multiprocessor system according to the present invention. In this embodiment, the processor A1, the processor B2, and the main storage device 3 share the system bus 100.
Shows a block diagram connected to. This is a configuration of a general multiprocessor system.

FIG. 2 shows a process switching control circuit according to an embodiment of the present invention. As shown in FIG. 2, the process replacement control circuit includes an address translation buffer (TLB) 20 for comparing a process with a past process and a matching condition to newly execute the process, and dispatching control for allocating the information to the processor based on the information. It is composed of a circuit 12. When a process switching event occurs for each processor, the new process number of the process to be newly executed is stored in the new process number register 10 of each processor.
Is stored in Address translation buffer (TLB) 20
Is a physical address 23 corresponding to the process number 21 and the logical address 22 indicating the past process information.
And the new process number 10 and the process number 21 are
The process information is output to the registration number detection circuit 11. Then, the registration coincidence detection number obtained by the registration number detection circuit 11 is output to the dispatching control circuit 12. Also,
Similarly, the number of registered coincidence detections is output from the other processor B2 to the dispatching control circuit 12, and an instruction is sent to the processor A1 and the processor B2 which have the greater number of registered coincidence detections.

Next, referring to the internal configuration diagram of the processor shown in FIG. 2 and the flowchart shown in FIG. 3, the operation of replacing the process of the present invention will be described. The process number of a process newly executed by the processor A1 and the processor B2 (a number indicating which process information is a logical address) is stored in the register 10. The TLB 20 is a buffer for converting a logical address of a process executed in the past into a physical address, and a process number indicating process information of the logical address and physical address information 23 corresponding to the logical address information 22. Is stored in multiple entries. The newly executed process number is compared with the process number 21 registered in the TLB 20 by the registration number detection circuit 11, the number of entries in the TLB 20 having the same process number is counted, and the registration coincidence detection number 105 is output. At this time, the processor B2 similarly sets the process number of the process to be newly executed and TL
The number of entries matching the number of processes compared with the process number registered in B by the registered number detection circuit is counted, and the number 103 of registered coincidence detected is output. (See Figures 3 and 51)

As a result, the processor A1 and the processor B
2, the dispatching control circuit 12 compares the registered match detection number 105 of the processor A1 with the registered match detection number 103 of the processor B2 for the process newly executed. If the number of registered coincidence detections at this time is equal, as shown in FIGS. 3 and 53, the prior process priority or the free space of the process processing is compared, and the allocation of the process to be newly executed is performed. Is assigned to the processor A1 or the processor B2. When the own processor (processor A1) has a larger number of detected registration matches, a process to be newly executed is assigned to the processor A1 as indicated by 54 in FIG.
Sends a dispatch instruction 102 to its own processor. On the other hand, if the other processor (processor B2) has a larger number of detected registration matches, the dispatch instruction 104 is sent to the other processor to allocate a new process to be executed to the processor B2.

As described above, in the embodiment of the present invention, the new process number register 10 does not depend on the shared memory.
, An address translation buffer (TLB20), a registration number detection circuit 11, and a dispatching control circuit 12, configured as a control device and method for allocating a process to be newly executed to a processor having a high cache hit rate. can do.

[0017]

As described above, in the process switching apparatus and the switching method of the multiprocessor system according to the present invention, in the process of switching the processes, the process is allocated to the optimum processor having a high cache hit rate from a plurality of processors. Can be. As a result, the execution processing speed of the process is increased, so that it is possible to increase the number of process processes to the current processor and to replace a process with a small cache miss in a system requiring the execution processing speed.

[0018]

[Brief description of the drawings]

FIG. 1 shows a multiprocessor system according to an embodiment of the present invention.

FIG. 2 is an internal configuration diagram of a processor according to an embodiment of the present invention.

FIG. 3 is a flowchart illustrating an operation of the processor according to the embodiment of the present invention;

[Explanation of symbols]

 1... Processor A 2... Processor B 3... Main storage device 10... New process number register 11. ...... Registered number detection circuit 12 ...... Dispatching control circuit 20 ...... TLB (address conversion buffer) 21 ...... Process number 22 ······· Logical address 23 ····· Physical address 100 ····· System bus 101 ······ New process number 102 ··· ... Own processor dispatch instruction 103... Own processor registration match detection number 104... Other processor dispatch instruction 105... Other processor registration match detection number

────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] August 20, 1999 (1999.8.2
0)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claims

[Correction method] Change

[Correction contents]

[Claims]

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0005

[Correction method] Change

[Correction contents]

[0005]

[Means for Solving the Problems] To solve the above problems,
Replacement apparatus processes in a multiprocessor system according to the first aspect of the invention, in a multiprocessor system including a plurality of processors, each processor
When a process is executed, the logical address
Address conversion information converted to address
A registration unit that compares the process information obtained from the registration unit with information of a process to be newly executed, and compares the registration number obtained by the registration number detection unit. And dispatching means for allocating a process to be newly executed to a processor having the largest number of registrations. The registration unit that stores the process information of the processes that the processor has run in the past and the registration number detection unit that detects the number of matching conditions with the process information to be newly executed. By allocating a new process to be executed to the processor that has detected the condition, the cache miss rate can be reduced.

[Procedure amendment 3]

[Document name to be amended] Statement

[Correction target item name] 0006

[Correction method] Change

[Correction contents]

[0006] In addition, by registering translation information consisting of a logical address and a physical address of a process that the processor has operated in the past in the address translation buffer, the process information is generated when the process is immediately connected to an I / O event or the like. Can be stored, the past information of the process executed can be stored, and the cache miss rate can be reduced. Also, to compare past information,
Since there is no need to access the shared memory, the processing speed of the process can be increased.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0007

[Correction method] Change

[Correction contents]

Further, the second invention of the present application provides a process number indicating information of a process to be newly executed by the registration number detecting means according to the first invention of the present invention, and a process number stored in the address conversion buffer stored by the registration means. The process number is compared with the process number indicated by the process information, and the number matching the process information to be newly executed is output as the registration match detection number. By outputting the number of matches between the information of the newly executed process and the stored process information as the number of registered match detections, the process to be newly executed can be optimally processed by a quantitative comparison means having a simple configuration. Can be assigned to

[Procedure amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0008

[Correction method] Change

[Correction contents]

In the third invention of the present application, the dispatch means of the first invention of the present application or the second invention of the present application allocates to the processor having the largest number of detected registration matches from the registered number detecting means. It is characterized by the following. The registration coincidence detection number output from each processor by the registration number detection means is output from each processor to the dispatch control circuit, sends an instruction to the processor with the highest registration coincidence detection number, is assigned to the optimal processor, and is assigned to the cache. The process with the highest hit rate can be executed.

[Procedure amendment 6]

[Document name to be amended] Statement

[Correction target item name] 0009

[Correction method] Change

[Correction contents]

[0009] The fourth invention of the present application is the first invention of the present application, the second invention of the present application, or the third invention of the present application, when the number of registered coincidences detected by the dispatch means is equal, the priority of the process is reduced. It is characterized in that it is assigned to a processor in accordance with the comparison and the degree of free processing capacity of the processor. When the number of registered matches that match the process information is equal to any of the processors in the multiprocessor system, the priority of the process and the availability of the processing capacity of the process are given to the processor in the same manner as before. Allocation can be performed and processing can be performed without adding a new circuit.

[Procedure amendment 7]

[Document name to be amended] Statement

[Correction target item name] 0010

[Correction method] Change

[Correction contents]

[0010] In the method for exchanging processes of a multiprocessor system comprising a plurality of processors according to a fifth invention of the present application, a processor newly executed by a processor.
Process information and a discussion of what the processor has done in the past
Address translation that translates physical addresses to physical addresses
Process information in the address translation buffer that stores the information
And assigning a process to be newly executed to the processor having the largest number of detected registration matches. Further, when the number of coincidences of the registered coincidence detection number of the sixth invention of the present application is equal to that of another processor, a process to be newly executed is given to the processor by comparing the priorities of the processes and the available processing capacity of the processor. It is characterized by assigning. As described above, the fifth invention and the sixth invention of the present application can reduce a cache miss similarly to the first invention of the present application to the fourth invention of the present application.

[Procedure amendment 8]

[Document name to be amended] Statement

[Correction target item name] 0011

[Correction method] Change

[Correction contents]

According to a seventh aspect of the present invention, there is provided a multiprocessor system comprising a plurality of processors, wherein a computer-readable recording medium recording a program for controlling a process replacement is provided.
Process information to be executed correctly and processor executed in the past
Is converted from a logical address to a physical address.
Address translation buffer that stores address translation information
And process information, compared, newly registered to be executed process matching the number of detected and assigns the most common processor storing a program replacement step in the process of the multiprocessor system computer readable storage It is a medium. As described above, according to the eighth invention of the present application, the program of the procedure for replacing the process of the multiprocessor system can allocate the process to the optimum processor by the process replacement program in the same manner as in the sixth invention of the present application.

Claims (8)

[Claims] 1. A multiprocessor system comprising a plurality of processors, a registration unit for storing information of a process when the processor has operated in the past, and process information obtained from the registration unit to be newly executed. Registered number detecting means for comparing process information, and dispatching means for comparing the registered numbers obtained by the registered number detecting means and assigning a process to be newly executed to a processor having the largest registered number. A process replacement device for a multiprocessor system, comprising: 2. The multiprocessor system according to claim 1, wherein said registering means registers information storing a plurality of entries of translation information from a logical address to a physical address in an address translation buffer. apparatus. 3. The registration number detecting means compares the information of the process to be newly executed with the process information in the address translation buffer stored by the registration means, and compares the information of the process to be newly executed with the information of the process to be newly executed. 3. The apparatus according to claim 1, wherein the number of coincidences is output as a registered coincidence detection number. 4. The apparatus according to claim 1, wherein said dispatching means allocates a process to be newly executed to a processor having the largest number of detected registration matches from said registered number detecting means. A process replacement device for a multiprocessor system according to claim 1. 5. The method according to claim 1, wherein said dispatching means assigns to the processors in accordance with the comparison of the priority of the processes and the availability of the processing capacity of the processors when the registered coincidence detection numbers are equal. Item 5. An apparatus for exchanging processes of a multiprocessor system according to any one of Items 4. 6. A method for replacing a process in a multiprocessor system comprising a plurality of processors, wherein information on a process when each processor has been operated in the past and information on a process to be newly executed are compared. A process replacement method for a multiprocessor system, wherein a process to be newly executed is assigned to a processor having the largest number of registered matches detected with matching information. 7. A process to be newly executed is assigned to a processor based on a comparison of process priorities and an available processing capacity of the processor when the number of matches of the registered coincidence detection number is equal to that of another processor. 7. The method according to claim 6, wherein the processes are replaced. 8. A newly executed process and process information obtained in the past on a computer-readable recording medium storing a program for controlling a process replacement in a multiprocessor system including a plurality of processors. And allocating a process to be newly executed to a processor having the largest number of detected registration matches. A computer-readable storage medium storing a program for a process replacement procedure of a multiprocessor system.