JP2000078113A - Receiver, its method and served medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce an error rate when a transmission system is changed. SOLUTION: A TMCC decoding circuit 8 decodes a TMCC signal from received data. In the case that a change in a transmission system is discriminated based on the decoded data, a missing flag generating circuit 24 generates a missing correction flag. A missing flag de-interleave circuit 25 de-interleaves the produced missing correction flag and outputs the result to a reed Solomon circuit 23. The reed Solomon circuit 23 corrects a signal outputted from the de-interleave circuit 22 according to the received missing correction flag.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiving apparatus and a receiving method, and a providing medium. The present invention relates to a receiving apparatus and method for performing decoding with a low error rate by performing processing so that decoding can be performed without decoding, and a providing medium.

[0002]

2. Description of the Related Art The modulation method and coding rate of a convolutional code are
A transmission method that changes during transmission has been proposed. For example, satellite broadcasting (hereinafter referred to as BS
), The modulation scheme and coding rate are variable,
A transmission scheme in which a program program is transmitted in a time-division manner with various modulation schemes and coding rates has been proposed by a broadcaster's intention. In the terrestrial digital broadcasting system, which is an experimental specification in the radio wave industry and was drafted as a draft of the provisional system by the Telecommunications Technology Council, OFDM (Orthogonal Frequency Division Multip
lexing) scheme, layer transmission up to a maximum of four layers is possible, and modulation schemes and coding rates are transmitted differently in OFDM segments.

[0003] On the receiving side receiving a broadcast-type service using such a transmission scheme, in order to reduce the hardware configuration, the receiving side is originally prepared for each encoding scheme.
A Viterbi decoder for decoding convolutionally encoded data is commonly used for each encoding method.
In order that even one Vidabi decoder can decode, the transmitting side
Convolutional coding is performed so that codes are continuous in the hierarchy. That is, the convolutional encoded output operation is performed so that the encoding between the predetermined layers is terminated, and then the concatenated encoded output is connected to the encoded output of another layer.

[0004] Since the convolutional codes are continuous in this way, the receiver side (decoder side) is not dependent on the transmission method such as the modulation method and the coding rate, and is continuous by one Vidavi decoder. Decryption can be performed.

FIG. 5 is a block diagram showing a configuration of a conventional receiving apparatus. The antenna 1 includes a frequency conversion circuit therein, and a received signal is converted into a signal of a first intermediate frequency. From the signal converted to the first intermediate frequency, a signal of a channel desired by the user is selected by the tuner 2 and converted to the second intermediate frequency. The second intermediate frequency is input to the IF circuit 3, amplified, and output to the demodulation circuit 4. The demodulation circuit 4 demodulates the input second intermediate frequency into a baseband signal and outputs the demodulated signal to the frame synchronization circuit 5 and the error correction circuit 6.

[0006] The frame synchronization circuit 5 extracts a frame synchronization pattern from the input baseband signal and establishes frame synchronization. When the frame synchronization is established, a burst reference carrier for carrier recovery is specified. The carrier recovery circuit 7 uses the specified burst reference carrier to recover the carrier. The reproduced carrier is returned to the demodulation circuit 4. Further, the frame synchronization circuit 5 controls the signal flow of the error correction circuit 6 using the established frame synchronization.

[0007] The baseband signal output from the demodulation circuit 4 input to the error correction circuit 6 is input to a Vidabi decoding circuit 8. The baseband signal input to the Vidabi decoding circuit 8 is Vidabi-decoded, and is transmitted by a TMCC (Transmission Multiplexin).
g Configuration control) output to the decoding circuit 9 and the deinterleave circuit 10.

It is known that errors that cannot be corrected by the Viterbi decoding circuit 8 remain as burst errors. A deinterleave circuit 10 is provided for appropriately dispersing the burst errors and improving the error correction in the subsequent Reed-Solomon circuit 11. That is, since the deinterleave circuit 10 is provided with an interleave circuit for improving the error correction on the transmission side, the deinterleave circuit 10 performs the reverse interleave.

The signal output from the Viterbi decoding circuit 8 and having the residual error dispersed by the deinterleave circuit 10 is input to a Reed-Solomon circuit 11. The Reed-Solomon circuit 11 corrects the error of the input signal and outputs it to another external device.

[0010]

[Problems to be Solved by the Invention] By the way, 8PSK (Phas
e Shift Keying) and BPSK (Binary P
Since the signal distance differs between the signal transmitted by hase shift keying), the dynamic range of the branch metric defined between the received signal points differs. That is, in BPSK, the dynamic range of the branch metric is large because the distance between signals is large, but in 8PSK, the dynamic range of the branch metric is small because the distance between signals is shorter than in BPSK.

Therefore, 8PSK is more susceptible to the same noise superimposed during transmission than BPSK. For this reason, even if an error correction circuit based on the same convolutional coding and Viterbi decoding is used, 8PSK is more vulnerable to noise than BPSK.

For example, after a signal modulated by BPSK, 8PSK
If the signal modulated in step (1) continues, in order to output the decoded data of the BPSK transmission stream already stored in the path memory in the Viterbi decoder, the low reliability (errors) The branch metric (which is likely to be included) must be accumulated in the state metric. For this reason, although the branch metric for the highly reliable BPSK is accumulated and the path memory is controlled using the highly reliable state metric, 8PSK continues thereafter, so that Unreliable branch metrics will be generated, and as the accumulation of 8PSK branch metrics for outputting the BPSK data already stored in the path memory progresses, the influence of the unreliable transmission method gradually will increase. As a result, the characteristics are degraded.

Conversely, if the signal modulated by 8PSK is followed by the signal modulated by BPSK, if the C / N is low, the branch metric for 8PSK is buried in noise, and the transmission signal sequence is In some cases, it cannot be estimated sufficiently.
When the modulation method is changed from this state to BPSK,
In BPSK, a branch metric having a larger dynamic range can be defined as compared with 8PSK, so that a sequence that cannot be received and demodulated in 8PSK can be received and demodulated in BPSK in some cases. However, the state metric of each state immediately after the change to BPSK is useless in each state, as described above.
The converted branch metric cannot be sufficiently accumulated in the SK, and the decoding characteristics immediately after the BPSK change deteriorates.

As described above, when signals of different transmission schemes are transmitted in a time-division manner, a part of the transmission scheme having a low coding rate and a low modulation efficiency can be used even in a low C / N environment.
Although high-reliability reception is required, the receiver uses a single Viterbi decoder for a plurality of transmission schemes in order to reduce the scale of hardware. When the transmission stream changes to a low coding rate and low modulation efficiency, the decoded data of the low coding rate and low modulation efficiency transmission stream already stored in the path memory is output. Unreliable branch metrics generated during transmission streams with high modulation efficiency had to be accumulated in state metrics.

For this reason, a highly reliable metric is accumulated, and a low-reliable metric is accumulated even though the path memory is controlled by using the highly reliable state metric. Progresses,
The characteristics are gradually degraded due to the influence of the transmission scheme part having low reliability. Similarly, when a stream of a transmission method with a high coding rate and a high modulation efficiency is Vidabi-decoded at a low C / N, a low-reliable state metric is accumulated inside the Vidabi decoder, and a low coding rate following thereafter is stored. However, there is a problem that a bad influence is exerted when a transmission stream requiring low modulation efficiency, that is, a highly reliable reception is subjected to Viterbi decoding.

The present invention has been made in view of such a situation, and when a transmission method of received data is changed, a flag for notifying the change and generating a flag for correction is generated. The error correction rate is improved.

[0017]

According to a first aspect of the present invention, there is provided a receiving apparatus for receiving a signal transmitted by a different transmission method in a time-division manner, and changing a transmission method of a signal received by the receiving means. Detecting means for detecting
When a change in the transmission scheme of the received signal is detected, the output means for outputting a flag indicating erasure correction, and the signal received by the reception means in accordance with the flag indicating erasure correction output from the output means. Erasure correction means for erasure correction.

According to a fourth aspect of the present invention, in the information processing method, a receiving step of receiving a signal transmitted by a different transmission method in a time-division manner, and a detecting step of detecting a change in the transmission method of the signal received in the receiving step. An output step of outputting a flag indicating erasure correction when a change in the transmission scheme of the received signal is detected in the detection step; and a receiving step according to the flag indicating erasure correction output in the output step. And an erasure correction step of performing erasure correction on the signal received in step (a).

According to a fifth aspect of the present invention, there is provided a providing medium, comprising: a receiving step of receiving a signal transmitted by a different transmission method in a time-division manner; In the detection step, when a change in the transmission scheme of the received signal is detected, an output step of outputting a flag indicating erasure correction, and a reception step according to the flag of erasure correction output in the output step. A computer-readable program for causing a receiving apparatus to execute a process including an erasure correction step of performing erasure correction on a received signal is provided.

[0020] In the receiving apparatus according to the first aspect, the receiving method according to the fourth aspect, and the providing medium according to the fifth aspect, signals transmitted by different transmission schemes are received in a time-division manner. When a change in the transmission scheme of the signal is detected, a flag indicating erasure correction is output, and the received signal is erasure-corrected according to the flag indicating erasure correction.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below. In order to clarify the correspondence between each means of the invention described in the claims and the following embodiments, each means is described. When the features of the present invention are described by adding the corresponding embodiment (however, an example) in parentheses after the parentheses, the result is as follows. However, of course, this description does not mean that each means is limited to those described. In addition, the same reference numerals are given to portions corresponding to the conventional case, and the description thereof will be omitted as appropriate.

According to the first aspect of the present invention, there is provided a receiving apparatus for receiving a signal transmitted by a different transmission method in a time-division manner (for example, the antenna 1 in FIG. 1), and transmitting a signal received by the receiving means. A detecting unit (for example, the TMCC decoding circuit 8 in FIG. 1) for detecting a change in the system, and an output for outputting a flag for instructing erasure correction when a change in the transmission system of the received signal is detected by the detecting unit. Means (for example, FIG. 1
Erasure generation circuit 24) and erasure correction means (for example, FIG. 1) for erasure correction of the signal received by the reception means in accordance with the erasure correction instruction flag output from the output means.
And a Reed-Solomon circuit 23).

The receiving apparatus according to the second aspect of the present invention includes a conversion unit (for example, a de-interleave circuit for erasure flag 25 in FIG. 1) for converting a flag indicating erasure correction output from the output unit from a bit unit to a byte unit. Is further provided.

FIG. 1 is a block diagram showing a configuration of an embodiment of a receiving apparatus to which the present invention is applied. The signal output from the demodulation circuit 4 is input to the Vidavi decoding circuit 21 of the error correction circuit 20. The signal input to the Vidabi decoding circuit 21 is Vidabi-decoded,
Output to TMCC decoding circuit 8. Deinterleave circuit 2
The signal input to 2 is subjected to an interleaving process reverse to that on the encoding side, and is output to a Reed-Solomon circuit 23.

On the other hand, the TMCC decoding circuit 8 decodes the TMCC signal from the input signal. The erasure flag generation circuit 24
An erasure flag described later is generated and output to the Reed-Solomon circuit 23 via the erasure flag deinterleave circuit 25.

FIG. 2 shows the configuration of the Viterbi decoding circuit 21. First, the signal input to the Vidabi decoding circuit 21 is calculated by calculating the square of the Euclidean distance from a received signal point having noise or distortion on a transmission line to a signal point to be originally received, and generating a branch metric generated as a branch metric. Input to the circuit 31. Branch metric circuit 3
The branch metric generated in step 1 is ACS (Add, Compa
re and Select) circuit 32 accumulatively calculates and compares in accordance with the trellis of the convolutional code, thereby calculating the state metric of each state.

The ACS circuit 32 controls the path memory 33 while analogizing the state transition on the encoding side (transmission side). If there is no noise or distortion in the transmission path, the input signal matches the original transmission signal point, so that the branch metric circuit 31 sets the branch metric for the transmitted signal point to 0 and the other branch metrics to the signal The square of the distance between the points is generated respectively. Therefore, in the ACS circuit 32, when these branch metrics are cumulatively added according to the state transition diagram and the state metric is calculated, the state metric remains 0 for the original path, but for the other paths, Since the state metric has a large value, a transmission signal sequence can be estimated from this.

Here, consider the case where noise is present in the input signal. Since the input signal is obtained by adding noise to the original transmission signal point, the branch metric for the original transmission signal point is not always 0,
There is uncertainty only in noise power. Similarly, other branch metrics have uncertainty depending on the noise power in the square of the distance between signal points. However, when the noise power is small, the transmission signal sequence is
Then, when these branch metrics are cumulatively added according to the state transition diagram and the state metric is calculated, the state metric has a small value for the original path, but has a large value for the other paths. As a result, the transmission signal sequence can be estimated.

Next, the operation of the receiving apparatus shown in FIG. 1, particularly the operation of the error correction circuit 20, will be described. The signal output from the demodulation circuit 4 is input to the Viterbi decoding circuit 21 and the frame synchronization circuit 5. The frame synchronization circuit 5 extracts a frame synchronization pattern from the input signal, and controls the flow of a signal in the error correction circuit 20 based on the frame synchronization signal.

The signal input to the Vidabi decoding circuit 21 is
The video data is Vidabi-decoded and output to the deinterleave circuit 22 and the TMCC decoding circuit 8. The deinterleave circuit 22
After dispersing the residual error of the input signal, the signal is output to the Reed-Solomon circuit 23. The signal input to the Reed-Solomon circuit 23 corrects the residual error distributed by the deinterleave circuit 22. This Reed-Solomon circuit 23
Performs error correction of the signal output from the deinterleave circuit 22 and also performs erasure correction. This erasure correction is performed based on the signal output from the erasure flag deinterleave circuit 25.

The TMCC decoding circuit 8 decodes the TMCC signal from the signal output from the Viterbi decoding circuit 21. By decoding the TMCC signal, transmission control information such as the modulation method and coding rate of the main signal can be obtained. The erasure flag deinterleave circuit 25 generates an erasure correction flag in the erasure flag generation circuit 24 based on the signal output from the TMCC decoding circuit 8, and outputs the erasure correction flag to the Reed-Solomon circuit 23.

That is, when the modulation method or the coding rate changes, it is possible to know in advance where and how the frame synchronization changes by decoding the TMCC signal. When the transmission method changes based on this information, the erasure flag generation circuit 24 generates an erasure correction flag. The erasure flag generating circuit 24 generates an erasure correction flag at a position closer to the change point of the transmission system on the more reliable transmission system side when the transmission system changes. This is because a highly reliable transmission system is affected by a low-reliability transmission unit near a change point of the transmission system, and its error characteristics deteriorate.

FIG. 3 specifically shows the position (timing) where the erasure correction flag is added. FIG. 3 (A)
An example is shown in which the transmission scheme changes from BPSK to 8PSK. In such a case, an erasure correction flag is added to the BPSK side where the transmission scheme changes from BPSK to 8PSK. FIG. 3B shows the reverse pattern, in which the transmission system changes from 8PSK to BPSK. In such cases, 8PSK to BPSK
The erasure correction flag is added to the BPSK side where it changes to.

The output of the Vidabi decoding circuit 21 is
The signal is input to a Reed-Solomon circuit 23 via a deinterleave circuit 22. The erasure correction flag output from the erasure flag generation circuit 24 also needs to be deinterleaved and output to the Reed-Solomon circuit 23 at the same timing as the signal output from the deinterleave circuit 23. For this purpose, an erasure flag deinterleave circuit 25 is provided between the erasure flag generation circuit 24 and the Reed-Solomon circuit 23.

In digital broadcasting, a byte-structured code is often used as a Reed-Solomon code. To cope with such a situation, the output from the Vidabi decoding circuit 21 is output by a deinterleave circuit 22. ,
The bit configuration is changed to a byte configuration and supplied to the Reed-Solomon circuit 23. Therefore, the output from the erasure flag generation circuit 24 needs to be similarly changed from the bit configuration to the byte configuration and supplied to the Reed-Solomon circuit 23 by the erasure flag deinterleave circuit 25.

FIG. 4 is a block diagram showing a configuration of the deinterleave circuit 25 for the erasure flag. The erasure correction flag output from the erasure flag generation circuit 24 is input to the 8-bit shift register 41 of the erasure flag deinterleave circuit 25. This input is supplied to the frame synchronization circuit 5
This is performed in accordance with the bit timing clock supplied from. The signal stored in the 8-bit shift register 41 is supplied to a logical sum operation circuit 42 where the logical sum operation is performed.
The operation result is input to the register 43.

The bit timing clock supplied to the shift register 41 is converted into a byte timing clock by the divide-by-8 circuit 44. The conversion from the bit timing clock to the byte timing clock is synchronized with the frame synchronization circuit 5 Is controlled by a control signal supplied from the controller. The register 43 is latched by this byte timing clock, and an erasure correction flag is generated in byte units. The generated erasure correction flag in byte units is supplied to the memory 45 and stored therein.
The memory 45 not only stores the input erasure correction flag, but also deinterleaves and supplies the Reed-Solomon circuit 23 with the erasure correction flag.

The Reed-Solomon circuit 23 performs erasure correction when the signal supplied from the erasure flag deinterleave circuit 25 includes an erasure correction flag, and performs normal correction processing when the signal is not included. .

As described above, when the transmission method that may contain many errors changes, the erasure correction flag is set, and the erasure correction processing is performed according to the erasure correction flag. Can be done.

In the above-described embodiment, B
Although the description has been made on the premise of the S digital system, it is needless to say that the present invention can be applied to other broadcasting systems. Also,
Although the case of 8PSK and BPSK has been described as an example of the transmission method, another method may be used.

In the present specification, a providing medium for providing a user with a computer program for executing the above processing includes an information recording medium such as a magnetic disk and a CD-ROM, and a transmission medium via a network such as the Internet and a digital satellite. Is also included.

[0042]

As described above, the receiving apparatus according to claim 1,
According to the receiving method of claim 4 and the providing medium of claim 5, a signal transmitted by a different transmission method is
When a change in the transmission scheme of the received signal is received in a time-division manner and a change in the transmission scheme is detected, a flag indicating erasure correction is output, and the received signal is erasure-corrected according to the flag. Can be decoded while suppressing the error rate.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an embodiment of a receiving device to which the present invention has been applied.

FIG. 2 is a block diagram illustrating a configuration of a Viterbi decoding circuit.

FIG. 3 is a diagram for explaining how an erasure correction flag is added.

FIG. 4 is a block diagram illustrating a configuration of a deinterleave circuit for a loss flag.

FIG. 5 is a block diagram illustrating a configuration of an example of a conventional receiving device.

[Explanation of symbols]

4 demodulation circuit, 5 frame synchronization circuit, 8 TMCC decoding circuit, 21 Vidabi decoding circuit, 22 deinterleave circuit, 23 Reed-Solomon circuit, 24 erasure flag generation circuit, 25 erasure flag deinterleave circuit, 41 shift register, 42 OR Arithmetic circuit, 43 registers, 4/8 frequency divider, 45
memory

Claims (5)

[Claims] A receiving means for receiving a signal transmitted by a different transmission method in a time-division manner; a detecting means for detecting a change in a transmission method of a signal received by the receiving means; Output means for outputting a flag for instructing erasure correction when a change in the transmission method of the received signal is detected; and a signal received by the receiving means according to the flag for instructing erasure correction output by the output means. And a erasure correction means for erasure correction. 2. The receiving apparatus according to claim 1, further comprising a conversion unit that converts a flag indicating erasure correction output from the output unit from a bit unit to a byte unit. 3. When the transmission method changes to a transmission method that is vulnerable to a transmission error, the output means outputs the flag for instructing the erasure correction immediately before the transmission method changes. When changing to a transmission method that is resistant to errors,
2. The receiving apparatus according to claim 1, wherein a flag for instructing the erasure correction is output immediately after the transmission system changes. 4. A receiving step of receiving signals transmitted by different transmission methods in a time-division manner; a detecting step of detecting a change in a transmission method of the signal received in the receiving step; An output step of outputting a flag indicating erasure correction when a change in the transmission scheme of the signal is detected, and a signal received at the reception step according to the flag indicating erasure correction output at the output step. And a erasure correction step for erasure correction. 5. A receiving step of receiving signals transmitted by different transmission schemes in a time-division manner; a detecting step of detecting a change in a transmission scheme of the signal received in the receiving step; An output step of outputting a flag indicating erasure correction when a change in the transmission scheme of the signal is detected, and a signal received at the reception step according to the flag indicating erasure correction output at the output step. A computer-readable program for causing a receiving apparatus to execute a process including an erasure correction step of erasure correction of a computer.