JP2000059697A - Image pickup device and image pickup system using it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a device that reads a signal so as not to produce a signal level difference between common amplifiers in the case of applying interlaced scanning to pixels connecting to the common amplifiers by using a horizontal transfer means so as to sum signals from pluralities of photoelectric conversion sections laid out vertically or obliquely at an input section of the common amplifiers. SOLUTION: A horizontal transfer means is used to sum signals from pluralities of photoelectric conversion sections laid out vertically or obliquely at an input section of common amplifiers. A signal read circuit applies addition processing to the same color signal in this device and since the summing is conducted via the same signal system, no gain difference takes place. Then a horizontal register H.SR being a horizontal transfer means and a switching transistor(TR) connecting thereto output simultaneously signals from capacitors CTN1, CTS1, CTN2, CTS2, CTN3, CTN4, CTS4 to a horizontal output line and operational amplifiers A1-An reduce a noise from the signal and an adder sums the resulting signals.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image pickup apparatus and an image pickup system using the same, and more particularly to interlace driving and pixel number conversion when a plurality of pixels are provided in a common amplifier.

[0002]

2. Description of the Related Art Digital broadcasting has begun in the United States in 1998, and NTSC broadcasting (525 V) has been abolished in 2006, and there is a plan to change all TV broadcasting to HD digital. Digital still cameras with 1.3 million pixels are sweeping the market. This means that it is desired to output a high-resolution signal and a low-resolution signal from a high-pixel sensor as needed.

[0003] Under such circumstances, shrinking (reducing) the pixel size of the CCD is progressing. But 5
High-speed reading cannot be performed with a CCD having a size of about μm □, and currently only 600,000 pixels and about 60 frames / sec are commercialized.

On the other hand, since a CMOS sensor manufactured by a process similar to the CMOS manufacturing process can perform random access, it is expected as a sensor suitable for high speed operation in the future.

When reading out a low number of pixels from a sensor having a high number of pixels, it is possible to obtain information on a low number of pixels by performing thinning-out scanning. In the thinning-out scanning, the CCD discards unnecessary pixel signals of a horizontal line to an overflow drain provided in a horizontal shift register. Further, only necessary signals are sampled in the signals read from the CCD. The CMOS sensor outputs only necessary signals by random access.

[0006]

However, in the above-described thinning-out scanning of the CCD, unnecessary electric charges are transferred, so that unnecessary power is required. Further, since unnecessary signals are thinned out and discarded, moire due to low sampling occurs.
Moiré also occurs in the above-described thinning-out scanning.

An object of the present invention is to prevent a signal level difference between common amplifiers from occurring when interlaced scanning is performed on pixels connected to a common amplifier or when reading out low-pixel signals from a high-pixel sensor. Another object of the present invention is to provide an imaging device capable of reading out a signal.

[0008]

According to the present invention, there is provided an imaging apparatus comprising: a plurality of photoelectric conversion units; and a common amplifier to which signals from the plurality of photoelectric conversion units are input. In the apparatus, means for adding signals from a plurality of photoelectric conversion units arranged in a horizontal direction at an input unit of the common amplifier, and horizontally adding signals from a plurality of photoelectric conversion units arranged in a vertical direction or an oblique direction. And means for adding using a transfer means.

Further, according to the present invention, there is provided an image pickup apparatus comprising: a plurality of photoelectric conversion units; and a common amplifier to which signals from the plurality of photoelectric conversion units are input. A plurality of color signals are output from the photoelectric conversion unit, and signals of the same color among the plurality of color signals are added by a horizontal transfer unit.

An imaging system according to the present invention includes the above-described imaging device according to the present invention, a lens that forms light on the imaging device, and a signal processing circuit that processes an output signal from the imaging device. I do.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Prior to the description of the present invention,
The differences from the known related art will be described.

When imaging a dark subject, a CMOS sensor has already added signals of two vertical pixels. For example, FIG. 4 of Japanese Patent Application Laid-Open No. 9-46596 describes that signals of two upper and lower photoelectric conversion units in the vertical direction are added at the same time in a cell. However, there is no disclosure about addition of signals from the photoelectric conversion units in the horizontal direction and addition of signals of the photoelectric conversion units in the vertical or oblique directions by the horizontal transfer means. There is no disclosure of adding and reading signals of the same color when reading by reading.

The provision of one amplifying means for the photoelectric conversion unit of two pixels or three or more pixels in the vertical direction is disclosed in Japanese Patent Laid-Open No. Hei 4-461, and the photoelectric conversion unit of four pixels in the horizontal and vertical directions is disclosed. The provision of one amplifying means for the converter is disclosed in Japanese Patent Application Laid-Open No. 63-100879, but none of them discloses addition processing.

FIG. 1 is a schematic diagram showing the configuration of a part of the imaging apparatus of the present invention, and FIG. 2 is a diagram showing the configuration of a unit cell S of the imaging apparatus of FIG.

As shown in FIG. 2, the unit cell S includes four photoelectric conversion units (here, a ₁₁ , a ₁₂ , a
₂₁ , a ₂₂ ) are arranged. Other unit cells have the same configuration. Here, the common amplifier is constituted by the amplification means MSF, the reset means MRES, and the selection means MSEL, and the input section of the common amplifier is the gate section of the amplification means MSF.

Upper two photoelectric conversion units in the horizontal direction in units of four pixels
(A₁₁, A₁₂) Odd vertical lines to control signal transfer
Direct shift register V_o(V_o1, V_o2, V_o3, ...)
Then, the lower two photoelectric conversion units (a_{twenty one}, A_{twenty two}) Signal
Transfer control lines are set to an even number of vertical shift registers V_e
(V_e1, V_e2, V_e3, ...). Common amplifier
The reset switch MRES and the select switch MSEL are odd.
Number selection circuit S_o(S _o1, S_o2, ...) and even selection times
Road S_e(S_e1, S_e2,...) And each vertical shift
Register V_o, V_eConnected to. Vertical shift register
TA V_o, V_eAnd selection circuit S_o, S_eCan be controlled independently
Can be.

FIG. 3 is a timing chart of the vertical shift register during interlaced scanning. FIG. 3A is a timing chart of an odd field, and FIG. 3B is a timing chart of an even field.

In FIG. 3A, horizontal scanning is performed every two lines connected to a common amplifier. That odd (odd) row of the vertical shift register V _on the even-numbered (even) vertical shift registers V _en row are simultaneously controlled. Here, the high level of the signals φ _o and φ _e corresponds to the horizontal blanking period, and the reset operation and the read operation of the sensor are performed.

In FIG. 3B, adjacent lines between the common amplifiers are selected by two lines of pixels connected to the common amplifier, and horizontal scanning is performed. That is, the cell numbers of the vertical shift registers are shifted by one with respect to FIG. 3A, and the vertical shift registers V _{on + 1} and V _{en + 1,} and the vertical shift registers V _{on + 2} and V _{en + 1 are} shifted. Are driven by a combination of.

In the above interlaced scanning, when performing the addition processing of the pixel signals, when adding the signals from a plurality of photoelectric conversion units in the same unit cell, the addition processing is performed at the input unit of the same common amplifier. Can be done,
When adding signals from a plurality of photoelectric conversion units in different unit cells, the addition processing cannot be performed at the input unit of the same common amplifier. Explaining using each unit cell of the imaging device shown in FIG. 4, addition within the same unit cell, for example, addition of signals from photoelectric conversion units arranged in the horizontal direction (a ₁₁ + a ₁₂ , a ₂₁ + a ₂₂₎ , A ₃₁ + a ₃₂ , ...
.), Addition of signals from the photoelectric conversion units arranged in the vertical direction (a ₁₁ + a ₂₁ , a ₃₁ + a ₄₁ ,...), And addition of signals from the photoelectric conversion units arranged in the oblique direction (a ₁₁ + a
₂₂ , a ₃₁ + a ₄₂ ,... Or a ₁₂ + a ₂₁ , a ₃₂ + a
₄₁ ,...), The addition processing can be performed by the same common amplifier A and read out from a single cell. But,
Addition between different unit cells, for example, addition of signals from photoelectric converters arranged in the vertical direction (a ₂₁ + a ₃₁ , a ₄₁ +
a ₅₁ ,...) and addition of signals from the photoelectric conversion units arranged obliquely (a ₂₁ + a ₃₂ , a ₄₁ + a ₅₂ ,.
Alternatively, in the case of a ₂₂ + a ₃₁ , a ₄₂ + a ₅₁ ,...), Addition cannot be performed by the same common amplifier A and read out from a single cell.

Therefore, according to the present invention, in an image pickup apparatus in which a plurality of photoelectric conversion units and a common amplifier to which signals from the plurality of photoelectric conversion units are arranged are arranged in a plurality of columns, different unit cells are used. In the case where a mode for adding signals from a plurality of photoelectric conversion units is included, the addition of signals from the photoelectric conversion units arranged in a vertical direction or an oblique direction is performed using a horizontal transfer unit.

Hereinafter, the present invention will be described specifically.

First, a case where color separation is performed by a color sensor will be described. FIG. 5 shows a unit cell provided with a color filter when Gs are arranged in a checkered pattern.

As shown in FIG. 5, G (green) pixels having the highest resolution are arranged at the upper left and lower right of the repeating unit cell 30 composed of four pixels. In this G pixel, a common amplifier 32 disposed at the center of the unit cell 30
Is located at a position symmetrical with respect to the area occupied by the light-shielding portion 35. Therefore, the center of gravity of the photoelectric conversion unit 31 in the G pixel exists at the center of the G pixel. Thus, the photoelectric conversion units a ₁₁ and a ₂₂ of the G pixel can be arranged at equal intervals a in the vertical and horizontal directions. The R (red) pixel is located at the upper right of the unit cell 30,
The (blue) pixel is arranged at the lower left of the unit cell 30. Although these do not have a light-shielding portion that is particularly considered unlike the G pixel, since the number of arrangement in the unit cell 30 is one,
The unit cells 30 are arranged at equal intervals 2a.

FIG. 6 is a timing chart for reading color signals when the color filters are sequentially arranged in the G checkerboard and the R and B lines. FIG.
FIG. 3 is a circuit diagram for reading out each color signal. In addition,
FIG. 7 also shows addition processing means for performing the addition processing of the same color signal in the low pixel signal reading described later.

[0026] In FIG. 6, in the period T _1, the pulse φ _RV
Resets the vertical signal line, removes the residual charge on the signal line, and _generates pulses φ _TN1 , φ _TN2 , φ _TN3 , φ _TN4 ,
In φ _{TS 1} , φ _TS2 , φ _TS3 , φ _TS4 , temporary storage capacitors C _TN1 ,
The residual charges on C _TN2 , C _TN3 , C _TN4 , C _TS1 , C _TS2 , C _TS3 , and C _TS4 are removed.

In the period T ₂ , the first photoelectric conversion unit row (a)
₁₁ , a ₁₂ ,... A _1n ), first, as a stage prior to transferring the photoelectric conversion signal of the G ₁ pixel (the upper left G pixel in FIG. 5),
The gate section (input section) of the amplification means MSF of the common amplifier is reset by the pulse _φOR to remove residual charges. After the removal, reset noise remains in the gate portion.

The period T ₃ is a period for transferring the reset noise and the offset voltage of the common amplifier in the period T ₂ to the capacitor C _TN1 . The pulse φ _oS connects the output part of the common amplifier to the vertical signal line, and in order to put the common amplifier into operation, the load MOS Tr is turned on with the pulse φ _{L. The} pulse φ _TN1 connects the vertical signal line and the capacitance C _TN1 . Connect. The noise is stored as noise (N ₁ ) in the capacitor C _TN1 .

[0029] In the period T _4, the photoelectric conversion unit in G ₁ pixel (a
_11, a _13, a period for capacitor C _TS1 f transferring the photoelectric conversion signal (S ₁₎ from ··· a _1n). Pulse φ _L , φ _TS1 , φ _oS
As a result, the area from the common amplifier to the capacitor C _TS1 becomes conductive.

The photoelectric conversion signal is transferred from the photoelectric conversion unit to the gate of the common amplifier by the pulse _φo11 . So that the photoelectric conversion signal to the reset noise in the period T ₂ is added to the gate at this time. This gate voltage is superimposed on the offset voltage of the common amplifier, and is accumulated as a signal (S ₁ + N ₁ ) on the capacitor C _TS1 .

Thereafter, the vertical signal line is reset by the pulse φ _RV to remove the residual charges on the signal line, reset during the period T ₂ ′, and transfer the noise (N ₂ ) of the common amplifier during the period T ₃ ′. The signal (S ₂ + N ₂ ) from the R ₁ pixel is transferred to T ₄ ′. Similarly, the period _{T 3 '', T 3 '} '' to a common amplifier noise transfer (N _3, N _4), the period _{T 4'', T 4'} '' from B ₂ pixels where noise has been added (S ₃ + N ₃ ) and the signal (S ₄ + N ₄ ) from the G ₂ pixel (the lower right G pixel in the figure). The noise is removed from the color signal by the differential amplifier, and the signals S ₁ (G), S ₂ (R), S ₃ (B), S
₄ (G) is output.

The above is intended to indicate the operation of the odd field of an interlaced scanning, it is possible to perform the operation of the even field by changing the combination of the vertical shift register V _o and V _e as described in FIG. 3 .

Next, reading of a low pixel signal will be described. Here, the case where the addition processing of the G signal is performed will be described.

[0034] In the case of adding the G signals from the photoelectric conversion unit a ₁₁ and the photoelectric conversion portion a ₂₂ in the unit cell on an odd field, can also be added at the input of the common amplifier.
However, in the case of adding the G signals from the photoelectric conversion section a ₂₂ and the photoelectric conversion unit a ₃₁ is an even field, it is not possible to add at the input of the common amplifier, reading the G signal from the respective unit cells It will be added later. In this case, it is necessary to switch the signal added by the common amplifier and the signal added after output from the common amplifier with an interlace pulse, but it is difficult to make the gains coincide with high accuracy at this time.

Therefore, in the present invention, the photoelectric conversion units a ₁₁ and a ₁₁
G signal from the G signal is also a photoelectric conversion portion a ₂₂ and the photoelectric conversion portion a ₃₁ from the photoelectric conversion unit _22, together the addition processing in the horizontal transfer unit. The reading method of each color signal is the same as the reading method described with reference to FIG.

The addition processing of the same color signal is performed by the signal reading circuit of FIG. In the case of the circuit of FIG. 7, no gain difference occurs because the addition process goes through the same signal system. In FIG. 7, each capacitance C is determined by a horizontal shift register (H.SR) serving as horizontal transfer means and a switching transistor connected thereto.
_{TN1, C TS1, C TN2,} C TS2, C TN3, C TS3, C TS4, C T
_A signal is simultaneously output from _N4 to a horizontal output line, and a subtraction amplifier A
It is added by the adder from the signal by ₁ to A ₄ (including the noise component) after subtracting the noise. As another method, the capacitors C _TS1 and C _TS4 are connected to the horizontal output line, and the capacitors C _TN1 and C
_TN4 may be added. Alternatively, the temporary storage capacitors may be connected and added.

FIG. 8 is a timing chart of an embodiment in which color separation is not performed by a single sensor. In this case, since the signals are the same color, the pixel signals in the horizontal direction can be added at the input section of the common amplifier. _{A 11 + a 12, a 21} + a 22 in the odd field to be described below, ... signal is obtained.

[0038] In the period T _1, to reset the vertical signal line at pulse phi _RV, with the removal of the signal line of the residual charge, the pulse _{φ TN1, φ TN2, φ TS1} , capacity for temporary storage in phi _TS2 C _{TN 1} , C _TN2 , C _TS1 , and C _TS2 are removed.

The reset period T ₂ the gate of the common amplifier at phi _OR, transfers common amplifier noise (N ₁₎ to the capacitance C _N1 in the period T _3. Next period T ₄ in horizontal two transfer signals from the photoelectric conversion unit pulse phi _on1, to conductive state by phi _on2, added by the gate portion. A signal corresponding to this addition signal (S ₁ + N ₁ ; S ₁ is an addition signal component of the horizontal two photoelectric conversion units (a ₁₁ + a ₁₂ ), and N ₁ is a noise component) is transferred to the capacitor C _S1 .

Next, the vertical signal line is reset by the pulse φ _RV to remove residual charges on the signal line, and the period T ₂ ′ The gate of the common amplifier is reset by phi _OR in the period T ₃ ' Transfers the noise (N ₂ ) of the common amplifier to the capacitor C _N2 . Next, period T ₄ ′ In horizontal two signals a transfer pulse from the photoelectric conversion unit phi _en1, and the conductive state at phi _en2, added by the gate portion. Signal corresponding to the sum signal (S ₂ + N _2; sum signal component of S ₂ is horizontal second photoelectric conversion portion _{(a 21 + a 2 2)} , N 2 is the noise component) is transferred to the capacitor C _S2.

As shown in FIG. 3, the vertical shift register V
By changing the combination of _o and V _e , the operation of the even field can be performed. For even fields, a ₂₁ + a ₂₂ ,
a ₃₁ + a _32, ... signal can be obtained.

FIG. 9 shows the configuration of a readout circuit for adding pixel signals in the vertical direction. Note that the timing for reading signals from each photoelectric conversion unit to the read circuit in FIG. 9 is the same as the timing chart described with reference to FIG. Each capacitance and vertical output line in FIG. _{9 C TN 1, C TS1,} C TN2, C TS2,
Transistors for connecting C _TN3 , C _TS3 , C _TS4 , C _TN4 and control signals φ _TN1 , φ _TS1 , φ _TN2 , φ _TS2 , φ _TN3 ,
φ _TS3 , φ _TS4 , φ _TN4 are omitted.

In the circuit shown in FIG. 9, each of the capacitors C _TN1 , C _TS1 , C _TS1 , C _TS1 , C _TS1 , C _{S1
C TN2, C T S2, C} TN3, C TS3, C TS4, and simultaneously output from the C _TN4 a signal to the horizontal output line, and the vertical direction of the signal S1 after the subtraction process by the subtraction amplifier A ₁ to A ₄ S3 And are added by an adder. A ₁₁ + a for odd fields
_{21, a 12 + a 22,} ... signal is obtained _{of, a 21 + a 31, a} 22 + a 32, ... signal is obtained at the even field. As described above, the addition on the horizontal output line or the addition on the temporary storage capacity is possible as described above.

The above-described addition of pixel signals in the horizontal direction or addition of pixel signals in the vertical direction or the oblique direction is equivalent to reading out a low number of pixels. When driven, a high-quality image with low power consumption and low moire can be obtained.

FIG. 10 shows a schematic diagram of the system. As shown in the figure, the image light incident through the optical system 71 and the stop 80 forms an image on the CMOS sensor 72. The optical information is converted into an electric signal by the pixel array arranged on the CMOS sensor 72. The electric signal is subjected to signal conversion processing by a signal processing circuit 73 by a predetermined method and output. The signal processed signal is recorded,
The information is recorded or transferred by the information recording device by the communication system 74. The recorded or transferred signal is reproduced by the reproduction system 77. Aperture 80, CMOS sensor 7
2. The signal processing circuit 73 is controlled by a timing control circuit 75, and the optical system 71, the timing control circuit 75, the recording / communication system 74, and the reproduction system 77 are controlled by a system control circuit 76.

The horizontal and vertical drive pulses are different between the above-described high pixel readout (all pixel readout) and low pixel readout (additional readout). Therefore, it is necessary to change the drive timing of the sensor, the resolution processing of the signal processing circuit, and the number of recording pixels of the recording system for each reading mode. These controls are performed by the system control circuit 76 in accordance with each read mode.
In addition, in the reading mode, the sensitivity differs depending on the addition. For example, the signal amount is doubled in addition reading in comparison with high pixel reading. In this state, the dynamic range is halved, so that an appropriate signal is obtained by controlling the aperture 80 to be a half aperture. As a result, at low illuminance, photographing can be performed up to half the brightness.

Next, a specific configuration of a unit cell that can be suitably used in the image pickup apparatus of the present invention will be described.

In the arrangement shown in FIG. 18, since the arrangement of the photoelectric conversion units 173 does not have the same pitch (a ₁ ≠ a ₂ ), the intervals between the regions (light receiving units) in each pixel that are related to light are equal. Instead, the following problem arises. That is, the non-equidistant arrangement of the same color partially causes the spatial frequency and the resolution to be unequal, thereby causing a decrease in resolution and defects such as moire fringes. In addition, the occurrence of moiré fringes is a very serious problem, and such an imaging device cannot be practically used as a product. This is also true when the number of pixels constituting the unit cell is other than four.

The present inventors have found that even in a CMOS sensor having amplifying means dispersed in a plurality of pixels, by keeping the pitch of the photoelectric conversion portions constant, the intervals between the respective light receiving portions become equal, and the resolution is reduced. We have found an imaging device that can prevent the occurrence of moiré fringes, improve the aperture ratio, and obtain good performance. Such an imaging device can be suitably used in the present invention.

FIG. 11 shows a case where the pixels in two rows and two columns are the common amplifier unit 1.
FIG. 3 is a diagram showing an example of sharing No. 2; In FIG. 11, the shared common amplifier unit 12 is arranged at the center of four pixels, and the four photoelectric conversion units (a ₁₁ , a ₁₂ , a ₂₁ , a ₂₂ ) are arranged so as to surround the common amplifier unit 12. ing. Here, the amplifying means MSF and the reset means MSE of FIG.
L, the transfer means MTX1 to MTX4 in addition to the selection means MSEL.

Further, the light shielding portion 15 exists at a position symmetrical with the center of each pixel occupied by the common amplifier portion 12. Therefore, the center of gravity of the photoelectric conversion unit 11 in each pixel exists at the center of each pixel. Whereby said four photoelectric conversion unit (a ₁₁ ~a ₂₂₎ is longitudinally and can be placed at equal intervals a laterally.

In FIG. 12, the common amplifier unit 2 is shared.
2 is arranged at the center of the four pixels in the horizontal direction, and the four photoelectric conversion units 21 (a ₁₁ , a ₁₂ , a ₂₁ , a ₂₂ ) are arranged so as to sandwich the common amplifier unit 22.

Further, the light shielding portion 25 exists at a position symmetrical with the center of each pixel occupied by the common amplifier portion 22. Therefore, the center of gravity of the photoelectric conversion unit 21 in each pixel exists at the center of each pixel. Thus four photoelectric conversion unit (a ₁₁ ~a ₂₂₎ is longitudinally and can be placed at equal intervals a laterally.

The above-described embodiment shown in FIG. 12 is exactly the same even if the horizontal and vertical directions are exchanged.

FIG. 13 shows a specific pattern layout of the first configuration example of the pixel array section of the CMOS sensor.

The CMOS sensor shown in FIG. 13 is formed on a single crystal substrate according to a layout rule of 0.4 μm, the size of a pixel is 8 μm square, and a source follower amplifier serving as amplifying means is a 4 × 4 matrix. Shared by pixel. Therefore, the repetition unit cell 8 shown by the dotted line area in FIG.
The size of 1 is 16 μm × 16 μm square, and a two-dimensional array is formed.

The photodiodes 82a, which are photoelectric conversion units,
Reference numerals 82b, 82c, and 82d are formed obliquely at the center of each pixel, and their shapes are substantially rotationally symmetric and mirror image symmetrical in up, down, left, and right directions. Further, these photodiodes 82a, 82
The centers of gravity g of b, 82c and 82d are designed to be the same for each pixel. Reference numeral 95 denotes a light shielding unit.

Reference numeral 88-a denotes a scanning line for controlling the upper left transfer gate 83-a, 90 denotes a row selection line, and 92 denotes a MOS gate 9.
3 is a reset line for controlling the reset line 3.

The signal charges accumulated in the photodiodes 82a to 82d pass through the transfer gates 83a to 83d, and pass through the FDs.
It is led to 85. The MOS size of the gates 83a to 83d is L = 0.4 μm, W = 1.0 μm (L is a channel length,
W indicates the channel width. ).

The FD 85 is connected to the input gate 86 of the source follower by an Al wiring having a width of 0.4 μm.
The signal charge transferred to the FD 85 modulates the voltage of the input gate 86. The size of the MOS of the input gate 86 is L =
0.8 μm, W = 1.0 μm, and the sum of the capacitances of the FD 85 and the input gate 86 is about 5 fF. Q = because it is CV, input by the accumulation of 10 ⁵ electrons gates 86
Will change by 3.2V.

The current flowing from the _VDD terminal 91 is modulated by the input gate 86 and flows out to the vertical signal line 87.
The current flowing out to the vertical signal line 87 is subjected to signal processing by a signal processing circuit (not shown), and finally becomes image information.

Thereafter, the photodiodes 82a to 82d,
FD85, the potential of input gate 86 to the V _DD predetermined value, MOS gate 9 is connected to a reset line 92
By opening 3 (the transfer gates 83a to 83d are also opened at this time), the photodiodes 82a to 82d, the FD 85, and the input gate 86 are short-circuited to the _VDD terminal.

Thereafter, by closing the transfer gates 83a to 83d, the charge accumulation of the photodiodes 82a to 82d starts again.

It should be noted that all of the wirings 88a to 88d, 90, and 92 penetrating in the horizontal direction are formed of a transparent conductor of 1500 mm thick ITO (Indium Tin Oxide). Since light passes through the photodiodes 82a to 82d in the wiring portion, the center of gravity g of the photodiode coincides with the center of gravity of the light sensing area (light receiving portion).

According to this configuration example, it is possible to provide a CMOS sensor having a relatively high area ratio and high aperture ratio having the same pixel pitch.

FIG. 1 shows a specific pattern layout of the second example of the configuration of the pixel array section of the CMOS sensor of the present invention.
It is shown in FIG.

In FIG. 14, reference numerals 102a to 102d denote photodiodes, 103a to 103d denote transfer gates,
5 is the FD, 106 is the input gate of the source follower, 10
7 is a vertical signal line, 108a to 108d are scanning lines, 110
Is a row selection line, and 112 is a reset line for controlling the MOS gate 113.

In this configuration example, the wiring 1 running in the horizontal direction
Since 08a to 108d, 110, and 112 run three by three across the center of each pixel, even if the wiring is a metal wiring that blocks light incident on the photodiodes 102a to 102d, the light sensing area No shift of the center of gravity g occurs, and thus coincides with the center of the pixel.

According to this configuration example, since a normal (opaque) metal having a small electric resistance can be used, the time constant of the horizontal wiring can be improved, and a higher-speed imaging device can be provided.

In the above configuration example, since the portion below the light-shielding film is effectively used, a photodiode as a photoelectric conversion unit is formed up to the portion below the light-shielding film as shown in FIG. It is also possible to function as.

In the above-described second configuration example, since the light crosses the center of the pixel having the highest light collection efficiency, there is a concern that the sensitivity of the image pickup apparatus may be reduced. FIG. 16 shows a third configuration example further improved.

In this configuration example, the transfer gates 123a to 123a
123d, FD125, source follower input gate 1
26, a wiring in which all the reset MOS gates 133 run in the horizontal direction (scanning lines 128a to 128d, row selection line 13
0, the reset line 132), the photodiodes 122a to 122d and the openings thereof can be maximized. In addition, the opening exists continuously at the center of each pixel. The light-shielding portions are formed in horizontal and vertical wiring portions.

In this configuration example, since the source follower and the reset MOS transistor, which are the amplifying means, are divided and arranged in the horizontal direction around each pixel, they can be compactly arranged below the horizontal wiring. ing.

Further, since an unused space still exists under the wiring of the upper right pixel, for example, a smart sensor or the like
It is also possible to add new configurations.

According to this configuration example, since the area and the aperture ratio of the photodiode can be increased, an imaging device having a wide dynamic range and high sensitivity can be provided.
Further, in the future, even if the size of the opening portion of the photodiode becomes about the wavelength of light, there is little possibility that light will not enter even if the size of the opening portion of the photodiode becomes about the wavelength of light, and the performance can be exhibited for a long time.

In the above configuration example, the amplifying means is arranged at the center of the unit cell, and the center of gravity of the light sensing area coincides with the center of the pixel. However, the present invention is not limited to this.
A configuration in which the openings are translationally symmetric as shown in FIG. 17 may be used.

That is, since the openings are translationally symmetric, the light sensing areas have the same pitch.

[0078]

As described above, according to the present invention,
In addition to a high aperture ratio due to the arrangement of a plurality of photoelectric conversion units in the common amplifier, high image quality can be obtained even when interlaced driving is performed. In addition, in driving with a low number of pixels, low power consumption, and a beautiful image with low moire in a recorded or displayed pixel image can be obtained.

[Brief description of the drawings]

FIG. 1 is a schematic diagram showing a configuration of a part of an imaging device of the present invention.

FIG. 2 is a diagram illustrating a configuration of a unit cell S of the imaging device in FIG. 1;

FIG. 3 is a diagram showing a timing chart of a vertical shift register during interlaced scanning.

FIG. 4 is a diagram showing each unit cell of the imaging device.

FIG. 5 is a diagram showing a unit cell provided with a color filter when Gs are arranged in a checkered pattern.

FIG. 6 is a color signal reading timing chart when color filters are sequentially arranged in a G checkerboard and R and B lines.

FIG. 7 is a circuit configuration diagram of a signal reading circuit that performs addition processing of the same color signal.

FIG. 8 is a timing chart of an embodiment when color separation is not performed by a single sensor.

FIG. 9 is a configuration diagram of a readout circuit that adds pixel signals in the vertical direction.

FIG. 10 is a schematic diagram of a system according to the present invention.

FIG. 11 is a diagram showing a layout of a unit cell of the present invention.

FIG. 12 is a diagram showing a layout of a unit cell according to the present invention.

FIG. 13 is a pattern layout diagram of one configuration example of the present invention.

FIG. 14 is a pattern layout diagram of one configuration example of the present invention.

FIG. 15 is a diagram illustrating a configuration example of the present invention.

FIG. 16 is a pattern layout diagram of one configuration example of the present invention.

FIG. 17 is a diagram illustrating a configuration example of the present invention.

FIG. 18 is a layout diagram of a unit cell of an example of an imaging device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Photoelectric conversion part 12 Common amplifier part 15 Light shielding part 21 Photoelectric conversion part 22 Common amplifier part 25 Light shielding part

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4M118 AA01 AA05 AA10 AB01 BA14 CA03 CA17 CA19 DB01 DB03 DD04 DD09 DD12 FA06 FA42 GC08 GC14 5C024 AA01 CA00 CA02 DA01 FA01 FA11 GA01 GA11 GA31 GA33 GA48 HA17 JA11 5C065 AA01 BB13 CC01GG

Claims (15)

[Claims] 1. An imaging apparatus in which unit cells each including a plurality of photoelectric conversion units and a common amplifier to which signals from the plurality of photoelectric conversion units are arranged are arranged in a plurality of columns. Means for adding signals from a plurality of photoelectric conversion units arranged in a horizontal direction, and means for adding signals from a plurality of photoelectric conversion units arranged in a vertical or oblique direction using horizontal transfer means, An imaging device, comprising: 2. The imaging device according to claim 1, wherein
An imaging device, wherein a signal from a photoelectric conversion unit in a row is read out by interlaced scanning. 3. An imaging device in which a plurality of unit cells each including a plurality of photoelectric conversion units and a common amplifier to which signals from the plurality of photoelectric conversion units are arranged are arranged in a plurality of columns. An image pickup apparatus characterized in that the color signals are output, and signals of the same color among the plurality of color signals are added by a horizontal transfer unit. 4. The imaging device according to claim 3, wherein
An imaging device, wherein a signal from a photoelectric conversion unit in a row is read out by interlaced scanning. 5. The imaging device according to claim 3, wherein a color filter is arranged in a pixel including the photoelectric conversion unit. 6. The imaging device according to claim 1, wherein the common amplifier is configured to amplify a signal from a plurality of photoelectric conversion units in the unit cell, and to amplify the signal from the plurality of photoelectric conversion units in the unit cell. An image pickup apparatus comprising reset means for resetting an image. 7. The image pickup device according to claim 1, wherein an image signal accumulating unit that accumulates an image signal from a common amplifier in the unit cell, and a variation in characteristics of the common amplifier. A variation signal accumulating unit that accumulates a variation signal of the characteristic of the common amplifier for correcting the difference, and a difference unit that differentiates a signal from the variation signal accumulation unit from a signal from the image signal accumulation unit. Characteristic imaging device. 8. The imaging device according to claim 1, wherein: a first storage unit that stores a first signal from the common amplifier in the unit cell; and the common amplifier. A second storage means for storing a second signal from the first storage means; and a difference means for differentiating a signal from the second storage means from a signal from the first storage means. apparatus. 9. The imaging device according to claim 8, wherein the first signal is an image signal, and the second signal is a noise signal. 10. The imaging device according to claim 1, wherein at least a pitch between the photoelectric conversion units is adjusted to be equal in at least one direction in a vertical direction or a horizontal direction. An imaging device comprising means. 11. An imaging apparatus according to claim 10, wherein said adjusting means is a light shielding film. 12. The imaging device according to claim 1, wherein the common amplifier is arranged at a center of a unit cell. 13. The imaging device according to claim 11, wherein the light shielding film is arranged between adjacent unit cells. 14. The imaging device according to claim 13, wherein the light-shielding film is arranged at least at a position which is line-symmetric with respect to a horizontal or vertical center line of the unit cell. . 15. The imaging device according to claim 1, a lens that forms an image on the imaging device, and a signal processing circuit that processes an output signal from the imaging device. An imaging system comprising: