IL85518A0 - Computer with expansion slots for cards and card therefor - Google Patents

Computer with expansion slots for cards and card therefor

Info

Publication number
IL85518A0
IL85518A0 IL85518A IL8551888A IL85518A0 IL 85518 A0 IL85518 A0 IL 85518A0 IL 85518 A IL85518 A IL 85518A IL 8551888 A IL8551888 A IL 8551888A IL 85518 A0 IL85518 A0 IL 85518A0
Authority
IL
Israel
Prior art keywords
cards
computer
expansion slots
card therefor
therefor
Prior art date
Application number
IL85518A
Original Assignee
Apple Computer
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/025,500 external-priority patent/US4905182A/en
Priority claimed from US07/025,499 external-priority patent/US4931923A/en
Application filed by Apple Computer filed Critical Apple Computer
Publication of IL85518A0 publication Critical patent/IL85518A0/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
    • G06F13/4217—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with synchronous protocol
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0653—Configuration or reconfiguration with centralised address assignment
    • G06F12/0661—Configuration or reconfiguration with centralised address assignment and decentralised selection
IL85518A 1987-03-13 1988-02-23 Computer with expansion slots for cards and card therefor IL85518A0 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/025,500 US4905182A (en) 1987-03-13 1987-03-13 Self-configuring memory management system with on card circuitry for non-contentious allocation of reserved memory space among expansion cards
US07/025,499 US4931923A (en) 1987-03-13 1987-03-13 Computer system for automatically reconfigurating memory space to avoid overlaps of memory reserved for expansion slots

Publications (1)

Publication Number Publication Date
IL85518A0 true IL85518A0 (en) 1988-08-31

Family

ID=26699830

Family Applications (1)

Application Number Title Priority Date Filing Date
IL85518A IL85518A0 (en) 1987-03-13 1988-02-23 Computer with expansion slots for cards and card therefor

Country Status (7)

Country Link
JP (1) JPS63314657A (en)
KR (1) KR950014182B1 (en)
CN (1) CN1017007B (en)
AU (2) AU616171B2 (en)
DE (1) DE3808193A1 (en)
FR (1) FR2612314B1 (en)
IL (1) IL85518A0 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2203869B (en) * 1987-04-17 1991-10-23 Apple Computer Computer resource configuration method and apparatus
CN101321250B (en) * 2008-07-03 2010-06-02 四川长虹电器股份有限公司 Television set important data storage method
US10146253B2 (en) * 2016-03-10 2018-12-04 Epro Gmbh Combined slot and backplane identification

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3675083A (en) * 1970-09-14 1972-07-04 Digital Equipment Corp Universal bus arrangement for data processing systems
GB2060961A (en) * 1979-10-10 1981-05-07 Magnuson Computer Systems Inc Data processing system having memory modules with distributed address information
US4373181A (en) * 1980-07-30 1983-02-08 Chisholm Douglas R Dynamic device address assignment mechanism for a data processing system
GB2101370A (en) * 1981-06-26 1983-01-12 Philips Electronic Associated Digital data apparatus with memory interrogation
GB2103397A (en) * 1981-07-31 1983-02-16 Philips Electronic Associated Digital data aparatus with memory selection
US5067071A (en) * 1985-02-27 1991-11-19 Encore Computer Corporation Multiprocessor computer system employing a plurality of tightly coupled processors with interrupt vector bus

Also Published As

Publication number Publication date
KR950014182B1 (en) 1995-11-22
AU640850B2 (en) 1993-09-02
AU1035492A (en) 1992-03-12
CN88101358A (en) 1988-09-21
AU1276988A (en) 1988-09-15
AU616171B2 (en) 1991-10-24
JPS63314657A (en) 1988-12-22
FR2612314A1 (en) 1988-09-16
DE3808193A1 (en) 1988-09-22
FR2612314B1 (en) 1991-11-22
KR880011668A (en) 1988-10-29
CN1017007B (en) 1992-06-10

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