GB8616467D0 - Multi-microprocessor system - Google Patents

Multi-microprocessor system

Info

Publication number
GB8616467D0
GB8616467D0 GB868616467A GB8616467A GB8616467D0 GB 8616467 D0 GB8616467 D0 GB 8616467D0 GB 868616467 A GB868616467 A GB 868616467A GB 8616467 A GB8616467 A GB 8616467A GB 8616467 D0 GB8616467 D0 GB 8616467D0
Authority
GB
United Kingdom
Prior art keywords
microprocessor system
microprocessor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB868616467A
Other versions
GB2195038A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jayaram N D
Original Assignee
Jayaram N D
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jayaram N D filed Critical Jayaram N D
Priority to GB08616467A priority Critical patent/GB2195038A/en
Publication of GB8616467D0 publication Critical patent/GB8616467D0/en
Publication of GB2195038A publication Critical patent/GB2195038A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/544—Buffers; Shared memory; Pipes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Multi Processors (AREA)
GB08616467A 1986-07-05 1986-07-05 A multi-microprocessor system with confederate processors Withdrawn GB2195038A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB08616467A GB2195038A (en) 1986-07-05 1986-07-05 A multi-microprocessor system with confederate processors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB08616467A GB2195038A (en) 1986-07-05 1986-07-05 A multi-microprocessor system with confederate processors

Publications (2)

Publication Number Publication Date
GB8616467D0 true GB8616467D0 (en) 1986-08-13
GB2195038A GB2195038A (en) 1988-03-23

Family

ID=10600654

Family Applications (1)

Application Number Title Priority Date Filing Date
GB08616467A Withdrawn GB2195038A (en) 1986-07-05 1986-07-05 A multi-microprocessor system with confederate processors

Country Status (1)

Country Link
GB (1) GB2195038A (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5276806A (en) * 1988-09-19 1994-01-04 Princeton University Oblivious memory computer networking
JP2584113B2 (en) * 1989-07-21 1997-02-19 松下電器産業株式会社 Data transfer method and data transfer device
EP0476962B1 (en) * 1990-09-18 1998-08-12 Fujitsu Limited System for configuring a shared storage
DE4131227A1 (en) * 1990-09-21 1992-04-02 Sundstrand Data Control Bus access control in multiprocessor system - has unit that handles requests and determines distribution and order of handling
US6070189A (en) * 1997-08-26 2000-05-30 International Business Machines Corporation Signaling communication events in a computer network
US6874039B2 (en) 2000-09-08 2005-03-29 Intel Corporation Method and apparatus for distributed direct memory access for systems on chip
US20020178313A1 (en) * 2001-03-30 2002-11-28 Gary Scott Paul Using software interrupts to manage communication between data processors
DE102005009795A1 (en) * 2005-03-03 2006-09-14 Wago Verwaltungsgesellschaft Mbh Microprocessor system for machine control in safety certifiable applications
EP2418552B1 (en) 2010-07-28 2016-11-16 Thales Device with power electronics control circuits
CN111930676B (en) * 2020-09-17 2020-12-29 湖北芯擎科技有限公司 Method, device, system and storage medium for communication among multiple processors

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3112693A1 (en) * 1981-03-31 1982-10-14 Stollmann & Co, 2000 Hamburg MODULAR DECENTRALIZED DATA PROCESSING SYSTEM
US4870704A (en) * 1984-10-31 1989-09-26 Flexible Computer Corporation Multicomputer digital processing system

Also Published As

Publication number Publication date
GB2195038A (en) 1988-03-23

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)