GB673759A - Improvements in calculating apparatus - Google Patents

Improvements in calculating apparatus

Info

Publication number
GB673759A
GB673759A GB18102/49A GB1810249A GB673759A GB 673759 A GB673759 A GB 673759A GB 18102/49 A GB18102/49 A GB 18102/49A GB 1810249 A GB1810249 A GB 1810249A GB 673759 A GB673759 A GB 673759A
Authority
GB
United Kingdom
Prior art keywords
trigger
pulses
accumulator
programme
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB18102/49A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
British Tabulating Machine Co Ltd
Original Assignee
British Tabulating Machine Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by British Tabulating Machine Co Ltd filed Critical British Tabulating Machine Co Ltd
Publication of GB673759A publication Critical patent/GB673759A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491Computations with decimal numbers radix 12 or 20.
    • G06F7/498Computations with decimal numbers radix 12 or 20. using counter-type accumulators
    • G06F7/4983Multiplying; Dividing
    • G06F7/4985Multiplying; Dividing by successive additions or subtractions

Abstract

673,759. Statistical apparatus. BRITISH TABULATING MACHINE CO., Ltd. July 8, 1949 [July 9, 1948], No. 18102/49. Class 106 (i). A calculating apparatus comprises a data recording device combined with an electronic calculator and has cyclically-operable electronic primary timing means controlled by pulses derived from a multivibrator operating independently of the machine speed of the recording device, interlocking means for correlating the recording cycle and the operation of the primary timing means, an electronic programme control device comprising a plurality of trigger stages operable step-by-step. cyclically by the primary timer, and settable means for rendering only selected steps of the programme effective during a cycle of the programme control device. In the described embodiment a record card controlled calculating punch includes a card sensing station through which the perforated record cards are fed singly, factors read from the card being set up in counters or storage units. A period is allowed for in the machine cycle during which the electronic calculator operates at high speed, and the result data is then punched into the card digit row by digit row. The card is sensed again at a second position for checking purposes and is then fed to the stacker. The process of calculation is controlled by an electronic programming device operating in a step-by-step manner. It controls the sequences of arithmetical operations including the transfer of factors between different storage units and between a storage unit and the accumulators, in accordance with a prior arrangement of plug connections, and initiates sub-programmes for multiplication and division which are carried out by repeating methods. Positive numbers are set up in the accumulator in complement form while negative amounts are represented by true numbers. There are means for determining whether the value standing in the accumulator is in true or complement form; provision for automatically checking that the accumulator has been correctly zeroized before each computation is started; balance test means for determining whether two numbers are numerically equal but of opposite sign, and controlling the punch accordingly; means for column shifting values read into storage counters or into the accumulator ; provision for rounding-off &c. The primary timer forms the basis of all timing and synchronizing pulses used in the calculator. It comprises a closed ring of twenty-three electronic stages which runs continuously as long as a calculation is in progress, being automatically reset to home position by a signal received upon completion of the programme or at the limit of the calculation time. The first four stages of the primary timer are shown in Fig. 1a. The triggers T700, which are of the Eccles- Jordan type, are regarded as " On " when the L.H. side of the double triode is conducting, and " Off " when the R.H. side is conducting. The opening of cam contacts C25, Fig. 10c (not shown), restores the timer by removing a - 100 v. bias from the pins 4 of all but the first of triggers T - 700, thus turning them " Off." In the case of the first trigger the bias is removed from its pin 5 so that this trigger is set to " On ", and the high potential on the R.H. anode of the valve is communicated to the L.H. grid of an associated ring drive inverter I - 951. After this resetting operation the calculation is started by the operation of another contact controlling cam (C46, not shown) which serves as an interlock between the mechanical functions of the punch and the electronic functions of the calculator. This causes a series of so-called "A" pulses, derived from a square-wave generator, to be applied to the pins 5 of all the inverters I - 951. The first of these pulses, superimposed on the conditioning voltage existing on the L.H. grid of the first inverter, causes that side of the inverter to conduct, and the resulting negative pulse in its anode circuit flips on the second trigger T700. The consequent rise in voltage on the R.H. anode of this trigger conditions the grid of the second inverter to pass the second "A" pulse, while the negative pulse from its L.H. anode is applied to pin 6 of the first trigger and turns it " Off," whereby the conditioning voltage is removed from the grid of the first, inverter. Thus the primary timer is stepped on by the " A " pulses, each trigger being flipped successively. The multivibrator I401, Fig. 1m (not shown), from which the " A " pulses and intermediate " B " pulses (see Fig. 12a, not shown) are derived, normally operates at high speed, but the rate may be varied under the control of a rotary switch which, in effect, alters the component values in the multivibrator circuit, so that, for testing purposes, frequencies down to 2 cycles/sec. can be selected, or single cycles can be used. Apart from the " A " pulses and " B " pulses, various control pulses and gate voltages are supplied by the primary timer. These include a series of nine " B " pulses (11B-19B, Fig. 14a, not shown) used for read-in to the accumulator, the general storage (GS) units and the multiplier/quotient (MPR/Q) unit, and a series of ten " A " pulses (11A- 20A) employed for read-out of digits in the factor storage (FS) units. Programme unit. Each time the primary timer goes from step 1 to step 2, a programme timing device (see Figs. 2a ... 2e, not shown), similar to the primary timer, is stepped along. Normally, there are twenty such programme steps, with pauses for sub-programmes of multiplication or division, but a further twenty steps can be used. The programme device supplies to the plugboard, Fig. 9 (not shown) a series of output voltages, one step at a time, to be used by selective plugging to determine the sequence of operations to be performed. As each step goes on, three isolated plug hubs on the plugboard drop from +150 v. to +50 v., and this reduction in voltage activates any control which may be plugged to it. If it is desired to suppress a particular step, this can be done by plugging to a " Suppress" hub which maintains +150 v. The last step of the programme timer causes the supply of pulses to the primary timer to be cut off, thus preventing further operation. On the other hand, if the signal pulse from the last step of the programme timer has not been received when an impulse from the recorder signalling the end of the calculation period occurs, then operation of the recorder and calculator is arrested, or the card concerned is offset, and an indication given of an unfinished programme. Counter units. Each order of the accumulator, the multiplier-quotient unit, factor storage and general storage counters comprises binary counters of the type shown in Fig. 3a. Triggers T150 are initially set to "Off" by removing - 150 v. bias from their pins 4. A first negative pulse arriving at pin 6 of the first trigger T150 flips it " On "; a second negative pulse flips it " Off ", and the negative pulse appearing on the R.H. anode of this valve passes to the second trigger T150, flipping it " On." A third negative pulse flips the first trigger " On " again, and a fourth flips the first trigger "Off"; this causes the second trigger to go " Off," and a negative pulse from the R.H. anode flips the third trigger " On." The fifth, sixth, and seventh pulses have the same effect as the first, second, and third, while the eighth negative pulse brings all three triggers back to the " Off " state. Where the triggers are built up to form a decimal unit a fourth stage is provided (not shown in Fig. 3a) and this will be flipped "On" as a result of the eighth pulse; after the ninth pulse the first and fourth triggers are " On " and the second and third triggers are " Off." The tenth pulse causes the first trigger to go " Off " and the negative pulse produced is applied to the second and fourth triggers; although the second trigger will tend to go " On," the fourth trigger is flipped " Off " and this action, with the aid of an additional inverter valve, is arranged to produce a negative pulse on the R.H. anode of the second trigger which counteracts the flipping on of this trigger, so that the binary-decimal unit, after the receipt of ten pulses, is brought back to its initial condition. Fig. 8 shows schematically the relationship between the various numerical units of the calculator. Two factor storage (FS) units are used to store factors read from the card. They can be used separately or combined to form a single unit of larger capacity. A sign storage is assigned to each for setting up a minus sign indication. They cannot be used as accumulators because no carry circuits are provided. The two general storage (GS) units are used to store factors before and after calculations, and are otherwise similar to the FS units. The multiplier/quotient unit is a five-position storage unit with a pluggable entry whereby a multiplier can be read in directly from the card. It has a sign storage device. Multiplication does not clear the multiplier from the unit. During division the unit is used to develop the quotient and, as it is not provided with pluggable exits, the quotient must be transferred to the accumulator or to a GS unit for punching. The pluggable shift unit provides means for shifting the output pulse from one column of a counter into a different order of another counter. In certain cases it is used to transfer factors without columnar change. Step-bystep operation of the shift unit, e.g. during multiplication, is controlled by a so-called "tertiary timer." A rounding-off or " ¢- adjust" circuit is normally connected to the units order of the accumulator but by way of the solumn shift unit may be moved to any of the first six orders of the accumulator to add in 0.5 for rounding-off. Also, it determines whether a plus or minus figure stands in the accumulator and makes the adjustment accordingly. The accumulator, wh
GB18102/49A 1948-07-09 1949-07-08 Improvements in calculating apparatus Expired GB673759A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US38078A US2658681A (en) 1948-07-09 1948-07-09 Electronic calculator

Publications (1)

Publication Number Publication Date
GB673759A true GB673759A (en) 1952-06-11

Family

ID=21897977

Family Applications (1)

Application Number Title Priority Date Filing Date
GB18102/49A Expired GB673759A (en) 1948-07-09 1949-07-08 Improvements in calculating apparatus

Country Status (7)

Country Link
US (1) US2658681A (en)
BE (1) BE490003A (en)
CH (1) CH291687A (en)
FR (1) FR1051750A (en)
GB (1) GB673759A (en)
IT (1) IT454514A (en)
NL (1) NL214607A (en)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2954926A (en) * 1953-01-13 1960-10-04 Sperry Rand Corp Electronic data processing system
GB745833A (en) * 1953-03-17 1956-03-07 Nat Res Dev Digital computing engines
BE534876A (en) * 1954-01-15
US2886239A (en) * 1954-02-16 1959-05-12 Willem Hendrik Theodorus Helmi Check symbol computer
NL198494A (en) * 1954-07-01
US2982472A (en) * 1955-05-02 1961-05-02 Harry D Huskey Binary digital computer with magnetic drum storage
US2986333A (en) * 1955-06-08 1961-05-30 Albert G Thomas Portable electronic computer
GB803734A (en) * 1955-11-16 1958-10-29 Powers Samas Account Mach Ltd Improvements in or relating to programme apparatus for electronic computing machines
US2957626A (en) * 1955-11-21 1960-10-25 Ibm High-speed electronic calculator
US3012722A (en) * 1956-08-31 1961-12-12 Minneanolis Honeywell Regulato Checking circutiry for data processing apparatus
US3037700A (en) * 1956-11-29 1962-06-05 Ibm Indexing registers for calculators
NL222794A (en) * 1956-11-29
DE1160219B (en) * 1956-12-17 1963-12-27 Kienzle Apparate Gmbh Installation on electronic calculating machines
US2965297A (en) * 1957-08-08 1960-12-20 Burroughs Corp Floating point arithmetic comparison circuit
NL229160A (en) * 1958-06-30
US3061192A (en) * 1958-08-18 1962-10-30 Sylvania Electric Prod Data processing system
US3157862A (en) * 1959-09-30 1964-11-17 Honeywell Inc Controller for a computer apparatus
US3138702A (en) * 1959-10-02 1964-06-23 Tally Register Corp Automatic sequence controlled computer
US3112394A (en) * 1959-12-15 1963-11-26 Ncr Co Electronic computing machine
NL258945A (en) * 1959-12-15 1900-01-01
US3214573A (en) * 1961-08-10 1965-10-26 Gen Time Corp Digital storage and readout device

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2056403A (en) * 1932-01-06 1936-10-06 Ibm Accumulating device
US2176933A (en) * 1933-03-30 1939-10-24 Addressograph Multigraph Calculating and accounting machine
US2209434A (en) * 1935-02-27 1940-07-30 Ibm Record controlled machine
US2224774A (en) * 1936-06-24 1940-12-10 Ibm Tabulating machine
US2328610A (en) * 1938-06-10 1943-09-07 Ibm Multiplying and dividing machine
US2404739A (en) * 1940-07-18 1946-07-23 Ncr Co Calculating machine
US2359631A (en) * 1941-04-15 1944-10-03 Ibm Dividing machine
BE469769A (en) * 1941-05-23 1900-01-01
US2404697A (en) * 1942-03-21 1946-07-23 Ncr Co Calculating device
US2442428A (en) * 1943-12-27 1948-06-01 Ncr Co Calculating device
US2516189A (en) * 1946-01-24 1950-07-25 Gen Motors Corp Precision aircraft tachometer
US2528100A (en) * 1946-05-31 1950-10-31 Bell Telephone Labor Inc Electronic calculator
NL94873C (en) * 1946-10-22
US2502360A (en) * 1947-03-14 1950-03-28 Bell Telephone Labor Inc Electronic computer

Also Published As

Publication number Publication date
NL214607A (en)
FR1051750A (en) 1954-01-19
US2658681A (en) 1953-11-10
IT454514A (en)
CH291687A (en) 1953-06-30
BE490003A (en)

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