GB2565386A

GB2565386A - Ultra-low-latency communications

Info

Publication number: GB2565386A
Application number: GB1802285.5A
Authority: GB
Inventors: John Russell Anthony; James O'Connor Ian
Original assignee: Commerzbank AG
Current assignee: Commerzbank AG
Priority date: 2017-08-11
Filing date: 2018-02-12
Publication date: 2019-02-13
Anticipated expiration: 2038-02-12
Also published as: GB2565386B; GB201712941D0; GB201802285D0

Abstract

A high frequency (HF) radio signal generator is provided for generating a signal to be transmitted on a HF radio channel by receiving data at a data rate higher than that of the channel and compressing it to a data rate lower than that of the channel in order for it to be transmitted. A HF radio signal receiver stores the sequence of received bits and decompresses the sequence in real-time. The invention enables communications over a HF, shortwave radio channel (e.g. between 3 and 30 MHz), suitable for long-distance communication across intercontinental distances, which has low bandwidth but ultra-low latency. To allow more data to be sent over the low bandwidth network, compression may be provided using lossy compression or by detecting patterns in the data and associating them with codes in a code table. Error correction schemes such as Forward Error Correction may be used and channel condition information such as signal to noise (SNR) may be fed back to the transmitter as way to deal with noise and corruption of signals by adapting the error correction schemes. Symmetric key one time pad encryption may be used to encrypt the data steam.

Description

ULTRA-LOW-LATENCY COMMUNICATIONS

BACKGROUND

[0001] Communications systems which operate over long distances such as trans oceanic distances are generally designed to be robust and have high capacity. For example, sub-sea optic fibre communications links are expensive to deploy but can provide high bandwidth, reliable communications over thousands of kilometers. Satellite communications using geostationary satellites also provide reliable communication between continents and again, are expensive to deploy. Communication over the internet or over public switched telecommunications networks is also available and the infrastructure used to achieve this communication may itself comprise optic fibre communications links as well as wired and wireless communications links between many interconnected communications network nodes.

[0002] When considering the latency of a long distance communication system, optic fibre systems are generally considered very effective since the communications are transmitted using light through glass; for example, transmission between London, UK and New York, USA may be as low as around 30 milliseconds using optic fibre communications. Satellite communication can also achieve long distance communication for relatively low latency, but not as low as optical fibre as the satellite altitude increases the communications path length. Geostationary satellites orbit at over 35,000 kilometres above the surface of the earth, so a round-trip path to a satellite directly overhead is over 70,000 kilometres long which would take a signal around 233 milliseconds. Where multiple communications nodes are present along the communications path latency is introduced, such as in the case of the public internet and public switched telecommunications networks.

[0003] The embodiments described below are not limited to implementations which solve any or all of the disadvantages of known low latency communications systems.

SUMMARY

[0004] The following presents a simplified summary of the disclosure in order to provide a basic understanding to the reader. This summary is not intended to identify key features or essential features of the claimed subject matter nor is it intended to be used to limit the scope of the claimed subject matter. Its sole purpose is to present a selection of concepts disclosed herein in a simplified form as a prelude to the more detailed description that is presented later.

[0005] A high frequency radio signal generator is described for generating a signal to be transmitted on a high frequency radio channel. The signal generator has a memory configured to receive data from at least one data stream at a first data rate above a data rate of the high frequency radio channel. The signal generator has a compressor configured to compress the received data to generate compressed data, and a processor configured to compute a signal from the compressed data such that a data rate of the computed signal is at or lower than a data rate of the high frequency radio channel. The signal generator is configured to send the signal to a high frequency radio transmitter for transmission to a receiving entity.

[0006] A high frequency radio signal receiver is described which has a memory storing a sequence of bits of a received signal, received on a high frequency radio channel from a sending entity; and a processor configured to decompress the sequence of bits in real time.

[0007] Many of the attendant features will be more readily appreciated as the same becomes better understood by reference to the following detailed description considered in connection with the accompanying drawings.

DESCRIPTION OF THE DRAWINGS

[0008] The present description will be better understood from the following detailed description read in light of the accompanying drawings, wherein: FIG. 1A is a schematic diagram of an ultra-low-latency communication system; FIG. IB is a schematic diagram of another example of an ultra-low-latency communication system; FIG. 2 is a schematic diagram of a signal generator and an interpreter such as those of FIG. 1A in more detail; FIG. 3 is a flow diagram of an example process at a signal generator such as that of FIG. 2; FIG. 4 is a flow diagram of an example forward error-correction process at a signal generator such as that of FIG. 2; FIG. 5A is a flow diagram of a method of encryption at a signal generator; FIG. 5B is a flow diagram of a method of decryption; FIG. 6 is a flow diagram of a process at a signal interpreter; FIG. 7 is a schematic diagram of a signal generator and a signal interpreter.

Like reference numerals are used to designate like parts in the accompanying drawings.

DETAILED DESCRIPTION

[0009] The detailed description provided below in connection with the appended drawings is intended as a description of the present examples and is not intended to represent the only forms in which the present example are constructed or utilized. The description sets forth the functions of the example and the sequence of operations for constructing and operating the example. However, the same or equivalent functions and sequences may be accomplished by different examples.

[0010] Low latency communications systems operating between two locations on earth which are over thousands of kilometers apart typically use optic fibre communications links or satellite communications links. Optic fibre communications theoretically travel at the speed of light in glass which is around two thirds of the speed of light in a vacuum. Satellite communications theoretically travel at the speed of light in a vacuum but the path length for satellite communications is much longer than for a path travelling only within the earth’s atmosphere. The present technology recognizes that an alternative type of communication, using high frequency radio channels, is possible which when deployed as described herein achieves lower latency communication than satellite or optic fibre communication between end users in different continents. High frequency radio waves reflect or refract off the ionosphere and so are able to travel extremely long distances such as trans-oceanic distances, or distances of thousands of kilometers. The high frequency radio path length between two locations on earth is many magnitudes shorter than the satellite communications path length between the same two locations. However, prejudice exists against use of high frequency radio communications for practical high bandwidth communications and innovation lies in overcoming this prejudice.

[0011] Another factor which influences communications latency is the number of hops present in the communications path. In the case of optic fibre communications, there is typically more than one hop on the communications path between the source and destination in two different continents, because of the need to boost power of the optical signal and/or connect several optic fibre communications links by switches or routers. As a result of the multiple hops latency is introduced as compared with a high frequency radio communications link using a single hop. A single hop means that a transmit node sends a communication to a receive node without any intervening communications nodes being traversed.

[001 2] High frequency radio communication is known to be very low capacity and therefore is thought to be unsuited for high bandwidth communication. Since the wavelength of high frequency radio is decameters long, the amount of data which can be communicated via a high frequency radio channel is low as compared with other parts of the electromagnet spectrum with shorter wavelengths. In an example, the data rate on a high frequency radio channel is around 20 kilo bits per second. In comparison, the data rate on a satellite communication link is multiple mega bits per second per channel and for an optic fibre communications link may be around multiple giga bits per second.

[001 3] High frequency radio communication is typically used for maritime communication with low bandwidth signals between ships at sea, or for low bandwidth signals between airport control stations and aircraft. The present technology provides a way to use high frequency radio communication in conjunction with high bandwidth data sources. As a result, data from high bandwidth sources is transmitted with ultra-low-latency over thousands of kilometers. The term “ultra-low-latency” is used to refer to latencies below those achieved via satellite or optic fibre communication, such as at or below 30 milliseconds for distances of about 5,500 kilometres.

[0014] Many existing technologies for encryption and for dealing with problems of corruption and dropping of data over a communications channel are found to be ill-suited for achieving low latency communications. Thus in some examples, the present technology provides a low latency way to deal with noise and corruption of signals sent over high frequency radio channels. In some examples, the present technology provides a low latency way to encrypt and/or decrypt signals sent over high frequency radio channels.

[001 5] FIG. 1A is a schematic diagram of an ultra-low-latency communication system used with a high bandwidth data source which is illustrated as the observed system 200 in FIG. 1A. The observed system is any apparatus, manufacturing equipment, weather system, environment, human body, or other system which changes over time and where sensors and/or monitoring equipment produces observed data 108 describing conditions and/or events of the observed system 200. The observed data 108 is a relatively high bandwidth stream of data comprising numerical values, strings, categorical values or other forms of data. High bandwidth in this context means that a rate of data of the stream of observed data 108 is higher than a maximum data rate of a high frequency radio channel, such as over around 20 kilobits per second.

[0016] The observed data 108 is processed by an ultra-low-latency signal generator 100 which uses a lossy compression to compress the stream of observed data 108 in real time and sends the compressed signal with low-latency to a high frequency radio transmitter 104. The compressed data is transmitted on a high frequency radio channel 101 which comprises a single hop in some instances, to cover a long distance, such as thousands of kilometers or a trans-oceanic distance. Note that it is not essential to use a single hop.

[0017] A receiver 106 receives the high frequency radio signal and an ultra-low- latency signal interpreter 102 decompresses the signal. In some cases the quality of the decompressed signal is assessed by the signal interpreter 102 and feedback 103 is sent to the signal generator 100 so that the signal generator is able to modify how the signal generated. The feedback 103 is sent using satellite communications, a public switched telephone network, a wireless communications network, the internet or other communications network. Where costs permit, the feedback is sent using a high frequency radio channel.

[0018] The signal interpreter 102 uses the decompressed signal to generate instructions 212 which are sent to a controller 213 which is computer implemented and automatically controls a target system 214. The target system is any manufacturing equipment, medical equipment, or other computer controlled apparatus.

[0019] By using the signal generator 100 to compress the high bandwidth observed data 108 it is possible to use low bandwidth, high frequency radio as a communications medium and achieve ultra-low-latency communications. As mentioned above, high frequency radio signals are able to travel thousands of kilometers through air with higher speeds than signals travelling through glass, and using shorter path lengths than for satellite communications.

[0020] If the compression fails and the amount of data sent to the transmitter is too high the transmitter may malfunction or break down. If the compression fails and useful data is lost from the observed data 108 the ability to control the target system 214 is reduced. Thus the compression process is beneficially dynamically adjusted using feedback 103.

[0021] In the example of FIG. 1A a one-way communications link is shown for clarity. The deployment of FIG. 1A is repeated in some examples, such as to make a pair of communications links, one in each direction between the two geographical locations. This also applies for FIG. IB and FIG. 2.

[0022] In the example of FIG. 1A the transmitted signal is not encrypted so that eavesdroppers are able to obtain the transmitted data. In order to encrypt the signal various well known public-key encryption schemes are available and generally public-key encryption schemes are widely used. However, it is recognized herein that typically, public-key encryption schemes introduce significant latency because the encryption process involves complex computation of the signal at the encryption and decryption stages. Symmetric key encryption schemes are also known such as where a secret onetime pad is available at both the sender and receiver. A one-time pad is a list of one-time random secret numbers, where each number is the same size as, or longer than, the message being sent. To encrypt a message using the one-time pad, the message is combined with a random secret number from the one-time pad using modular addition or an exclusive OR operation which is efficient to compute. To decrypt the message the receiver knows the random secret number as it has the one-time pad, and so the receiver is able to reverse the modular addition or exclusive OR operation to obtain the message. [0023] In various examples of the present technology a one-time pad scheme is used to encrypt the message sent over the high frequency radio channel and to decrypt the received message. However, to give a practical working implementation of a one-time pad scheme in the deployment of FIG. 1A various factors are considered. The the signal generator is designed so that messages sent by the transmitter 104 are limited in size so that the keys of the one-time pad are longer than an individual message and the one-time pad scheme is workable. Also, to use a one-time pad scheme the one-time pad is to be shared by the signal generator 100 and the signal interpreter 102 in a secret manner. The one-time pad is to comprise random secret keys, otherwise a malicious observer is able to observe statistical patterns in the data sent over the high frequency radio channel and infer information about the data being sent, or to crack the encryption scheme. The signal generator and the signal interpreter synchronize with one another in order to be sure they are using the same current one-time key from the one-time pad.

[0024] In an example described with reference to FIG. IB, FIG. 5A and FIG. 5B the signal generator 100 and the signal interpreter 102 have local copies of the same process for generating the one-time pad. A bit string key used by the process for generating the one-time pad is secret and shared by both the signal generator and the signal interpreter. This gives a way of generating the one-time pad which is the same at both the signal generator 100 and signal interpreter 102 without having to send the onetime pad between the signal generator and signal interpreter which would introduce latency. The process for generating the one-time pad is relatively complex and takes time since a high quality process is used to be as random as possible. To avoid introduction of latency the entries of the one-time pad are computed in advance and buffered. If a poor quality process for generating the one-time pad is used a malicious observer is able to observe statistical patterns in the signal and potentially crack the encryption. To give synchronization between the one-time pad generation process at the signal generator 100 and signal interpreter 102, time stamps on messages between the signal generator 100 and signal interpreter 102 could be used but this introduces unwanted latency of adding the time stamps and introduces bandwidth requirements. A global positioning system (GPS) clock at the signal generator 100 and a GPS clock at the signal interpreter are used to extremely accurately synchronize the one-time pad generation process at the signal generator 100 and signal interpreter 102 so that the current one-time pad is known accurately.

[0025] In another example, the signal generator 100 and the signal interpreter 102 use another process for computing the one-time pad. For example, the process is to compute digits of a transcendental number such as Pi and use those as the one-time pad. GPS clocks are again used to synchronize so the current one-time pad is known accurately. Since the process to compute the digits of Pi is relatively complex these are computed in advance and buffered. Using digits of Pi gives reasonable encryption security levels although some malicious observers may seek to crack the encryption if they guess that such a method is being used.

[0026] In another example, the signal generator 100 and the signal interpreter 102 have a secret shared one-time pad which is a list of random numbers that is sent in advance from the signal generator 100 to the signal interpreter using encryption. Because the one-time pad is sent in advance, latency is not an issue. However, the one-time pad is sent over a relatively high bandwidth channel and is sent in a secure manner. The storage requirements at the signal generator and signal interpreter need to accommodate the onetime pad in a secure manner, since this is not generated when needed as in the case of the embodiment of FIG. IB or the case where digits of Pi are computed. Synchronization is achieved in any suitable manner.

[0027] In some cases the encryption method or the one-time pad is changed at intervals to make it harder for eavesdroppers to crack the encryption scheme.

[0028] FIG. IB is a schematic diagram of another high frequency radio communication system, again using a high frequency radio channel between a high frequency radio transmitter 104 and a high frequency radio receiver 106. The signal generator 100 in this example comprises a lossy compressor 110, a component for adding error detection and correction bits 116, a component for encrypting 118 and a modem 124. The signal generator 100 also stores a local copy of a code table 112, a local copy of an error correction scheme 114, a local copy of a bit-string key 122 and a local copy of a logical channel frequency map 126.

[0029] The logical channel frequency map maps between frequencies and logical channels used by the high frequency radio transmitter or receiver. Fogical channel data is also available and is separate from the logical channel frequency map. The logical channel data comprises a physical channel description associated with each logical channel and is explained in more detail later in this document.

[0030] In an example a ‘block’ scheme is used, whereby the signal generator 100 pre-defines a block of time (starting at a given timestamp, valid for a fixed period or until overridden by a new block starting at a timestamp prior to the end of that period). During the block of time various parameters apply which specify one or more of: how the one-time-pad process operates, the error detection and correction scheme, the code table which maps patterns to codes and vice-versa. At the changeover for each block, a new logical channel frequency map and changed transmission rate are introduced if necessary. At the start time for each block, the signal generator 100 starts using the values of the parameters specified in the new block; similarly, at the start time plus a known latency for the link, the signal interpreter starts using the values of the parameters specified in the new block. By using the block scheme the parameter values are controlled in a practical manner which is found to work well in practice and give particularly efficient results.

[0031] The signal interpreter 102 comprises a modem 132, a decryptor 134, a component for error detection 140, and a component for generating instructions and/or triggering actions 144. The signal interpreter 102 stores a local copy of the code table 146, a local copy of the error correction scheme 142, a local copy of the bit-string key 138 and a local copy of the logical channel frequency map.

[0032] There is a single shared source of the local copies of the codes in use table 122, 146, error detection and correction (EDC) scheme 114, 142, bit string key 122, 138, and bit-string generator 120, 136 and each of the signal generator and the signal interpreter take local copies from the shared source. A synchronization scheme is used to synchronize the local copies at the signal generator and the signal interpreter, with respect to the single shared source.

[0033] The lossy compressor 110 receives data from a data stream 108 as described above with reference to FIG. 1 A. The lossy compressor 110 is configured to compress the received data to generate compressed data. The signal generator 100 computes a signal from the compressed data such that a data rate of the computed signal is at or lower than a data rate of the high frequency radio channel and to send the signal to a high frequency radio transmitter for transmission to a receiving entity. The lossy compressor operates in real time so as to achieve ultra-low-latency in combination with the high frequency radio communications.

[0034] Various different compression methods are possible which act to remove redundant data from the data stream 108. In a particularly preferred example, the compressor 110 is configured to compress the received data by detecting instances of a plurality of possible patterns in the data, each pattern associated with a short code in a code table 112 accessible to the compressor 110, and to compute the signal from the codes according to the detected instances. By using pattern detection and encoding the various detected patterns using codes, it is possible to compress the data stream 108 in a particularly effective and accurate manner which is extremely efficient and operates in real time. In addition, this method is dynamically adjustable as now explained. In an example, each short code comprises four bits allowing up to 16 different types of pattern to be encoded. However, other codes are used in other examples and the technology is not limited to codes of length four bits.

[0035] The code table 112, stores associations between individual codes and individual patterns. For example, the codes are binary numbers of a specified length, but having said that, other forms of code may be used such as hexadecimal codes, or other types of codes. In some examples, the code table is configured such that the size and/or number of the individual codes in the code table is automatically controlled in order to control the data rate of the computed signal. There is a trade off between the number of patterns which are encodable and the length of the codes, so that more patterns are encodable when the code length is increased. The length of the codes influences the effective transmission rate. Thus reducing the number of patterns which are to be encoded reduces the length of the codes and also reduces the transmission time for a code. Feedback data 103 such as that of FIG. 1 is used to control the code table in some examples.

[0036] In various examples, the signal generator 100 receives the data from the data stream 108 in real time over a communications link where the high frequency radio signal generator 100 is physically proximate to the data stream. If there is more than one data stream the high frequency radio signal generator is physically proximate to all the data streams. Physically proximate means that the data stream is received at the compressor 110 in real time such that no significant latency is introduced.

[0037] The compressor is configured to process substantially all of the data from the data stream at a rate at or above the data rate of the data stream 108. In this way latency introduced by the process at the compressor is reduced.

[0038] In order to compute the signal from the codes, the signal generator uses blank periods in some cases, when no patterns are detected by the compressor. In this case, the signal generator 100 is configured to compute the signal as a chronological sequence of the codes, each code being sent as and when it is generated by the compressor, and with blank periods in the signal when no patterns are detected by the compressor. In this way, the signal is generated in a fast, efficient manner and in a way which indicates to a receiver situations when no patterns are detected. As the blank periods are of arbitrary length, the signal generator 100 uses prefix start of code bits and the signal interpreter 102 is configured to detect the beginning of a code in the sequence of bits by searching for a prefix start of code bit. In cases where the signal generator does not use prefix start of code bits, the signal interpreter 102 is configured to detect the beginning of a code in the sequence of bits by searching for a one. In this case, the signal comprises blank periods of arbitrary length and the codes begin with one.

[0039] In alternative examples, the signal generator computes the signal as a series of fixed-width pulses at regular intervals, each pulse comprising either a code computed by the compressor and not yet sent, or a code designated as indicating no pattern. The signal interpreter is configured to detect the beginning of a code in the sequence of bits by using a clock.

[0040] In some examples more than one compressor is used. For example, the signal generator of FIG. IB comprises a second compressor in some cases, configured to operate in parallel with the first compressor 110 to detect instances of a plurality of possible second patterns in the data, each second pattern associated with a code in the code table. The signal generator 100 is configured to deal with contention between the first and second compressors, by selecting between the first and the second compressors when contention arises. The selection is made using rules, criteria, thresholds or other factors. In this way the quality of the compression is improved without affecting the real time nature of the compression, since a plurality of compressors are able to work in parallel.

[0041] The signal generator comprises a forward error correction component 116 which is configured to add one or more parity bits to individual codes in the signal on the basis of a forward error correction scheme 114 and a specified ratio of parity bits to other bits in individual ones of the codes. Since the high frequency radio channel is noisy, use of a forward error correction scheme enables this noise to be coped with and improves the quality of the communication since forward error correction allows errors to be detected and corrected without retransmission of the code. (Retransmission of the code increases latency). High frequency radio is known to have extremely variable amounts of noise since its quality varies according to the time of day because of the position of the sun in the sky and its effect on the ionosphere, as well as because of other changes in atmospheric conditions. Various different types of error correction scheme are possible, and in a preferred example, a forward error correction scheme which enables simple and effective dynamic adjustment is used. This enables a trade-off between time taken to process the error correction scheme and the quality of the results to be controlled efficiently. In an example, the forward error correction scheme is based on a Hamming code or a Reed-Solomon code, or a Turbo code, or a low-density parity-check (FDPC) code used to add redundant parity bits to the code generated from the code table, so that errors such as bits flipped by random noise during transmission are detectable, and in some cases, correctable.

[0042] The specified forward error correction scheme 114 and the specified ratio are stored in the code table 112 or at another location, and the signal generator 100 is configured to repeatedly check for changes in the forward error correction scheme 114 and/or specified ratio. This enables any changes in the forward error correction scheme or the specified ratio to be quickly and simply discovered by the signal generator 100.

[0043] The signal generator 100 is configured to receive information about a signal to noise ratio of the signal on the high frequency radio channel (such as feedback 103), and to change the forward error correction scheme in dependence on the information about the signal to noise ratio. This enables the trade off mentioned above to be effectively and efficiently controlled. For example, a library of forward error correction schemes is accessible to the signal generator 100 and the signal interpreter 102. The signal generator 100 is configured to send information about the change in the specified ratio or the change in the forward error correction scheme to the signal interpreter, via a satellite communications link, or via any other suitable communications link. This approach is particularly useful where noise levels vary relatively slowly, such as due to an increase or decrease in solar activity which influences the HF transmission.

[0044] The encryption component 118 acts to encrypt the signal (comprising the codes and the error correction bits and any null values for blank periods). This ensures that malicious parties which intercept the transmitted radio signal are unable to interpret it. Various different encryption schemes are possible and in a preferred example, an encryption scheme which is computable with low latency is used. The signal generator 100 has a memory storing an encrypted key, referred to in FIG. IB as a bit-string key 122. The signal generator has a pseudo-random bit-string generator 120 configured to use the stored key to generate a series of pseudo-random bit-strings. Any pseudo-random bitstring generator 120 is used such as the National Institute of Standards and Technology (NIST) 800-90C algorithm or others. The encryption component 118 is configured such that, as each code is computed by the compressor 110 or output by the error correction component 116, it encrypt that code on the fly, one bit at a time, by combining it with a corresponding pseudo-random bit-string of the series of pseudo-random bit-strings. The combination is computed using a lossless function such as an exclusive OR operation, using lossless addition whereby the size of the code is increased by one bit, or using another lossless aggregation method. This encryption method, using the generated pseudo-random bit-strings and aggregation is extremely efficient to compute (both for encryption and decryption) whilst also being effective. In contrast, public key infrastructure (PKI) encryption schemes add significant latency to the process since they comprise lengthy buffering processes.

[0045] In some examples, the encryption component 118 is configured to facilitate detection of the beginning of the codes in the decrypted signal at a receiver. This speeds up processing at the signal interpreter 102. In an example, the codes are binary codes where at least one of the codes begins with one and at least one of the codes begins with zero, and the encryption component 118 is configured to prefix a start of code bit to each of the codes before encrypting that code. In this way the signal interpreter is able to efficiently find the beginning of codes in the decrypted signal and the number of possible codes is not affected.

[0046] In another example, the signal generator 100 ensures that the codes are binary codes where all the codes begin with one. In this case the number of possible codes is reduced, as compared with the case where codes begin with zero or one, but the ability of the signal interpreter to find the beginning of codes is also facilitated without the need for the prefix start of code bit.

[0047] In the example of FIG. IB the signal which is output by the encryption component 118 is sent to a modem 124 via a serial communications link. In order to improve latency the signal is sent without using a packet-based communications protocol. In this way, delay is not introduced in waiting for data bits to be added to packets and/or for packet headers and payloads to be constructed. The encryption component 118 is configured to send the signal by carrying each data bit of the signal so that it is framed at each end by a frame delimiter such that a data rate of the serial communications link is enhanced as compared with using a packet-based protocol.

[0048] The modem 124 is a low-latency modem and it acts to encode the bit-string of the signal from the signal generator 100 onto the carrier frequency of the high frequency radio channel, in a modulation process. The modem sends its output to the high frequency radio transmitter 104 for transmission over the high frequency radio channel. The carrier frequency is defined by a logical channel frequency map comprising data which identifies the frequency to be used for the channel.

[0049] The logical channel data comprises a physical channel description associated with each logical channel. Note that a single logical channel comprises one or more physical channels which may be scheduled in advance according to the time of day (as some frequencies are known to be better at certain times of the day). The logical channel data is logged in a schedule in some examples, and delimited by time. The logical channels may be varied over time to improve security (change of bit-string key), increase error correction (more parity bits during periods of increased noise), or to monitor specific events at specific times (change of patterns to codes mapping). There may be multiple logical channels, such as for communications links in both directions between multiple locations. There may be multiple logical channels covering the same source and destination in order to increase capacity; each logical channel is controlled independently.

[0050] The receiver 106 receives the high frequency radio signal at an antenna tuned to the frequency in the logical channel frequency map. A second modem 132 at the receive side demodulates the signal to extract the received encrypted bit-string. The received encrypted bit-string is sent to the decryptor 134 over a serial communication link, without using a packet-based protocol, in a similar manner as for the serial communications link between the encryption component 118 and the modem 124. More detail about the decryptor 134 is now given.

[0051] The signal interpreter 102 stores an encrypted key referred to as a bit-string key 138 which is also available at the entity which encrypted the encrypted signal. The signal interpreter 102 has a pseudo-random bit-string generator 136 configured to use the stored key 138 to generate a series of pseudo-random bit-strings, the pseudo-random bitstring generator corresponding to a pseudo-random bit-string generator 120 used by the entity which encrypted the encrypted signal. The decryptor 134 is configured to receive the sequence of bits as a series of encrypted codes, synchronize the generated series of pseudo-random bit-strings with the received encrypted signal; and as an encrypted code is received, decrypt the code in real time using the corresponding pseudo-random bit-string. This enables decryption to be achieved in real time in an accurate manner and without the need for timestamps on the codes in the encrypted signal. Thus the encrypted bit-string is decoded with the same pseudo-random bit-string as used for encoding, which is generated locally using the same key. The decoding is done one bit at a time with a lossless function.

[0052] The decryptorl34 processor is configured to carry out the synchronization using information about an expected transmission time of the encrypted signal and two clocks, one at the signal generator and one at the signal interpreter 102. In this way, synchronization is achieved and the signal over the high frequency radio link omits time stamp information associated with the codes and/or framing information. This enables more of the bandwidth available over the low data rate high frequency radio channel to be used for content rather than control data. Framing information introduces a material overhead into the number of bits to be transmitted for a given amount of data to be transferred. Framing information comprises information about packets of data which have specified reserved patterns of bits that precede and follow them. When a receiver recognizes the reserved pattern it knows it has the start of a new frame and is able to count off the bits from there to tell which bit is it currently receiving at any time. In contrast, control data such as framing information is used on communications links within the signal generator and/or signal interpreter as these internal links have higher bandwidth than the high frequency radio link. The internal links include the link between the encryptor 118 and modem 124 and the link between the decryptor 134 and modem 132. [0053] In an example the clock is implemented using a global positioning system (GPS) time signal with precision time protocol (PTP) synchronization. A GPS receiver at the signal interpreter knows its position in advance and is able to compute the current time very accurately from its measurements of tiny variations in the time signals received from several satellites. The GPS receiver is therefore able to track time accurately. A precision time protocol process at the signal interpreter takes the time from the GPS receiver and synchronizes a clock of a computing device on which the signal interpreter is implemented, to that. The signal interpreter has information about the expected transmission time of the encrypted signal because the transmission path is relatively fixed in length and there is no significant variation in the processing of the encryption/decryption and transmit/receive layers.

[0054] The signal generator also has a GPS receiver and computes the accurate current time in the same way as for the signal interpreter.

[0055] If the decryptor 134 produces output which is not understood by the signal interpreter 102, comprising large blocks of zeros, this is an indication of signal corruption or an unexpectedly large number of transmitted codes. In this case the decryptor 134 sends feedback to a monitor component 128 as indicated by the dotted line from 134 to 138 in FIG. IB. The monitor component 128 instructs the modem to change the channel used for the high frequency radio communication, according to data about available channels in a logical channel frequency map 130 accessible to the monitor component 128 and the modem 132.

[0056] The monitor component 128 monitors the data received by the receiving modem 132 to check for undiscemible bits. Alternatively or in addition it monitors the number of detected errors found by error detection component 140 to detect deteriorations in the signal. If the number of undiscemible bits and/or the number of detected errors reaches specified thresholds the monitor component 128 triggers change of the frequency in the logical channel frequency map 126, 130.

[0057] The output from the decryptor 134 is sent to an error detection component 140 which has access to the error correction scheme 142 currently being used by the signal generator 100.

[0058] The error detection component 140 identifies the parity bits in the received signal and checks them against their expected values. To identify the parity bits the error detection component searches for the start of individual codes in the signal as described below. If the parity bits do not match the expected values a transmission error is detected. If the number of transmission errors is below a specified number, the transmission error is corrected by the error detection component 140 using the error detection scheme. If the number of transmission errors is above or equal to the specified number the code associated with the parity bits is discarded. Thus the error detection component 140 receives the code plus error detection and correction bits, and processes it to correct small code errors (e.g. one bit flipped) or detect (and discard) larger code errors (e.g. two or more bits flipped), resulting in a code.

[0059] Component 144 is configured to search the sequence of bits of the received signal for codes of the code table and to trigger an action for individual ones of the extracted codes according to actions stored locally at component 144.

[0060] The error detection component 140 is configured to monitor the number of transmission errors it detects and to feedback this data to the monitor component 128 as indicated by a dotted line in FIG. IB. Transmission errors occur for a variety of reasons including interference from other radio sources such as nautical communication systems, aviation communication systems or others trying to transmit on the same high frequency radio channel. The monitor component 128 is able to use this information to change the channel of the high frequency radio transmission by updating the logical channel frequency map 130, and according to rules, thresholds or other criteria, such as the lack of large blocks of zeros.

[0061] In the example of FIG. IB the encryption and decryption processes uses a pseudo-random bit string generator 120, 136 which is available at both the signal generator and the signal interpreter.

[0062] In the example of FIG. IB the carrier frequency is in the high frequency (HF) band, i.e. where radio waves in this band will reflect off the ionosphere and thus are able to reach receivers over the horizon. There are a number of separate channels within this HF band. Transmission is directional, using a ‘beam’ a few degrees wide. The direction is varied without physically moving the transmitter by using known beamforming techniques. So a transmitter used to transmit to a city in a first continent is re-directable to transmit to a city in a second continent. However, it is not essential to steer the transmission beam in this manner.

[0063] It is possible to change the carrier frequency from time to time, so the communications system is able to detect when this is beneficial and change the carrier frequency quickly and automatically. Different HF radio frequencies propagate differently at different times of the day, due to changes in the ionosphere - so a channel which works well during the day might not work well during the night. Interference may also occur due to other parties using the same HF channel. The range of an HF signal is in excess of 5,000km, given a signal of sufficient power. The more powerful the signal is, the less interference / noise is an issue (i.e. higher signal to noise ratio) and hence reliability is improved. The signal path after allowing for reflections is slightly longer than the Great Circle distance between transmitter and receiver, and the signal travels at the speed of light in air, i.e. close to 300,000 kilometers per second. The channel capacity is around 20,000 bits per second and noise rates of around 1 corrupted bit per 100,000 sent are observed in ideal conditions on a transmission of around 5000 kilometers. In practice channel capacity is traded-off against noise rate.

[0064] In the example of FIG. IB the signal generator closely couples the compressor, the forward error correction and the encryption process; and at the receive side the signal interpreter closely couples the decryption process, the error detection process and the process of matching the codes with actions from the code table. As a result there is a bit-by-bit transmission whereby single bits of the signal are transmitted in turn in order to avoid problems at the receiver side, between modem 132 and decryptor 134, where the modem 132 is to pass on bits as soon as they are received so as to not introduce additional latency.

[0065] However, alternative architectures are possible. In an example alternative architecture, the compression is closely coupled with the error correction and then the encryption is separately closely coupled with the transmission of the high frequency radio signal. On the receive side, the signal reception and decryption are closely coupled and separately, the error detection and code interpretation is closely coupled. Thus the serial connections are now between 116 and 118 (and 134 and 140 on the receive side) rather than between 118 and 124, or 132 and 134 as indicated in FIG. IB.

[0066] In the example alternative architecture, codes and error detection bits are generated as a single atomic entity and there is no advantage to be gained by splitting this into smaller parts (i.e. bits). Therefore a packet-based communications protocol is used in this case to send the signal between the signal generator 100 and the first modem, and between the second modem and the signal interpreter 102. In this case, if transmission of a packet is delayed by a couple of time instances of the bit-string on the serial connection there is no loss of the packet, rather the packet simply waits to be encrypted or decrypted as appropriate. In contrast, the bit would be lost in the architecture of FIG. IB.

[0067] In the example of FIG. IB various components are used which are optional including the encryptor, the decryptor, the forward error correction component and the error detection component. FIG. 2 shows an example where these optional components are omitted.

[0068] In the example of FIG. 2 the observed data system 200 gives rise to a data stream 108 of observations which are input to the signal generator 110 in real time. The signal generator has a memory which is able to store data from a code table 112 and to store a portion of the data stream 108. A compressor 110 at the signal generator 110 compresses the data stream 108 to fit the capacity of a high frequency radio channel. For example, it does this by detecting patterns in the data stream 108 and encoding the patterns with codes from a code table 112. The signal generator computes a signal from the codes of the detected patterns and optionally using a code to indicate blank periods in which no patterns are detected in the data stream. The signal generator outputs the signal as a delimited bit-string or as packets 204 which are sent to a transmitter 104 for transmission on the high frequency radio channel.

[0069] At the receive side, a receiver 106 receives the signal 206, transferred one bit at a time so as not to introduce additional latency, and a signal interpreter 144 interprets this. The signal interpreter 144 has a memory 208 storing a portion of the received signal and a processor 210 which accesses codes from the code table 112 and searches for those codes in the received signal. When a code is detected, the code table converts the received code back to the original detected pattern. The signal interpreter accesses instructions 212 related to the original detected pattern and uses the instructions to control a target system 214. This enables ultra-low-latency control of the target system from a remote location where the remote location is thousands of kilometers away from the target system. The ultra-low-latency control is achieved irrespective of the content of the data being processed. In some cases the target system 214 receives the detected pattern from the signal interpreter and uses it together with data, available locally at the target system 214, to control one or more automated processes at the target system 214. [0070] The deployment of FIG. 2 gives working results with ultra-low-latency transmission times for trans-oceanic distances, although where there is significant noise introduced in the signal during transmission the quality is reduced. Without error correction, latency is reduced as compared with the deployment of FIG. IB, however error rates increase substantially. Without encryption, latency is reduced marginally (as compared with FIG. IB) due to not having to apply the encryption / decryption, however the signal is more easily understood by eavesdroppers. Architectures which use forward error correction without encryption are also within the scope of the technology, as are architectures which use encryption without forward error correction.

[0071] FIG. 3 is a flow diagram of an example method at the signal generator.

The signal generator receives the data stream of observations from the observed system. The compressor 302 compresses the data stream by detecting patterns 304, identifying codes 306 which correspond to the detected patterns in a code table, and computing a signal 308 from the codes of the detected patterns. The code table comprises a plurality of codes such as binary codes, each associated with a different pattern. The code table optionally stores an identifier of a forward error correction scheme being used by the signal generator, a number of parity bits being used by the forward error correction scheme, the encryption parameters such as a bit-string key and one or more other parameter values.

[0072] After compression 302 the signal is processed by a forward error correction process 310 which is optional and comprises the addition of parity bits to the signal according to the particular forward error correction scheme being used.

[0073] The signal with the added parity bits is encrypted 312 although the encryption is optional as explained above. In an example, the encryption comprises combining the signal with a pseudo-random bit-string sequence as described above, although other encryption methods are used in some cases. The encrypted signal is sent 314 to a modem and then transmitted on a high frequency radio channel. The signal generator receives feedback 316 about the quality of the transmission and/or the quality of the received signal. The signal generator uses the feedback to control how it modifies 318 the code table such as to change the identifier of the forward error correction scheme and/or to change the ratio of parity bits to content bits. The signal generator uses the feedback to control how it modifies 318 the codes and patterns detected, and/or the encryption parameters.

[0074] FIG. 4 is a flow diagram of an example process at the forward error correction component. The forward error correction component receives 400 a code to have forward error correction applied to it. The forward error correction component checks the code table 402 to find the current forward error correction scheme to use and to find the ratio of parity bits to content bits to use.

[0075] Using the current forward error correction scheme the component adds 404 parity bits to the code, according to the specified ratio of parity bits to content bits. The component forwards the code with the added parity bits to the encryption component and for transmission on the high frequency radio channel. The process of operations 400, 402 and 404 repeats as codes are received.

[0076] When the forward error correction component receives 406 feedback such as signal to noise ratio information of the transmitted signal a check 408 is made. The feedback is received from the signal interpreter 102. The forward error correction component checks 408 if criteria are met such as if the signal to noise ratio is above a specified threshold. If the criteria are met the process returns to operation 400. If the criteria are not met, the component changes 410 the forward error correction scheme and/or the ratio of parity bits to content bits it uses and updates 412 the code table with information about the changes. The process then returns to operation 400.

[0077] FIG. 5A is a flow diagram of an example method at the encryptor. Note that this is one example of a possible method at the encryptor and many others are possible so that this example is not intended to limit the scope of the technology. In this example, the encryptor generates pseudo-random bit-strings 500 using a pseudo-random generator and a bit-string key. It receives output 502 from the forward error corrector, or from the compressor in the case that no forward error corrector is present. Thus the encryptor receives computed codes or strings of zeros (where there are blank periods between the codes, the encryptor receives strings of zeros of varying length between the codes and these are encrypted by the encryptor). The encryptor encrypts 504 the data it receives on the fly by combining it with a pseudo-random bit-string generated at the same time instance, by the pseudo-random generator. The combination is an exclusive OR operation or another type of aggregation.

[0078] FIG. 5B is a flow diagram of an example method at the decryptor. The decryptor generates pseudo-random bit-strings 506 using a corresponding pseudo-random generator and key as those used at the encryptor. It receives 508 a sequence of bits to be decrypted. It synchronizes 510 the pseudo-random bit-strings and the received sequence of bits and decrypts the data by reversing the combination done by the encryptor.

[0079] FIG. 6 is a flow diagram of an example method at the error detection and signal interpretation components on the receive side. The decrypted signal is received 600 and the error detection component checks 602 for errors by examining the parity bits. If an error is found the error detection component checks 604 whether it is able to correct the error, by checking the number of errors present and the forward error correction scheme being used. If the error cannot be corrected the decrypted code is discarded 608. A rate of errors is monitored and feedback is sent 610 to the signal generator 100 if the error rate exceeds a threshold. If the code is correctable, it is corrected 606 and used to look up 612 an associated pattern from the code table. Instructions associated with the pattern are generated 614 to implement an action and the action is triggered 616 by sending the instructions to the target system. If no error is detected at check 602 the process proceeds to operations 612, 614 and 616 and then returns to operation 600.

[0080] The technology described herein achieves ultra-low latency data transmission over long distances by transmitting the signal through a medium (air) where the speed of transmission is almost the speed of light in a vacuum which is around 50% faster than the speed through fibre-optic cable. In addition the signal is transmitted along a near-optimal (i.e. shortest) path which is the great circle route between two geographical locations. This is significantly shorter than any path involving one or more satellites due to their altitude. The communications protocol used is designed to not add unduly to latency by avoiding buffering, avoiding use of large packets and avoiding retransmission.

In addition, the deployments described herein use lossy compression to enable redundant information to be discarded and important information to be transmitted using very low capacity underlying technology.

[0081] FIG. 7 illustrates various components of an exemplary computing-based device which is implemented as any form of a computing and/or electronic device, and in which embodiments of a signal generator 100 or a signal interpreter 102 are implemented in some examples.

[0082] The computing-based device comprises one or more processors 700, 210 which are microprocessors, controllers or any other suitable type of processors for processing computer executable instructions to control the operation of the device in order to generate a signal for a high frequency radio channel, or to interpret a signal from a high frequency radio channel. In some examples, for example where a system on a chip architecture is used, the processors 700, 210 include one or more fixed function blocks (also referred to as accelerators) which implement a part of the method of any of FIGs. 3 to 6 in hardware (rather than software or firmware). Platform software comprising an operating system or any other suitable platform software is provided at the computing-based device to enable application software to be executed on the device. The computing-based device comprises a clock 714, 716 and a serial communications link interface 706, 712. In the case that the computing-based device implements a signal generator 100, the computing-based device comprises a compressor 110, an encryptor 702 and a forward-error corrector 704 which are configured as described earlier in this document. In the case that the computing-based device implements a signal interpreter 102, the computing-based device comprises a decryptor 708 and a forward error corrector 710.

[0083] The computer executable instructions are provided using any computer- readable media that is accessible by the computing based device. Computer-readable media includes, for example, computer storage media such as memory 202, 208 and communications media. Computer storage media, such as memory 202, 208, includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or the like. Computer storage media includes, but is not limited to, random access memory (RAM), read only memory (ROM), erasable programmable read only memory (EPROM), electronic erasable programmable read only memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital versatile disks (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that is used to store information for access by a computing device. In contrast, communication media embody computer readable instructions, data structures, program modules, or the like in a modulated data signal, such as a carrier wave, or other transport mechanism. As defined herein, computer storage media does not include communication media. Therefore, a computer storage medium should not be interpreted to be a propagating signal per se. Although the computer storage media (memory 202, 208) is shown within the computing-based device it will be appreciated that the storage is, in some examples, distributed or located remotely and accessed via a network or other communication link.

[0084] The term 'computer' or 'computing-based device' is used herein to refer to any device with processing capability such that it executes instructions. Those skilled in the art will realize that such processing capabilities are incorporated into many different devices and therefore the terms 'computer' and 'computing-based device' each include personal computers (PCs), servers, mobile telephones (including smart phones), tablet computers, set-top boxes, media players, games consoles, personal digital assistants, wearable computers, and many other devices.

[0085] The methods described herein are performed, in some examples, by software in machine readable form on a tangible storage medium e.g. in the form of a computer program comprising computer program code means adapted to perform all the operations of one or more of the methods described herein when the program is run on a computer and where the computer program may be embodied on a computer readable medium. The software is suitable for execution on a parallel processor or a serial processor such that the method operations may be carried out in any suitable order, or simultaneously.

[0086] This acknowledges that software is a valuable, separately tradable commodity. It is intended to encompass software, which runs on or controls “dumb” or standard hardware, to carry out the desired functions. It is also intended to encompass software which “describes” or defines the configuration of hardware, such as HDL (hardware description language) software, as is used for designing silicon chips, or for configuring universal programmable chips, to carry out desired functions.

[0087] Those skilled in the art will realize that storage devices utilized to store program instructions are optionally distributed across a network. For example, a remote computer is able to store an example of the process described as software. A local or terminal computer is able to access the remote computer and download a part or all of the software to run the program. Alternatively, the local computer may download pieces of the software as needed, or execute some software instructions at the local terminal and some at the remote computer (or computer network). Those skilled in the art will also realize that by utilizing conventional techniques known to those skilled in the art that all, or a portion of the software instructions may be carried out by a dedicated circuit, such as a digital signal processor (DSP), programmable logic array, or the like.

[0088] Any range or device value given herein may be extended or altered without losing the effect sought, as will be apparent to the skilled person.

[0089] Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.

[0090] It will be understood that the benefits and advantages described above may relate to one embodiment or may relate to several embodiments. The embodiments are not limited to those that solve any or all of the stated problems or those that have any or all of the stated benefits and advantages. It will further be understood that reference to 'an' item refers to one or more of those items.

[0091] The operations of the methods described herein may be carried out in any suitable order, or simultaneously where appropriate. Additionally, individual blocks may be deleted from any of the methods without departing from the scope of the subject matter described herein. Aspects of any of the examples described above may be combined with aspects of any of the other examples described to form further examples without losing the effect sought.

[0092] The term 'comprising' is used herein to mean including the method blocks or elements identified, but that such blocks or elements do not comprise an exclusive list and a method or apparatus may contain additional blocks or elements.

[0093] It will be understood that the above description is given by way of example only and that various modifications may be made by those skilled in the art. The above specification, examples and data provide a complete description of the structure and use of exemplary embodiments. Although various embodiments have been described above with a certain degree of particularity, or with reference to one or more individual embodiments, those skilled in the art could make numerous alterations to the disclosed embodiments without departing from the scope of this specification.

Claims

1. A high frequency radio signal generator for generating a signal to be transmitted on a high frequency radio channel comprising: a memory configured to receive data from at least one data stream at a first data rate above a data rate of the high frequency radio channel; a compressor configured to compress the received data to generate compressed data; a processor configured to compute a signal from the compressed data such that a data rate of the computed signal is at or lower than a data rate of the high frequency radio channel and to send the signal to a high frequency radio transmitter for transmission to a receiving entity.

2. Wherein the compressor is configured to compress the received data by detecting instances of a plurality of possible patterns in the data, each pattern associated with a code in a code table accessible to the compressor, and to compute the signal from the codes according to the detected instances.

3. The high frequency radio signal generator of claim 1 comprising the code table, and wherein the code table stores associations between individual codes and individual patterns.

4. The high frequency radio signal generator of claim 3 wherein the code table is configured such that the size of the individual codes in the code table is automatically controlled in order to control the data rate of the computed signal.

5. The high frequency radio signal generator of claim 3 or claim 4 wherein the code table is configured such that the number of the individual codes in the code table is automatically controlled in order to control the data rate of the computed signal.

6. The high frequency radio signal generator of claim 1 wherein the memory is configured to receive the data from the at least one data stream in real time over a communications link where the high frequency radio signal generator is physically proximate to the at least one data stream.

7. The high frequency radio signal generator of claim 1 wherein the compressor is configured to process, using lossy compression, substantially all of the data from the data stream at a rate at or above the data rate of the data stream.

8. The high frequency radio signal generator of claim 1 wherein the processor is configured to compute and send the signal in real time.

9. The high frequency radio signal generator of claim 1 wherein the processor is configured to compute the signal as a chronological sequence of the codes, each code being sent as and when it is generated by the compressor, and with blank periods in the signal when no patterns are detected by the compressor.

10. The high frequency radio signal generator of claim 1 wherein the processor is configured to compute the signal as a series of pulses at regular intervals, each pulse comprising either a code detected by the compressor and not yet sent, or a code designated as indicating no pattern.

11. The high frequency radio signal generator of claim 10 wherein the regular intervals are known to a receiver of the high frequency radio channel.

12. The high frequency radio signal generator of claim 1 further comprising a second compressor configured to operate in parallel with the first compressor to detect instances of a plurality of possible second patterns in the data, each second pattern associated with a code in the code table; and wherein the processor is configured to deal with contention between the first and second compressors, by selecting between the first and the second compressors when contention arises.

13. The high frequency radio signal generator of claim 1 wherein the processor is configured to add one or more parity bits to individual codes in the signal on the basis of a forward error correction scheme and a specified ratio of parity bits to other bits in individual ones of the codes.

14. The high frequency radio signal generator of claim 13 wherein the specified forward error correction scheme and the specified ratio are stored in the code table, and wherein the processor is configured to repeatedly check the code table for changes in the forward error correction scheme and/or specified ratio.

15. The high frequency radio signal generator of claim 13 wherein the processor is configured to receive information about a signal to noise ratio of the signal on the high frequency radio channel, and to change the specified ratio in dependence on the information about the signal to noise ratio.

16. The high frequency radio signal generator of claim 13 wherein the processor is configured to receive information about a signal to noise ratio of the signal on the high frequency radio channel, and to change the forward error correction scheme in dependence on the information about the signal to noise ratio.

17. The high frequency radio signal generator of claim 15 or claim 16 wherein the processor is configured to send information about the change in the specified ratio or the change in the forward error correction scheme, and an effective start time of the change, to the receiving entity, via the high frequency channel or via another communications link.

18. The high frequency radio signal generator of claim 1 wherein the processor is configured to send the signal on a serial communications link, without using a packet-based communications protocol.

19. The high frequency radio signal generator of claim 18 wherein the processor is configured to send the signal by carrying each data bit of the signal in a byte framed at each end by a frame delimiter such that a data rate of the serial communications link is enhanced as compared with using a packet-based protocol.

20. The high frequency radio signal generator of claim 18 wherein the serial communications link is between a forward error corrector and an encryptor, or between an encryptor and a modem.

21. The high frequency radio signal generator of claim 1 comprising: a memory storing a one-time pad or a method of generating a one-time pad; wherein the processor is configured to: as each code is computed, encrypt that code on the fly by combining it with a onetime key of the one-time pad;

22. The high frequency radio signal generator of claim 21 wherein the memory stores a method of generating the one-time pad, the method comprising a pseudo random bit string generator configured to use a stored key to generate a series of pseudo-random bit strings.

23. The high frequency radio signal generator of claim 21 wherein the codes are binary codes where at least one of the codes begins with one and at least one of the codes begins with zero, and wherein the processor is configured to prefix a start of code bit to each of the codes before encrypting that code.

24. The high frequency radio signal generator of claim 21 wherein the codes are binary codes where all the codes begin with one.

25. A computer-implemented method of generating a signal to be transmitted on a high frequency radio channel comprising: receiving data from at least one data stream at a first data rate above a data rate of the high frequency radio channel; compressing the received data to generate compressed data; computing a signal from the compressed data such that a data rate of the computed signal is at or lower than a data rate of the high frequency radio channel; and sending the signal to a high frequency radio transmitter for transmission to a receiving entity.

26. A high frequency radio signal receiver comprising: a memory storing a sequence of bits of a received signal, received on a high frequency radio channel from a sending entity; and a processor configured to decompress the sequence of bits in real time.

27. The high frequency radio signal receiver of claim 26 comprising a memory storing a code table corresponding to a code table of the sending entity, and wherein the processor is configured to identify codes in the received signal and to use the code table to convert the identified codes into corresponding patterns.

28. The high frequency radio signal receiver of claim 26 wherein the processor is configured to detect the beginning of a code in the sequence of bits by searching for a prefix start of code bit, and wherein the sequence of bits comprises blank periods of arbitrary length.

29. The high frequency radio signal receiver of claim 26 wherein the processor is configured to detect the beginning of a code in the sequence of bits by searching for either: a one, and wherein the sequence of bits signal comprises blank periods of arbitrary length, and the codes all begin with one; or a zero, and wherein the sequence of bits signal comprises blank periods of arbitrary length, and the codes all begin with zero.

30. The high frequency radio signal receiver of claim 26 wherein the processor is configured to detect the beginning of a code in the sequence of bits by using a clock, and wherein the sequence of bits comprises codes at expected intervals.

31. The high frequency signal receiver of claim 26 wherein the memory stores a one-time pad or a process for generating a one-time pad; and wherein the processor is configured to: receive the sequence of bits as a series of encrypted codes; synchronize the one-time pad with the received encrypted signal; as an encrypted code is received, decrypt the code in real time using a corresponding onetime key of the one-time pad.

32. The high frequency radio signal receiver of claim 31 wherein: the memory stores an encrypted key which is available at an entity which encrypted the encrypted signal, and stores the process for generating the one-time pad as a pseudo-random bit-string generator configured to use the stored key to generate a series of pseudo-random bit-strings, the pseudo-random bit-string generator corresponding to a pseudo-random bit-string generator used by the entity which encrypted the encrypted signal; and wherein the processor is configured to: receive the sequence of bits as a series of encrypted codes; synchronize the generated series of pseudo-random bit-strings with the received encrypted signal; as an encrypted code is received, decrypt the code in real time using the corresponding pseudo-random bit-string.

33. The high frequency radio signal receiver of claim 31 wherein the processor is configured to carry out the synchronization using information about an expected transmission time of the encrypted signal and a clock accessible to the processor.

34. The high frequency radio signal receiver of claim 31 wherein the encrypted signal omits framing information associated with the codes.

35. A computer-implemented method at a high frequency radio signal receiver comprising: receiving a sequence of bits of a received signal, received on a high frequency radio channel from a sending entity; decompressing the sequence of bits in real time.

36. The method of claim 35 comprising searching the sequence of bits of the received signal to find codes of the code table; storing a code table corresponding to a code table of the sending entity; converting the found codes into patterns using the code table, and triggering an action based on one or more of the patterns.

37. A computer program comprising instructions which when implemented on a computer implement the method of claim 25 or claim 35.

38. One or more device-readable media with device-executable instructions that, when executed by a computing system, direct the computing system to perform operations comprising: receiving data from at least one data stream at a first data rate above a data rate of the high frequency radio channel; compressing the received data to generate compressed data; computing a signal from the compressed data such that a data rate of the computed signal is at or lower than a data rate of the high frequency radio channel; and sending the signal to a high frequency radio transmitter for transmission to a receiving entity.

39. One or more device-readable media with device-executable instructions that, when executed by a computing system, direct the computing system to perform operations comprising: storing a sequence of bits of a received signal, received on a high frequency radio channel from a sending entity; decompressing the sequence of bits in real time.

40. A high frequency radio communication system comprising: a high frequency radio signal generator as claimed in claim 1, the high frequency radio signal generator located physically proximate to the data stream; a high frequency radio signal transmitter in communication with the high frequency radio signal generator via a serial communications link; and a high frequency radio signal receiver comprising: a memory storing a sequence of bits of a received signal, received on a high frequency radio channel from a sending entity; and a processor configured to decompress the sequence of bits in real time.

41. The high frequency radio communication system of claim 40 wherein the high frequency radio signal receiver is trans-oceanic or trans-continental with respect to the high frequency radio signal generator and high frequency radio signal transmitter.

42. A high frequency radio signal receiver for decrypting an encrypted signal received on a high frequency radio channel comprising: a memory storing a one-time pad or a process for generating a one-time pad; a processor configured to: receive the encrypted signal as a series of encrypted codes synchronize the one-time pad with the received encrypted signal; as an encrypted code is received, decrypt the code in real time using a one time key from the synchronized one-time pad.

43. A high frequency radio signal generator for generating an encrypted signal to be transmitted on a high frequency radio channel comprising: a memory storing a one-time pad or a process for generating a one-time pad; a processor configured to: compute a series of codes from a data stream in real time; and, as each code is computed to encrypt that code on the fly by combining it with a corresponding one-time key of the one-time pad; and send the encrypted codes in real time to a high frequency radio transmitter.

44. A high frequency radio signal generator for generating a signal to be transmitted on a high frequency radio channel comprising: a processor configured to: compute a series of codes from a data stream in real time; and, as each code is computed to add one or more parity bits to individual codes in the signal on the basis of a forward error correction scheme and a specified ratio of parity bits to other bits in individual ones of the codes; and to send the encrypted codes in real time to a high frequency radio transmitter.

45. A high frequency radio signal corrector for correcting a signal received on a high frequency radio channel comprising: a processor configured to: extract a series of codes from the received signal in real time; and, as each code is extracted to check one or more parity bits of the code on the basis of a forward error correction scheme; and to discard the extracted code, or send the extracted code to a downstream system in dependence on the result of the check.