GB2455717A - Frequency synthesis in a wireless basestation - Google Patents

Frequency synthesis in a wireless basestation Download PDF

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Publication number
GB2455717A
GB2455717A GB0724559A GB0724559A GB2455717A GB 2455717 A GB2455717 A GB 2455717A GB 0724559 A GB0724559 A GB 0724559A GB 0724559 A GB0724559 A GB 0724559A GB 2455717 A GB2455717 A GB 2455717A
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United Kingdom
Prior art keywords
frequency
oscillator
temperature
factor
output
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GB0724559A
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GB0724559D0 (en
Inventor
Sean Mullen
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Ubiquisys Ltd
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Ubiquisys Ltd
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Priority to GB0724559A priority Critical patent/GB2455717A/en
Publication of GB0724559D0 publication Critical patent/GB0724559D0/en
Publication of GB2455717A publication Critical patent/GB2455717A/en
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L1/00Stabilisation of generator output against variations of physical values, e.g. power supply
    • H03L1/02Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only
    • H03L1/022Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature
    • H03L1/026Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature by using a memory for digitally storing correction values

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

A frequency synthesis system, for example for use in a femtocell basestation, is based on a free-running oscillator 20, generating a reference signal having a first frequency Fosc which varies with temperature. A frequency synthesizer 30 receives the reference signal and generates an output signal at a desired output frequency Fref by multiplying the first frequency by a multiplication factor which is determined based on a measured temperature of the oscillator, using a sensor 50, in the knowledge of the predetermined frequency-temperature characteristic of the oscillator, in order to obtain the desired output frequency.

Description

I
FREQUENCY SYNTHESIS IN A WIRELESS BASESTATJON
This invention relates to the field of frequency synthesis, and in particular to frequency synthesis for use in wireless communication, for example in femiocell basestatlons. In particular the invention relates to a method and apparatus for generating a signal at a desired frequency in such femtocell basestations.
BACKGROUND
A basestat ion, for use in a mobile communications network, must often be able to generate signals having frequencies that are highly accurate. For example, using a signal generated by an oscillator within the basestatlon, the basestation must be able to transmit a signal with a frequency that is within a very tightly specified frequency band.
Uncompensated crystal oscillators, for example, generate signals with a relatively high level of accuracy, but this is still Insufficiently accurate for basestations. The resonant frequency, and thus the output frequency, of a crystal oscillator depends precisely on the dimensions of the crystal structure. Thus, the frequency will vary with changes of temperature in the crystal and with ageing of the crystal, both of which cause changes of the crystal structure.
Conventional temperature compensated crystal oscillators (TCXOs) having the required accuracy are somewhat expensive. TCXOs operate by correcting the oUtput of the crystal oscillator. That is, the TCXO comprises a crystal oscillator that is controlled using a control voltage to finely tune the output frequency of the TCXO. The control voltage may be adjusted depending on the measured temperature of the crystal oscillator, and thus the temperature effects on frequency are compensated for.
Compensation for ageing is achieved in a similar fashion. The control voltage Is adjusted depending on the measured output frequency of the oscillator, as compared with a standard frequency.
However, in the case of a basestation, such as a femtocell basestation, that Is only intended to provide service for a relatively small number of users, the cost of a TCXO is hard to justify. It has therefore been proposed that the ferntocell basestation should include a relatively low cost, and thus inherently somewhat inaccurate oscillator, but should include a mechanism for monitoring and maintaining the required frequency accuracy of the signals output from the basestation.
SUMMARY OF INVENTION
According to a first aspect of the present invention, there is provided a frequency synthesis system, comprising: an oscillator for generating a reference signal having a first frequency; a frequency synthesizer, for receMng said reference signal and generating an output signal at a desired output frequency by multiplying the first frequency by a multiplication factor; a temperature sensor, for measuring a temperature of the oscillator; and control circuitry for generating said multiplication factor based on the measured temperature of the oscillator.
According to a second aspect of the present invention, there is provided a basestation for a cellular mobile communications network, comprising a frequency synthesis system according to the first aspect.
According to a third aspect of the present Invention, there is provided a method of generating a signal at a desired frequency, the method comprising: determining a frequency-temperature characteristic of an oscillator; measuring a temperature of the oscillator; determining a current frequency of the oscillator, based on the measured temperature and, said characteristic; multiplying the current frequency by a multiplication factor to obtain an output signal having a desired frequency, said multiplication factor being determined based on said measured temperature.
BRIEF DESCRIPTION OF THE DRAWINGS
For a better understanding of the present invention, and to show more clearly how it may be carried into effect, reference will be made, by way of example only, to the following drawings, in which: Figure 1 shows a basestatlon including a frequency synthesis system according to the present invention.
Figure 2 shows in more detail the frequency synthesis system according to the invention.
Figure 3 is a flow chart, illustrating a first method in accordance with the invention.
Figure 4 is a flow chart, illustrating a second method In accordance with the invention.
DETAILED DESCRIP11ON Figure 1 shows the general form of a femtocell basestation 100 In accordance with the present invention, which can be used by a domestic or small business customer to provide cellular mobile phone coverage within and close to his premises. The basestation 100 includes an interface 110 such as a cable modem for connection over a broadband network such as the internet into the core network of the mobile network operator. As is conventional for a cellular basestation, the basestation 100 also includes baseband processing circuitry 120, suitable for the relevant cellular standard.
It will be appreciated that a basestation 100 can be suitable for any one or more of the cellular standards supported in that location.
The baseband processing circuitry 120 is connected to transceiver (TRX) circuitry 130, for performing the relevant radio frequency (RF) processing, and for converting signals between baseband and the required radio frequency or frequencies.
RF signals for transmission over the wireless interface are passed from the transceiver circuitry 130 to an antenna 140, and signals received at the antenna 140 are passed to the transceiver circuitry 130.
As is well known, the transceiver circuitry 130 must be able to generate signals at particular transmit frequencies that are tightly specified in the relevant standards.
Similarly, the transceiver circuitry 130 must be able to downconvert received signals to baseband. In order to be able to perform these functions, the transceiver circuitry 130 needs to be able to generate signals at the required frequencies to a high degree of accuracy.
These signals are generated in the transceiver circuitry 130, based on a signal at a reference frequency F, generated by a frequency synthesis system 150, which is shown in more detail in Figure 2.
The system 150 comprises a free-running oscillator 20, which generates an output signal at a frequency F. The oscillator 20 is free-running, in the sense that there is no attempt to adjust its natural frequency of oscillation. The frequency synthesis system 150 is then still able to generate a reference frequency signal that is acceptably accurate for many applications. However, the frequency synthesis system 150 may include any convenient type of oscillator, including a temperature compensated oscillator or an oscillator that Includes some other type of compensation or adjustment, in which case the frequency synthesis system 150 can compensate for residual frequency errors after such compensation or adjustment.
In one embodiment, the oscillator 20 is a crystal oscillator, although any oscillator is considered to be within the scope of the invention.
As will be recognized by the person skilled In the art, the output signal of the oscillator will not in general have an accurate, stable frequency. That is, the frequency F will vary over time, with temperature, because of the poor quality of the oscillator, or any combination of these factors.
According to the present invention, the output signal of the oscillator 20 is applied to a frequency dMder 25, where the oscillator frequency F is divided by a value M. The resulting signal at a frequency F is input to a frequency synthesizer 30, which in this Illustrated embodiment takes the form of a phase-locked loop. The frequency synthesizer 30 uses the signal at frequency F to generate an output signal at the desired frequency F, and this output signal can then be supplied to the transceiver circuitry 130 as described above, in order to be to generate signals at frequencies required to be used in upconverting baseband signals to the desired transmit frequency or in downconverting received signals at the relevant receive frequency to baseband.
The multiplication factor that typically must be applied to the desired frequency is therefore determined by the instantaneous requirements of the transceiver circuitry 130, based on the transmit and receive frequencies at that time, and methods for achieving this are known to the person skilled in the art.
However, while the frequency F may vary over time, the frequency synthesizer 30 rapidly adjusts to compensate for such variation, such that F remains constant at the desired value.
In general, the operation of the frequency synthesizer 30 is to multiply the frequency FPLL by a factor (N+k), where N is an integer, and k is a fractional number less than 1. Thus:
Fosc X (N+k) = M X Fr,1 or: Fp x (N+k) = F As described in more detail below, the Integer pert N of the factor N may preferably be maintained at a constant value, with the fractional part k being able to be rapidly varied, such that variations in F are compensated for and Fr, can be maintained at a stable value.
The frequency synthesizer 30 may be any circuit or block that receives a signal having a first frequency, and outputs a signal having a second frequency. Such circuits or blocks will be familiar to those skilled in the art and need not be described in any great detail.
However, in the illustrated embodiment, the frequency synthesizer 30 comprises a phase locked loop (PLL). Again, PLLs will be familiar to those skilled in the art, and will not be described in great detail save for the elements that are essential to the definition of the PLL. Thus, in this embodiment, the frequency synthesizer 30 comprises a phase detector 32, which compares the phase of the signal output from the oscillator 20 and the phase of a fed-back signal. The phase detector 32 outputs a signal indicative of this comparison, and this signal is passed through a low-pass filter (LPF) 33, with the filtered signal used to control a voltage-controlled oscillator (VCO) 34. The VCO 34 outputs a signal having a frequency Fr,, and this is fed back to the phase detector 32.
However, before reaching the phase detector 32, the frequency of the fed-back signal is divided by the factor (N+k) in a.(N+k) frequency divider 36. Thus, in this way the frequency output F of the PLL rapidly converges to (N+k) x Fpu..
In order to be able to use non-integer values for the factor (N+k), it is advantageous for the frequency divider 36 to take the form of a sigma-delta modulator. Sigma-delta modulation will be familiar to those skilled in the art, but a simple explanation is given here. A sigma-delta modulator operates by receiving a non-integer input value and rapidly modulating its output between integer values around the non-integer input. The average value of the output values over time is equal to the non-integer input, even though the instantaneous value of the output value is never equal to the non-integer input. Thus, in this case, the frequency divider receives the values of N and k. and generates a sequence of integer dMsion values, whose average is (N+k). Sigma-delta modulators can achieve a very high level of accuracy, such that the overall output of the PLL is also highly accurate, with excellent spectral properties, such as low phase noise.
In one embodiment, the system 10 further comprises a calculation block 40. The calculation block 40 operates to supply the value of M to the division block 25, and to supply the values of N and k to the frequency synthesizer 30.
The system 150 further comprises a temperature sensor 50. The temperature sensor is adapted to measure the temperature of the oscIllator 20 very accurately. For example, In order to achieve this, the temperature sensor may be positioned thermally very near the oscillator 20. Where the temperature sensor 50 is an analog device, then an analog-digital converter 52 is connected to receive the analog signal from the temperature sensor 50. and convert it to a digital value, indicative of the temperature of the oscillator, to the calculation block 40.
The method of operation of the system 150 includes a calibration stage, which is followed by an operational stage. Figure 3 Is a flow chart, illustrating the calibration stage of operation. This involves characterizing the free-running frequency of the oscillator 20 at different temperatures.
Thus, in step 200. the temperature of the oscillator 20 is controlled to a temperature in the desired operating range of the device. For example, the device may be required to operate over the whole of the temperature range from -10°C to +85°C.
In step 210, the temperature of the oscillator is measured using the temperature sensor and AID converter 52. In step 220, the free- running oscillation frequency of the oscillator 20 is measured at this temperature.
In order to measure the free-running oscillation frequency of the oscillator 20, it is necessary to use a reliable frequency source. For example, where the basestation 100 can detect signals transmitted by other basestations at frequencies that are known to a very high degree of accuracy, these signals can be used as a reference to measure the free-running oscillation frequency of the oscillator 20. For example, the free-running oscillation frequency of the oscillator 20 can be used to generate a clock s,gnal that is nominally at the frequency of the signals being transmitted from another basestation, and any inaccuracy in the frequency that it uses to demodulate these received signals will then be detectable and measurable.
Similarly, where the basestation 100 can receive and interpret timestamped signals transmitted from one or more highly accurate time servers over a wide area network such as the Internet. the differences between the times of receipt of these signals can similarly be used to detect any inaccuracy in the frequency of a clock that Is derived from the free-running oscillation frequency of the oscillator 20.
In step 230, it is determined whether enough measurements have been taken to be able to characterize the frequency accurately over the whole of the temperature range.
If not, the process returns to step 200, for a further set of measurements to be taken.
If it is determined in step 230 that enough measurements have been taken to be able to characterize the frequency accurately over the whole of the temperature range, the process passes to step 240, in which the frequency-temperature characteristic of the oscillator is determined.
For example, for one class of oscillators, it has been determined that the frequency-temperature characteristic can be represented accurately by a fifth-order polynomial curve, and so the step of determining the frequency-temperature characteristic comprises using standard curve fitting techniques to determine the six coefficients of the required fifth-order polynomial.
In order to achieve even greater accuracy, one possibility might be to divide the operating temperature range into sections (for example, the range might be divided into three sections), and then to determine the frequency-temperature characteristic separately for each section of the temperature range.
In other situations, the frequency may depend not only on the temperature, but also on the rate of change of the temperature at the time that the frequency Is measured. In that case, the frequency-temperature curve-fitting algorithm would need to include a second order differential temperature term, in order to characterlse the oscillator accurately.
As described here, the characterization of the oscillator takes place as a separate stage of operation before the system Is put into use. However, provided that the temperature of the device varies widely enough to allow the temperature-frequency charactenstlc to be determined with sufficient accuracy, the required measurements can in fact be taken during normal use of the system, and used thereafter as described below.
Before moving to the operation of the system 150, values are set for the parameters M and N. In the illustrated embodiment, it is preferred that the frequency Input to the phase detector 32 is about 100 kHz, and approximate values for M and N follow from this.
For example, in one embodiment of the invention, the desired output frequency F, is 19.2 MHz, as this can then be multiplied by a selected multiplier in the transceiver circuitry 130 to generate all of the required transmit and receive frequencies. At the same time, the nominal value of the free-running oscillation frequency of the oscillator 201526 MHz.
These various frequencies are linked by the equation: F_F -F1 M -PLL(N+k) This would suggest that setting a value of M = 260 would be appropriate, as an oscillation frequency of the oscillator 20 of 26 MHz would make the frequency Fp.
input to the phase detector 32 equal to 100 kHz, and would allow an output frequency F, of 19.2 MHz to be obtained by setting N = 192.
However, this would in fact be relatively undesirable because this would make k0 in the situation where the nominal free-running frequency is in fact achieved, and any increase in the free-running oscillation frequency of the oscillator 20 would then require (N+k) to be reduced to compensate, and this would require the integer part N to be changed. By contrast, setting values of M and N that put a value of k in the range such that, say. 0.25 c k c 0.75 allows N to remain unchanged regardless of changes in the value of the free-running oscil!ation frequency of the oscillator 20. with compensation achieved by altering the value of k alone.
Thus, for example, in the situation described above, where the nominal value of the free-running oscillation frequency F is 26 MHz and the desired output frequency F, is 19.2 MHz, M maybe set to a value of 259 and N may be set toa value of 191.
In use of the system, the system 150 operates as follows, and as shown in Figure 4. At regular intervals, the temperature of the oscillator 20 is measured in step 300 using the temperature sensor 50 and ND converter 52. The fact that the temperature of the oscillator 20 is measured in the same way as during the calibration phase removes one possible source of error in the process.
In step 310, the calculation block 40 then determines the free-running frequency F of the oscillator 20, based on this measured temperature and the knowledge of the frequency-temperature characteristic of the oscillator 20 determined above.
The calculation block 40 then sets the value of k that is required, such that the frequency synthesizer 30 operates to make the output frequency F,, equal to its desired value. Thus, the operation of the frequency synthesizer 30 Is adjusted such that any change in frequency F caused by a change in the oscillator temperature is compensated for, and F, remains constant.
The method described above can be used to compensate for changes in the temperature of the device white the frequency-temperature characteristic of the oscillator 20 is known. However, the frequency-temperature characteristic of the oscillator 20 will typically also vary with time, as the crystal ages.
In that case, the calibration process of Figure 3 may need to be repeated. However, in one embodiment of the invention, for a particular class of oscillator, the only change in the frequency-temperature characteristic of the oscillator 20, as the osciflator ages, is that the frequency increases or decreases by a constant amount, at all temperatures.
That is, where the free-running frequency of the oscillator can be expressed as a fifth-order polynomial function of the temperature, the only change is to the constant term in this polynomial function.
Therefore, at suitable intervals, for example once per month, the calibration is checked, by comparing the output frequency F, with a suitable frequency source. If there is any inaccuracy, the frequency-temperature characteristic used in step 310 is updated.
The output frequency F, can for example be compared against a reference by attempting to demodulate signals transmitted from another cellular basestation, as described above. Alternatively, for example, the frequency synthesis system 150 may acquire timing messages derived from an atomic clock or similarly accurate source via NTP (Network Time Protocol). This is possible as femtocell basestations are as a matter of course connected to the Internet via a broadband connection. The time difference between successive timing messages, as measured by a clock controlled by the frequency synthesis system 150, can then be compared with the time difference between those messages, as measured by the highly accurate source itself. Any difference can then be determined to be the result of Inaccuracy in the frequency synthesis system 150, caused for example by aging of the crystal in the oscillator 20, allowing the frequency-temperature characteristic to be updated for future use.
Thus, by calibrating the system 150 lndMdually, I.e. rather than loading the system 150 with predetennined information relating to the expected temperature-frequency characteristic of all such oscillators, any systematic errors introduced for example by the positioning of the temperature sensor, or by the properties of that specific device, may be automatically compensated for.
Thus, embodiments of the present invention allow a relatively cheap, and therefore inherently inaccurate, oscillator to be used in combination with a frequency synthesizer that accurately compensates for any errors in the frequency of the signal output from the oscillator. The frequency synthesizer adapts to compensate for variations in the frequency of the signal output from the oscillator to produce a signal with a fixed frequency.

Claims (11)

1. A frequency synthesis system, comprising: an oscillator for generating a reference signal having a first frequency; a frequency synthesizer, for receMng said reference signal and generating an output signal at a desired output frequency by multiplying the first frequency by a multiplicatIon factor; a temperature sensor, for measuring a temperature of the osciliator; and control circuitry for generating said multiplication factor based on the measured temperature of the oscillator.
2. A frequency synthesis system as claimed in claim, wherein the frequency synthesizer comprises a phase locked loop having a first frequency division circuit in a feedback path thereof, said division circuit being configured to dMde the output frequency by the multiplication factor.
3. A frequency synthesis system as claimed in daim 2, wherein the multiplication factor comprises an integer part and a non-integer part, and wherein the first frequency division circuit comprises a sigma-delta modulator.
4. A frequency synthesis system as claimed in claIm 1, 2 or 3, comprising a second frequency dMsion circuit, connected to receive a signal from the oscillator at an oscillator output frequency thereof, and to divide the oscillator output frequency by a second factor to generate the reference signal at the first frequency.
5. A frequency synthesis system as claimed in daim 4, wherein the oscillator is uncompensated, and the oscillator output frequency is a free-running oscillator frequency.
6. A basestation for a cellular mobile communications network, comprising a frequency synthesis system as claimed in any preceding claim.
7. A method of generating a signal at a desired frequency, the method comprising: determining a frequency-temperature characteristic of an osclllator measuring a temperature of the oscillator determining a current frequency of the oscillator, based on the measured temperature and said characteristic; multiplying the current frequency by a multiplication factor to obtain an output signal having a desired frequency, said multiplication factor being determined based on said measured temperature.
8. A method as claimed in claim 7, wherein the step of determining the frequency-temperature characteristic comprises: measuring a frequency of the oscillator at each of a plurality of temperatures; and determining coefficients of a polynomial frequency-temperature function based on the measured frequencies.
9. A method as claimed in claim 7. wherein the step of multiplying the current frequency by a multiplication factor comprises: dividing the current frequency by a fIrst factor to obtain a phase-locked loop input frequency; applying the phase-locked loop Input frequency to a phase-locked loop that multiplies the phase-locked loop input frequency by a second factor to obtain the desired frequency of the output signal.
10. A method as claimed in claim 9, wherein the second factor comprises an integer part and a non-integer part, and the phase-locked loop comprises a sigma-delta modulator in a feedback path thereof.
11. A method as claimed In claim 10, comprisIng setting the first factor and the integer part of the second factor such that the desired frequency of the output signal can be obtained from the current frequency of the oscillator over a large part of an operating range thereof, by varying the non-integer part of the second factor without varying the Integer part of the second factor.
GB0724559A 2007-12-17 2007-12-17 Frequency synthesis in a wireless basestation Withdrawn GB2455717A (en)

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GB2455717A true GB2455717A (en) 2009-06-24

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2509188A (en) * 2012-12-04 2014-06-25 Cambridge Silicon Radio Ltd Digital PLL in which the oscillator may be free-running and located outside the loop
EP3687069A1 (en) * 2019-01-24 2020-07-29 Shenzhen Goodix Technology Co., Ltd. Temperature stabilized oscillator circuit for nb-iot devices

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JPH03209917A (en) * 1990-01-11 1991-09-12 Japan Radio Co Ltd Pll type frequency synthesizer
WO1997040580A1 (en) * 1996-04-22 1997-10-30 Motorola Inc. Frequency synthesizer with temperature compensation and frequency multiplication and method of providing the same
US5848355A (en) * 1993-07-07 1998-12-08 Motorola, Inc. Frequency synthesizer correction using a temperature responsive divisor control
WO1999000902A1 (en) * 1997-06-30 1999-01-07 Motorola Inc. Communication device a frequency compensating synthesizer and method of providing same
US6542044B1 (en) * 2000-09-11 2003-04-01 Rockwell Collins, Inc. Integrated frequency source
WO2006000611A1 (en) * 2004-06-24 2006-01-05 Nokia Corporation Frequency synthesizer

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03209917A (en) * 1990-01-11 1991-09-12 Japan Radio Co Ltd Pll type frequency synthesizer
US5848355A (en) * 1993-07-07 1998-12-08 Motorola, Inc. Frequency synthesizer correction using a temperature responsive divisor control
WO1997040580A1 (en) * 1996-04-22 1997-10-30 Motorola Inc. Frequency synthesizer with temperature compensation and frequency multiplication and method of providing the same
WO1999000902A1 (en) * 1997-06-30 1999-01-07 Motorola Inc. Communication device a frequency compensating synthesizer and method of providing same
US6542044B1 (en) * 2000-09-11 2003-04-01 Rockwell Collins, Inc. Integrated frequency source
WO2006000611A1 (en) * 2004-06-24 2006-01-05 Nokia Corporation Frequency synthesizer

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2509188A (en) * 2012-12-04 2014-06-25 Cambridge Silicon Radio Ltd Digital PLL in which the oscillator may be free-running and located outside the loop
US8803574B2 (en) 2012-12-04 2014-08-12 Cambridge Silicon Radio Limited Generating a tuned frequency output from a signal generator
EP3687069A1 (en) * 2019-01-24 2020-07-29 Shenzhen Goodix Technology Co., Ltd. Temperature stabilized oscillator circuit for nb-iot devices
WO2020151847A1 (en) * 2019-01-24 2020-07-30 Shenzhen GOODIX Technology Co., Ltd. Temperature stabilized oscillator circuit for nb-iot devices

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