GB2454996B - Method for balanced handling of initiative in a non-uniform multiprocessor computing system - Google Patents

Method for balanced handling of initiative in a non-uniform multiprocessor computing system

Info

Publication number
GB2454996B
GB2454996B GB0822779A GB0822779A GB2454996B GB 2454996 B GB2454996 B GB 2454996B GB 0822779 A GB0822779 A GB 0822779A GB 0822779 A GB0822779 A GB 0822779A GB 2454996 B GB2454996 B GB 2454996B
Authority
GB
United Kingdom
Prior art keywords
initiative
uniform
computing system
multiprocessor computing
balanced handling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0822779A
Other versions
GB2454996A (en
GB0822779D0 (en
Inventor
Elke Nass
Martin Taubert
Hans-Helge Lehmann
Joachim Von Buttlar
Frank Koeble
Alexander Albus
Kenneth J Oakes
John S Trotter
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB0822779D0 publication Critical patent/GB0822779D0/en
Publication of GB2454996A publication Critical patent/GB2454996A/en
Application granted granted Critical
Publication of GB2454996B publication Critical patent/GB2454996B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/505—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/5044—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering hardware capabilities
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/50—Indexing scheme relating to G06F9/50
    • G06F2209/504—Resource capping
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
GB0822779A 2008-01-23 2008-12-15 Method for balanced handling of initiative in a non-uniform multiprocessor computing system Expired - Fee Related GB2454996B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP08150526 2008-01-23

Publications (3)

Publication Number Publication Date
GB0822779D0 GB0822779D0 (en) 2009-01-21
GB2454996A GB2454996A (en) 2009-05-27
GB2454996B true GB2454996B (en) 2011-12-07

Family

ID=40326082

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0822779A Expired - Fee Related GB2454996B (en) 2008-01-23 2008-12-15 Method for balanced handling of initiative in a non-uniform multiprocessor computing system

Country Status (1)

Country Link
GB (1) GB2454996B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8219725B2 (en) 2010-06-16 2012-07-10 International Business Machines Corporation Cache optimized balanced handling of initiatives in a non-uniform multiprocessor computing system

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1492005A2 (en) * 2003-06-27 2004-12-29 Kabushiki Kaisha Toshiba Method and system for scheduling threads to perform real-time operations
US20070113231A1 (en) * 2005-11-11 2007-05-17 Hitachi, Ltd. Multi processor and task scheduling method
WO2007069951A1 (en) * 2005-12-15 2007-06-21 Telefonaktiebolaget Lm Ericsson (Publ) A method and apparatus for load distribution in multiprocessor servers
EP1840742A2 (en) * 2006-03-31 2007-10-03 Technology Properties Limited Method and apparatus for operating a computer processor array

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1492005A2 (en) * 2003-06-27 2004-12-29 Kabushiki Kaisha Toshiba Method and system for scheduling threads to perform real-time operations
US20070113231A1 (en) * 2005-11-11 2007-05-17 Hitachi, Ltd. Multi processor and task scheduling method
WO2007069951A1 (en) * 2005-12-15 2007-06-21 Telefonaktiebolaget Lm Ericsson (Publ) A method and apparatus for load distribution in multiprocessor servers
EP1840742A2 (en) * 2006-03-31 2007-10-03 Technology Properties Limited Method and apparatus for operating a computer processor array

Also Published As

Publication number Publication date
GB2454996A (en) 2009-05-27
GB0822779D0 (en) 2009-01-21

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Legal Events

Date Code Title Description
746 Register noted 'licences of right' (sect. 46/1977)

Effective date: 20130107

PCNP Patent ceased through non-payment of renewal fee

Effective date: 20191215