GB2408357A - Regulating a voltage supply to a semiconductor device - Google Patents
Regulating a voltage supply to a semiconductor device Download PDFInfo
- Publication number
- GB2408357A GB2408357A GB0326864A GB0326864A GB2408357A GB 2408357 A GB2408357 A GB 2408357A GB 0326864 A GB0326864 A GB 0326864A GB 0326864 A GB0326864 A GB 0326864A GB 2408357 A GB2408357 A GB 2408357A
- Authority
- GB
- United Kingdom
- Prior art keywords
- performance
- semiconductor device
- voltage
- frequency
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Regulating the voltage supply to a semiconductor device, such as a processor, where the voltage is changed when an operating frequency is changed, frequency/voltage information being held in a memory. Also described is an arrangement for regulating the voltage supply to a semiconductor device where one of several voltages may be supplied, with limits on a performance parameter of the device, wherein the performance parameter, for example that of a reference oscillator circuit 107, is measured, compared to the limits and a decision taken as to whether to raise or lower the voltage. The frequency changes may be associated with temperature changes.
Description
1 2408357
METHOD AND DEVICE FOR REGULATING A VOLTAGE SUPPLY TO A
SEMICONDUCTOR DEVICE
The present invention relates to a method and device for regulating a voltage supply to a semiconductor device.
As the demand for portable electronic devices has increased so correspondingly has the requirement for increased battery life and processor performance.
While processor performance has continued to increase at a rapid rate, improvements in battery performance have not.
Additionally, in many cases the increase in processor performance has resulted in an increased power requirement, which could result in many cases in a reduced battery life.
Consequently, there is a continuing drive to reduce power usage.
Once solution that manufactures have used to reduce power usage within portable electronic devices has included temporarily turning off unneeded peripherals; blocks of on-chip memory and, during idle periods, the processor itself.
Another solution involves the dynamic control of processor frequency and voltage, commonly known as dynamic voltage frequency scaling DVFS.
This technique allows the operational frequency of a processor to be reduced when the processor is not fully loaded. Accordingly, low MIPS applications can be executed at a lower frequency and consequently be executed at a lower supply voltage.
DVFS provides the greatest power saving for low MIP applications.
However, to ensure that an application does not fail this technique requires that the frequency of a processor is raised just before the loading of the processor Increases.
Another solution involves lowering the supply voltage to an integrated circuit to the lowest voltage that is necessary to maintain the performance of the integrated circuit. This solution is based on the principle that the specified voltage supply requirements for an integrated circuit are based upon worst case conditions, for example worst case operational temperature and quality of production process(i.e. manufactured process corner), whereas actual conditions are normally better than these. This technique is known as dynamic process temperature compensation DPTC.
DPTC provides the greatest power saving for high MIPS applications.
In accordance with a first aspect of the present invention there is provided a device for regulating a voltage supply to a semiconductor device according to claim 1.
This provides the advantage of allowing the voltage supply to an integrated circuit to be set based upon both the processing load on the integrated circuit and the operating conditions and manufacturing process of the integrated circuit.
Additionally, short voltage switching times are achievable allowing power saving and optimal voltage levels are set during frequency scaling.
In accordance with a second aspect of the present invention there is provided a method for regulating a voltage supply to a semiconductor device according to claim 10.
An embodiment of the invention will now be described, by way of example, with reference to the drawings, of which: Figure 1 illustrates an arrangement for regulating a voltage supply to a semiconductor device according to an embodiment of the present invention; Figure 2 illustrates a look-up table for a specific operating frequency of an integrated circuit according to an embodiment of the present invention Figure 3 illustrates a graphical representation of a look-up table shown in figure 2; Figure 4 illustrates a set of look-up tables for a set of respective operating frequencies of an integrated circuit according to an embodiment of the present invention.
Figure 1 shows an integrated circuit 100, a power management module 101 having a voltage supply regulator 112 for providing a supply voltage to the integrated circuit 100, a software module 102 for controlling the regulation of the supply voltage to the integrated circuit 100 and a memory module 103 having a set of look-up tables 104 for storing performance data associated with the integrated circuit 100.
The integrated circuit includes a reference counting circuit 106, a ring oscillator 107 that acts as a reference circuit, three comparators 108, 109, 110 and a look-up table register 111. It should be noted, however, that the comparators 108, 109, 110 and the look-up table register 111 could be located of chip from the integrated circuit 100.
The ring oscillator 107 (i.e. reference circuit) is arranged to generate a free running reference clock signal which is provided to the reference circuit counter 106. The reference circuit 107 is a subset of the circuits formed on the integrated circuit 100 and is used as a measure of the performance of the integrated circuit 100. The purpose of using the reference circuit 107 is to determine the performance of the integrated circuit 100 is to minimise the complexity of the device for regulating the voltage supply to the integrated circuit 100. However, it could also be possible to measure the operating performance of all of the circuits on the integrated circuit 100.
The frequency of the reference circuit 107 clock signal is related to how the reference circuit 107 is performing, and is dependent upon the operating conditions of the reference circuit 107, such as the operating temperature of the integrated circuit, the supply voltage supplied to the integrated circuit 100 and the manufactured process corner.
As stated above, the reference circuit clock signal is a clock signal that is based upon the process corner case, the environmental conditions and the operating voltage of the integrated circuit 100. This is contrast to the operating frequency of the integrated circuit 100, which is the clock rate the integrated circuit is working too.
The reference counting circuit 106 measures the clock signal, which as stated above is a reflection of the performance of the reference circuit 107, and provides the measurements to the comparators 108, 109, 1 10.
The comparators 108, 109, 110 are coupled to the look-up table register 1 1 1, with the look-up table register 111 also being coupled to the memory module 103 for accessing information stored in the set of look-up tables 104 contained within the memory module 103.
Figure 2 illustrates an example of one of the set of look-up tables 104, within the memory module 103, that is associated with one operating frequency of the integrated circuit 100 where the look-up table 205 is preloaded with a set of reference circuit count values, where each set of reference circuit count values is associated with a respective supply voltage for the given operating frequency.
Each set of reference circuit count values define a range of performance for the reference circuit 107, where, in this embodiment, the reference circuit count values differ for the different supply voltages, a graphical representation of the data is shown in figure 3,.
The memory module 103 stores a set of look-up tables 104 where each look up table is preloaded with a set of reference circuit count values and where each set of look-up tables 104 are associated with a respective operating frequency of the integrated circuit 100.
Each set of reference circuit count values stored within a look-up table defined three performance markers (i.e. three levels of performance of the integrated circuit 100). The first level 201, the upper performance limit, indicates the reference circuit count value that corresponds to the upper performance limit for the integrated circuit 100 at a specified voltage at a given frequency. The second level 202, the lower performance limit, indicates the reference circuit count value that corresponds to the lowest acceptable performance level for the integrated circuit 100 at a specified voltage at a given frequency. The third level 203, the critical lower performance level, indicates a reference circuit count value that corresponds to a level of performance at which logic operation failures within the integrated circuit 100 could occur for a specified voltage at a given frequency.
The information stored in the set of look-up tables 104 correspond to predefined DPTC values for the integrated circuit.
By way of illustration, figure 2 shows that for the current embodiment nine supply voltages for the integrated circuit 100 have been defined for a specific operating frequency of the integrated circuit 100 where each supply voltage is associated with a respective performance range (i.e. a range of reference circuit count values), where the performance range for the first voltage provides a reference circuit count value for the upper performance limit of 290 counts, a reference circuit count value for the lower performance limit of 275 counts and a reference circuit count value for the critical lower performance level of 264 counts.
The performance limits stored in each look-up table are based on two main parameters: IR (i.e. current, resistance) drop value (voltage reduction due to current flow through metal interconnects) and the accuracy of the voltage supply regulator 112 for the specific operating frequency to which the relevant look-up
table applies.
The critical lower performance level 203 is set by the minimal required voltage level and IR drop value, where IR drop value depends on existing absolute supply voltage level. The critical lower performance level 203 is set such that if the maximum IR drop occurs, the supply voltage inside the integrated circuit 100 would be so low that the most constrained delay paths might begin to malfunction.
The lower performance limit 202 is higher than the critical lower performance lever 203 by a value proportional to the voltage raise of one minimum step of the voltage supply regulator 112 within the power management module 101 plus some spare margin.
The higher performance limit 201 is higher than the lower performance limit 202 by a value proportional to a voltage raise of one and the half voltage steps of the voltage supply regulator 112 within the power management module 101 plus some spare margin.
The software module 102 receives information from the integrated circuit 100 information on the operating frequency of the integrated circuit 100 and information from the power management module 101 on the voltage supply being provided to the integrated circuit 100. The software module 102 then loads the three reference circuit count performance values for the look-up table applicable to the operating frequency of the integrated circuit 100 and associated with the voltage supplied to the look-up table register 111.
The technique for changing the operational frequency of the integrated circuit in accordance with the processor load requirements of an application (i.e. DVFS) are well known to a person skilled in the art and for the purposes of this embodiment will not be described in any further detail.
The look-up table register 111 is arranged to provide the upper performance level value and the lower performance level reference circuit count value to the first comparator 108 and second comparator 109 respectively and the critical lower performance level reference circuit count value to the third comparator 110.
The first comparator 108 compares the measured reference count value received from the reference counting circuit 106 with the reference circuit count values received from the look-up table register 111 (i.e. the upper performance level reference circuit count value).
If the measured reference count value falls below the upper performance level reference circuit count value the first comparator 108 provides no output.
If the measured reference count value is above the upper performance level reference circuit count value (i.e. the supply voltage is unnecessarily high) the first comparator 108 issues an interrupt request to the software module 102 requesting a voltage decrease. On receipt of the interrupt request the software module 102 initiates an instruction to the power management module 101 to lower the voltage supply to the integrated circuit 100 to the next appropriate lower voltage supply level within the look-up table and the software module initiates the loading of the three reference circuit count performance values associated with the new supplied voltage into the look-up table register 111.
The second comparator 109 compares the measured reference circuit count value received from the reference counting circuit 106 with the reference circuit count value received from the look-up table register 111 (i.e. the lower performance level reference circuit count value).
If the measured reference count value is higher than the lower performance level reference circuit count value the second comparator 109 provides no output.
If the measured reference count value is below the lower performance level reference circuit count value (i.e. the supply voltage is too low) the second comparator 109 issues an interrupt request to the software module 102 requesting a voltage increase. On receipt of the interrupt request the software module 102 initiates an instruction to the power management module 101 to increase the voltage supply to the integrated circuit 100 to the next appropriate highest voltage supply level within the look-up table and the software module 102 initiates the loading of the three reference circuit count performance values associated with the new supplied voltage into the look-up table register 111.
The third comparator 110 compares the measured reference circuit count value received from the reference counting circuit 106 with the reference circuit count value received from the look-up table register 111 (i.e. the critical lower performance reference circuit count value).
If the measured reference circuit count value falls below the critical lower performance level reference circuit count value, which is placed at a lower count level to the lower performance level, this could indicate that a previous request to increase the voltage supply to the integrated circuit 100 is occurring too slowly and/or the operating environment conditions are degrading at a fast rate. In response to the measured reference circuit count value falling below the critical lower performance level the third comparator 110 issues a high priority interrupt request to the software module 102 requesting a voltage increase. On receipt of the high priority interrupt request the software module 102 places a high priority instruction to the power management module 101 requesting an increase in the voltage supply to the integrated circuit 100 to the next higher voltage supply level and, if not already performed as a result of any previous voltage request interrupts from the second comparator 109, the software module 102 initiates the loading of the three reference circuit count performance values associated with the new supply voltage to the look-up table register 111.
When the operational frequency of the integrated circuit 100 is changed (by the DVFS operation) the software module 102 references the look-up table applicable to the new operating frequency and determines which three reference circuit count performance values to load into the look-up table register 111 by performing a comparison between the measured reference count value and the set of reference circuit count performance values within the selected look-up table.
Figure 4 shows by way of illustration an example of a memory module having a set of look-up tables 104 having three look-up tables 401, 402, 403 associated with three separated operating frequencies of an integrated circuit 100. Each of the three look-up tables 401, 402, 403 has nine sets of reference circuit count performance values.
By way of example, when the integrated circuit 100 is operating at the first frequency the software module 102 determines with reference to the first look-up table 401 from the measured reference count value, as described above, that the optimum supply voltage would be 1.3. If, due to a change in processing loading requirements, the operating frequency of the integrated circuit 100 is changed to the second frequency the software module 102 determines with reference to the second look-up table 402 and the measured reference count value that the optimum supply voltage should be 1.45. Correspondingly, if due to a further change in processing loading the operating frequency of the integrated circuit 100 is change to the third frequency the software module 102 determines with reference to the third look-up table 403 and the measured reference count value that the optimum supply voltage should be 1.55.
It will be apparent to those skilled in the art that the disclosed subject matter may be modified in numerous ways and may assume many embodiments other than the preferred forms specifically set out as described above, for example the above embodiments could be arranged such that each look-up table could have more or less than three performance levels and the change in voltage could be to voltage levels other than the next value up or down from the current voltage value within the look- up table, rather than the comparators 108, 109, 110 being arranged to send a signal when a performance level has been reached the comparators 108, 109, 110 could be arranged to stop sending a signal when a performance level has be reached and the DPTC values stored in the set of look-up tables could be derived in alternative ways.
Claims (12)
1. A device for regulating a voltage supply to a semiconductor device, the device comprising memory for storing a plurality of process temperature compensation voltage values, wherein the respective process temperature compensation voltage values are associated with a respective operational frequency for the semiconductor device; and a regulator for modifying the supply voltage to the semiconductor device if the operation frequency of the semiconductor device changes to a new operational frequency, wherein the voltage is modified to substantially the same value as the process temperature compensation voltage value associated with the new operation frequency.
2. A device according to claim 1, wherein each process temperature compensation voltage value associated with a respective operational frequency is determined from a plurality of performance ranges stored in the memory wherein the respective performance ranges are associated with a respective supply voltage.
3. A device according to claim 2, further comprising means for measuring the performance of the semiconductor device, wherein the regulator is arranged to modify the supply voltage to the semiconductor device if the measured performance of the semiconductor device is not within a predetermined portion of the performance range associated with the voltage supplied to the semiconductor device for a given frequency.
4. A device according to claim 3, wherein the performance range is defined to have an upper performance limit such that if the measured performance of the semiconductor device is above the upper performance limit the regulator is arranged to reduce the voltage supplied to the semiconductor device.
5. A device according to claims 3 or 4, wherein the performance range is defined to have a lower performance limit such that if the measured performance of the semiconductor device is below the lower performance limit the regulator is arranged to increase the voltage supplied to the semiconductor device.
6. A device according to any of claims 3 to 5, wherein the performance range is defined to have a critical lower performance limit such that if the measured performance of the semiconductor device is below the critical lower performance limit the regulator is arranged to increase the voltage supplied to the semiconductor device.
7. A device according to any of claims 3 to 6, wherein the means for measuring the performance is arranged to measure the performance of the semiconductor device by measuring the performance of a reference circuit that forms part of the semiconductor device.
8. A device according to claim 7, wherein the plurality of performance ranges are arrange to include a performance guard margin to compensate for differences between the measured performance of the reference circuit and the actual performance of the complete integrated circuit.
9. A device according to any of claims 3 to 8, further comprising a ring oscillator, wherein the means for measuring the performance measures the frequency of the ring oscillator for providing a measure of the performance of the integrated circuit.
10.A method for regulating a voltage supply to a semiconductor device, the method comprising storing a plurality of process temperature compensation voltage values, wherein the respective process temperature compensation voltage values are associated with a respective operational frequency for the semiconductor device; and modifying the supply voltage to the semiconductor device if the operation frequency of the semiconductor device changes to a new operational frequency, wherein the voltage is modified to substantially the same value as the process temperature compensation voltage value associated with the new operation frequency.
11. A device substantially as herein described with reference to the accompanying figures.
12. A method substantially as herein described with reference to the accompanying figures.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB0326864A GB2408357A (en) | 2003-11-18 | 2003-11-18 | Regulating a voltage supply to a semiconductor device |
| PCT/IB2004/003939 WO2005050425A1 (en) | 2003-11-18 | 2004-11-18 | Method and device for regulating a voltage supply to a semiconductor device |
| US10/595,908 US20090015232A1 (en) | 2003-11-18 | 2004-11-18 | Method and device for regulating a voltage supply to a semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB0326864A GB2408357A (en) | 2003-11-18 | 2003-11-18 | Regulating a voltage supply to a semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| GB0326864D0 GB0326864D0 (en) | 2003-12-24 |
| GB2408357A true GB2408357A (en) | 2005-05-25 |
Family
ID=29764025
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB0326864A Withdrawn GB2408357A (en) | 2003-11-18 | 2003-11-18 | Regulating a voltage supply to a semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB2408357A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2443307A (en) * | 2006-10-24 | 2008-04-30 | Nec Electronics Corp | Adjustment of clock frequency and voltage of a CPU for processes associated with an event. |
| EP1965285A2 (en) * | 2007-03-01 | 2008-09-03 | VIA Technologies, Inc. | Microprocessor capable of dynamically reducing its power consumption in response to varying operating temperatue |
| JP2010511247A (en) * | 2006-11-29 | 2010-04-08 | アギア システムズ インコーポレーテッド | Speed binning for dynamic and adaptive power control |
| US8412962B2 (en) | 2002-10-03 | 2013-04-02 | Via Technologies, Inc. | Microprocessor with improved thermal monitoring and protection mechanism |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002017052A2 (en) * | 2000-08-21 | 2002-02-28 | Intel Corporation | Apparatus having adjustable operational modes and method therefore |
| US20020083355A1 (en) * | 1999-04-30 | 2002-06-27 | Clark Lawrence T. | Method and apparatus for dynamic power control of a low power processor |
| US20020087896A1 (en) * | 2000-12-29 | 2002-07-04 | Cline Leslie E. | Processor performance state control |
| US20030071657A1 (en) * | 2001-08-29 | 2003-04-17 | Analog Devices, Inc. | Dynamic voltage control method and apparatus |
| WO2003036448A2 (en) * | 2001-10-25 | 2003-05-01 | Intel Corporation | A method and system for power reduction |
| US20030184271A1 (en) * | 2000-12-20 | 2003-10-02 | Kazuo Aisaka | Eletronic circuit of low power consumption, and power consumption reducing method |
-
2003
- 2003-11-18 GB GB0326864A patent/GB2408357A/en not_active Withdrawn
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020083355A1 (en) * | 1999-04-30 | 2002-06-27 | Clark Lawrence T. | Method and apparatus for dynamic power control of a low power processor |
| WO2002017052A2 (en) * | 2000-08-21 | 2002-02-28 | Intel Corporation | Apparatus having adjustable operational modes and method therefore |
| US20030210026A1 (en) * | 2000-08-21 | 2003-11-13 | Clark Lawrence T. | Apparatus having adjustable operational modes and method therefore |
| US20030184271A1 (en) * | 2000-12-20 | 2003-10-02 | Kazuo Aisaka | Eletronic circuit of low power consumption, and power consumption reducing method |
| US20020087896A1 (en) * | 2000-12-29 | 2002-07-04 | Cline Leslie E. | Processor performance state control |
| US20030071657A1 (en) * | 2001-08-29 | 2003-04-17 | Analog Devices, Inc. | Dynamic voltage control method and apparatus |
| WO2003036448A2 (en) * | 2001-10-25 | 2003-05-01 | Intel Corporation | A method and system for power reduction |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8412962B2 (en) | 2002-10-03 | 2013-04-02 | Via Technologies, Inc. | Microprocessor with improved thermal monitoring and protection mechanism |
| GB2443307A (en) * | 2006-10-24 | 2008-04-30 | Nec Electronics Corp | Adjustment of clock frequency and voltage of a CPU for processes associated with an event. |
| GB2443307B (en) * | 2006-10-24 | 2008-09-03 | Nec Electronics Corp | Data processing apparatus and cpu control method |
| JP2010511247A (en) * | 2006-11-29 | 2010-04-08 | アギア システムズ インコーポレーテッド | Speed binning for dynamic and adaptive power control |
| EP1965285A2 (en) * | 2007-03-01 | 2008-09-03 | VIA Technologies, Inc. | Microprocessor capable of dynamically reducing its power consumption in response to varying operating temperatue |
| EP1965285A3 (en) * | 2007-03-01 | 2012-03-21 | VIA Technologies, Inc. | Microprocessor capable of dynamically reducing its power consumption in response to varying operating temperatue |
Also Published As
| Publication number | Publication date |
|---|---|
| GB0326864D0 (en) | 2003-12-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20090015232A1 (en) | Method and device for regulating a voltage supply to a semiconductor device | |
| EP1763725B1 (en) | Controlling standby power of low power devices | |
| US7840823B2 (en) | Processor system for varying clock frequency and voltage in response to a comparison of instruction execution rate to a reference value | |
| EP2485117B1 (en) | Method and apparatus for adjusting the voltage and frequency to minimize power dissipation in a multiprocessor system | |
| US8442784B1 (en) | Adaptive power control based on pre package characterization of integrated circuits | |
| US7917772B1 (en) | Dynamic chip control | |
| US7266712B2 (en) | Method, system, and apparatus for dynamically configuring the operating point utilized for thermal management of an integrated circuit | |
| US20040117678A1 (en) | System, method and apparatus for conserving power consumed by a system having a processor integrated circuit | |
| US7437580B2 (en) | Dynamic voltage scaling system | |
| US20110219245A1 (en) | Adaptive power control | |
| US20090158061A1 (en) | Method and apparatus for on-demand power management | |
| US20100077233A1 (en) | Systems and methods for control of integrated circuits comprising body biasing systems | |
| WO2004061633A2 (en) | A method and apparatus for reducing power consumption through dynamic control of supply voltage and body bias | |
| CN102109819B (en) | SOC power load self-adaptive control method | |
| US20070266263A1 (en) | Speed adjustment system and method for performing the same | |
| EP3232297A1 (en) | Chip aware thermal policy | |
| WO2013078311A1 (en) | Frequency scaling of variable speed systems for fast response and power reduction | |
| US20110109378A1 (en) | Method and Device For Supplying Power to a Microelectronic Chip | |
| US7774625B1 (en) | Adaptive voltage control by accessing information stored within and specific to a microprocessor | |
| GB2408357A (en) | Regulating a voltage supply to a semiconductor device | |
| US8302063B2 (en) | Method and system to optimize semiconductor products for power, performance, noise, and cost through use of variable power supply voltage compression | |
| US7203856B2 (en) | Mobile computer with desktop type processor | |
| US6999354B2 (en) | Dynamically adaptable memory | |
| GB2408356A (en) | Regulating a voltage supply to a semiconductor device | |
| CN101458811A (en) | Apparatus and method for processing data |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| COOA | Change in applicant's name or ownership of the application |
Owner name: FREESCALE SEMICONDUCTOR INC. Free format text: FORMER APPLICANT(S): MOTOROLA INC |
|
| WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |