GB2404120A

GB2404120A - A high level baseband controller coupled to input-output ports of a radio module to operate the module in accordance with a selected wireless protocol of many

Info

Publication number: GB2404120A
Application number: GB0423210A
Authority: GB
Inventors: James Kardach; Jeffrey Schiffer
Original assignee: Intel Corp
Current assignee: Intel Corp
Priority date: 2001-03-29
Filing date: 2002-03-01
Publication date: 2005-01-19
Anticipated expiration: 2022-03-01
Also published as: GB2404120B; GB0423210D0; GB2404119A; GB0423209D0; GB2404119B

Abstract

A computer system has a radio module including a low-level baseband controller and a transceiver to enable wireless communication in accordance with a plurality of wireless communications, the module meeting LMA by the FCC or similar type approval relevant to the U.K. The system further includes a high-level baseband controller coupled to input-output ports of the radio module to operate the radio module in accordance with a selected one of the plurality of wireless communication protocols.

Description

COMPUTER SYSTEM

The present invention relates to computer systems and more particularly to a- radio module partitioned to meet government regulations with protocol flexibility.

BACKGROUND

Mobile computer systems, from small handheld electronic devices to application-specific electronic components, such as set-top boxes, to medium sized notebook and laptop systems, are becoming increasingly pervasive in our society. Unlike their symmetric multiprocessing counterparts, such as server, workstation, and high-end desktop systems, mobile computer systems typically include a single, primary, host processor coupled to various peripheral devices.

Computer system designers continually strive to provide more features to users without significantly increasing the cost of the system. Unfortunately, each additional feature typically corresponds to additional components added to the computer system, resulting in increased size and expense.

SUMMARY OF THE INVENTION

According to this invention there is provided a mobile, uniprocessor computer system as claimed in claim 1 herein.

Preferred features of the invention are defined by the dependent claims.

BRIEF [)ESCRiPTION OF THE DRAWINGS The present invention is illustrated by way of example and not limitation in the accompanying figures in which like references indicate similar elements and in which: Figures 1 a-d are systems formed in accordance with embodiments of the present invention; Figure 2a is a processor used in the present invention; Figure 2b is a flow chart showing a method used in the present invention; and Figure 3 is a computer system formed in accordance with an alternate embodiment of the present invention.

DETAILED DESCRIPTION

In the present invention, a scalable interface (referred to herein as a harmonized interface") from a host computer system to a wireless radio module is provided. The module meets the legal requirements for an intentional radiator but may not be specific to any given wireless communication protocol. On the other side of the harmonized interface resides a generic protocol engine that can manipulate the wireless module to meet a given wireless communication protocol. Sitting above the protocol engine resides the normal operating system (OS) driver stack that then connects to the different networking and peripheral drivers of the host computer system.

With this type of partitioning, a radio module may be designed to operate in accordance with multiple wireless communication protocols. The harmonized interface may connect this radio module to a host computer system that then performs the highlevel baseband processing for the module. By dynamically changing the source code in the host system, different wireless communication protocols may be emulated.

For example a module may be created that operates in accordance with the Bluetooth* (as described in, e.g., Specification of the Bluetooth Systems v1.0b, December 15t, 1999), HomeRF. Shared Wireless Access Protocol (SWAP) (as described in, e.g., Shared Wireless Access Protocol (SWAP) Specification v.1.0, January 5, 1999), and IEEE 802.11 (as described in, e.g., FEES Std 802.11. 1999 Edition) protocols. The protocol may be changed dynamically depending on the environment of the user (e.g. on the road, in the office, or at home). In addition to these short-range wireless communication protocols, long range wireless communication protocols may also be emulated, such as a Third Generation (3G) cellular communication protocol, given the appropriate module attached to the harmonized interface. (*Trademarks and brands are the property of their respective owners.) By partitioning the baseband correctly, such a design may also allow the host processor of the host computer system to perform some of the higher level baseband processing Using the harmonized interface, a host processor of a computer system may perform baseband processing functions natively, thereby reducing the cost of the system by reducing the need for separate, specialized processing hardware to support the radio module. To perform these functions, the host processor may include enhancements over conventional processors that enable the host processor to process real-time events, such as those associated with wireless communication protocols.

A more detailed description of the present invention, including various configurations and implementations, is provided below.

THE WIRELESS MODULE

Although much of the following discussion focuses on Bluetooth technology, induding the Bluetooth baseband, it Is to be appreciated that the concepts discussed herein may be more broadly applied to nearly any wireless communication protocol and its respective baseband.

Current partitioning of a wireless Bluetooth module follows the silicon technology used for the implementation. The radio frequency (RF) analog portion it.

of a Bluetooth module is typically manufactured using a Bl-CMOS process, and resides in one device (e.g. the transceiver). The remaining microcontroller section is typically manufactured using a CMOS process, and resides in a

-

separate device, referred to herein as the short range wireless baseband controller.

The Bluetooth system is based on radio technology. Consequently, compliance with a number of country specific regulator requirements may be important for the success of the Bluetooth protocol. These requirements are normally tracked by a government agency, including, for example, the Federal Communications Commission (FCC) in the United States and the Ministry of Posts and Telecommunications (MPT) in Japan. Their requirements dictate how a compliant radio is to behave within their respective counky. After a product to be sold has been assembled, it is sent to a government agency-approved testing facility to be tested and cer6fed. After this testing is complete (which may take two months or more) and the product is certified, the product may then be sold in that country's markets.

To speed up product introduction of such devices, a process called Declaration of Compliance (DoC) has been created. This process allows a company to pre-certify a device based on the fact that it is assembled with pre tested (and pre-certified) components. Building a device using a pre-certified component allows a company to self-certy their Anal product through the DoC process. In the United States, to achieve precertification of a wireless module, the module may be expected to meet the requirements of Limited Modular Approval (LMA) as described in the FCC publication entitled Part 15 Unlicensed Modular Transmitter Approval'' published June 26, 2000.

In accordance with one embodiment of the present invention, a radio module is provided that meets the FCC's LMA requirements such that an OEM can use the DoC process to self-certify their end-user products incorporating the module. This removes from the product development cycle the FCC radio certification process normally associated with irtegrating an intentional RF radiator into a product. Current DoC requirements for LMA extend up through the equivalent of the Bluetooth Link Management Protocol, and because of the present manufacturing-based partitioning described above, a radio module, to obtain LMA, may contain the entire Bluetooth baseband.

For example, consider the computer system of Figure 1a comprising processor 30S, memory 315, and input-output (If) device 320 coupled to bus control logic 310 (which is typically the system chipset). Short range wireless baseband controller 330 contains the logic associated with the full baseband, e.g. the Bluetooth baseband, used to operate transceiver 335. In other words, baseband controller 330 contains all the logic used to support me full baseband of a wireless communication protocol. In addition, controller 330 contains bus interface logic used to communicate with bus control logic 310 of the chipset and with transceiver 335.

Based on this partitioning, a module that meets the requirements for LMA would contain both transceiver 335 and short range wireless baseband controller 330 of Figure 1a. An upgrade or other modification to the baseband, contained within controller 330, may therefore require re-cerEfication of such a module. In addition, such a module leaves little if any of the baseband processing to be implemented by the host computer system, thereby increasing system costs.

Altematively, integration of controller 330 into the host computer system would cause what is leFt-over, transceiver 335' to not be subject to the DoC process because it would not meet LMA requirements.

In an embodiment ofthe present invention, short range wireless baseband controller 330 of Figure 1a is split such that some of the baseband may be integrated into one or more devices of the host computer system. The portion of the baseband that is not integrated into the host system corresponds to the Link Management Protocol, thereby making this portion available, along with the transceiver, to satisfy LMA of the DoC process.

For example, consider the computer system of Figure 1 b comprising processor 305, memory 315, and l-O device 320. These elements are coupled to bus control logic 311. Bus control logic 311 includes an integrated highlevel baseband controller 312 associated untie the high-level portion of the Bluetooth (or other wireless communication protocol) baseband, previously contained within controller 330 of Figure 1a. The remaining low-level portion of the baseband, previously contained within controller 330, is now contained within low-level baseband controller 331. This controller, along with transceiver 336, now constitutes new radio module 340 used in the present invention, and this module is coupled to bus control logic 311, containing high-level baseband controller 312, via a harmonized interface.

Radio module 340 of Figure 1b may be pre-certified by the FCC (or analogous agencies of foreign countries) using the LMA and DoC processes, and sold as an independent, add-on component to computer system manufacturers for connecting to their systems. In the present invention, radio module 340 includes externally accessible I-O ports coupled to I-O buffers within the module. These interconnects may be designed to be coupled to one or more components of the host computer system to enable communication between the module and the host computer system.

By designing radio module 340 of Figure 1b generically, the module may support multiple protocols, and each may share some segment of the baseband portion contained within radio module 340. Protocol-spec tic baseband processing is performed in the high-level portion of the baseband, which is coordinated by high level baseband controller 312 integrated into bus control logic 311. Baseband protocol selection and operation may be controlled, at least in part, by one or more software programs that may or may not involve direct user interaction. These programs may reside, at least in part, on any machine- accessible medium such as a magnetic disk (e.g. a hard drive or floppy disk), an optical disk (e.g. a CD or DVD), a semiconductor device (e.g. Flash, EPROM, or RAM), or carrier wave, all of which are collectively represented by l-O devices 320 of Figures 1a-c.

In accordance With one embodiment of the present invention, the single radio module may run deferent protocols depending on the environment of the user. For example, while traveling a user may use the module to execute Bluetooth protocols. In the office, the user may use the module to execute IEEE 802.11 protocols, and at home the user may use the module to execute SWAPlHome-RF protocols. In accordance with another embodiment of the present invention, the module supports other wireless communication protocols that also operate in the 2.4GHz band. Alternatively, the module may be modified to support wireless communication protocols that operate in other radio bands.

In accordance with one embodiment of the present invention, execution of the high-level baseband protocols (baseband processing) is done by (or aided by) host processor 3as of Figure 1b, which may be modified to support real-time event processing as described below. Alternatively, all or a portion of the high level baseband processing may be performed by control logic embedded within bus control logic 311. Alternatively, execution ofthe high-level baseband protocols is done by (or aided by) a peripheral controller ofthe host system, as described below in conjunction with Figure 1c.

The computer system of figure 1c composes processor BUS, memory 315, and l-O device 320 coupled via bus control logic 310. In addition, embedded controller 325 is coupled to bus control logic 310. Embedded controller 325 may be, for example, a keyboard controller or long-range wireless controller.

Embedded controller 325 includes highlevel baseband controller 326 interfacing to radio module 340 via the harmonized interface. The embodiment depicted in Figure to may be found advantageous over the embodiment of Figure 1b in that the embodiment of figure 1 c provides for operation of the radio module even when the processor may be in a powerdown (low power) state. The embodiment of Figure 1b may be found advantageous in that baseband processing by the host processor reduces system cost because it reduces Ule need for a separate controller.

In addition to the features of We radio module described above, the module may include features Mat enable the module to recense LMA from the FCC as an intentional radiator, and its equivalent from other governments. For example, the radio module may additionally include its own reference oscillator, antenna, RF shielding, buffered data inputs, and power supply regulator. :- .

The interconnect between the radio module and the host system components may include a flexible cable, such as a ribbon cable, that may span six inches or more.

The length of such a cable may be selected to span the distance from the lid of a notebook or other mobile computer system, through the hinge of the host system to the motherboard for coupling to other components. The radio module, including its antenna, may be advantageously affixed to Me lid.

For example, Figure 1d shows notebook computer system 400 comprising base 410 coupled to hinge lid 405. The motherboard ofthe computer system, containing for example, the processor, chipset (bus control logic), main memory, and highlevel baseband controller, is included in base 410 of computer system 400. Lid 405 ofthe computer system includes a display screen. Alternatively, a lid of an alternate computer system, such as a tablet or handheld computer system, may be any protective cover win or without a display screen or other inpuVoutputfunctonality.

One advantage to placing radio module 340 in lid 405 of Figure 1d is that, during nominal operation, lid 405 typically exists as the highest point in the computer system, thereby aiding in wireless communication. As shown, radio module 340 may be affixed within lid 405 at location 415, at or near the top of lid 405, with flexible cable 420 extending down through lid 405 and through the hinged coupling between lid 405 and base 410. The end of cable 420, opposite radio module 340, may then be coupled to components within base 410, such as the high-level baseband controller which may be integrated into a chipset or micro-controller of the motherboard within base 410. Note that radio module 340 and cable 420 are shown removed from lid 405 in figure 1d for clarity. In to the arrangement described above, the radio module and cable are integrated within the lid or otherwise affixed to the lid.

REAL-TIME EVENT PROCESSING

Note that as used herein, the tend "real-timer is not intended to imply that a host system responds instantaneously to a signal generated by an external device. Rather, the tern real-time. is intended to imply sufficient determinism and sufficiently reliable latency on the part of the host system to, for example, reliably enable the establishment and maintenance of a wireless communication link with an external device. For one embodiment of the present invention, this wireless communication link may be in accordance with a Bluetooth or other wireless communication protocol. The external device may be an electronic device having an independent processor that is not under direct control of the host processor of the host system.

A primary host processor may be modified to process real-time events such as those associated with establishing a wireless communication link with an external device in accordance with a Bluetooth or other wireless communication protocol. One manner in which a conventional host processor may be modified to process these real-time events is to include a timer and a high priority event (interrupt) circuit in the host processor. This may enable a realtime kernel to run underneath an existing operating system that does not have real-time attributes.

An example of an operating system that does not have real-time attributes includes the Windows. operating systems such as Windows NT, Windows 2000, Windows 98, and Windows ME (Millennium Edition). Trademarks and Brands are the property of their respective owners). ll

This kernel may set the timer to generate the high priority event at regular intervals. Upon activation, a real-time event circuit may transfer control to a real- time event handler (kernel software) which may perform a real-time task. This handler may be used to process a wireless baseband protocol that has strict timing requirements. Additionally, this method may encompass the use of an event pin which may also generate this high priority event. The event pin may be coupled to the processor itself or to an external device coupled to the processor, such as a chipset. For an alternate embodiment of the present invention, the high priority event may be generated using a status bit stored within the processor or in an external device.

One feature of this high priority event is that it may provide more reliable latencies over conventional interrupts, reducing the risk of a high priority event latency being upset by other tasks being performed by Me processor. Hence, in accordance with one embodiment of the present invention, this high priority event is one of the highest priority interrupts in the processor, although other interrupts, such as may be used for memory error handling, may be of higher priority.

Hardware and software elements used in the present invention are shown in Figures 2a and 2b, respectively. Host processor includes an integral timer 105 that may be set by a software routine. The timer triggers real- time event Circuit 110 to implement the method of Figure 2b.

Alternatively, interval timer 1Q5 may trigger real-time event circuit 110 to read a register to determine if a real-time event has been received. For another embodiment, host processor 100 includes an externally accessible event pin 115 that may be used by external devices within the host computer system to trigger real-time event circuit 110 to implement the method of Figure 2b. 1;

In the arrangement of Figure 2b, the processor is executing a process at step 150 when a real-time event interrupt (REI) occurs at step 155. This REI may be caused by, for example, event timer 105 expiring its set time interval or the activation of event pin 115 of host processor 100 of Figure 2a. In response to the RFI, real-time event circuit 110 causes host processor 100 to halt the process being executed at step 150 and save the processor state at step 160. The processor state may be saved to a reserved memory space.

At step 165 of Figure 2b, host processor 100 calls and executes a REI handler. In accordance with one embodiment of the present invention, this Roll handler includes instructions that, when executed by the host processor, cause the host processor to read one or more registers that store inforrnaffon related to the real-time event. For example, the host processor may read one or more registers that store information indicating the presence or absence of a wirelessly transmitted identification signal from an extemal device requesting wireless communication.

It it is determined that an external device is present and requests communication, the host processor may establish communication (Of may establish a schedule for future communication) Miffs the xtemal device at this time. Altematively, the host processor may, during this time, perform baseband processing functions in accordance with a Wireless communicators protocol as described above.

After a REI return instruction is received at step 170 of Figure 2b, the processor state stored in the resewed memory space may be restored to We host processor, and the previous process (exited from step 150) may continue. Note that the above-described hardware and software may be implemented either with or Without OS support In an alternative arrangement, real-time event processing may be implemented via a secondary non-symmetric processor (NSP) integrated into the primary host processor. For this arrangement, the NSP may execute an OS that supports real-time processing separate from the primary OS executed by the primary host processor, which may not support real-time functionality. In this arrangement, the NSP may then perform the baseband processing functions in accordance with a wireless communication protocol, as described above, while the primary processor performs the regular work ofthe host processor for the remainder ofthe computer system.

Figure 3 includes a host processor 200 used in the present invention in which NSP core 210 is integrated with the primary host processor core 205. In this arrangement, the NSP is integrated on the same semiconductor substrate as We primary host processor core to form a single processor. To reduce cost, primary host processor core 205 and NSP core 210 share L2 cadie 215, and both processor cores may communicate via bus unit 215 to a shared memory subsystem 22Q of We host computer system. Both cores may additionally share other system resources.

Preferably, the NSP core and primary host processor core share an instruction set architecture ([SA). For an alternate arrangement ofthe present invention, the NSP and primary host processor cores do not share an ISA.

Claims

CLAIMS: 1. A mobile, uniprocessor computer system comprising: a radio

module including buffered input-output ports, a low-level baseband controller, and a transceiver to enable wireless communication in accordance with a plurality of wireless communication protocols, the module meeting Limited Modular Approval by the Federal Communications Commission or similar type approval relevant to the U.K.; a high-level baseband controller coupled to the input-output ports of the radio module to operate the radio module in accordance with a selected one ofthe plurality of wireless communication protocols.
2. The computer system of claim 1, further comprising a flexible cable coupled to the high-level baseband controller at a first end and coupled to the ports of the radio module at a second end.
3. The computer system of any preceding claim, further comprising a hinged lid into which the radio module is affixed, the flexible cable extending through a hinge between the radio module and the high-level baseband controller.
4. The computer system of any preceding claim, further comprising a chipset, the high-level baseband controller being incorporated into the chipset.
5. The computer system of any preceding claim, further comprising a keyboard controller, the high-level baseband controller being incorporated into the keyboard controller.
6. The computer system of any preceding claim, wherein the plurality of wireless communication protocols includes Bluetooth, SWAP, and IEEE 802.1 1.
7. The computer system of any preceding claim, wherein the low-level baseband controller includes a baseband portion associated with a link management protocol. 1&