GB2333626B - Techniques for programming programmable logic array devices - Google Patents

Techniques for programming programmable logic array devices

Info

Publication number
GB2333626B
GB2333626B GB9910819A GB9910819A GB2333626B GB 2333626 B GB2333626 B GB 2333626B GB 9910819 A GB9910819 A GB 9910819A GB 9910819 A GB9910819 A GB 9910819A GB 2333626 B GB2333626 B GB 2333626B
Authority
GB
United Kingdom
Prior art keywords
techniques
programmable logic
logic array
array devices
programming programmable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9910819A
Other versions
GB9910819D0 (en
GB2333626A (en
Inventor
Richard G Cliff
Srinivas T Reddy
Kerry Veenstra
Andreas Papaliolios
Chiakang Sung
Richard Shaw Terrill
Rina Raman
Robert Richard Noel Bielby
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Altera Corp
Original Assignee
Altera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/442,801 external-priority patent/US5543730A/en
Application filed by Altera Corp filed Critical Altera Corp
Publication of GB9910819D0 publication Critical patent/GB9910819D0/en
Publication of GB2333626A publication Critical patent/GB2333626A/en
Application granted granted Critical
Publication of GB2333626B publication Critical patent/GB2333626B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
    • H03K19/1774—Structural details of routing resources for global signals, e.g. clock, reset
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/17758—Structural details of configuration resources for speeding up configuration or reconfiguration

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
GB9910819A 1995-05-17 1996-05-14 Techniques for programming programmable logic array devices Expired - Fee Related GB2333626B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/442,801 US5543730A (en) 1995-05-17 1995-05-17 Techniques for programming programmable logic array devices
GB9610050A GB2300948B (en) 1995-05-17 1996-05-14 Techniques for programming programmable logic array devices

Publications (3)

Publication Number Publication Date
GB9910819D0 GB9910819D0 (en) 1999-07-07
GB2333626A GB2333626A (en) 1999-07-28
GB2333626B true GB2333626B (en) 1999-10-27

Family

ID=26309332

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9910819A Expired - Fee Related GB2333626B (en) 1995-05-17 1996-05-14 Techniques for programming programmable logic array devices

Country Status (1)

Country Link
GB (1) GB2333626B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2366709A (en) * 2000-06-30 2002-03-13 Graeme Roy Smith Modular software definable pre-amplifier

Also Published As

Publication number Publication date
GB9910819D0 (en) 1999-07-07
GB2333626A (en) 1999-07-28

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20140514