GB2333624A - Data communication, for controlling eg automobile door lock - Google Patents

Abstract

A data communicating method comprises selecting (12) a stored process program from a memory (14) corresponding to an operating instruction (16) and generating binary processed data by executing the process program, radiating (20) the binary processed data as an electromagnetic wave, receiving and detecting (30) the electromagnetic wave into digital data, and decoding (31) the digital data into decoded data. The transmitter can be realized by the addition of the radiating signal generator only. The receiver can be realized by a PIN diode and a few electronic elements. The system can be used to control a motor vehicle door lock.

Description

A DATA COMMUNICATING METHOD, A DATA COMMUNICATING SYSTEM APPARATUS, A DATA TRANSMITTER, AND A DATA RECEIVER, FOR CONTROLLING FOR EXAMPLE AN AUTOMOBILE DOOR LOCK BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a data communicating method, a data communicating system apparatus, a data transmitter, and a data receiver using digital signal generated with a data processing of a micro processor, etc. built in a data processing apparatus as an information communicating medium by radiating an electromagnetic wave of the digital signal.

Description of Related Art Conventionally, as a data communicating apparatus for the data communication between a transmitter and a receiver arranged extremely near each other, there is a wireless controller to control a door lock of automobiles, for example. In this apparatus, the transmitter transmits a modulated wave, and the receiver receives the modulated wave, demodulates it and controls the release of the door lock.

Further, in this apparatus, in order to avoid a third party's release contrary to the owner's intention, a very complicated code is generated as a modulation signal of the modulation wave. And a complicated modulation, such as a multi-phase PSK (Phase Shift Keying) modulating method, is processed. Then the. receiver demodulates such the complicated code, and the release of the door lock is controlled by comparing the demodulated code with the codes preset in the receiver.

Japanese Publication No. Hei 6-509899 (published in Japan on Nov. 2, 1994) discloses an example of such remote keyless entry apparatus. The technology on this publication is described as a conventional example.

Fig. 8 is a circuit block diagram showing a conventional remote keyless entry system. A remote control transmitter 10 transmits a carrier wave (RF or infrared rays) modulated with a tone pulse and data bit as instructed by an operator. A remote control receiver 12 receives this RF or infrared rays to release the door.

However, this system has disadvantages as follows: As the first disadvantage, notwithstanding the transmitter output is very weak because of the very short distance between the remote control transmitter 10 and the remote control receiver 12, the system needs a full-scale and complicated structure similar to a strong power system for the remote communication. That is to say, it is necessary for processing the data modulation and high frequency amplification of a local oscillator, a buffer amplifier, a modulator, a mixer, a filter, a pre-amplifier, a power amplifier, etc as the remote control transmitter 10. It is necessary for processing the high frequency amplification and data demodulation of a high frequency amplifier, a local oscillator, a frequency converter, a filter, a base band signal demodulator, a data demodulator, a decoder, etc. as the remote control receiver 12. So there has been a serious problem of high cost for its manufacturing, because of the complicated structure and difficulty in miniaturizing it.

As the second disadvantage, because of the complicated structure like the first disadvantage with a lot of manufacturing processes, there has been a significant problem for the complication of manufacturing works.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a data communicating method, a data communicating system apparatus, a data transmitter, and a data receiver utilizing an information transmitting medium to transmit digital signals produced in a signal processing of digital circuits.

To realize above-described object, the feature of the data communicating method according to the present invention, has: selecting a stored process program from a memory corresponding to a operating instruction, generating a binary processed data by executing the process program, radiating the binary processed data as an electromagnatic wave, receiving and detecting tile electromagnetic wave into digital data, and decoding the digital data into decoded data The first feature of the data communicating system apparatus according to the present invention has: means for selecting a stored process program from a memory corresponding to a operating instruction, means for generating a binary processed data by executing the process program, means for radiating the binary processed data as an electromagnatic wave, means for receiving and detecting the electromagnetic wave into digital data, and means for decoding the digital data into decoded data.

The second feature of the data communicating system apparatus according to the present invention has: a clock signal generator for generating a basic clock signal, a memory for storing a process program according to an operating instruction, a data processing unit for generating processed data generated by processing of the selected process program according to the operating instruction, and a radiating signal generator for generating a radiating signal according to high or low level of the processed data from the data processing unit, and for radiating the radiating signal to the outside as an electromagnetic wave, a receiving block for receiving the electromagnetic wave radiated from the radiating signal generator and for outputting as a digital signal, a decoder for decoding the digital signal from the receiving block, and for outputting as decoded data, and an output block for comparing the decoded data from the decoder with stored data, and for outputting the corresponding stored data.

Accordingly, a carrier generating circuit, a modulator, and a high frequency amplifier of a transmitter, and a high frequency amplifier, a local oscillator and a demodulator are unnecessary, and thus, the structure can be largely simplified.

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a circuit block diagram showing an embodiment of the data communicating system apparatus according to the present invention.

Fig. 2 is a circuit block diagram showing a CPU 12 according to the Fig. 1 embodiment.

Fig. 3 is a circuit diagram showing a radiating signal generator 20 according to the Fig. 1 embodiment.

Fig. 4A is a circuit block diagram showing a receiving block 30 according to the Fig. 1 embodiment.

Fig. 4B is a circuit block diagram showing a receiving block 30b as an alternative of the receiving block 30 as shown in Fig. 4A.

Fig. 4C is a circuit block diagram showing a receiving block 30c as another alternative of the receiving block 30 as shown in Fig. 4A.

Fig. 4D is a circuit block diagram showing a receiving block 30d as another alternative of the receiving block 30 as shown in Fig. 4A.

Fig. 4E is a circuit block diagram showing a receiving block 30e as another alternative of the receiving block 30 as shown in Fig. 4A.

Fig. SA is a circuit block diagram showing an output block 32 according to the Fig. 1 Embodiment.

Fig. 5B is a circuit block diagram showing an output block 32b as an alternative of the output block 32 as shown in Fig. 5A.

Fig. 5C is a circuit block diagram showing an output block 32c as another alternative of the output block 32 as shown in Fig. 5A.

Fig. 6 is a schematic diagram showing a principle of data communication in the Fig. 1 embodiment.

Fig. 7 is a waveform diagram of a radiating signal St and a received signal Sr in the Fig. 1 embodiment.

Fig. 8 is a circuit block diagram showing a conventional remote keyless entry system.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Fig. 1 is a circuit block diagram showing an embodiment of the data communicating system apparatus according to the present invention.

In Fig. 1, The data communicating system apparatus has a transmitter 1 and a receiver 2.

The transmitter 1 has a clock signal generator 11, a CPU (Central Processing Unit) 12, a timing signal generator 13, a memory 14, a bus 15, an input block 16, and a radiating signal generator 20.

The clock signal generator 11 generates a clock signal Sc of specified frequency.

The CPU 12 reads a process program from the memory 14 and execute it, and then outputs processed data as a result of the execution.

The timing signal generator 13 generates a clock signal Sc2 of the frequency and phase by dividing, multiplying, and phase-converting the clock signal Sc from the clock signal generator 11. For this timing signal generator 13, various generating circuits can be generally applied, and for example, a plurality of single stable multi vibrators are used.

The memory 14 stores a plurality of process programs corresponding to each of the operating instructions from the input block 16.

The bus 15 is connected to the CPU 12, the memory 14 and the input block 16 each other.

The input block 16 is a means to input operating instructions made by the operator.

The radiating signal generator 20 generates a radiating signal that is the digital signal having two states of high or low levels corresponding to logical state "1" or "O" of the binary processed data Dp from the CPU 12, and radiates the radiating signal as an electromagnetic wave W.

The transmitter 1 has a structure of the radiating signal generator 20 added to the inside of an LSI (Large Scale Integrated) circuit for general digital circuits to process binary data used for various data processing units, etc.

The receiver 2 has a receiving block 30, a decoder 31, an output block 32, and a receiving antenna 33.

The receiving block 30 detects a received signal Sr, and outputs as a demodulated signal Sdm.

The decoder 31 decodes the demodulated signal Sdm from the receiving block 30, and outputs as decoded data Dd.

In general, various decoder circuits can be applied to this decoder 31, for example, a BCD (Binary Code Decimal) decimal decoder circuit, etc. are used.

The output block 32 is a means to output the decoded data Dd as indicating states, luminous states, sounding states, etc. according to the decoded data Dd from the decoder 31.

The receiving antenna 33 may be various kinds of antennas, such as a lead wire, a slot antennas, a short antennas, and phased array antennas. The receiving antenna 33 receives the electromagnetic wave W radiated from the transmitter 1, and outputs as the received signal Sr.

Fig. 2 is a circuit block diagram showing the CPU 12 according to the Fig. 1 embodiment. The CPU 12 has an operating block 40, a ROM (Read Only Memory) 41, a RAM (Random Access Memory) 42, and an I/O (Input/Output) port 43.

The operating block 40 has a control unit 40a, an operating unit 40b, and a register 40c, and executes the operation processing.

The ROM 41 stores a basic control program of the operating block 40.

The RAM 42 temporarily stores the data processed in the operating block 40.

The I/O port 43 is electrically connected to the peripheral apparatuses.

The operating block 40 selectively reads and executes the process program corresponding to the operating instruction given from the input block 16 among a plurality of the process programs stored in the memory 14 according to the control programs stored in the ROM 41, and generates the processed data Dp as a result of the processing.

Fig. 3 is a circuit diagram showing the radiating signal generator 20 according to the Fig. 1 embodiment. The radiating signal generator 20 has a D-FF (flip-flop) circuit 50, AND gate circuits 51a, 51b, and an OR gate circuit 52.

The processed data Dp from the CPU 12 is converted into the radiating signal St in synchronism with the clock signal Sc according to the high or low level, and converted into the radiating signal St. Then the radiating signal St is output from the OR gate circuit 52.

Also, the radiating signal St from this OR gate circuit 52 may be supplied to the CPU 12 as a clock signal instead of the clock signal Sc2 from the timing signal generator 13. Thereby, the clock signal of the CPU 12 is remodulated with the processed data Dp from the CPU 12. Thus, the frequency and spectrum of the radiating signal St are largely changed according to the high or low level of the processed data Dp, which further enhances the reproduction of received signal St in the receiver 2.

Fig. 4A is a circuit block diagram showing the receiving block 30 according to the Fig. 1 embodiment. The receiving block 30 has a PIN (Positive-Intrinsic-Negative) diode D and a LPF (Low Pass Filter) 60.

The PIN diode D is used for the microwave band, and detects the received signal Sr from the receiving antenna 33.

The LPF 60 rejects unnecessary high frequency noise included in a detecting output of the PIN diode D, and outputs the detected signal Sdm to the decoder 31.

Fig. 5A is a circuit block diagram showing the output block 32 according to the Fig. 1 embodiment. The output block 32 has a comparing/memory circuit 70, a matrix driver 71, and a matrix LCD (Liquid Crystal Display) 72.

The comparing/memory circuit 70 compares the decoded data Dd from the decoder 31 with the data previously stored therein, and outputs the corresponding stored data as a corresponding data Dc. The matrix driver 71 generates a driving signal Sdr according to the corresponding data Dc from the matrix driver 71. The matrix LCD 72 displays the data on the screen according to the driving signal Sdr from the matrix driver 71. Thereby, the data corresponding to a variety of the processed data Dp is obtained.

In the above structure, the transmitter 1 generates the clock signal Sc with the clock signal generator 11, and supplies it to the timing signal generator 13 and the radiating signal generator 20.

The timing signal generator 13 generates the clock signal Sc2 having a different frequency and a phase with division, multiplication, phase conversion, and other processing, based on the clock signal Sc from the clock signal generator 11. Then the clock signal Sc2 is supplied to the CPU 12 and other peripheral circuits.

In Fig. 2, the CPU has a function to select the process program, and a function to execute the process program. The operating block 40 reads the process program from the memory 14 according to the operating instruction from the input block 16 in accordance with the control program stored in ROM 41, and then executes the program. The radiating signal St are generated from the processed data Dp obtained from the above operation, and are radiated outside atmosphere as the electromagnetic wave W.

The processed data Dp are stored in the memory 14 through the bus 15, and are also outputted to the radiating signal generator 20 through the I/O port 43.

In Fig. 3, the radiating signal generator 20 is synchronized with the clock signal Sc, and generates the radiating signal Sr as shown in Fig. 7, according to the high or low level of the processed data Dp from the CPU 12. The radiating signal St is radiated as the electromagnetic wave W from an inside wiring of the CPU 12, a wiring pattern or a transmitting antenna formed on circuit substrates, to the outside atmosphere.

In Fig. 1, the receiver 2 receives the electromagnetic wave W radiated to the outside atmosphere from the transmitter 1 with the receiving antenna 33, and outputs as a received signal Sr.

The receiving block 30 detects the received signal Sr, and outputs as a detected signal Sdm.

The decoder 31 decodes'the detected signal Sdm, and outputs as a decoded signal Sdc.

The output block 32 compares the decoded signal Sdc with the previously stored data. If they are corresponding, the output block 32 displays the stored data on the screen, or displays in the various lighting or sounding states.

Fig. 4B is a circuit block diagram showing a receiving block 30b as an alternative of the receiving block 30 as shown in Fig. 4A. The receiving block 30b is connected to an amplifier 61 to amplify the received signal Sr from the receiving antenna 33 in the former stage of the PIN diode D, in addition to the structure as shown in Fig. 4A.

Accordingly, even when the received electromagnatic field strength of the electromagnetic wave W from the transmitter 1 is small, the received signal Sr of high level is supplied to the PIN diode D, and thus, the decoder 31 can securely demodulate the demodulated signal Sdm.

Fig. 4C is a circuit block diagram showing a receiving block 30c as an alternative of the receiving block 30 as shown in Fig. 1. The receiving block 30c has a BPF (Band Pass Filter) 62, an amplifier 63, and a PIN diode D.

The BPF 62 only passes the specific frequency components of the received signal Sr from the receiving antenna 33. The amplifier 63 amplifies the output of the BPF 62. The PIN diode D detects the output of amplifier 63 and outputs it as the demodulated signal Sdm. Consequently, even if the received electromagnetic field strength of electromagnetic wave W is small, the decoder 31 can securely demodulate the demodulated signal Sdm.

Fig. 4D is a circuit block diagram showing a receiving block 30d as another alternative of the receiving block 30 as shown in Fig. 4A. The receiving block 30d has a waveform shaping circuit 65 to shape the waveform on the transition portions of the output signal of the PIN diode D in the post stage of the PIN diode D, in addition to the structure shown in Fig. 4C. Accordingly, the waveform of the demodulated signal Sdm is shaped, and the realization of the demodulated signal Sdm with the decoder 31 advances.

Fig. 4E is a circuit block diagram showing a receiving block 30e as another alternative of the receiving block 30 as shown in Fig. 4A. The receiving block 30e has a frequency converter 66 to convert the received signal Sr from the receiving antenna 33 to a lower frequency, in the former stage of the amplifier 61, in addition to the structure shown in Fig. 4B. Consequently, the amplifier 61 and the PIN diode D with the low maximum-operation-frequency can be used, which enables its designing and reduces its manufacturing cost.

For alternate elements of the PIN diode D shown in Fig. 4A through Fig. 4E, a variable capacitance diode, a high-frequency switching diode, a detecting diode, a mixer diode, and other various diodes for high frequency can be used.

Fig. 5B is a circuit block diagram showing an output block 32b as an alternative of the output block 32 as shown in Fig. 5A. The output block 32b has a comparing/memory circuit 73, a driver 74, and an LED (Light Emitting Diode) 75 The comparing/memory circuit 73 compares the decoded data Dd from the decoder 31 with the data previously stored therein, and outputs the corresponding stored data as a corresponding data Dc. The driver 74 generates the driving signal Sdr having a plurality of states such as the lighting, blinking, and changing the luminous colors according to tlie corresponding data Dc from the comparing/memory circuit 73.

The LED 75 emits a light according to the driving signal Sdr from the driver 74. Instead of this LED 75, various indicating means and luminous means, etc. may be used. In such ways, the receiver 2 can be used in a dark place, and also can be securely informed to users far from the receiver 2.

Fig. 5C is a circuit block diagram showing an output block 32c as another alternative of the output block 32 as shown in Fig. 5A. The output block 32c has a comparing/memory circuit 76, a driver 77, and a speaker 78.

The comparing/memory circuit 76 compares the decoded data from the decoder 31 with the data previously stored therein, and output the corresponding stored data as the corresponding data Dc. The driver 77 generates the driving signal Sdr having a plurality of states such as a consecutive sound, an intermittent sound, a frequency variable sound, etc. according to the corresponding data Dc from the comparing/memory circuit 76. The speaker 78 outputs the driving signal Sdr from the driver 77 as a sound. Instead of this speaker 78, various pronouncing means, such as vocal means, sound emitting means, etc. may be used. In such ways, the receiver 2 can be used in a dark place, and also can be securely informed to users far from the receiver 2.

As an applicable example of this data communicating system apparatus, it is applied to a wireless identification system for ski lift tickets in a skiing ground. In this case, the transmitter 1 is carried by a skier, and stores process programs appropriate for the status of the lift charge already paid or unpaid in its memory 14. Thus, the transmitter 1 generates the radiated signal St from the processed data Dp obtained from the execution of each of the processed program and radiates as the electromagnetic wave W.

The other user has the receiver 2, that receives the electromagnetic wave W, decodes each of the processed data Dp.

Thus, the receiver 2 displays the status of the paid or unpaid, and can output the status to the personal computers and other information processing apparatuses.

Under the above circumstances, according to the data communicating system apparatus of the present embodiment, the transmitter can be realized by the addition of the radiating signal generator only. The receiver can be realized by the PIN diode and a few electronic elements, and thus, enabling the application to the various data processing system, and reducing the manufacturing cost.

Also, according to the data communicating system apparatus of the present system, indicating the various data on the liquid crystal display in a plurality of indicating states, indicating the data in a plurality of indicating states by changing the lighting, blinking or the luminous colors with the light emitting elements, and informing the data in a plurality of sounding states such as a consecutive sounding, an intermittent sounding or a frequency variable sounding, etc. can be realized. Thus, enhancing the designing freedom, enabling the utilization in the various places.

Claims (1)

1. A data communicating method, comprising: selecting a stored process program from a memory corresponding to a operating instruction, generating a binary processed data by executing said process program, radiating said binary processed data as an electromagnatic wave, receiving and detecting said electromagnetic wave into digital data, and decoding said digital data into decoded data.

2. The data communicating method as defined in Claim 1, further comprises the step of indicating according to said decoded data.

3. The data communicating method as defined in Claim 1, further comprises the step of lighting according to said decoded data.

4. The data communicating method as defined in Claim 1, further comprises the step of sounding according to said decoded data.

5. A data communicating system apparatus, comprising: means for selecting a stored process program from a memory corresponding to a operating instruction, means for generating a binary processed data by executing said process program, means for radiating said binary processed data as an electromagnatic wave, means for receiving and detecting said electromagnetic wave into digital data, and means for decoding said digital data into decoded data.

6. A data communicating system apparatus, comprising: a clock signal generator for generating a basic clock signal, a memory for storing a process program according to an operating instruction, a data processing unit for generating processed data generated by processing of the selected process program according to said operating instruction, and a radiating signal generator for generating a radiating signal according to high or low level of said processed data from said data processing unit, and for radiating said radiating signal to the outside as an electromagnetic wave, a receiving block for receiving said electromagnetic wave radiated from said radiating signal generator and for outputting as a digital signal, a decoder for decoding said digital signal from said receiving block, and for outputting as decoded data, and an output block for comparing said decoded data from said decoder with stored data, and for outputting the corresponding stored data.

7. The data communicating system apparatus as defined in Claim 6, wherein said radiating signal is supplied to said data processing unit as a clock signal of said data processing unit.

8. The data communicating system apparatus as defined in Claim 6, wherein said receiving block, comprising: a diode for receiving and detecting said electromagnetic wave radiated from said transmitter, and for outputting as a digital signal, and a low-pass filter connected to the post stage of said diode.

9. The data communicating system apparatus as defined in Claim 8, wherein said receiving block further comprises an amplifier in a former stage of said diode.

10. The data communicating system apparatus as defined in Claim 8, wherein said receiving block further comprises a band-pass filter in the former stage of said diode.

11. The data communicating system apparatus as defined in Claim 8, wherein said receiving block further comprises a waveform shaping circuit in a post stage of said diode.

12. The data communicating system apparatus as defined in Claim 8, wherein said receiving block further comprises a frequency converter in the former stage of said diode.

13. The data communicating system apparatus as defined in Claim 6, wherein said output block, comprising: a comparing/memory circuit for converting said decoded data from said decoder into indicating data, and a display for displaying said indicating data.

14. The data communicating system apparatus as defined in Claim 6, wherein said output block, comprising: a comparing circuit for comparing said decoded data from said decoder with stored data, and, in case of corresponding, for outputting the corresponding stored data, a driver for generating a driving signal of a plurality of lighting states when said corresponding signal is supplied from said comparing circuit and for outputting a driving signal, and a lighting block for lighting according to said driving signal.

15. The data communicating system apparatus as defined in Claim 6, wherein said output block, comprising: a comparing circuit for comparing said decoded data from said decoder with stored data, and, in case of corresponding, for outputting the corresponding stored data, a driver for generating a driving signal of a plurality of sounding states, when said stored corresponding data are supplied from said comparing circuit, and for outputting a driving signal, and a sound output block for sounding according to said driving signal.

16. A data transmitter, comprising: means for selecting a stored process program from a memory corresponding to a operating instruction, means for generating a binary processed data by executing said process program, and means for radiating said binary processed data as an. electromagnatic wave.

17. a data transmitter, comprising: a clock signal generator for generating a basic clock signal, a memory for storing a process program according to an operating instruction, a data processing unit for generating processed data generated by processing of the selected process program according to said operating instruction, and a radiating signal generator for generating a radiating signal according to high or low level of said processed data from said data processing unit, and for radiating said radiating signal to the outside as an electromagnetic wave.

18. The data transmitter as defined in Claim 17, wherein said a radiating signal is supplied to said data processing unit as a clock signal of said data processing unit.

19. A data receiver, comprising: means for receiving and detecting an electromagnetic wave generated by executing a process program into digital data, means for decoding said digital data into decoded data.

20. A data receiver, comprising: a receiving block for receiving an electromagnetic wave radiated from a transmitter, and for outputting as a digital signal, a decoder for decoding said digital signal from said receiving block, and for outputting as decoded data, and an output block for comparing said decoded data from said decoder with stored data, and for outputting the corresponding stored data.

21. The data receiver as defined in Claim 20, wherein said receiving block, comprising: a diode for receiving and detecting said electromagnetic wave radiated from said transmitter, and for outputting as a digital signal, and a low-pass filter connected to the post stage of said diode.

22. The data receiver as defined in Claim 21, wherein said receiving block further comprises an amplifier in the former stage of said diode.

23. The data receiver as defined in Claim 21, wherein said receiving block further comprises a band-pass filter in the former stage of said diode.

24. The data receiver as defined in Claim 21, wherein said receiving block further comprises a waveform shaping circuit in the post stage of said diode.

25. The data receiver as defined in Claim 21, wherein said receiving block further comprises a frequency converter in the former stage of said diode.

27. The data receiver as defined in Claim 20, wherein said output block, comprising: a comparing/memory circuit for converting said decoded data from said decoder into indicating data, and a display for displaying said indicated data.

28. The data receiver as defined in Claim 20, wherein said output block, comprising: a comparing circuit for comparing said decoded data from said decoder with stored data and, in case of corresponding, for outputting the corresponding stored data, a driver for generating a driving signal of a plurality of lighting states, when said corresponding signal is supplied from said comparing circuit, and for outputting a driving signal, and a lighting block for lighting according to said driving signal.

29. The data receiver as defined in Claim 20, wherein said output block, comprising: a comparing circuit for comparing said decoded data from said decoder with stored data, and, in case of corresponding, for outputting the corresponding stored data, a driver for generating a driving signal of a plurality of sounding states, when said stored corresponding data are supplied from said comparing circuit, and for outputting a driving signal, and a sound output block for sounding according to said driving signal.

30. A data communication method substantially as herein described with reference to Figures 1 to 7 of the drawings.

31. Data communication apparatus substantially as herein described with reference to Figures 1 to 7 of the drawings.

32. A data transmitter substantially as herein described with reference to Figures 1 to 7 of the drawings.

33. A data receiver substantially as herein described with reference to Figures 1 to 7 of the drawings.

34. The use of the invention of any of the preceding claims to control the door lock of a motor vehicle.