GB2321123B - Circuit for erasing a memory and a method thereof - Google Patents

Circuit for erasing a memory and a method thereof

Info

Publication number
GB2321123B
GB2321123B GB9700515A GB9700515A GB2321123B GB 2321123 B GB2321123 B GB 2321123B GB 9700515 A GB9700515 A GB 9700515A GB 9700515 A GB9700515 A GB 9700515A GB 2321123 B GB2321123 B GB 2321123B
Authority
GB
United Kingdom
Prior art keywords
erasing
memory
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9700515A
Other versions
GB2321123A (en
GB9700515D0 (en
Inventor
John Alexander Dunn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions UK Ltd
Original Assignee
Motorola Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Ltd filed Critical Motorola Ltd
Priority to GB9700515A priority Critical patent/GB2321123B/en
Publication of GB9700515D0 publication Critical patent/GB9700515D0/en
Publication of GB2321123A publication Critical patent/GB2321123A/en
Application granted granted Critical
Publication of GB2321123B publication Critical patent/GB2321123B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/20—Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
GB9700515A 1997-01-11 1997-01-11 Circuit for erasing a memory and a method thereof Expired - Fee Related GB2321123B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9700515A GB2321123B (en) 1997-01-11 1997-01-11 Circuit for erasing a memory and a method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9700515A GB2321123B (en) 1997-01-11 1997-01-11 Circuit for erasing a memory and a method thereof

Publications (3)

Publication Number Publication Date
GB9700515D0 GB9700515D0 (en) 1997-02-26
GB2321123A GB2321123A (en) 1998-07-15
GB2321123B true GB2321123B (en) 2001-01-03

Family

ID=10805848

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9700515A Expired - Fee Related GB2321123B (en) 1997-01-11 1997-01-11 Circuit for erasing a memory and a method thereof

Country Status (1)

Country Link
GB (1) GB2321123B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1982002274A1 (en) * 1980-12-23 1982-07-08 Telefon Ab L M Ericsson Arrangement for automatic erasing of the information contents in data bases
EP0075825A2 (en) * 1981-09-29 1983-04-06 Pitney Bowes Inc. Electronic postage metersystem
US4680734A (en) * 1984-08-11 1987-07-14 Fujitsu Limited Semiconductor memory device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1982002274A1 (en) * 1980-12-23 1982-07-08 Telefon Ab L M Ericsson Arrangement for automatic erasing of the information contents in data bases
EP0075825A2 (en) * 1981-09-29 1983-04-06 Pitney Bowes Inc. Electronic postage metersystem
US4680734A (en) * 1984-08-11 1987-07-14 Fujitsu Limited Semiconductor memory device

Also Published As

Publication number Publication date
GB2321123A (en) 1998-07-15
GB9700515D0 (en) 1997-02-26

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20020111