GB2320403A

GB2320403A - Serial Searcher for a DSSS Receiver

Info

Publication number: GB2320403A
Application number: GB9725560A
Authority: GB
Inventors: Hi-Chan Moon
Original assignee: Samsung Electronics Co Ltd
Current assignee: Samsung Electronics Co Ltd
Priority date: 1996-12-03
Filing date: 1997-12-03
Publication date: 1998-06-17
Anticipated expiration: 2017-12-03
Also published as: KR19980063647A; GB9725560D0; CN1193225A; BR9705504A; GB2320403B; KR100251558B1

Abstract

A multiple dwell time searcher for use in a receiver of a direct sequence spread spectrum (DSSS) system is described. A pseudo noise (PN) code generator generates a series of PN codes. A mixer mixes a received signal with the PN code generated by the PN code generator to output a de-spread signal. An accumulator accumulates the de-spread signal from the mixer to produce an accumulated result. A first energy value of the received signal is calculated based on the result accumulated by the accumulator during a first dwell time using a first PN code, the calculation taking place during a subsequent first dwell time during which the accumulator accumulates the de-spread signal from the mixer using a subsequent PN code in the series. A second energy value of the received signal is calculated based on the result accumulated by the accumulator during a second dwell time using the first PN code if the first energy value is higher than a first threshold value.

Description

SEARCH APPARATUS AND METHOD FOR USE IN CDMA RECEIVER BACKGROUND OF THE INVENTION The present invention relates to a search apparatus and method for a CDMA communication system.

In a receiver for a CDMA communication system ("CDMA receiver"), accurate synchronization is very important in performing a process for searching a DSSS (Direct Sequence Spread Spectrum) signal for an original data signal. Here, the term "synchronization" refers to the operation of synchronizing a local PN (Pseudo Noise) code (or frequency jump pattern) generated in the CDMA receiver with a code contained in a signal received from a transmitter.

The synchronization process is divided into an acquisition process and a tracking process. In the acquisition process, the code in the received signal approaches the local PN code within the range of a half chip. The tracking process keeps synchronization of the acquired signal and reduces timing differences between the code in the received signal and the local PN code. In general, the acquisition process precedes the tracking process. If the synchronization is lost during the tracking process, the procedure returns to the acquisition process.

The acquisition process may be performed by a parallel acquisition technique using a plurality of correlators.

Although this parallel acquisition technique has a high acquisition speed, it is impractical. Thus, a serial search technique using one or a few correlators and repeating a search process with respect to respective sequences is widely used. The serial search technique may be one of two different techniques according to whether a dwell time (or integration interval) is fixed or variable.

A fixed dwell time is widely used, since the realization and analysis are relatively simple. This fixed dwell time may be a single dwell time or a multiple dwell time technique. The present invention relates to an acquisition technique using a multiple (specifically double) dwell time, which is a typically used multiple dwell time technique.

Fig. 1 shows the connections of a conventional acquisition apparatus employing a serial search technique.

Specifically, the drawing schematically shows a Qualcomm Rake receiver. As illustrated, a searcher 100 represents an acquisition apparatus employing the conventional serial search technique. The searcher 100 is connected to a microprocessor 200. The microprocessor 200 is connected to three modulation fingers (F1-F3) 310-330 which are principal elements of the Rake receiver. Each of the modulation fingers 310-330 includes a PN tracking loop, a data demodulator, a frequency error tracking circuit, a signal strength control circuit and a control circuit.

The searcher 100 and the microprocessor 200 search and acquire a signal component (i.e., PN phase component) to be demodulated by the three fingers 310-330. The searcher 100 performs the search process in response to a search command from the microprocessor 200 and, after completion of the search process, transfers the search results to the microprocessor 200 via a register and a DMA (Direct Memory Access) by interrupt. The microprocessor 200 transfers a detailed tracking phase to the respective fingers 310-330 by using the results stored in a register inside the searcher and fingers. In this case, the microprocessor 200 writes parameters required for commanding the registers, to control the searcher 100.

Fig. 2 is a detailed diagram of the searcher 100 shown in Fig. 1. The searcher 100 having the double dwell structure includes a first integrator 120, and a second integrator 130. The first integrator 120 is used for a rapid but unreliable decision and the second integrator 130 is used for a slow but reliable final decision, so that the overall acquisition time may be reduced.

Referring to Fig. 2, the first integrator 120 integrates the output of a mixer 110, i.e. a received signal mixed with the output of the PN code generated from a PN code generator 160, for a first integration time (or dwell time) Tdl, and converts the integration value of I and Q axes into an energy value, in accordance with the following Equation (1).

E = 12 + Q2 ..... (1) A first comparator 140 compares the converted energy value output of the first integrator 120 with a predetermined first threshold value 61. If the energy value converted by the first integrator 120 is lower than the first threshold value 61, a test is performed on the PN phase of the next step. However, if the energy value converted by the first integrator 120 is higher than the first threshold value 61, the second integrator 130 integrates the same PN phase for a second integration time (or dwell time) Td2 and converts the integration value of I and Q axes into an energy value.

A second comparator 150 compares the converted energy value output of the second integrator 130 with a predetermined second threshold value 62. If the energy value converted by the second integrator 130 is lower than the second threshold value 62, the test is performed on the PN phase of the next step. However, if the energy value converted by the second integrator 130 is higher than the second threshold value 62, the second comparator 150 notifies the calculated results, i.e., the converted energy value, to the microprocessor 200 of Fig. 1. The notified energy value is provided to any one of the fingers 310-330 and is used for the tracking process which follows the synchronization process.

Figs. 3A to 3C are diagrams showing the operation of the searcher 100 of Fig. 2. If a signal as shown in Fig. 3A is applied to the CDMA receiver, the searcher 100 of Fig. 2 performs the acquisition process to have the code in the received signal approach the local PN code within the range of a half chip. Such an acquisition is performed by determining the width of a search window by means of the microprocessor 200. After the window width is decided, the mixer 110 mixes the received signal with the PN code generated from the PN code generator 160, and the first and second integrators 120 and 130 perform integration over the integration times Tdl and Td2 respectively, to convert the received signals into the energy values. Then, the first and second comparators 140 and 150 compare the received energy values with the predetermined first and second threshold values 61 and 62, and perform a test on the PN phase of the following step or notify the converted energy values to the microprocessor 200 so that the energy values may be used in the following synchronization tracking operation.

Fig. 3B illustrates a search operation at a time point tl, when the converted energy value output from the first integrator 120 is lower than the first threshold value 61, and Fig. 3C illustrates a search operation at a time point t4, when the converted energy value is higher than the first threshold value 61 (a signal at a time t4). It should be noted that after the integration by means of the first integrator 120, the next operation (i.e., the test on the PN phase of the following step, or the integration by means of the second integrator 130) must be performed with a predetermined time delay. The reason is that it takes a certain time to calculate the energy value based on the integration result and compare the calculated energy value with the threshold value. For reference, the searcher proposed by Qualcomm company requires a time of about 8 chips.

The microprocessor 200 of the conventional CDMA receiver sets the window width for the received signal and calculates the energy value for the signal at the respective time points within the window width, so as to acquire synchronization. If the calculated energy is higher than the threshold value, it is considered that synchronization is acquired. However, if the calculated energy is lower than the threshold value, the energy for the next PN code is calculated.

Incidentally, it is noted from experiments that most of the energy values for the received signals are lower than the threshold value. That is, as shown in Figs. 3A to 3C, when calculating the energies for all the received signals covered by the window, the energy values for the received signals are lower than the threshold values at most time points other than two time points t4 and t13 or three time points t4, tl0 and t13. In conclusion, the conventional searcher of the CDMA receiver takes quite a long time in searching and acquiring synchronization for the received signals. The reason is that a time delay of about 8 chips is caused whenever changing the PN code until the synchronization acquired signal is determined (when the energy value from the second integrator 130 is higher than the second threshold value 62).

In the meantime, as described above with reference to Figs.

1 and 2, the conventional searcher of the CDMA receiver is composed of hardware elements (e.g., the mixer 110, the integrators 120 and 130, the comparators 140 and 150, and the PN code generator 160) and the hardware elements are controlled by the microprocessor 200. Thus, the CDMA receiver may be complex in construction. Further, the microprocessor 200 must control the searcher as well as the other elements of the CDMA receiver, which causes heavy loads on it.

SUMMARY OF THE INVENTION It is therefore an objective of the present invention to provide an apparatus and method for reducing the time required to acquire synchronization for a received signal and securing a reliable search operation, in a CDMA receiver.

Accordingly, the present invention provides a multiple dwell time searcher for use in a receiver of a radio telecommunications system, comprising: a pseudo noise (PN) code generator for generating a series of PN codes; a mixer for mixing a received signal with the PN code generated by the PN code generator to output a de-spread signal; an accumulator for accumulating the de-spread signal from the mixer to produce an accumulated result; and control means for calculating a first energy value of the received signal based on the result accumulated by the accumulator during a first dwell time using a first PN code, the calculation taking place during a subsequent first dwell time during which the accumulator accumulates the de-spread signal from the mixer using a subsequent PN code in the series, and for calculating a second energy value of the received signal based on the result accumulated by the accumulator during a second dwell time using the first PN code if the first energy value is higher than a first threshold value.

Preferably, the control means is adapted to control the PN code generator in response to a search command and to generate path information representative of the result of the received signal search within a window corresponding to the search command using the result accumulated by the accumulator.

Preferably, the control means is adapted to operate as follows: to cause the PN code generator to generate the PN codes in series; to cause the accumulator to accumulate the de-spread signal from the mixer to produce an accumulated result during a respective first dwell times for each PN code; to calculate respective such first energy values for each PN code; and to compare the first energy value for each PN code with the first threshold value.

Preferably, the control means is further adapted to operate as follows, if the first energy value for the given PN code is higher than the first threshold value: to cause the PN code generator to return to generating the given PN code; to cause the accumulator to accumulate the de-spread signal from the mixer to produce an accumulated result during the second dwell time; and to calculate the second energy value for the given PN code.

Preferably, the control means comprises a digital signal processor and a microprocessor. The control means may be adapted to transfer the second energy value to the microprocessor as path information.

Preferably, the digital signal processor is adapted to sort a predetermined number of the second energy values in order of strength and to transfer the sorted energy values to the microprocessor as path information.

The present invention also provides a method of searching received signals in a receiver of a radio telecommunications system, comprising: mixing a received signal with a series of PN codes to generate respective de-spread signals in series and accumulating the de-spread signal during a respective first dwell time to produce a respective first accumulated result; calculating respective first energy values of the received signal based on the respective first accumulated results, the calculation taking place during a subsequent first dwell time; and if the first energy value for a given PN code is higher than a first threshold value, calculating a second energy value of the received signal based on the result accumulated by the accumulator during a second dwell time using the given PN code.

Preferably, a predetermined number of such second energy values are sorted in order of strength to produce energy path information corresponding to the received signal.

The first energy value may be calculated in accordance with the following equation: Eearly =

where Ii and Qi represent integration values of the received signal in I and Q axes respectively, and Ne represents an early integration number.

The second energy value may be calculated in accordance with the following equation: Etotal =

where Nt and Nc represents a total integration number.

Alternatively, the first energy value may be calculated in accordance with the following equation: Eearly =

where Ii and Qi represent integration values of the received signal in I and Q axes respectively, Ne represents an early integration number, and Nc represents a coherent integration number.

In the latter case, the second energy value may be calculated in accordance with the following equation: Etotal =

where Nt represents a total integration number.

BRIEF DESCRIPTION OF THE DRAWINGS The present invention will now be described by way of example with reference to the accompanying drawings in which: Fig. 1 is a block diagram of a CDMA receiver including a conventional searcher; Fig. 2 is a detailed diagram of the searcher (100) of Fig. 1; Figs. 3A to 3C are diagrams showing a conventional search operation; Fig. 4 is a diagram of a searcher according to the present invention; Figs. 5A to 5C are diagrams showing a search operation according to the present invention; Fig. 6 is a diagram showing the process flow of the searcher according to the present invention; Fig. 7 is a diagram showing the process flow of the searcher in a continuous mode; Fig. 8 is a diagram showing the process flow of the searcher in a discontinuous mode; and Fig. 9 shows the process flow for generating path information based on the search results of the searcher according to the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT Referring to Fig. 4, a searcher for a CDMA receiver according to the present invention includes a mixer 110, a PN code generator 160 composed of a de-spreader, an accumulator 170, and a digital signal processor ("DSP") 400. The searcher is connected to a microprocessor 200. The DSP 400 performs the search operation in a continuous mode or in a discontinuous mode according to the present invention, which will be described later with reference to Figs. 7 and 8. Further, the DSP 400 generates path information representative of the search results according to the process flow of Fig. 9, and provides the microprocessor 200 with the path information.

The PN code generator 160 generates a PN code which is variable by the steps, under the control of the DSP 400.

The mixer 110 mixes an output of the PN code generator 160 with a received signal, to generate a de-spread signal. The accumulator 170 accumulates the de-spread signal output from the mixer 110, to generate an integration result value corresponding to the de-spread signal.

As can be appreciated from the drawing, the searcher according to the present invention is simple in structure, compared with the conventional searcher. That is, the conventional searcher of Fig. 2 includes the hardware elements (the mixer 110, the PN code generator 160, the first and second integrators 120 and 130, and the first and second comparators 140 and 150), and the searcher and fingers includes a plurality of registers connected to the microprocessor 200. However, as shown in Fig. 4, the searcher according to the present invention includes the hardware elements (the mixer 110, the PN code generator 160, and the accumulator 170) and the DSP 400. Thus, the searcher and fingers need not include the registers.

Further, the microprocessor 200 according to the present invention has reduced job loads, since the DSP 400 shares the job loads of the microprocessor 200.

Figs. 5A to 5C are diagrams of a search operation according to the present invention, in which a waveform of the received signal shown in Fig. 5A is identical to that shown in Fig. 3A. In accordance with the present invention, the PN code is integrated for a dwell time Tdl and thereafter, a next PN code is immediately generated. More specifically, the searcher according to the present invention integrates the signal de-spread by a PN1 code to calculate an energy value, and compares the calculated energy value with a threshold value. The searcher progresses to a PN2 code which is a PN code of the next step and integrates a signal de-spread by the PN2 code. In this case, if the calculated energy value is lower than the threshold value, the searcher continues to integrate the signal de-spread by the PN2 code. However, if energy value is higher than the threshold value, the searcher restores the PN2 code to the previous PN1 code and integrates it for an integration time Td2 to calculate the energy value. This is based on the realization that the number of the received signals for which synchronization is acquired within one window is lower than the number of the received signals of which synchronization is not acquired.

Fig. 5B shows a search operation at a time point tl, in which the signal de-spread by the PN1 code is integrated for the integration time Tdl, and the energy value of the received signal calculated based on the integration results is lower than a predetermined threshold value. In this case, as shown in the drawing, the searcher integrates the signal de-spread by the PN1 code for the integration time Tdl and then, immediately generates the PN2 code which is a next PN code. Consecutively, the searcher integrates a signal de-spread by the PN2 code for the integration time Tdl.

Fig. 5C shows a search operation at a time point t4, in which the signal de-spread by the PN1 code is integrated for the integration time Tdl, and the energy value of the received signal calculated based on the integration results is higher than the predetermined threshold value. In this case, as shown in the drawing, the searcher integrates the signal de-spread by the PN1 code for the integration time Tdl and then, immediately generates the PN2 code which is a next PN code. The searcher integrates the signal despread by the PN2 code for a period Td, during which time the controller calculates the first energy value and makes a decision accordingly. After the period Td, the searcher generates the PN1 code again and continues to integrate the signal de-spread by the PN1 code (which is the previous PN code) if the first energy value is larger than a threshold.

In summary, the searcher integrates a signal received at a certain time and a de-spread signal generated by the respective PN codes for the integration time Tdl and then, immediately changes to the next code, before calculating the energy value according to the integration results.

Therefore, the overall time required for the search operation may be reduced.

Fig. 6 shows a process flow of the search operation according to the present invention, i.e., a process flow among the microprocessor 200, the DSP 400, and the hardware H/W composed of the mixer 110, the PN code generator 160, and the accumulator 170.

At a step S601, the microprocessor 200 transfers a search command to the DSP 400. Then, at a step S602, the DSP 400 controls the hardware H/W to perform the search operation in response to the search command. The search command includes a search start position, a mode selection parameter (for a continuous or discontinuous mode), and the number of the windows for the search operation. On the assumption that a minimum unit of the integration time is a T chip, the hardware H/W performs the integration for the T chip and provides the DSP 400 with the integration results as an interrupt signal. Here, if the T chip is reduced, the integration time may be flexibly controlled, and the time required for the decision may be reduced.

However, the frequency of the interrupts and jobs to be processed by the DSP 400 may increase, thereby giving a burden to the DSP 400. Therefore, it is necessary to properly set the value T.

The search operation of the step S602 may be performed in a continuous mode as shown in Fig. 7 or in a discontinuous mode as shown in Fig. 8, according to the mode selection parameter generated from the microprocessor 200. The continuous mode refers to an operating mode for performing an initial decision after a lapse of TxNe chips, and the discontinuous mode refers to an operating mode for performing the initial decision after a lapse of TxNcxNe chips. Here, T represents the minimum unit of the integration time, Ne represents an early integration number, and Nc represents a coherent integration number.

Further, a reference Nt represents a total integration number (i.e. a total number of the early integration and the secondary integration), and references Ii and Qi that will be described below represent integration result values of the received signals integrated by the hardware H/W by the T chip unit, respectively.

Now, the continuous mode of the search operation will be described with reference to Fig. 7. In the continuous mode, an initial decision is made after a lapse of TxNe chips.

That is, at a step 701, the DSP 400 coherently accumulates the integration result values Ii and Qi by T chip as many as Ne to calculate the values of I and Q axes, and simultaneously converts the PN code into a phase to be tested next. The DSP 400 calculates the energy value for the received signal based on the values of I and Q axes in accordance with the following Equation (2).

Eearly =

At a step 702, if the energy Eearly is lower than the threshold value, the DSP 400 returns to the step 701 to perform the test on the PN code of the next step. At this moment, the PN phase is changed during calculation of the energy value. Therefore, the test may be performed without the control of the PN code generator 160.

On the other hand, if the energy Eearly is higher than the threshold value at the step 702, the DSP 400 continues to perform the test on the same PN code. In this case, since the PN code has changed to the PN phase of the next step while calculating the energy value, the DSP 400 restores the current PN code to the previous PN code by adding Nt-Ne values to the existing value with respect to the previous PN code, at a step 703. Here, Nt represents the total integration number. Thereafter, the DSP 400 calculates the energy value of the received signal in accordance with the follow Equation (3).

Etotal =

Next, the discontinuous mode of the search operation will be described with reference to Fig. 8. The discontinuous mode includes a parameter Nc in addition to the parameters used in the continuous mode. The reason is that the searcher calculates the energy value based on the final integration results in the continuous mode, but based on the partially calculated integration results in the discontinuous mode. For example, the searcher calculates the energy value of the received signal in accordance with Etotal = (E1+E2+E3+E4+E5)2 in the continuous mode, but Etotal = (E12+E22+E32+E42+E52) in the discontinuous mode.

In the discontinuous mode, the DSP 400 performs the initial test after a lapse of a time of TxNexNc chips. That is, at a step 801, the DSP 400 coherently accumulates Nc integration values by the T chip and simultaneously converts the phase of the PN code generator 160 into the phase to be tested next time. At this moment, the DSP 400 calculates the energy value of the received signal based on the accumulated values of the I and Q axes in accordance with the following Equation (4).

Eearly =

After execution of the step 801, the DSP 400 checks at a step 802 whether the energy value Eearly calculated by Equation (4) is higher than the threshold value. If the energy value is lower than the threshold value, the DSP 400 returns to the 801 to perform the test on the next PN code.

At this moment, the PN phase is changed while calculating the energy value of the received signal. Therefore, the test may be performed without a separate control of the PN code generator 160.

On the other hand, if the energy value Yearly calculated by Equation (4) is higher than the threshold value, the DSP 400 continues to perform the test on the same PN code. In this case, since the PN phase has been previously changed prior to comparison of the energy value, the DSP 400 restores the current PN code to the previous PN code, at a step 803, by using (Nt-Ne)xNc I and Q inputs with respect to the previous PN code in calculating the energy value.

Here, Nt represents the total integration number. After restoration to the previous PN phase, the DSP 400 calculates the energy value in accordance with the following Equation (5).

Etotal =

As described above, as the microprocessor 200 transfers the mode selection parameter to the DSP 400 according to the search command, the DSP 400 performs the double dwell structure search with respect to W search windows. If the DSP 400 searches the W search windows by the half chip, the number of paths for the received signal will become 2W.

While searching the search windows, the DSP 400 chooses N optimal paths which can be allocated to the fingers, in accordance with the process flow of Fig. 9.

It is assumed that energy of an n-th path which passed the test is w[n and energy of a path which has failed to pass the initial decision of the double dwell is zero. if energy of the n-th path satisfying a condition w[n-l] < w[n] < w[n+1] (Step 902) is higher than that of any one of N path candidates selected up to the present (Step 903), the selected new path is added to a set of the path candidates.

If the number of the paths in the set of the path candidates is higher than N, a path with the minimum energy is removed from the existing set (Step 904).

If one search window is searched out (Step 906) by way of the above procedure, N path candidates can be obtained and the result values are sorted in order of energy (Step 907) and transferred to the microprocessor 200 at a step S603 of Fig. 6 (Step 908). At this moment, the DSP 400 transfers to the microprocessor 200 energies of the respective paths in the set of the path candidates and positional information of the PN code. The DSP 400 also transfers finger information used for demodulating the received signal. The finger information includes the position and energy of the finger.

Upon receiving the path information and the finger information from the microprocessor 200, the next search window is set based on the received information at a step S605 of Fig. 6, and a search command representative of the set search window is transferred to the DSP 400. Likewise, the position and size information of the window and the integration information are transferred. Further, the microprocessor 200 updates respective sets of the finger by using the received path information, and transfers to the DSP 400 information for newly allocating the finger based on the path information and the finger information. This finger information includes power control information and positional information.

Upon receiving a next search command from the microprocessor 200, the DSP 400 performs the corresponding search operation at a step S606, in the same manner as described above.

As described above, an advantage of the present invention is that the time required for searching the synchronization is reduced in the CDMA receiver, and the searcher is simplified in construction. Further, the load on the microprocessor is reduced.

Claims

1. A multiple dwell time searcher for use in a receiver of a radio telecommunications system, comprising: a pseudo noise (PN) code generator for generating a series of PN codes; a mixer for mixing a received signal with the PN code generated by the PN code generator to output a de-spread signal; an accumulator for accumulating the de-spread signal from the mixer to produce an accumulated result; and control means for calculating a first energy value of the received signal based on the result accumulated by the accumulator during a first dwell time using a first PN code, the calculation taking place during a subsequent first dwell time during which the accumulator accumulates the de-spread signal from the mixer using a subsequent PN code in the series, and for calculating a second energy value of the received signal based on the result accumulated by the accumulator during a second dwell time using the first PN code if the first energy value is higher than a first threshold value.

2. A multiple dwell time searcher according to claim 1 in which the control means is adapted to control the PN code generator in response to a search command and to generate path information representative of the result of the received signal search within a window corresponding to the search command using the result accumulated by the accumulator.

3. A multiple dwell time searcher according to claim 2 in which the control means is adapted to operate as follows: to cause the PN code generator to generate the PN codes in series; to cause the accumulator to accumulate the de-spread signal from the mixer to produce an accumulated result during a respective first dwell times for each PN code; to calculate respective such first energy values for each PN code; and to compare the first energy value for each PN code with the first threshold value.

4. A multiple dwell time searcher according to claim 3 in which the control means is further adapted to operate as follows, if the first energy value for the given PN code is higher than the first threshold value: to cause the PN code generator to return to generating the given PN code; to cause the accumulator to accumulate the de-spread signal from the mixer to produce an accumulated result during the second dwell time; and to calculate the second value for the given PN code.

5. A multiple dwell time searcher according to any preceding claim in which the control means comprises a digital signal processor.

6. A multiple dwell time searcher according to claim 5 in which the control means further comprises a microprocessor.

7. A multiple dwell time searcher according to claim 6 in which the control means is adapted to transfer the second energy value to the microprocessor as path information.

8. A multiple dwell time searcher according to claim 7 in which the digital signal processor is adapted to sort a predetermined number of the second energy values in order of strength and to transfer the sorted energy values to the microprocessor as path information.

9. A multiple dwell time searcher according to any one of claims 2-4 in which the control means comprises a digital signal processor and a microprocessor adapted to generate the search command, receive the second energy value from the digital signal processor as path information and determine a next search window according to the received path information.

10. A method of searching received signals in a receiver of a radio telecommunications system, comprising: mixing a received signal with a series of PN codes to generate respective de-spread signals in series and accumulating the de-spread signal during a respective first dwell time to produce a respective first accumulated result; calculating respective first energy values of the received signal based on the respective first accumulated results, the calculation taking place during a subsequent first dwell time; and if the first energy value for a given PN code is higher than a first threshold value, calculating a second energy value of the received signal based on the result accumulated by the accumulator during a second dwell time using the given PN code.

11. A method of searching received signals according to claim 10 further comprising sorting a predetermined number of such second energy values in order of strength to produce energy path information corresponding to the received signal.

12. A method of searching received signals according to claim 10 or 11 in which the first energy value is calculated in accordance with the following equation: Eearly =

13. A method of searching received signals according to claim 12 in which the second energy value is calculated in accordance with the following equation: Etotal =

where Nt and Nc represent a total integration number and a coherent integration number, respectively.

14. A method of searching received signals according to claim 10 or claim 11 in which the first energy value is calculated in accordance with the following equation: Eearly =

15. A method of searching received signals according to claim 14 in which the second energy value is calculated in accordance with the following equation: Etotal =

where Nt represents a total integration number.

16. A multiple dwell time searcher for use in a receiver of a radio telecommunications system, the searcher being substantially as described herein with reference to and/or as illustrated in FIGs. 4 et seq. of the accompanying drawings.

17. A method of searching received signals in a receiver of a radio telecommunications system, the method being substantially as described herein with reference to and/or as illustrated in FIGs. 4 et seq. of the accompanying drawings.