GB2250877A - Shifting spurious frequencies away from signal frequency - Google Patents
Shifting spurious frequencies away from signal frequency Download PDFInfo
- Publication number
- GB2250877A GB2250877A GB9020678A GB9020678A GB2250877A GB 2250877 A GB2250877 A GB 2250877A GB 9020678 A GB9020678 A GB 9020678A GB 9020678 A GB9020678 A GB 9020678A GB 2250877 A GB2250877 A GB 2250877A
- Authority
- GB
- United Kingdom
- Prior art keywords
- frequency
- signals
- radio
- internally generated
- frequency signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/16—Multiple-frequency-changing
- H03D7/161—Multiple-frequency-changing all the frequency changers being connected in cascade
- H03D7/163—Multiple-frequency-changing all the frequency changers being connected in cascade the local oscillations of at least two of the frequency changers being derived from a single oscillator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D1/00—Demodulation of amplitude-modulated oscillations
- H03D1/02—Details
- H03D1/04—Modifications of demodulators to reduce interference by undesired signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
- H03D3/001—Details of arrangements applicable to more than one type of frequency demodulator
- H03D3/002—Modifications of demodulators to reduce interference by undesired signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
- H03J1/00—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general
- H03J1/0008—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor
- H03J1/0041—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor for frequency synthesis with counters or frequency dividers
- H03J1/005—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor for frequency synthesis with counters or frequency dividers in a loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B2215/00—Reducing interference at the transmission system level
- H04B2215/064—Reduction of clock or synthesizer reference frequency harmonics
- H04B2215/065—Reduction of clock or synthesizer reference frequency harmonics by changing the frequency of clock or reference frequency
Abstract
A radio receiver 32, for use in FM, SSB and AM radio can automatically counter the internal spurious signals which are generated in the receiver by at least one internally generated signal and/or harmonics thereof: such as the injection signals generated by a radio synthesizer 38. The receiver 32 comprises means for determining frequency values of at least one internally generated signal which generate internal spurious signals for a tuned radio frequency signal and shifting means 50, 52, 54, 56, D1 for automatically shifting the frequency of the at least one internally generated signal in response to the determined frequency values so as to avoid generation of the internal spurious signals for said tuned radio frequency signal. Preferably, the determining means is in the form of a look-up table for storing predetermined frequency values which generate internal spurious signals for a plurality of radio frequency signals. In the case where two internally generated frequency signals are generated, the shifting means automatically and simultaneously shifts the frequency of both the internally generated frequency signals. <IMAGE>
Description
IMPROVEMENTS IN OR RELATING TO RADIO RECEIVERS
This invention relates to radio receivers and transceivers for use in FM, SSB and AM radio.
One of the most important specifications of a radio receiver is the internal spurious response of the receiver. Internal spurious signals are radio frequency (RF) signals which are generated within the receiver and which either appear at the receiver antenna or directly in the intermediate frequency (IF) path. The spurious signals create narrow band interference in the receiver passband and so can reduce the signal to noise ratio at the audio output.
Most modern radios comprise a dual conversion receiver having two IF stages and three frequency injections which are generated by a frequency synthesizer. A schematic diagram of the receive path of an SSB radio receiver is shown in Figure 1.
A frequency synthesizer 8 comprises phase locked loops (not shown) which generate first and second local injection signals and a third injection signal: the first and second injection signals are mixed in first 6 and second 12 mixers with the tuned input signal, received at the antenna 4, to produce IF signals. The third injection signal is used by a SSB detector 16 to produce the audio output signal. The outputs from first 6 and second 12 mixers are fed to first 10 and second 14 IF stages respectively.
Internal spurious can be produced in two ways: direct spurious and indirect spurious.
Direct spurious is produced from single frequency sources and appear at the antenna terminals. For example, the microprocessor, which controls the operation of the radio, requires an oscillator to clock the operation of the circuits in the radio: the microprocessor's clock can create direct spurious.
The frequency of the spurious signal for direct spurious is given by the equations:
FRF = n Fosc (la or FIF = n Fosc (lb where FRF is the frequency of the received signal
FIF is the frequency of the IF signal
Fosc is the single oscillator frequency
n is an arbitrary positive integer
Thus, if the oscillator frequency or harmonics thereof equal the frequency of the received signal or that of the IF signal, direct spurious signals are generated which produce interference in the receiver.
Indirect spurious is generated as a result of a combination between two (or more) frequency sources and appears at the IF stages. For indirect spurious the frequency of the spurious signal is given by the following equation:
FIF = + QFlst + MF2nd + LF3rd (2 where FIF is the frequency of the IF signal
Fist, F2nd, F3rd are the frequencies of the synthesizer
injection signals
Q, M and L are arbitrary positive.integers
Thus, depending on Q, M and L, the injection signals can combine to produce spurious signals having the same frequency as the IF signals at the IF stages. The harmonics of the injection signal can therefore produce interference at the audio output.
For example, when the receiver operates at 6MHz, the first injection frequency may be 81 MHz and the second injection frequency may be 63.6 MHz. The IF frequency at the second IF stage is therefore 11.4 MHz. However, the fourth harmonic of the second injection (i.e. M = 4) and the third harmonic of the first injection (i.e. Q = 3) combine to produce a spurious signal having a frequency of 11.4 MHz: that is, the same frequency as the second stage IF signal. Hence, the spurious signal adds to the IF signal causing interference at the audio output.
In order to reduce the interference caused by internal spurious signals, radios are typically provided with a special key which allows the user of the radio to manually adjust the frequency of the IF and clock signals. In operation, if the user hears noise at the audio output, by pressing the special key the IF and clock signals are shifted in an attempt to reduce the noise and improve the quality of the audio output. If, however, the user can still hear noise after first pressing the key, the key can be pressed again.
It is an object of the present invention to provide an improved receiver which does not require manual adjustment to reduce the internal spurious signal.
In accordance with the invention there is provided a radio receiver for receiving a tuned radio frequency signal, comprising:
means for determining frequency values of at least one internally generated frequency signal which generate internal spurious signals for said tuned radio frequency signal; and
shifting means for automatically shifting the frequency of the at least one internally generated frequency signal in response to the determined frequency values so as to avoid generation of the internal spurious signals for said tuned radio frequency signal.
Preferably the means for determining comprises storage means for storing predetermined frequency values of the at least one internally generated frequency signal which generate internal spurious signals for a plurality of radio frequency signals. The frequency values for the tuned radio frequency signal can then be read from the storage means. The storage means may be in the form of a look-up table.
The radio receiver may further comprise means for generating first and second internally generated frequency signals, such as a frequency synthesizer, whereby the shifting means is arranged to automatically and simultaneously shift the frequency of the first and the second internally generated frequency signals.
Preferably, the radio receiver further comprises a single frequency oscillator coupled serially to a capacitor, whereby the shifting means is arranged to switch the capacitor in response to the determined frequency values so as to shift the frequency of the single frequency oscillator to avoid generation of the internal spurious signals for the tuned radio frequency signal.
A receiver in accordance with the present invention will now be described, by way of example only, with reference to the accompanying drawings in which:
Figure 1 is a schematic diagram of a prior art receiver;
Figure 2 is a schematic diagram of a receiver in accordance with the present invention;
Figure 3 is a schematic diagram of a phase locked loop;
Figure 4 is a circuit diagram of a microprocessor clock in accordance with the invention; and
Figure 5 is an equivalent circuit diagram for the clock of Figure 4.
Referring to Figure 2, a receiver 32 in accordance with the present invention comprises a microprocessor 56 coupled to a synthesizer 38 and a receive path a, including an antenna 34, first 36, and second 42 mixers, first 40 and second 44 IF stages and a SSB detector 46. Like components to those of Figure 1 are referenced by the same numeral plus 30.
The synthesizer 38 comprises one or more large step PLLs. In the preferred embodiment three PLLs 50, 52 and 54 are shown but it will be appreciated that the invention is not limited thereto. The basic form of a PLL is shown in Figure 3.
The PLL 18 comprises a phase comparator 20, a low pass filter 22, a voltage controlled oscillator (VCO) 24 and a variable ratio frequency divider 26. Feedback around the phase comparator 20 is used to pull the output (fout) of the VCO 24 to a frequency proportional to the frequency (fo) of the stable reference signal supplied at an input of the phase comparator 20. When this is achieved, the loop is "locked" and the relationship between fout and fO is given by the following equation:
fout = Nfo (3 where fout is the frequency of the output of the VCO 24 fO is the frequency of the stable reference signal
N is an arbitrary integer
The frequency of the output signal fout therefore depends on the variable ratio N of the frequency divider 26. N is controlled by the microprocessor 56.
The first, second and third injection frequencies are based upon the output signals from the PLLs 50, 52 and 54 respectively.
Hence, the frequency of these injection signals can be controlled by varying the variable ratio N of the respective PLLS under the control of the microprocessor 56.
All the combinations of frequencies and harmonics that create indirect spurious in the receiver for each frequency in the receiver bandwidth are stored in a look-up table, which is stored in a memory (not shown) of the microprocessor 56. The look-up table is generated using an algorithm run on a computer and the generated values are then stored in the memory. This is usually carried out at the time of manufacture. However, the look-up table may also be up-dated later to include additional combinations which are found empirically to create spurious.
The operation of the invention will now be described with reference to the example given above: that is, with the receiver tuned to 6MHz, the first injection frequency having a frequency of 81Mhz and the second injection frequency having a frequency of 63.6MHz . The IF frequency at the second IF stage is therefore 11.4
MHZ. Internal spurious appears at the second IF stage due to the fourth harmonic of the second injection signal and the third harmonic of the first injection which combine to produce a spurious signal having a frequency of 11.4 MHz.
The receiver 32 is tuned to receive 6MHz signals. The microprocessor determines the frequency of the tuned signal and uses the look-up table to determine the spurious signals which are generated for a tuned signal of 6MHz. The microprocessor uses the data read from the look-up table to determine if, and by how much, the injection signals need to be shifted and in response thereto, automatically and simultaneously shifts the first and second injection frequencies by changing the PLLs output frequency so that the new internal spurious is out of the IF bandwidth. The microprocessor 56 changes the PLL's output frequency by incrementing the ratio N in steps of one (NoN+1) thereby shifting the frequencies by multiples of the smallest frequency increment (i.e. fro).
For a stable reference frequency (fro) of 3.8 KHz and by changing N by one, the combination of the fourth harmonic of the second injection signal and third harmonic is shifted as follows: 4x (63.6 MHz + 3.8KHz) - 3x (81MHz + 3.8 KHz) = 11.4MHz + 3.8 KHz.
The IF bandwidth of the second IF stage is 2.7KHz i.e. between 11.4MHz and 11.4027MHz. Thus, since the frequency of the combined signal is shifted to 11.4038MHz, and so out of the IF range of the second IF stage, there is no indirect spurious at the IF stages.
It will be appreciated that although the injection frequencies are shifted, the overall effect is that the desired signal frequency is not changed.
The manner in which the invention prevents direct spurious will now be described.
Referring now also to Figure 4, a microprocessor clock is based upon a crystal oscillator 60 whose equivalent circuit is shown in
Figure 5. The crystal oscillator in the preferred embodiment is coupled in series with a capacitor CL which is coupled in parallel to a pin diode D1.
A capacitor CL in series with the crystal oscillator 60 modifies the serial resonance frequency of the crystal (fs) by:
Af = Kfs (4 where Af is the change in resonance frequency
The serial capacitor CL can therefore be switched, by way of the pin diode D1 under the control of the microprocessor 56, so that the serial resonance frequency fs of the microprocessor clock is shifted by Af.
Thus, since direct spurious occurs when the clock frequency or the harmonics of the clock frequency is equal to the received signal frequency and/or to the frequency signals at the IF stages, by shifting the clock frequency using the serial capacitor, direct spurious can be prevented.
The frequency and harmonics of the microprocessor clock which generate direct spurious can also be stored, for each frequency in the receiver bandwidth, in a look-up table in the memory of the microprocessor 56.
In operation, when the receiver receives a signal at the antenna 4, the microprocessor 56 determines the frequencies of the spurious signals for the tuned signal by reading data from the lookup table for that tuned frequency. The microprocessor, in response to the data read from the look-up table, automatically shifts the clock frequency by way of the capacitor CL and pin diode D1.
Although the invention has been described with reference to spurious signals generated by microprocessor clock, the same principles apply to single frequency oscillators, such as the oscillators which provide the stable reference signal to the PLLs.
It will be appreciated by those skilled in the art that although the invention has been described with reference to a receiver, the invention may also be implemented in a transceiver.
Claims (13)
1. A radio receiver for receiving a tuned radio frequency signal, comprising:
means for determining frequency values of at least one internally generated frequency signal which generate internal spurious signals for said tuned radio frequency signal; and
shifting means for automatically shifting the frequency of the at least one internally generated frequency signal in response to the determined frequency values so as to avoid generation of the internal spurious signals for said tuned radio frequency signal.
2. A radio receiver according to claim 1 wherein said means for determining comprises storage means for storing predetermined frequency values of the at least one internally generated frequency signal which generate internal spurious signals for a plurality of radio frequency signals.
3. A radio receiver according to claim 1 or 2 wherein said radio receiver comprises means for generating first and second internally generated frequency signals, said shifting means being arranged to automatically and simultaneously shift the frequency of said first and said second internally generated frequency signals.
4. A radio receiver according to claim 3 wherein said means for generating comprises a synthesizer having at least one PLL comprising a divide by N frequency divider, said shifting means being arranged to automatically and simultaneously shift the frequency of said first and said second internally generated frequency signals by changing the value of N.
5. A radio receiver according to claim 1 or 2 further comprising a single frequency oscillator coupled serially to a capacitor, said shifting means being arranged to switch said capacitor in response to the determined frequency values so as to shift the frequency of said single frequency oscillator to avoid generation of the internal spurious signals for said tuned radio frequency signal.
6. A radio receiver according to claim 5 wherein said radio receiver further comprises a diode coupled in parallel to said capacitor.
7. A radio receiver according to any preceding claim wherein said means for determining and said shifting means comprise processing means.
8. A method of automatically reducing internal spurious signals in a radio receiver, said internal spurious signals being generated by at least one internally generated frequency signal and/or harmonics thereof, the method comprising the steps of:
receiving a tuned radio frequency signal;
determining frequency values of the at least one internally generated frequency signal which generate internal spurious signals for said tuned radio frequency signal; and
automatically shifting the frequency of the at least one internally generated frequency signal in response to said determining step so as to shift the determined frequency values to avoid generation of the internal spurious signals for said tuned radio frequency signal.
9. A method according to claim 1 wherein said radio receiver comprises storage means for storing predetermined frequency values of the at least one internally generated frequency signal which generate internal spurious signals for a plurality of radio frequency signals, and said determining step comprises:
reading the predetermined frequency values for said tuned radio frequency signal from said storage means.
10. A method according to claim 8 or 9 wherein said radio receiver comprises means for generating first and second internally generated frequency signals, and said automatic shifting step comprises automatically and simultaneously shifting the frequency of said first and said second internally generated frequency signals.
11. A method according to claim 8 or 9 wherein said radio receiver further comprises a single frequency oscillator coupled serially to a capacitor, said automatic shifting step comprising switching said capacitor in response to said determining step so as to shift the frequency of said single frequency oscillator to avoid generation of the internal spurious signals for said tuned radio frequency signal.
12. A radio receiver substantially as hereinbefore described with reference to Figure 2 of the accompanying drawings.
13. A method substantially as hereinbefore described with reference to Figure 2 of the accompanying drawings.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9020678A GB2250877A (en) | 1990-09-22 | 1990-09-22 | Shifting spurious frequencies away from signal frequency |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9020678A GB2250877A (en) | 1990-09-22 | 1990-09-22 | Shifting spurious frequencies away from signal frequency |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| GB9020678D0 GB9020678D0 (en) | 1990-11-07 |
| GB2250877A true GB2250877A (en) | 1992-06-17 |
Family
ID=10682596
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB9020678A Withdrawn GB2250877A (en) | 1990-09-22 | 1990-09-22 | Shifting spurious frequencies away from signal frequency |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB2250877A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2276784A (en) * | 1993-03-22 | 1994-10-05 | Motorola Gmbh | Shifting spurious frequencies away from received frequency |
| GB2292867A (en) * | 1994-09-30 | 1996-03-06 | Matsushita Electric Ind Co Ltd | Radio system with means to reduce interference due to radiation of clock signal |
| GB2310966A (en) * | 1996-03-04 | 1997-09-10 | Motorola Inc | Method and apparatus for eliminating interference caused by spurious signals in a communication device |
| WO1997035381A1 (en) * | 1996-03-19 | 1997-09-25 | Ericsson Inc. | Reducing or eliminating radio transmitter mixer spurious outputs |
| EP1091487A1 (en) * | 1999-10-08 | 2001-04-11 | Motorola, Inc. | Method and apparatus for eliminating self quieter signals generated in synthesiser receivers |
| EP1160970A1 (en) * | 2000-05-29 | 2001-12-05 | Sony International (Europe) GmbH | Interference suppresser for AM signals , and method |
| GB2372174A (en) * | 2001-02-12 | 2002-08-14 | Matsushita Electric Ind Co Ltd | Intermediate frequency planning in radio frequency transmitters and receivers |
| US7821581B2 (en) | 1998-11-12 | 2010-10-26 | Broadcom Corporation | Fully integrated tuner architecture |
| US20120190319A1 (en) * | 2011-01-20 | 2012-07-26 | Panasonic Automotive Systems Company Of America, Division Of Panasonic Corporation Of North America | Method and apparatus for sensing inter-modulation to improve radio performance in single and dual tuner |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1984004637A1 (en) * | 1983-05-16 | 1984-11-22 | Motorola Inc | A receiver system for eliminating self-quieting spurious responses |
| GB2194696A (en) * | 1986-03-26 | 1988-03-09 | Gen Electric | Digital radio communications devices |
-
1990
- 1990-09-22 GB GB9020678A patent/GB2250877A/en not_active Withdrawn
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1984004637A1 (en) * | 1983-05-16 | 1984-11-22 | Motorola Inc | A receiver system for eliminating self-quieting spurious responses |
| GB2194696A (en) * | 1986-03-26 | 1988-03-09 | Gen Electric | Digital radio communications devices |
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2276784A (en) * | 1993-03-22 | 1994-10-05 | Motorola Gmbh | Shifting spurious frequencies away from received frequency |
| US6345172B1 (en) | 1994-08-30 | 2002-02-05 | Matsushita Electric Industrial Co., Ltd. | Radio system which overcomes signal interference from clock oscillation circuit |
| GB2292867A (en) * | 1994-09-30 | 1996-03-06 | Matsushita Electric Ind Co Ltd | Radio system with means to reduce interference due to radiation of clock signal |
| GB2292867B (en) * | 1994-09-30 | 1997-06-11 | Matsushita Electric Ind Co Ltd | A radio transmission and reception system |
| GB2310966A (en) * | 1996-03-04 | 1997-09-10 | Motorola Inc | Method and apparatus for eliminating interference caused by spurious signals in a communication device |
| US5745848A (en) * | 1996-03-04 | 1998-04-28 | Motorola, Inc. | Method and apparatus for eliminating interference caused by spurious signals in a communication device |
| AU719164B2 (en) * | 1996-03-04 | 2000-05-04 | Google Technology Holdings LLC | Method and apparatus for eliminating interference caused by spurious signals in a communication device |
| GB2310966B (en) * | 1996-03-04 | 2000-09-27 | Motorola Inc | Method and apparatus for eliminating interference caused by spurious signals in a communication device |
| WO1997035381A1 (en) * | 1996-03-19 | 1997-09-25 | Ericsson Inc. | Reducing or eliminating radio transmitter mixer spurious outputs |
| US7821581B2 (en) | 1998-11-12 | 2010-10-26 | Broadcom Corporation | Fully integrated tuner architecture |
| US8045066B2 (en) | 1998-11-12 | 2011-10-25 | Broadcom Corporation | Fully integrated tuner architecture |
| EP1091487A1 (en) * | 1999-10-08 | 2001-04-11 | Motorola, Inc. | Method and apparatus for eliminating self quieter signals generated in synthesiser receivers |
| EP1160970A1 (en) * | 2000-05-29 | 2001-12-05 | Sony International (Europe) GmbH | Interference suppresser for AM signals , and method |
| GB2372174B (en) * | 2001-02-12 | 2003-07-16 | Matsushita Electric Ind Co Ltd | Intermediate frequency planning in radio transmitters and receivers |
| US6876839B2 (en) * | 2001-02-12 | 2005-04-05 | Matsushita Electric Industrial Co., Ltd. | Intermediate frequency planning in radio transmitters and receivers |
| GB2372174A (en) * | 2001-02-12 | 2002-08-14 | Matsushita Electric Ind Co Ltd | Intermediate frequency planning in radio frequency transmitters and receivers |
| US20120190319A1 (en) * | 2011-01-20 | 2012-07-26 | Panasonic Automotive Systems Company Of America, Division Of Panasonic Corporation Of North America | Method and apparatus for sensing inter-modulation to improve radio performance in single and dual tuner |
| US8463216B2 (en) * | 2011-01-20 | 2013-06-11 | Panasonic Automotive Systems Company Of America, Division Of Panasonic Corporation Of North America | Method and apparatus for sensing inter-modulation to improve radio performance in single and dual tuner |
Also Published As
| Publication number | Publication date |
|---|---|
| GB9020678D0 (en) | 1990-11-07 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |