GB2210741A - Analog to digital conversion - Google Patents

Analog to digital conversion Download PDF

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Publication number
GB2210741A
GB2210741A GB8823442A GB8823442A GB2210741A GB 2210741 A GB2210741 A GB 2210741A GB 8823442 A GB8823442 A GB 8823442A GB 8823442 A GB8823442 A GB 8823442A GB 2210741 A GB2210741 A GB 2210741A
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Prior art keywords
signal
amplifier
output
gain control
input
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GB8823442A
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GB8823442D0 (en
Inventor
Juergen Wermuth
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Bosch Telecom GmbH
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ANT Nachrichtentechnik GmbH
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Publication of GB8823442D0 publication Critical patent/GB8823442D0/en
Publication of GB2210741A publication Critical patent/GB2210741A/en
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G7/00Volume compression or expansion in amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10Calibration or testing

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Analogue/Digital Conversion (AREA)

Description

22107 4 It Signal Processing Means The present invention relates to signal
processing means, especially to means for anal og-to-di gital signal conversion.
It is often necessary to convert analog signals to digital signals.
Particularly in audio signals this must not interfere with their sound volume range so that noise components do not become annoyingly apparent. However, often the volume range of conventional anal og-to-digital converters is not sufficient to attain this goal.
There is thus a need for signal processing means which may make it possible to process signals in anal og-to-digi tal conversion over a larger volume range than would actually be possible with just an analogtodigital converter.
According to the present invention there is provided a signal processing means comprising an analog compressor for compressing an analog signal, an anal og-to-digital converter having an input directly or indirectly coupled to the compressor and operable to convert the compressed analog output signal of the compressor into a digital signal, the converter having an output for the digital signal, and a digital expander directly coupled to the output of the converter and operable to digitally expand the digital output signal of the conv.erter.
In a preferred embodiment, the compressor includes two seriesconnected oppositely level-dependent controlled amplifiers and the gain controls of both amplifiers increasingly counteract one another with increasing control frequency when the control processes involve higher frequencies which could be too much to handle for the subsequent 2 anal og-to-di gi tal converter, while the expansion effect of the expand ing one of the two amplifiers decreases with decreasing control frequency during lower frequency control processes.
German (Federal Republic) published Patent Application No.
1,803,222 discloses a method in which individual data are pulse coded according to a compressing characteristic. These individual data are then converted to linearly coded data, i.e. they are digitally expanded, before they are fed to an addition stage after which the resulting sum data are digitally compressed again by further recoding according to the same code with which the individual data were coded after the first compression.
Aside from having the object of linear addition of individual data according to a compressing pulse code, this prior art method does not enable processing of signals having a larger volume range than can actually be processed by the specific analog-to-digital converter employed. In the prior art method, the first pulse coder must be able to process the full volume range of a fed-in analog signal, which gives rise to problems.
In the case of the present invention, if the anal og-to-digital converter were to receive directly the analog signals to be converted, the converter would cause a loss in volume range once the volume range of the analog signals exceeds the volume range that the converter is able to process. Instead, the analog signal is initially fed to an analog compressor. The compressed analog output signal from this compressor has a reduced volume range. If this volume range is reduced 3 to such an extent that the converter is able to fully process this volume range, the weak point of the converter, namely its limited volume range, is initially overcome. The resulting digital signal could then be further processed in digital form and it could be digital/analog converted immediately before its analog transmission, whereupon it could be analog expanded. Instead, however, immediately after the analog- todigital conversion, the signals are digitally expanded inversely to the analog compression performed by the analog compressor ahead of the converter. Due to the immediate succession of the analog compressor, the converter and the digital expander, it is ensured that the expansion can be performed precisely inversely to the compression. An additional advantage is that a signal with the full volume range is again available at the output of the expander and can be further processed by means of conventional digital signal processing methods. However, it is quite possible for the output signals of the analog compressor to be temporarily stored, recorded or transmitted in a linear manner.
If the analog signals to be processed (as a result of rapid regulating processes in the compressor) have such steep edges that the converter may be asked to exceed its performance capacity, it will no longer be ensured that the digital expansion can be performed precisely inversely to the compression. If the converter is no longer able to quickly follow the course of the analog signal, distortions will occur which will be difficult to remove. Therefore it is of advantage if the compressor includes two serially connected amplifiers which are controlled in dependence on the level of the analog signal, but in 1 opposite directions.
Embodiments of the present invention will now be more particularly described by way of example with reference to the accompanying drawings, in which:
Fig. 1 is a block circuit diagram of signal processing means embodying the invention; Fig. 2 is a block circuit diagram of an analog signal compressor in the processing means of Fig. 1; Figs.3-4 are time diagrams for the compressor of Fig. 2; and Fig. 5 is a block circuit diagram of another form of analog signal compressor.
Referring now to the drawings, there is shown in Fig. 1 signal processing means comprising a series connection of an amplifier V for analog signals, an analog compressor 1, an anal og-to-digital converter 2 and a digital expander 3. The analog signals fed to amplifier V to be subjected to an anal og-to-digital conversion have a volume range which exceeds the permissible volume range of the converter 2. The compressor 1 reduces the volume range to the degree permissible for the converter 2.
Immediately following the converter 2, the signal path includes the digital expander 3 wflich cancels out the analog caipression of canpressor 1.
Digital signals having the full volume range of the analog signals furnished by the amplifier V are present at the output of the expander 3.
- A fast compressor, which is low in harmonics and is shown in Fig. 2 can preferably be used as the compressor 1 of Fig. 1. It includes at its input a voltage/current converter 10 which is followed by a series connection of two oppositely level-dependent controlled ampli- fiers, so-called voltage controlled amplifiers, 20 and 40 and an intermediately connected delay member 30. The first amplifier 20 causes a reduction of the volume range by 40 precent. If its input volume range is identified as &Pe and its output volume range as &Pa, the following applies:
&Pa = Ape - 0.40 Ape = 0:60'&Pe The amplifier 20 is designed to have very little noise. It is part of a compressor which also includes a controlled auxiliary amplifier 50 to reduce the volume range by 60% and an envelope full wave,rectifier 60. A suitable rectifier is shown in Fig. 1 of us Patent Specification No. 3,969,680.
The amplifiers 20 and 50 reduce the dynamic range of the signal because as the output voltages from the amplifiers 20 and 50 decrease, the control voltage from the rectifier 60 decreases so as to effect an increase in gain of the amplifiers 20 and 50. Thus, a compression is achieved in that weak signals are amplified more powerfully than signals with high amplitudes.
The reductions in the volume range by the amplifiers 20 and 50 produce a signal without any volume range at the output of the amplifier 50. If deviations from this steady state should still occur here, they 6 are regulated out by way of line 62.
At the output 21 of the first amplifier 20, the volume range is reduced by 40%. The signals appearing here initially pass through the delay member 30 and then reach the second controlled amplifier 40 which is able to expand the volume range again by up to 40% by attenuating preferably the amplitudes of weak signals. This amplifier 40 may be considered a part of an expander (compare US Patent Specification No. 3, 969,680, Fig. 2) which includes the delay member 30, the amplifier 50, the envelope full-wave rectifier 60 as well as a parallel connection of a further delay member 70 and a lowpass filter 80 with a subsequent inverting amplifier 85. If the amplifier 40 were directly controlled by the rectifier 60, the expander would work in the following manner: If the input signals on line 21 decrease, the control signal at 61 will decrease. This has the result that the gain of the amplifier 40 also decreases (while the gain of amplifiers 50 and 20 increases). The mutually identical delay times of the delay members 30 and 70 are constant in the service band of frequencies. The lowpass filter 80 has the flattest possible delay curve; the group delay, being constant up to the stopband, is shorter than the delays fo of the delay members 30 and 70 and especially has a value of only up to 90% of-Co. The lowpass filter has a step-function response without any overshoot.' A Cauer-filter with a maximally flattened shape of the group delay is suitable.
For example, the delays -CO are each one millisecond and the passband extends up to 1.2 kHz, whereas the cut-off frequency (lowest frequency of the stopband) of the lowpass filter 80 is about 5 to 10 times higher than the edge frequency (highest frequency of the passband) but not higher than the highest useful frequency of the signal at the input 9. An example for a suitable envelope rectifier 60 is described as 5 a control voltage generator in US Patent Specification No. 3,969,680 especially in column 2, line 35, to column 3, line 3, and in claims 7 to 9 and Figs. 10 to 13 and the appropriate parts of the description. According to this example the peak-responding rectifier 60 has a threshold; thus the capacitor of the rectifier discharges slowly as long as the input voltage of the rectifier is below the threshol.d. Above the threshold the capacitor is charged by a current until the voltage at the capacitor i.e. the voltage at circuit point 61, has such a value that the output voltage of the amplifier 50 has reached the threshold. Thus the output voltage of the amplifier 50 is nearly constant and has no dynamic range.
If the changes in the analog fed to an input terminal 9 are sufficiently slow, i.e. at an envelope curve frequency of less than 1.2 kHz, an adder 90 adds up two oppositely equal signals with the result that the controlled amplifier 40 receives no control signal and consequently does not perform an expansion. Analog signals having an envelope curve of a relatively low frequency are thus merely compressed by the compressor 20-21-50-60-61-62, but are not expanded by the subsequent expander and its controlled amplifier 40.
In the same way the circuit reacts when the level of the signal at the input 9 drops suddenly because the rectifier 60 then produces 8 a merely slowly decreasing output voltage. Usually the output voltage of the envelope rectifier 60 follows an upward step of the input voltage by a 100 or 1000 times faster than a downard step. Thus, following a downward step the amplifier 20 will slowly increase its amplification of the now arriving signals of low amplitudes, while the amplifier 40 does not receive a gain control voltage and retains its behaviour.
However, the level of analog signals having envelopes with harmonics of higher frequency, for example including sudden upward changes in level, is increasingly reduced by the expander, and its controlled amplifier 40, with increasing frequency of the harmonics so that the compressing effect of controlled amplifier 20, which is effective to low amplitude signals, is compensated with increasing frequency of the harmonics. The reason for this is that the lowpass filter 80 becomes less transmissive with increasing control frequency so that the.
controlled amplifier 40 is increasingly controlled by the output of delay member 70 and increases its expansion effect, i.e. the amplifier weakens low amplitude signals. An upward step of the level at the output of the amplifier 40 thereforestarts at a reduced level and so cannot result in an overshoot of the signal at output 99.
The parallel circuit 70 combined with 80 has an effect similar to a highpass filter.
In this connection, it must be considered that the level of the analog signals at the input 9 is selected so that, with the arrangement being fully driven in a steady state (which means a control frequency zero), a signal appears at output 99 which just fails to overdrive the converter 2 of Fig. 1. The first amplifier 20 then produces a comp ression in such a manner that low amplitude oscillations are amplified more than higher amplitude oscillations; the highest amplitude oscilla tions pass through the amolifier 20 unchanged.
When the level at the input 9 changes by an upward step (frequency of the envelope different from zero) the low amplitude oscillations are reduced temporarily in the arplifier 40, increasingly with increasing harmonic frequencies in the control signal whenever these frequencies exceed 1.2 kHz. This will be described below more in detail, as is well known, such an upward step results in a high part of highfrequent harmonics in the envelope.
The amplifiers 20, 40 and 50 may be conventional voltage controlled amplifiers the gains of which are controlled in proportion to the levels of voltages applied to the respective gain control inputs.
The numerical values (40%, 60%, lms, 1.2 kHz) are here simply 15 exemplary values; other values are also possible.
Figs. 3 and 4 show level and voltage curves over time at terminals or lines 9, 99, 21, 31, 61, 62, 71, 81, 86 and 91, namely for a sudden change in level from -70 dB to -20 dB within 0.05 ms. Aside from a short overshoot, there then appears at output 21 of the first amplifier 20 a sudden change in level from -42 dB to -12 dB, i.e. a reduction to 60% (= 60% of the input level). This sudden change appears in line 31 with a delay of 1 ms.
On the basis of the control voltage curve at the circuit point 61 and in the line 62, there result the voltage curves for the line 81 and (with reversed polarity) the line 86. The voltage curve for the point 61 appears in the line 71 with a delay of 1 ms and the sum of the voltage curves for the lines 71 and 86 produces the voltage curve for the line 91.
As a result of a control with the control voltage curve for the line 91, the amplifier 40 and its input level at line 31 then furnish at its output terminal the level curve for the output line 99, i.e.
a curve which avoids the annoying level peak (that is still present in the curve for the point 21 at time t = 0.05 ms). Avoiding the level peak is due to the temporary decrease in level at output 99 in relation to the level in the line 31 by the temporary expansion effect of the amplifier 40, which is controlled by the temporarily decreased control voltage 91. Thus, the level step between points A and B starts at a level which is sufficiently low to avoid an overshoot at point B. Fig. 5 differs from Fig. 2 only insofar as there is a separate control loop 501 -601 -611 -62' for the amplifier 20. This control loop fully corresponds in its function to control loop 50-60-61-62 in Fig. 2 as far as the compressor is concerned.
The present disclosure relates to the subject matter disclosed in German Application P 37 33 739.4 of 6 October 1987, the entire specification of which is incorporated herein by reference.

Claims (9)

1 A signal processing means comprising an analog compressor for compressing an analog signal, an anal og-to-digital converter having an input directly or indirectly coupled to the compressor and operable to convert the compressed analog output signal of the compressor into a digital signal, the converter having an output for the digital signal, and a digital expander directly coupled to the output of the converter and operable to digitally expand the digital output signal of the converter.
2. Signal processing means as claimed in claim 1, wherein the converter has a volume range and the compressor comprises means for reducing the volume range of the input analog signal thereto to produce at its output a reduced volume range output signal having a volume range within that of the converter.
3. Signal processing means as claimed in claim 2, wherein the compressor comprises a first level-dependent controlled amplifier directly or indirectly connected in series with the input of a second leveldependent controlled amplifier having an output connected to the converter, first control means, responsive to the analog signal,for produc ing a first gain control signal having a control -frequency which depends on the rate of change in the amplitude of the analog signal and for applying the first gain control signal to a first gain control input of the first amplifier, and second control means for producing a second gain control signal having the control frequency for applying the second - 12 gain control signal to a second gain control input of the second amplifier, one of the first and second amplifiers having a gain which increases with a decrease in the level of the analog signal applied to the input thereof and/or which decreases with an increase in the level of the analog signal, the first and second control means being respon- sive to the rate of change in the amplitude of the analog signal for respectively controlling the levels of the first and second gain control signals so as to reduce the volume range of the analog signal by one of the amplifiers and to reduce the gain of the other amplifier with increasing harmonic content in the second gain control signal in a range of the harmonic content where this results in an output signal,from the dompressor, which exceeds the volume range of the converter, and the second control means including means, responsive to the frequency and harmonic content of the second gain control signal, for increasing and decreasing the gain of the other one of the first and second amplifiers with decreasing and increasing rate of change in the amplitude of the analog signal.
4. Signal processing means as claimed in claim 3, wherein the first and second amplifiers comprise voltage controlled amplifiers.
5. Signal processing means as claimed in claim 3, wherein said one of the amplifiers is the first amplifiers, and wherein the first control means comprises a third amplifier having a gain control input, a signal input coupled to the output of the first amplifier and a signal output, a full wave rectifier having an input coupled to the output of the third amplifier and an output, a lowpass filter having an input coupled to the output of the rectifier and an output, and means, coupled to the outputs of the rectifier and the lowpass filter, for forming a gain control output signal having a value proportional to the difference between the value of the output signal of the lowpass filter and the value of the delayed output signal of the rectifier and for applying the gain control output signal as the second gain control signal to the gain control input of the second amplifier, the output of the rectifier being coupled to the gain control input of the third amplifier and of the first amplifier further comprising first and second time delay means, respectively interposed between the rectifier and difference-forming means and between the output of the first amplifier and the input of the second amplifier, for delaying for equal time intervals receipt of the output signal of the first amplifier by the second amplifier and of the output of the rectifier by the difference-forming means.
6. Signal compressing and expanding means comprising an analog signal compressor which is connected at an output thereof to the input of a signal expander and which comprises a first level-dependent controlled amplifier with a gain controlled by first gain control means, an input of which is coupled to the output of the first amplifier and an output of which is coupled to a gain control input of the first amplifier, the first gain control means comprising at its input an input of a third level-dependent controlled amplifier, a gain control input of which together with gain control input of the first amplifier are controlled by 14 a first peak-responding rectifier coupled to the output of the third amplifier, the expander comprising at its input first time delay means coupled in series to a second level-dependent controlled amplifier with a gain controlled by second gain control means, an input of which is coupled to the input of the expander, the second gain control means comprising at its input an input of one of two level-dependent controlled amplifiers, one of which is the third amplifier and the other which is a fourth level-dependent controlled amplifier, a control input of said one of said two amplifiers being controlled by one of two peak-responding rectifiers coupled to the output of said one of said two amplifiers, one of said two rectifiers being the first rectifier and being coupled to the output of said one of said two amplifiers, the expander further comprising filter means between said one of said two rectifiers and the output of the-second gain control means, the filter means being of highpass character and having a time delay which in the low frequency range is equal to the difference between the time delay of the first time delay means and the time delay of. the said one of said two amplifiers and of said one of said two rectifiers.
7. Signal compressing and expanding means as claimed in claim 6, wherein the filter means comprises at its input in parallel a lowpass filter and a second time delay means followed by commun means for forming the gain control signal for the second amplifier having a value proportional to the differnce between the value of the output signal of the lowpass filter and the value of the output signal of the second - 15 - time delay means.
8. Signal processing means substantially as hereinbefore described with reference to Figs. 1 to 4 of the accompanying drawings.
9. Signal converting means as claimed in claim 8, wherein the converter has a volume range and the compressor comprises means for reducing the volume range of the input analog signal thereto to produce at its output a reduced volume range output signal having a volume range within that of the converter.
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9. Signal processing means substantially as hereinbefore described with reference to Fig. 5 of the accompanying drawings.
Amendments to the claims have been filed as follows CLAIMS 1. Signal processing means for processing an analog signal, the processing means comprising a compressor which comprises a first level- dependent controlled amplifier directly or indirectly connected in series with the input of a second level-dependent controlled amplifier, first control means responsive to the analog signal to produce a first gain control signal having a control frequency which depends on the rate of change inthe amplitude of the analog signal and to apply the first gain control signal to a gain control input of the first amplifier, and second control means to produce a second gain control signal having the control frequency and to apply the second gain control signal to a gain control input of the second amplifier, one of the first and second amplifiers having a gain which increases with a decrease in the level of the analog signal applied to the input thereof andlor which decreases with an increase in the level of the analog signal, the first and second control means being responsive to the rate of change in the amplitude of the analog signal for controlling the levels of, respectively, the first and second gain control signals so as to reduce the volume range of the analog signal by one of the amplifiers and to reduce the gain of the other amplifier with increasing harmonic content in the second gain control signal in a range of the harmonic content where this results in an output signal, from the compressor, which exceeds a given volume range, and the second control means including means, responsive to the frequency and harmonic content of the second gain control signal, for increasing and decreasing the gain of the other one of the first and second amplifiers with decreasing and increasing rate of change-in the amplitude 17 - of the analog signal.
2. Signal processing means as claimed in claim 1, wherein each of the first and second amplifiers comprise a voltage-controlled amplifi er.
3. Signal processing means as claimed in either claim 1 or claim 2, wherein said one of the amplifiers is the first amplifier and wherein the first control means comprises a third amplifier having a signal input coupled to the output of the first amplifier, a full wave rectifier having an input coupled to the output of the third amplifier and an output coupled to a gain control input of the third amplifier and to the gain control input of the first amplifier, a lowpass filter having an input coupled to the output of the rectifier, first time delay means coupled to the output of the rectifier, difference-forming means coupled to the output of the first delay means and the output of the lowpass filter to form a gain control output signal having a value proportional to the difference between the value of the output signal of the filter and the value of the delayed output signal of the rectifier and to apply the gain control output signal as the second gain control signal to the gain control input of the second amplifier, and second time delay means interposed between the outputof the first amplifier and the input of the second amplifier, the first and second delay means being arranged to delay by equal time intervals the receipt of the output signal of the first amplifier by the second amplifier and the receipt of the output signal of the rectifier by the difference-forming means.
-jig - 4. Signal processing means as claimed in either claim 1 or claim 2, wherein the first amplifier is connected to the second amplifier by way of time delay means and wherein the first control means comprises a third level-dependent controlled amplifier, a gain control input of which together with the gain control input of the first amplifier are controlled by a first peak-responding rectifier coupled to the output of the third amplifier, and the second control means comprises a fourth level-dependent controlled amplifier, a gain control input of which is controlled by a second peak-responding rectifier coupled to the output of the fourth amplifier, and filter means connected between the second rectifier and an output of the second gain control means, the filter means being of highpass character and having a time delay which in the fow frequency range is equal to the difference between the time delay of said delay means and the time delay of the fourth amplifier and of the second rectifier.
5. Signal processing means as claimed in claim 6, wherein the filter means comprises in parallel a lowpass filter and further time delay means followed by commun means for forming the second gain control signal with a value proportional to the difference between the value of the output signal of the lowpass filter and the value of the output signal of the furhter delay means.
6. Signal processing means substantially as hereinbefore described with reference to Fig. 2 of the accompanying drawings.
7. Signal processing means substantially as hereinbefore described - iq with reference to Fig. 5 of the accompanying drawings.
8. Anal og-to-di gital signal converting means, comprising analog signal processing means as claimed in any one of the preceding claims, an anal og-to-di gital converter having an input directly or indirectly coupled to the processing means and operable to convert the compressed analog output signal of the compressor into a digital signal, the converter having an output for the digital signal, and a digital expander directly coupled to the output of the converter and operable to digitally expand the digital output signal of the converter.
GB8823442A 1987-10-06 1988-10-06 Analog to digital conversion Withdrawn GB2210741A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE3733739A DE3733739C1 (en) 1987-10-06 1987-10-06 Arrangement for A / D conversion with A / D converter

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GB8823442D0 GB8823442D0 (en) 1988-11-16
GB2210741A true GB2210741A (en) 1989-06-14

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GB8823442A Withdrawn GB2210741A (en) 1987-10-06 1988-10-06 Analog to digital conversion

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GB (1) GB2210741A (en)

Cited By (6)

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EP0595406A1 (en) * 1992-10-26 1994-05-04 Koninklijke Philips Electronics N.V. Radio device with signal compression
AU663234B2 (en) * 1992-10-26 1995-09-28 Philips Electronics N.V. A digital radio device
GB2307121A (en) * 1995-11-06 1997-05-14 Sony Corp Noise prevention in D/A or A/D conversion with two stage stepped gain control by using zero crossing detector to time gain changes
US5828328A (en) * 1996-06-28 1998-10-27 Harris Corporation High speed dynamic range extension employing a synchronous digital detector
WO2002052574A1 (en) * 2000-12-22 2002-07-04 Koninklijke Philips Electronics N.V. Low voltage sample and hold circuit with voltage range compression and expansion
US6803868B2 (en) 2000-06-21 2004-10-12 Qinetiq Limited Method and apparatus of producing a digital depiction of a signal

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DE19638546A1 (en) * 1996-09-20 1998-03-26 Thomson Brandt Gmbh Method and circuit arrangement for encoding or decoding audio signals
CN116719266B (en) * 2023-08-09 2023-11-03 浙江国利信安科技有限公司 Control apparatus

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GB1525636A (en) * 1974-09-10 1978-09-20 Philips Electronic Associated Pulse code modulation with dynamic range limiting
GB2038123A (en) * 1978-11-30 1980-07-16 Philips Nv Converter for converting an analogue signal into (b+a)-bit code words using a b-bit auxiliary a/d converter
EP0234034A1 (en) * 1986-02-07 1987-09-02 ANT Nachrichtentechnik GmbH Analog-digital conversion device of analog electric signals

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GB1525636A (en) * 1974-09-10 1978-09-20 Philips Electronic Associated Pulse code modulation with dynamic range limiting
GB2038123A (en) * 1978-11-30 1980-07-16 Philips Nv Converter for converting an analogue signal into (b+a)-bit code words using a b-bit auxiliary a/d converter
EP0234034A1 (en) * 1986-02-07 1987-09-02 ANT Nachrichtentechnik GmbH Analog-digital conversion device of analog electric signals

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0595406A1 (en) * 1992-10-26 1994-05-04 Koninklijke Philips Electronics N.V. Radio device with signal compression
AU663234B2 (en) * 1992-10-26 1995-09-28 Philips Electronics N.V. A digital radio device
GB2307121A (en) * 1995-11-06 1997-05-14 Sony Corp Noise prevention in D/A or A/D conversion with two stage stepped gain control by using zero crossing detector to time gain changes
US5808575A (en) * 1995-11-06 1998-09-15 Sony Corporation Gain varying device capable of varying each gain of analog and digital signals
GB2307121B (en) * 1995-11-06 2000-03-15 Sony Corp Variable gain device for use with analog and digital signals
US5828328A (en) * 1996-06-28 1998-10-27 Harris Corporation High speed dynamic range extension employing a synchronous digital detector
US6803868B2 (en) 2000-06-21 2004-10-12 Qinetiq Limited Method and apparatus of producing a digital depiction of a signal
WO2002052574A1 (en) * 2000-12-22 2002-07-04 Koninklijke Philips Electronics N.V. Low voltage sample and hold circuit with voltage range compression and expansion
US6549043B2 (en) 2000-12-22 2003-04-15 Koninklijke Philips Electronics N.V. Sample and hold circuit with compression and expansion

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DE8717485U1 (en) 1989-04-06
GB8823442D0 (en) 1988-11-16
DE3733739C1 (en) 1989-04-27
JPH01126826A (en) 1989-05-18

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