GB2208957A

GB2208957A - Relaxation aid

Info

Publication number: GB2208957A
Application number: GB8719858A
Authority: GB
Inventors: Frederick Henry Wright
Original assignee: Individual
Current assignee: Individual
Priority date: 1987-08-21
Filing date: 1987-08-21
Publication date: 1989-04-19
Anticipated expiration: 2007-08-21
Also published as: GB8719858D0; GB2208957B

Abstract

A relaxation aid produces sound taking the form of pseudo random noise over an audio range up to and beyond 10 kilohertz, by a pseudo-random noise generator, 3. The noise is generated for a period controlled by a variable timer 2. The noise level is varied periodically in a level control circuit 4 whose control signal 8 or 9 may be altered over a wide range from timer 2, or oscillator 7. Thus the period for which the noise is generated and its rate of variation of level may be adjusted together or independently. <IMAGE>

Description

RELAXATION AID This invention relates to a relaxation aid, comprising a sound source adapted to assist in relaxation.

Research has been done into the use of sound recordings, simulations of, and synthesis of naturally occurring sounds as aids to relaxation. This has led to the availability of recordings on tapes and records containing such sounds, and of synthesisers capable of generating such sounds.

Present relaxation recordings make use of regular random sounds, for example surf rolling onto a beach, rainfall, wind in trees, trickling brooks.

Also, it has long been known that a common form of reassurance for a baby is a 'Shush' from parents.

Indeed, there are on the market tapes simulating intra-uterine sounds for calming babies, although these are not considered to be effective after six weeks of age.

The existing methods using records and tapes are cumbersane involving the use of a record- or cassette-player. These in turn requiring a convenient mains supply, or heavy use of batteries.

The sounds are produced only during the time that the record or tape plays for, entailing manual attention at the end of that time. Furthermore, the sounds are of fixed quality, that is, the tempo of the sound cannot be adjusted except by altering the record speed by a fixed step. In the particular case of cassette tapes, the playback speed cannot usually be varied.

The essence of the present invention is to produce a relaxation aid which is at least as effective as, and preferably more effective than the known relaxation aids, which is easy to handle, which is compact, which has a variable on-time, which has a arable tempo, and which minimises energy consumption enabling battery power to be utilised.

In order to satisfy these criteria, the present invention is characterised by a generator for producing random or pseudo-random noise over an audio frequency range, up to and beyond ten kilohertz; a variable timer to control the time for which the noise is produced; and a means of controlling the instantaneous level of the noise.

A specific erwdiment of the invention will now be described in further detail by way of example only wltr; reference to the accompanying drawings in which: Figure 1 shows a block diagram of the invention.

Figure 2 shows the timer circuit.

Figure 3 shows the noise generator.

Figure 4 shows one form of level control circuit.

Figure 5 shows an alternative form of level control circuit.

Figure 6 shows an alternative form of tempo control circuit.

Figure 7 shows the speaker driving stage.

Referring to the block diagram, the invention is powered by battery 1, although it could also be powered from an external mains supply, (not shown).

A timer 2 of variable duration controls power to the noise generator 3, a noise level control circuit 4, and amplifier 5, driving a loudspeaker 6.

The control signal 8 or 9 for circuit 4 can be derived from timer 2, or a separate circuit 7.

The timer comprises a power-on-reset circuit, a switch-debouncer and latch, a digital counter with inbuilt clock, and a transistor.

The switch-debouncer and latch are formed from two NAND gates 10 and 11, resistors 12, 13, capacitor 14, and switch 15. A power-on-reset, comprising capacitor 16, resistor 17, and diode 18, ensures that the latch adopts the correct state, (output 19 high, ie. battery positive), when the battery is connected.

When switch 15 is pressed output 19 changes state, going low, (ie.

battery negative). When switch 15 is pressed a second time output 19 returns high.

The digital counter and clock 20, comprises a CMOS integrated circuit, type 4060. The resistors 21 and 22 with capacitor 23 set the clock speed, with its output at 24. The latch output 19 is connected to the counter reset pin. This point must be low to enable counting to take place.

The clock drives a chain of dividers within the chip, several outputs of which are brought out to pins for external use. The divide-by-16384 output at 25 is connected back to the latch via diode 26. After 8192 clock pulses have been received from the clock, output 25 switches high, resetting the latch, thereby returning the output of the latch 19 to its high state.

When trse latch output 19 is low, current is drawn through resistor 27, and the base of the PNP transistor 28, thereby turning it on, supplying power to the rest of the circuit via its collector 29.

Resistors 21 or 22, and capacitor 23 may be varied to alter the clock speed and thereby the time for which power is supplied to the rest of the circuit. This may be a few minutes, to several hours.

The NAND gates are formed on a single CMOS integrated circuit, tpe 4093. Two of the four NAND gates comprising the package 30 and 31, are not required. Their input pins are tied to the supply lines to minimise their supply current.

The noise generator basically comprises two CMOS integrated circuits, a 4006 shift register 32 and the four ex-or gates in a 4070. T\t# of the ex-or gates 33 and 34, together with components 35 and 36 form an oscillator running at a frequency around 25 - 30 KHz. This is used to clock the shift register 32.

Three outputs from the shift register are combined using two ex-or gates 37 and 38, transistor 39, and resistors 40 and 41.

This configuration produces a pattern of pseudo-random highs and lows at 42, approximating white noise. The bandwidth of the noise is about ten kilohertz, set by the length of the shift register, and the speed of the clock.

This noise is fed through dc-blocking capacitor 43 and volume control 44 via 45 to a level control circuit, two forms of which are described here.

In the first, clock output 24 of the clock/counter 20 is taken to a CMOS 4024 counter 46 where the incoming signal is divided by two and four. These two outputs, together with the input clock are combined by resistors 47, 48 and 49 into a ramp voltage waveform.

This waveform is smoothed by components 50 and 51, then applied to a gating circuit consisting of silicon diodes 52, 53, resistors 54, 55 and 56, and coupling capacitors 57, 58.

The ramp voltage passes a current through the diodes, thus varying their effective resistance. The noise is fed into one side of the control circuit and as it passes through, its level is altered depending on the diodes resistance, and the fixed value resistor associated with each diode.

The overall effect is to modulate the noise signal with a pulsating, rhythmic beat, superimposed onto a constant noise, with a level set by resistor 56.

The second level control circuit is very similar to the first in that components 52 to 55, 57 and 58 are again present, and serve the same purposes. The control signal is now taken from the divide-by-128 output, (not shin), on the clock/counter 20, fed via components 59, 50 and 60, smoothed by capacitor 51, then modulates the noise.

The control signal is also smoothed by components 61 and 62, before being applied to germanium diode 63. this is again used as a variable resistance. When the control signal is high, the diode conducts, bringing capacitor 64 into play to reduce the upper frequencies of the noise.

capacitor 62 ensures a smooth transition in the noise filtering. The overall effect of this circuitry is a simulation of surf rising and receding on a beach.

A tempo control signal may also be produced by a separate circuit. The speed of oscillation is set by oscillator 63, with variable resistor 64 and capacitor 65. the output is on 66. This point could be used as an alternative to 24.

Using this separate circuit enables the on-time of the aid and the tempo to be varied independently of each other.

The output signal at 67 of the level control circuit is fed at 68 into a speaker driving circuit, comprising bifet operational amplifier 69, gain setting resistors 70, 71, biasing resistors 72, 73, and a piezo-ceramic transducer, 74.

Claims

1. A relaxation aid, comprising a source of sound adapted to assist in relaxation Fig. 1 characterised by a generator for generating random noise or pseudo-random noise over an audio frequency range extending up to at least several thousand hertz, preferably up to at least ten thousand hertz; and by means (4) for automatically and repetitively changing, at an adjustable rate, the level of said noise from a low level to a high level, and subsequently to an imperceptible level, preferably zero.

2. A relaxation aid in accordance with claim 1, characterised in that said means (4) for changing the level of said noise from a low level to a high level is adapted to produce a smooth change in said level.

3. A relaxation aid in accordance with either claim 1 or claim 2, characterised in that a timer circuit (2) is provided for maintaining the said noise levels for a variable time-period, preferably in the range from 15 minutes to 60 minutes.

4. A relaxation aid in accordance with any one of the preceding claims, characterised in that the said timer circuit (2), or circuit (7) is adapted to cause said means (4) to repetitively change the noise level.

5. A relaxation aid in accordance with any one of the preceding claims, characterised in that the aid is switched on or off by a single switch (15) and switches off automatically at the end of the period set by timer (2).

6. A relaxation aid in accordance with any one of the preceding claims, characterised in that said timer circuit (2) comprises a binary switching circuit (10, 11, 12, 13, 14), adapted to produce a binary signal (19) having a low level for the duration of said noise levels, and a high level thereafter; a timing circuit (20, 21, 22, 23) adapted to produce a repetitive binary output (24) for the duration of said noise levels; voltage generating means (28) coupled to said first binary signal and adapted to generate a voltage output (+V) having a high level when said binary signal is low, and a zero output when said binary signal is high; a circuit (16, 17, 18) adapted to ensure first binary signal (19) is high when power source (1) is connected; means (26) adapted to ensure said first binary signal is high at the end of the said timing duration; random noise source (3) connected to said voltage output; level-control means (4) connected to said noise source; amplifier means (5) connected to output of said level-control means; and a converter (6) for converting said amplified noise signal into audio noise.

7. A relaxation aid in accordance with claim 6, characterised in that said voltage generating means comprises a transistor (28) having a base connected to first binary output via resistor (27), a collector connected to a source of power, preferably a battery (1), and an emitter coupled to said noise source (3).

8. A relaxation aid in accordance with claim 6, characterised in that said noise source (3) comprises a binary shift-register (32), a frequency source (33, 34, 35, 36), connected to said shift-register, and feedback means (37, 38, 39, 40, 41) connected to said shift register in such a way as to produce a repeating pattern of binary levels at any point along the length of said shift-register (42).

9. A relaxation aid in accordance with claim 6, characterised in that said level-control means (4) comprises resistors (47, 48, 49, 50, 54, 55, 56), capacitors (51, 57, 58), diodes (52, 53), and frequency divider (46).

10. A relaxation aid in accordance with claim 9, characterised in that said frequency divider (46) is coupled to said repetitive binary output (24), or repetitive binary output (66) from frequency source (63) with frequency control means (64, 65).

11. A relaxation aid in accordance with claim 6, characterised in that said amplifier means comprises an operational amplifier (69) with gain-setting means (70, 71).

12. A relaxation aid in accordance with claim 6, characterised in that said converter (6) for converting said amplified noise signal into audio noise comprises a piezo-ceramic transducer (74).

13. A relaxation aid in accordance with claim 11, characterised in that said operational amplifier (69) is defined on a single chip (CA3140).

14. A relaxation aid in accordance with claims 9 or 10, characterised in that said frequency divider circuit (46) is defined on a CMOS chip (4024).

15. A relaxation aid in accordance with claim 10, characterised in that said frequency source (63) is defined on a CMOS chip (7555).

16. A relaxation aid in accordance with claim 8, characterised in that said frequency source (33, 34), and part of said feedback means (37, 38) is defined on a CMOS chip (4070).

17. A relaxation aid in accordance with claim 6, characterised in that said binary switching circuit (10, 11) is defined on a CMOS chip (4093).

18. A relaxation aid substantially as described herein with reference to Figures 1-7 of the accompanying drawings.

Amendments to the claims have been filed as follows 1. A relaxation aid, comprising a source of sound adapted to assist in relaxation Fig. 1 characterised by a generator for generating random noise or pseudo-random noise over an audio frequency range extending up to at least several thousand hertz, preferably up to at least ten thousand hertz; and by means (4) for repetitively and automatically changing, at an adjustable rate, preferably in the range from 30 to 120 level changes per minute, the level of said noise from a low level to a high level, and subsequently to an imperceptible level, preferably zero.

14. A relaxation aid in accordance with claims 9 or 10, characterised in that said frequency divider circuit () is defined on a CMOS chip (4024).