GB2160037A - Phase locked loop circuits - Google Patents

Abstract

A phase locked loop circuit includes a reference frequency oscillator 10, a phase comparator 12 for comparing this oscillating signal with a loop signal, and a voltage controlled oscillator VCO 16 receiving the phase comparison signal via a low-pass filter 14. The VCO output provides the output signal of the circuit and also the loop signal fed to the phase comparator 12 via a prescaler 20 and a divider 22. Modulation is applied at a terminal 30 and, in order to compensate for the loop cut-off frequency, both the reference frequency oscillator 10 and the VCO 16 are modulated by signals received from a circuit 26 including a potentiometer 32 for setting the relative levels of the modulation signals. The modulation characteristics of the two oscillators being complementary in shape, it is possible by suitably apportioning the modulation therebetween to achieve a flat combined characteristic (Figure 3). <IMAGE>

Description

SPECIFICATION Phase locked loop circuits This invention relates to phase locked loop (PLL) circuits such as are utilised in synthesisers for transmitters or receivers.

In known PLL circuits, a phase comparison is made between a reference frequency (which may be derived from a suitable oscillator) and an output frquency derived from a voltage controlled oscillator (VCO). The output of the phase comparator controls the VCO so that any difference in phase between reference and output frequencies leads to a a change in output frequency in a direction to correct the difference in phase.

Most PLL circuits used with frequency synthesisers in transmitters are required to produce angle modulation by the signal to be transmitted, which in many situations will be a signal within the speech frequency band. The modulating signal is applied to the voltage controlled oscillator as another control signal for the oscillator, and the result of this is that the PLL circuit can produce frequency modulation with a flat response characteristic above the loop cut-off frequency. Below this cut-off frequency, the response falls due to the action of the loop operating to#correct what is detected as a phase imbalance.

A A difficulty with such PLL circuits is that, in order to obtain good speech modulation, the loop cut-off frequency, must be set to a predetermined maximum, typically below 300 Hz. A consequence of setting the cut-off frequency to such a value is that the circuit, particularly the VCO, becomes vulnerable to microphony problems. Any disturbance with frequency components above the loop cut-off frequency cannot be corrected, and accordingly appears as frequency modulation along with the desired modulation. When the circuit is used in an enviroment prone to even slight vibrations, such as during mobile use, or even at a typical office desk, very substantial mechanical construction of the VCO is necessary to reduce unwanted microphonic modulation to acceptable levels.

One proposal to avoid the above difficulties involves separating the frequency synthesiser from the modulator. This requires mixing of the two signals to produce the output frequency and is expensive since relatively complex filtering is required after the mixer to eliminate the unwanted mixer product.

Another proposal uses a two point modulation of a single loop within the synthesiser, involving a very complex loop including two phase comparators, one to achieve initial lock (being digital edge triggered) and a sample and hold type which enables phase modulation of the reference frequency by shifting the trigger point on a ramp up and down with the modulating signal. This system is reasonably effective at achieving low microphony, but the low frequency response cannot be extended to DC due to the use of phase modulation.

With certain modulation techniques, for example particular digital techniques such as frequency shift key (FSK), it is vital for the system to have an extremely good low frequency response, which with the above-mentioned previous systems would compound the problem of microphony.

According to the present invention, there is provided a phase locked loop circuit comprising a reference oscillator means for generating a reference frequency signal, a phase comparison means for comparing the phase of the reference frequency signal with that of a loop signal to provide a phase comparison signal, a voltage controlled oscillator means for producing an output signal whose frequency depends on the phase comparison signal, the loop signal fed to the phase comparison means being derived from the output signal, and modulation means providing a respective modulation signal to each of the voltage controlled oscillator means and the reference oscillator means, the respective magnitudes of the modulation signals being such that the individual response characteristics of the voltage controlled oscillator means and the reference oscillator means are balanced out.

Since the reference oscillator means is external to the phase locked loop, the voltage controlled oscillator means acts to follow the modulation applied to the reference oscillator means rather than attempt to correct it; above the loop cut-off frequency, however, the modulation is attenated.

Thus the modulation signals applied to both oscillator means effectively combine to provide a substantially flat response.

The invention will now be further described, by way of illustrative and non-limiting example, with reference to the accompanying drawings, in which : Figure 1 is a block schematic diagram of a known phase locked loop circuit; Figure 2 is a block schematic diagram of a circuit in accordance with an embodiment of the invention; and Figures 3A to 3C are frequency response diagrams at various parts of the circuit shown in Figure 2.

Referring to Figure 1, a known phase locked loop (PLL) circuit is shown which is suitable for UHF transmissions. A reference frequency oscillator 10, generally a crystal-controlled oscillator, provides a reference frequency signal to one input of a phase comparator 12 is fed in a low pass filter 14 to a control input of a voltage controlled oscillator (VCO) 16. The oscillating signal provided by VCO 16 is fed via a buffer 18 to an output of the circuit, and also via a prescaler 20 to a divider 22. The output of the divider 22 is fed to another input of the phase comparator 12. The VCO 16 also includes another control input connected to a modulation terminal 24 to which is applied the signal to be modulated.

The circuit shown in Figure 1 operates in known manner by comparing the phases of the divided output signal and the reference frequency signal and applying any necessary correction to the VCO 16. The VCO 16 operates at a multiple of the reference crystal oscillator 10 so as to provide the re quired high frequency, This is then divided by the same factor in divider 22 so as provide a phase comparison signal at the same frequency as that of the reference oscillator 10.

The modulation signal is applied to terminal 24 and modulates the VCO 16. As mentioned previously, the frequency response of the circuit will generally be flat with modulation frequencies which are above the loop cut-off frequency (set by the filter 14). However, below the loop cut-off frequency, the response falls due to the correcting action of the loop, which sees such low frequency modulation as a disturbance to be corrected. This gives rise to the problems outlined previously.

Figure 2 shows a circuit in accordance with a preferred embodiment of the invention. The gen eral disposition of the components is similar to that of the circuit of Figure 1 and therefore similar reference numerals are used, but the reference crystal oscillator 10 and the VCO 16 shown in greater detail. In addition, a modulation means 26 applies modulation signals to both VCO 16 in a terminal 24 and also to the reference crystal oscillator 10 via a terminal 28. The modulation means 26 includes a modulation input terminal 30 and a means for adjusting the relative amplitudes of the modulation signals, which means is shown as a potentiometer 32 connected between the modulation input terminal 30 and the terminal 24 for the VCO 16.

The operation of the circuit shown in Figure 2 is similar to that previously described with reference to Figure 1, but in this case the reference crystal oscillator 10 is modulated by the modulation signal as well as the VCO 16. Figures 3A to 3C show the effect of this dual modulation technique. Figure 3A shows the variation in relative deviation of the high frequency oscillation signal with applied modulation frequency for the VCO 16, i.e. the effect of modulation at terminal 24. As described previously, specifically with reference to Figure 1, the frequency response has a steep cut-off below a cut-off frequency defined by the characteristics of the filter 14. However, modulation of the reference crystal oscillator 10 leads to a response as shown in Figure 3B which is substantially the inverse of that shown in Figure 3A.This is because the modulation is introduced before the loop and therefore the action of the VCO 16 is to follow the modulation rather than attempt to correct it. However, above the loop cut-off frequency set by the filter 14, the modulation is progressively attenuated and therefore does not appear in the output signal or in the loop.

The modulation means 26 thus provides modulation signals to both oscillators 10 and 16 in order to compensate for the cut-off frequency of the loop. Since, as will be seen from Figures 3A and 3B, the deviation generated by the crystal oscillator 10 is less than that generated by the VCO 16, adjustment for this effect is provided by the potentiometer 32. Figure 3C shows the combined effect of combining 'n' times the response of Figure 3A ('n' being less than unity) with that of Figure 3B, the resulting effect being represented by nA + B. It will be seen that the resulting response is flat, even down to DC if required. The reason for the difference in deviation between the oscillators is that, because the reference oscillator 10 is crystal controlled, it is more difficult to modulate and thus a lower level of deviation is produced for the same modulation voltage.Microphony is not generally a problem with such crystal controlled oscillators.

Modulation of the frequency of each of the oscil- lators 10, 16 is achieved in essentially the same manner by applying the modulation signal as a varying voltage across variable capacity diodes, the resulting variation is capacitance of the diodes leading to angle modulation of the frequency of the respective oscillator.

This dual modulation technique leads to the following significant advantages.

It is possible to raise the loop cut-off frequency well above the lowest modulation frequency. A loop cut-off of 2 kHz is easily obtainable in a typical UHF phase locked loop, and thus any vibrations and other disturbances to the voltage controlled oscillator below this frequency are removed by the loop. This enables a low cost oscillator construction to be used.

Both the VCO and the reference oscillator are equally modulated. The two signals fed to the phase comparator are therefore always in phase.

This leads to a very small correction signal from the phase comparator which requires less costly loop filtering to remove reference frequency feed through onto the control line. In contrast, modulation of the VCO alone as in Figure 1 arrangement leads to large correction voltages being produced which have to be filtered out by the loop filter.

These correction voltages increase as the modulation frequency is reduced as the phase change applied is greater, and in extreme cases it is possible for the linear range of the phase detector to be exceeded by the correction voltages.

A modulation response extending as low as desired in frequency caii easily be obtained.

Claims (6)

1. A phase locked loop circuit comprising a ref- erence oscillator means for generating a reference frequency signal, a phase comparison means for comparing the phase of the reference frequency signal with that of a loop signal to provide a phase comparison signal, a voltage controlled oscillator means for producing an output signal whose frequency depends on the phase comparison signal, the loop signal fed to the phase comparison means being derived from the output signal, and modulation means providing a respective modulation signal to each of the voltage controlled oscillator means and the reference oscillator means, the respective magnitudes of the modulation signals being such that the individual response characteristics of the voltage controlled oscillator means and the reference oscillator means are balanced out.

2. A phase locked loop circuit according to claim 1, wherein the reference oscillator means in cludes a variable capacity diode, and the respective modulation signal is in the form of a varying voltage resulting in variation of the frequency of the reference oscillator means.

3. A phase locked loop circuit according to claim 2, wherein the modulation signal voltage for the reference oscillator means is greater than that for the voltage controlled oscillator means so as to provide a substantially flat response.

4. A phase locked loop circuit according to claim 1, claim 2 or claim 3, wherein the modulation means comprises a voltage divider arranged to receive an input signal for modulating the circuit, and providing the respective modulation signals at voltages having a preset ratio to each other.

5. A phase locked loop circuit according to claim 4, wherein the voltage divider comprises a potentiometer settable to adjust the preset ratio.

6. A phase locked loop circuit substantially as herein described with reference to Figure 2 of the accompanying drawings.