GB2144289A - Drift compensation - Google Patents

Drift compensation Download PDF

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Publication number
GB2144289A
GB2144289A GB08418685A GB8418685A GB2144289A GB 2144289 A GB2144289 A GB 2144289A GB 08418685 A GB08418685 A GB 08418685A GB 8418685 A GB8418685 A GB 8418685A GB 2144289 A GB2144289 A GB 2144289A
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United Kingdom
Prior art keywords
zero
strain
signal
recording system
filter
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GB08418685A
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GB8418685D0 (en
Inventor
James Callan Brown
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UK Secretary of State for Defence
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UK Secretary of State for Defence
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Priority claimed from GB838320556A external-priority patent/GB8320556D0/en
Application filed by UK Secretary of State for Defence filed Critical UK Secretary of State for Defence
Priority to GB08418685A priority Critical patent/GB2144289A/en
Publication of GB8418685D0 publication Critical patent/GB8418685D0/en
Publication of GB2144289A publication Critical patent/GB2144289A/en
Withdrawn legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06GANALOGUE COMPUTERS
    • G06G7/00Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12Arrangements for performing computing operations, e.g. operational amplifiers
    • G06G7/18Arrangements for performing computing operations, e.g. operational amplifiers for integration or differentiation; for forming integrals
    • G06G7/184Arrangements for performing computing operations, e.g. operational amplifiers for integration or differentiation; for forming integrals using capacitive elements
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/08Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
    • H03K5/082Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding with an adaptive threshold
    • H03K5/086Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding with an adaptive threshold generated by feedback

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
  • Measurement Of Force In General (AREA)

Abstract

A drift compensating circuit consists of a summing amplifier 35, a high gain amplifier 34 and an integrator 36, 37. The input signal 31 is converted into a train of constant amplitude rectangular pulses of alternating sign. As the mean level of the input signal 31 rises and falls relative to zero the durations of the pulses will increase and decrease in dependence thereon and the output E from the integrator 36 and 37 will depend on the relative durations of the positive and negative components. A proportion of the integrator output E, which is opposite in sign to the drift of the input signal 31, is fed back to the summing amplifier 35 and so forms a control loop 32 to keep the mean of the output close to zero. The circuit is used in a strain recorder in which recordings can be made of total strain, with and without zero correction; quasi-static wave loading components; and, if required, the slam component of wave induced strains. <IMAGE>

Description

SPECIFICATION Improvements in or Relating to Drift Compensating Circuits for Oscillatory Electrical Signals The invention relates to drift compensating circuits for oscillatory signals.
Variation in the zero level, or zero drift, can occur in any system which is used with an oscilllatory input signal. It arises from the fluctuation of the mean of the input signal due to external effects. The result of the drift is to give rise to uncertainty about the position of the zero level on the input signal and hence the magnitude of any signals measured from it. These can be over or underestimated depending on the direction and timing of the drift.
Recording systems which measure extreme values of an input oscillatory signal suffer from the problem of zero drift in many applications. One particular example is the wave-induced extreme value strain recorder used for measuring the strains in ships' hulls. In this case the zero drift arises from the mean strain experienced by a ships' hull fluctuating slowly due to speed, manoeuvring, thermal and other effects. The loading of a ships' hull due to transient flexing strains and quasi-static wave induced strains is asymmetrical and thus it is not possible to determine the zero level by simple averaging techniques. Even for small loads the effect of forward movement will give rise to errors and it has been found that a fairly large change in the zero recording occurs as the ship turns at the end of a run.
The object of the present invention is to provide a method of preventing or minimising zero drift in an oscillatory electrical signal, which may also be used with an extreme value strain recorder.
The invention comprises a compensating circuit for reducing a drift from zero of the mean level of an oscillatory electrical signal comprising: a. a means to convert an input signal into a train of constant amplitude rectangular pulses of alternating sign with changes of phase occurring at the zero crossing times of the input signal; b. an integrator connected to the converting means such that the mean level of voltage output from the integrator is proportional to any drift from zero of the input signal; and c. feedback from the output of the integrator to an adder whereby the feedback of the integrator output is added to the oscillatory electrical signal to produce the zero compensated input signal.
The invention makes use of a definition of the zero level as being the level about which the oscillatory signal spends equal time. As the mean level of an oscillatory signal connected to the input of the converting means rises and falls relative to zero, the durations of the train of pulses will increase and decrease in dependence thereon, and the output from the integrator will depend on the relative durations of the positive and negative components.
Preferably the converting means is a high gain amplifier which is switched to positive or negative saturation as the output signal changes from zero.
Advantageously the adder is a summing amplifier.
In a preferred form of the circuit a high impedance voltage follower is included in the feedback means. The integrator may be formed by a series resistor and shunt capacitor. Distortion of the oscillatory electrical signal may be minimised by connecting together two zero compensating circuits in series.
In a preferred form the circuit of the invention may be used in an extreme value strain recording system to compensate for zero drift of the input signals to the strain recorder. The strain recorder comprises: a. a means of converting the strain to electrical signals; b. a means of compensating for zero drift of the signals; and c. a means of recording the signals.
Preferably the system comprises a strain gauge, a strain gauge amplifier, a zero drift compensating circuit as previously described and a peak detection and recording system.
Advantageously an input filter, to filter out transient interference from the electrical signal, and a slam filter, to separate the components of the signal wave into the slam induced whipping and wave loading constituents, can be included.
The strain-inducing waves are oscillatory and they can be assumed to spend equal time above and below the mean water level, thus the electrical signal produced can be corrected for zero drift by the compensating circuit previously described.
Existing strain gauge amplifiers, as are already in use with strain recorders, may be used in the invention.
The filters are chosen to give the best combination of attenuation of unwanted high frequency signals, flatness of the pass-band and minimum waveform distortion due to phase shift.
Filters with suitable Butterworth, Bessel or Chebyshev characteristics may be selected. The input filter is preferably a Butterworth 2-pole universal active filter as this has the best response.
The slam filter is preferably a 4-pole Butterworth filter, with high pass and low pass outputs available for use.
The composite wave at the input to the slam filter consists of the slam induced whipping and the wave loading components. The slam filter filters the slam component from the composite wave so the signals at the two outputs consists of the wave loading component at the low pass output and the slam induced whipping component at the high pass output. The high pass output has much of the wave component removed but can be passed to another high pass filter to remove the remaining wave component if this is required.
The peak detection and recording system preferably comprises a data recorder with digital tracking peak recording circuits. The signals from the zero tracking and slam filter circuits are passed to the data recorder and each incoming signal is converted to a digital equivalent. The highest value reached in any of the individual peaks is held until the end of a recording period When the end of the recording period is indicated the values from the registers in each of the peak recording circuits are recorded.
The power supply may be derived from the mains supply and preferaby includes standby batteries in case of mains failure.
In order that the invention may be more fully understood, one embodiment thereof will now be described, by way of example only, with reference to the drawings of which: Figure 1 is a block diagram of an extreme value strain recording system; Figure 2 is a circuit diagram of a basic zero drift compensating circuit; Figure 3 shows graphs of the performance of two zero drift compensating circuits in series, versus the feedback gain; Figure 4 illustrates various waveforms of the zero drift compensating circuit with zero DC offset; Figure 5 illustrates the effect of a positive DC offset on the zero drift compensating circuit waveforms of Figure 4; and Figure 6 shows signal waveforms which illustrate the performance of the zero drift compensating circuit and filter circuits in the extreme value recording system on a recording of an incidence of slam.
In an irregular sea the waves causing loading of a ship spend equal time above and below the mean water level and therefore the zero of the resulting asymmetric wave-induced strain can be defined as that level above and below which the waveform spends equal time. Thus the induced signal is oscillatory and a zero tracking circuit according to the invention has been devised to correct the zero drift in a recording system for measuring extreme value strains.
Referring to Figure 1, an active strain gauge 1 is sited on a ship's structure and a second "dummy" strain gauge 2 is attached to a strain free block, of the same material as the structure, which is attached to the structure by a single fixing so that the dummy strain gauge 2 is in close thermal contact with the active strain gauge 1 without being subject to any strain. The two strain gauges 1 and 2 form two arms of a Wheatstone bridge and resistors 3 and 4 form the other two arms in a 1/2-bridge configuration. For long leads connecting the supply to and from the strain gauge 1 there are significant IR drops in the leads.
As the IR drop in a supply line 5 is in the upper half of the bridge and the IR drop in a return line 6 is in the lower half of the bridge a balanced system results, in which changes in lead resistance, due to temperature variation, are symmetrical. A V-sense input 7 senses the voltage at the gauge 1 via a long lead 8 and compensates for the voltage drop in the leads 5 and 6 by adjusting the supply (V+ and V-) accordingly.
Signal sensing lines 9 and 10 sense the signal voltages at points 11 and 12. The lines 9 and 10 are connected to an amplifier 1 3 wherein the voltage difference between the voltages at point 11 and 12 (S+ and S-) is found. The output of the amplifier 13 is connected to an input filter 14 which is a 2-pole universal active filter, with a Butterworth characteristic, used in the low pass mode and having a corner frequency of 1 9.2 Hz.
The signal then passes to a zero drift compensating circuit 1 5 and thence to a data recorder 1 6. The zero tracking circuit output 1 7 comprises a composite wave and slam signal 18.
This is passed through a slam filter 19 to filter out the slam component, leaving the wave loading component 20. The slam filter 1 9 is a 4-pole low pass Butterworth filter with a corner frequency of 0.72 Hz and a final attenuation rate of 24 dB/Octave. The composite wave and slam signal 18 is also connected directly to digital peak recording circuits 21 a, 21 b and the filtered wave component 20 is passed to digital peak recording circuits 21 c, 21 d. Each circuit 21 converts an incoming signal to a digital equivalent and holds the highest value reached in any of the individual peaks in a respective register until the end of a recording period.When the end of the recording period is indicated by a scanning system, a real time clock 22 within the recorder 1 5 and the values from the registers in each of the peak detection circuits 20 are scanned by a scan control 23 and the time and the registered values are recorded by a magnetic tape cartridge recorder 24.
The power supplies for the system are derived from the ship's 11 5V AC supply 25. An unregulated +28V DC supply 26 is produced which is used to provide stabilised supplies 27 of + 1 5V DC for the strain gauge amplifier 1 5 and +6V DC for the zero tracking circuit 1 5 and the filter circuits 14, 1 9. A bank of rechargeable sealed lead acid batteries 28 giving +18V DC supplies is provided as a standby power supply in the event of a failure of the AC mains supply.
Alternatively the stabilised supplies 27 may all be +5V DC and the batteries 28 may give +6V DC.
A voltage detector 29 monitoring the 6V stabilised supply triggers an external call circuit 30 in the recorder 1 6 and causes the recorder to note the day and time should this supply fall below a preset level affecting the accuracy of the data.
The zero tracking circuit in this application is capable of removing a drift of greater than + 1 V in a signal of up to 1 volt amplitude with an error of less than 5%.
The equipment is capable of operating unattended for a period of about two years and has the ability to cater for short term power supply interruptions. There may also be incorporated a system for protecting the batteries from excessive discharge and recording the time at which the stabilised supplies have fallen below a preset level which could invalidate the recorded data.
Figure 2 shows the basic circuit of the zero drift compensating circuit 1 5 of the strain recording system of Figure 1 The wave input 31 is summed with a feedback signal 32 and connected to the input 33 of a very high gain amplifier 34 by an inverting summing amplifier 35. As the wave input signal 31 at the input A rises and falls relative to zero, it causes the output at D of the amplifier 34 to switch into alternate positive and negative saturation. This has the effect of turning an oscillatory wave at the input A into a train of constant amplitude rectangular pulses of alternating sign. The durations of these pulses correspond closely to the zero crossing times of the original irregular wave.This train of pulses is connected via a resistance (R) 36 to a capacitor (C) 37 which is charged positively and negatively on alternate cycles with a time constant of RC seconds. The optimum time constant depends on the feedback gain and the periodicity of the input wave signal.
For a train of pulses which is symmetrical about zero, the mean voltage on the capacitor 37 depends on the relative durations of the positive and negative components. For an input signal with no drift, and therefore a mean of zero, the durations of the positive and negative pulses will be equal and the mean voltage on the capacitor 37 will be zero.
If drift occurs and the mean of the signal rises or falls relative to zero the capacitor 37 will be charged negatively or positively in proportion to the magnitude of the drift. Due to the high gain of the amplifier 34 generating the rectangular pulses, the range of drift at the input 33 which can be accommodated without saturation is small, and dependent on signal magnitude.
For a very small signal it is approximately equal to the supply voltage divided by the gain.
If, however, a proportion of the voltage on the capacitor 37, which is opposite in sign to the drift of the input wave signal 31, is fed back to the summing amplifier 35 at the input B, an automatic control loop is formed which makes the output from C maintain a mean close to zero.
To avoid loading the capacitor 37 with the low input impedance of the summing amplifier 35 and thereby modifying the RC time constant, it is necessary to use a high impedance voltage follower 38 in the feedback loop as a buffer.
In this configuration the system can accommodate fairly large drifts of the input signal 31. The amount which can be corrected depends on the amount of feedback applied. As the capacitor 37 charges alternately in opposite directions an approximately triangular waveform in quadrature with the input wave signal 31 and with magnitude inversely proportional to frequency is superimposed on the main voltage.
This waveform is also fed back to the input B and modifies the input to the summing amplifier 35 slightly. To minimise this effect two stages of zero correction in series may be used.
Figure 3 shows the variation in the zero tracking performance of two of the circuits of Figure 2 in series, as the feedback gain is varied for different time constants. The time constant and the feedback gain are determined by practical considerations of the amplitudes and frequencies of the signals to be measured and the magnitude and rate of the zero drift likely to be encountered.
Figure 4 shows the waveforms of the zero tracking circuit of Figure 2 with zero DC offset.
The input at A is a symmetrical triangular waveform and the waveforms at B, C, D and E, indicated on Figure 2, are shown.
As the input at A rises and falls relative to zero the waveform at D switches into alternate positive and negative saturation so that the waveform at D is a train of constant amplitude pulses of alternating sign with the pulse durations approximately corresponding to the zero crossing times of the waveform at A.
As the capacitor (C) 37 is charged and discharged through the resistor (R) 36 with time constant RC the waveform produced at E is similar to that shown.
Since the wave period is very short compared with the time constant RC the waveform is almost triangular in shape. The signal at E is reduced by the factor k, where Vg k= Vf (Vf being the voltage at the output F of the voltage follower and Vg being the reduced voltage at G) and fed back to the input B. The feedback ripple at B is almost exactly in quadrature with the input so that the maxima of the feedback ripple occur at the zero crossings of the input and vice versa, minimising the resulting errors as shown at output C.
Figure 5 shows the waveforms which occur in the circuit of Figure 2 when a positive offset is applied to the input signal at A. The pulse waveform at D is also offset from zero. The waveform at E is asymmetric about the zero line but a corrected offset can be drawn so that the waveform is symmetrical with the corresponding feedback ripple at B being the same as for the zero offset case (Figure 4). The feedback ripple at B is again almost exactly in quadrature with the input at A so that resulting errors are again minimised giving an approximately symmetrical output at C.
Figure 6 shows the recording of an incidence of slam induced whipping. Trace 40 is the original signal, trace 41 has been filtered and zero corrected (signal 20, Figure 2) and trace 42 is the wave component of trace 41 after slam filtering (signal 22, Figure 2). The positions of the zero levels at the ends of the three traces indicate the magnitude of the errors which would arise in measuring the positive and negative maxima from the original recording.
The zero tracking extreme strain recorder Is capable of recording positive and negative extreme wave induced strains. In addition to the total strain, with and without zero correction, the component due to quasi-static wave loading, obtained by electronic filtering to remove the slam induced whipping component, is also recorded. The strains from two or more strain gauge locations are recorded hourly, together with day and time clock signals.
While this strain recorder is designed to suit the recording of wave induced strains in ships, it is capable of being adapted to other applications such as for use in marine and civil engineering structures which undergo structural stresses of various types.
It will be apparent also that the zero drift compensating circuits will be of use in any system where an oscillatory input signal experiences zero drift, for example in many marine and civil engineering applications. Other applications are also possible including medical heart rate monitors und similar systems.
The zero tracking circuits will operate at fairly high frequencies. One consequence of this is the possible use of the circuit for automatic zero correction of analogue tape recordings of ship trials played back at a higher speed than that used when the recording was made. In general, the performance of the circuit improves with increasing frequency so long as the speed is not so high that the rate of zero drift exceeds the response rate of the zero tracking circuit. This problem can easily be overcome by reducing the value of the resistor (R) 36, by the same factor as the playback to recording speed ratio.

Claims (16)

1. A compensating circuit for reducing a drift from zero of the mean level of an oscillatory electrical signal comprising: a. a means to convert an input oscillatory electrical signal into a train of constant amplitude rectangular pulses of alternating sign with changes of phase occurring at the zero crossing times of the input signal; b. an integrator connected to the converting means such that the mean level of voltage output from the integrator is proportional to any drift from zero of the input signal; and c. feedback from the output of the integrator to an adder whereby the feedback of the integrator output is added to the oscillatory electrical signal to produce the zero compensated input signal.
2. A compensating signal according to claim 1 wherein the converting means is a high gain amplifier which is switched to positive or negative saturation as the input signal changes from zero.
3. A compensating circuit according to claim 1 or claim 2 wherein the means for adding the feedback of the integrator output to the oscillatory electrical signal is a summing amplifier.
4. A compensating circuit according to any one preceding claim wherein a high impedance voltage follower is included in the feedback means.
5. A compensating circuit according to any one preceding claim wherein the integrator is formed by a series resistor and shunt capacitor.
6. A compensating circuit wherein two zero compensating circuits according to any one preceding claim are used in series so as to minimise distortion of the oscillatory electrical signal.
7. An extreme value strain recording system comprising a compensating circuit according to any one preceding claim wherein the circuit is used to compensate for zero drift of the input signals to the strain recorder.
8. An extreme value strain recording system according to claim 7 further comprising: a. a means of converting strain to electrical signals; and b. a means of recording the signals.
9. A strain recording system according to claim 8 wherein the system comprises a strain gauge, a strain gauge amplifier, a peak detector, connected between the compensating means, and recording means.
10. A strain recording system according to claim 8 or claim 9 wherein an input filter is included to filter out transient interference from the electrical signal.
11. A strain recording system for use on marine structures according to any one of claims 8 to 10 wherein a slam filter is included to separate the components of the signal wave into the slam induced whipping and wave loading constituents.
12. A strain recording system according to claim 10 wherein the input filter is a Butterworth 2-pole universal active filter.
1 3. A strain recording system according to claim 11 wherein the slam filter is a 4-pole Butterworth filter with high pass and low pass outputs.
14. A strain recording system according to claim 1 3 wherein the high pass output from the slam filter is passed to another high pass filter to remove any remaining wave loading component from the signal.
1 5. A strain recording system according to any one of claims 9 to 14 wherein the peak detection and recording system comprises a data recorder with digital tracking peak recording circuits.
16. A compensating circuit for reducing a drift from zero of the mean level of an oscillatory electrical signal as hereinbefore described with reference to Figures 2, 4 and 5 of the drawings.
1 7. An extreme value strain recording system as hereinbefore described with references to figures 1,3 and 6 of the drawings.
GB08418685A 1983-07-29 1984-07-23 Drift compensation Withdrawn GB2144289A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB08418685A GB2144289A (en) 1983-07-29 1984-07-23 Drift compensation

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB838320556A GB8320556D0 (en) 1983-07-29 1983-07-29 Drift compensating circuits for oscillatory electrical signals
GB08418685A GB2144289A (en) 1983-07-29 1984-07-23 Drift compensation

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GB8418685D0 GB8418685D0 (en) 1984-08-30
GB2144289A true GB2144289A (en) 1985-02-27

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1068024A (en) * 1963-02-21 1967-05-10 Plessey Uk Ltd Improvements in or relating to discrete-level pulse transmission systems
GB2062393A (en) * 1979-04-25 1981-05-20 Fujitsu Ltd Offset compensating circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1068024A (en) * 1963-02-21 1967-05-10 Plessey Uk Ltd Improvements in or relating to discrete-level pulse transmission systems
GB2062393A (en) * 1979-04-25 1981-05-20 Fujitsu Ltd Offset compensating circuit

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